bfin_5xx.c 25 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Rev: $Id: bfin_5xx.c,v 1.19 2006/09/24 02:33:53 aubrey Exp $
  10. *
  11. * Modified:
  12. * Copyright 2006 Analog Devices Inc.
  13. *
  14. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful,
  22. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  24. * GNU General Public License for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, see the file COPYING, or write
  28. * to the Free Software Foundation, Inc.,
  29. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  30. */
  31. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  32. #define SUPPORT_SYSRQ
  33. #endif
  34. #include <linux/module.h>
  35. #include <linux/ioport.h>
  36. #include <linux/init.h>
  37. #include <linux/console.h>
  38. #include <linux/sysrq.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/tty.h>
  41. #include <linux/tty_flip.h>
  42. #include <linux/serial_core.h>
  43. #include <asm/gpio.h>
  44. #include <asm/mach/bfin_serial_5xx.h>
  45. #ifdef CONFIG_SERIAL_BFIN_DMA
  46. #include <linux/dma-mapping.h>
  47. #include <asm/io.h>
  48. #include <asm/irq.h>
  49. #include <asm/cacheflush.h>
  50. #endif
  51. /* UART name and device definitions */
  52. #define BFIN_SERIAL_NAME "ttyBF"
  53. #define BFIN_SERIAL_MAJOR 204
  54. #define BFIN_SERIAL_MINOR 64
  55. /*
  56. * Setup for console. Argument comes from the menuconfig
  57. */
  58. #define DMA_RX_XCOUNT 512
  59. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  60. #define DMA_RX_FLUSH_JIFFIES 5
  61. #ifdef CONFIG_SERIAL_BFIN_DMA
  62. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  63. #else
  64. static void bfin_serial_do_work(struct work_struct *work);
  65. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  66. static void local_put_char(struct bfin_serial_port *uart, char ch);
  67. #endif
  68. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  69. /*
  70. * interrupts are disabled on entry
  71. */
  72. static void bfin_serial_stop_tx(struct uart_port *port)
  73. {
  74. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  75. #ifdef CONFIG_SERIAL_BFIN_DMA
  76. disable_dma(uart->tx_dma_channel);
  77. #else
  78. unsigned short ier;
  79. ier = UART_GET_IER(uart);
  80. ier &= ~ETBEI;
  81. UART_PUT_IER(uart, ier);
  82. #endif
  83. }
  84. /*
  85. * port is locked and interrupts are disabled
  86. */
  87. static void bfin_serial_start_tx(struct uart_port *port)
  88. {
  89. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  90. #ifdef CONFIG_SERIAL_BFIN_DMA
  91. bfin_serial_dma_tx_chars(uart);
  92. #else
  93. unsigned short ier;
  94. ier = UART_GET_IER(uart);
  95. ier |= ETBEI;
  96. UART_PUT_IER(uart, ier);
  97. bfin_serial_tx_chars(uart);
  98. #endif
  99. }
  100. /*
  101. * Interrupts are enabled
  102. */
  103. static void bfin_serial_stop_rx(struct uart_port *port)
  104. {
  105. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  106. unsigned short ier;
  107. ier = UART_GET_IER(uart);
  108. ier &= ~ERBFI;
  109. UART_PUT_IER(uart, ier);
  110. }
  111. /*
  112. * Set the modem control timer to fire immediately.
  113. */
  114. static void bfin_serial_enable_ms(struct uart_port *port)
  115. {
  116. }
  117. #ifdef CONFIG_SERIAL_BFIN_PIO
  118. static void local_put_char(struct bfin_serial_port *uart, char ch)
  119. {
  120. unsigned short status;
  121. int flags = 0;
  122. spin_lock_irqsave(&uart->port.lock, flags);
  123. do {
  124. status = UART_GET_LSR(uart);
  125. } while (!(status & THRE));
  126. UART_PUT_CHAR(uart, ch);
  127. SSYNC();
  128. spin_unlock_irqrestore(&uart->port.lock, flags);
  129. }
  130. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  131. {
  132. struct tty_struct *tty = uart->port.info?uart->port.info->tty:0;
  133. unsigned int status, ch, flg;
  134. #ifdef BF533_FAMILY
  135. static int in_break = 0;
  136. #endif
  137. status = UART_GET_LSR(uart);
  138. ch = UART_GET_CHAR(uart);
  139. uart->port.icount.rx++;
  140. #ifdef BF533_FAMILY
  141. /* The BF533 family of processors have a nice misbehavior where
  142. * they continuously generate characters for a "single" break.
  143. * We have to basically ignore this flood until the "next" valid
  144. * character comes across. All other Blackfin families operate
  145. * properly though.
  146. */
  147. if (in_break) {
  148. if (ch != 0) {
  149. in_break = 0;
  150. ch = UART_GET_CHAR(uart);
  151. }
  152. return;
  153. }
  154. #endif
  155. if (status & BI) {
  156. #ifdef BF533_FAMILY
  157. in_break = 1;
  158. #endif
  159. uart->port.icount.brk++;
  160. if (uart_handle_break(&uart->port))
  161. goto ignore_char;
  162. flg = TTY_BREAK;
  163. } else if (status & PE) {
  164. flg = TTY_PARITY;
  165. uart->port.icount.parity++;
  166. } else if (status & OE) {
  167. flg = TTY_OVERRUN;
  168. uart->port.icount.overrun++;
  169. } else if (status & FE) {
  170. flg = TTY_FRAME;
  171. uart->port.icount.frame++;
  172. } else
  173. flg = TTY_NORMAL;
  174. if (uart_handle_sysrq_char(&uart->port, ch))
  175. goto ignore_char;
  176. if (tty)
  177. uart_insert_char(&uart->port, status, 2, ch, flg);
  178. ignore_char:
  179. if (tty)
  180. tty_flip_buffer_push(tty);
  181. }
  182. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  183. {
  184. struct circ_buf *xmit = &uart->port.info->xmit;
  185. if (uart->port.x_char) {
  186. UART_PUT_CHAR(uart, uart->port.x_char);
  187. uart->port.icount.tx++;
  188. uart->port.x_char = 0;
  189. return;
  190. }
  191. /*
  192. * Check the modem control lines before
  193. * transmitting anything.
  194. */
  195. bfin_serial_mctrl_check(uart);
  196. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  197. bfin_serial_stop_tx(&uart->port);
  198. return;
  199. }
  200. local_put_char(uart, xmit->buf[xmit->tail]);
  201. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  202. uart->port.icount.tx++;
  203. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  204. uart_write_wakeup(&uart->port);
  205. if (uart_circ_empty(xmit))
  206. bfin_serial_stop_tx(&uart->port);
  207. }
  208. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  209. {
  210. struct bfin_serial_port *uart = dev_id;
  211. spin_lock(&uart->port.lock);
  212. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
  213. bfin_serial_rx_chars(uart);
  214. spin_unlock(&uart->port.lock);
  215. return IRQ_HANDLED;
  216. }
  217. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  218. {
  219. struct bfin_serial_port *uart = dev_id;
  220. unsigned short status;
  221. spin_lock(&uart->port.lock);
  222. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
  223. bfin_serial_tx_chars(uart);
  224. spin_unlock(&uart->port.lock);
  225. return IRQ_HANDLED;
  226. }
  227. static void bfin_serial_do_work(struct work_struct *work)
  228. {
  229. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  230. bfin_serial_mctrl_check(uart);
  231. }
  232. #endif
  233. #ifdef CONFIG_SERIAL_BFIN_DMA
  234. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  235. {
  236. struct circ_buf *xmit = &uart->port.info->xmit;
  237. unsigned short ier;
  238. int flags = 0;
  239. if (!uart->tx_done)
  240. return;
  241. uart->tx_done = 0;
  242. if (uart->port.x_char) {
  243. UART_PUT_CHAR(uart, uart->port.x_char);
  244. uart->port.icount.tx++;
  245. uart->port.x_char = 0;
  246. uart->tx_done = 1;
  247. return;
  248. }
  249. /*
  250. * Check the modem control lines before
  251. * transmitting anything.
  252. */
  253. bfin_serial_mctrl_check(uart);
  254. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  255. bfin_serial_stop_tx(&uart->port);
  256. uart->tx_done = 1;
  257. return;
  258. }
  259. spin_lock_irqsave(&uart->port.lock, flags);
  260. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  261. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  262. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  263. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  264. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  265. set_dma_config(uart->tx_dma_channel,
  266. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  267. INTR_ON_BUF,
  268. DIMENSION_LINEAR,
  269. DATA_SIZE_8));
  270. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  271. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  272. set_dma_x_modify(uart->tx_dma_channel, 1);
  273. enable_dma(uart->tx_dma_channel);
  274. ier = UART_GET_IER(uart);
  275. ier |= ETBEI;
  276. UART_PUT_IER(uart, ier);
  277. spin_unlock_irqrestore(&uart->port.lock, flags);
  278. }
  279. static void bfin_serial_dma_rx_chars(struct bfin_serial_port * uart)
  280. {
  281. struct tty_struct *tty = uart->port.info->tty;
  282. int i, flg, status;
  283. status = UART_GET_LSR(uart);
  284. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  285. if (status & BI) {
  286. uart->port.icount.brk++;
  287. if (uart_handle_break(&uart->port))
  288. goto dma_ignore_char;
  289. flg = TTY_BREAK;
  290. } else if (status & PE) {
  291. flg = TTY_PARITY;
  292. uart->port.icount.parity++;
  293. } else if (status & OE) {
  294. flg = TTY_OVERRUN;
  295. uart->port.icount.overrun++;
  296. } else if (status & FE) {
  297. flg = TTY_FRAME;
  298. uart->port.icount.frame++;
  299. } else
  300. flg = TTY_NORMAL;
  301. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  302. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  303. goto dma_ignore_char;
  304. uart_insert_char(&uart->port, status, 2, uart->rx_dma_buf.buf[i], flg);
  305. }
  306. dma_ignore_char:
  307. tty_flip_buffer_push(tty);
  308. }
  309. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  310. {
  311. int x_pos, pos;
  312. int flags = 0;
  313. bfin_serial_dma_tx_chars(uart);
  314. spin_lock_irqsave(&uart->port.lock, flags);
  315. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  316. if (x_pos == DMA_RX_XCOUNT)
  317. x_pos = 0;
  318. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  319. if (pos>uart->rx_dma_buf.tail) {
  320. uart->rx_dma_buf.tail = pos;
  321. bfin_serial_dma_rx_chars(uart);
  322. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  323. }
  324. spin_unlock_irqrestore(&uart->port.lock, flags);
  325. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  326. add_timer(&(uart->rx_dma_timer));
  327. }
  328. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  329. {
  330. struct bfin_serial_port *uart = dev_id;
  331. struct circ_buf *xmit = &uart->port.info->xmit;
  332. unsigned short ier;
  333. spin_lock(&uart->port.lock);
  334. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  335. clear_dma_irqstat(uart->tx_dma_channel);
  336. disable_dma(uart->tx_dma_channel);
  337. ier = UART_GET_IER(uart);
  338. ier &= ~ETBEI;
  339. UART_PUT_IER(uart, ier);
  340. xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
  341. uart->port.icount.tx+=uart->tx_count;
  342. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  343. uart_write_wakeup(&uart->port);
  344. if (uart_circ_empty(xmit))
  345. bfin_serial_stop_tx(&uart->port);
  346. uart->tx_done = 1;
  347. }
  348. spin_unlock(&uart->port.lock);
  349. return IRQ_HANDLED;
  350. }
  351. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  352. {
  353. struct bfin_serial_port *uart = dev_id;
  354. unsigned short irqstat;
  355. uart->rx_dma_nrows++;
  356. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  357. uart->rx_dma_nrows = 0;
  358. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  359. bfin_serial_dma_rx_chars(uart);
  360. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  361. }
  362. spin_lock(&uart->port.lock);
  363. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  364. clear_dma_irqstat(uart->rx_dma_channel);
  365. spin_unlock(&uart->port.lock);
  366. return IRQ_HANDLED;
  367. }
  368. #endif
  369. /*
  370. * Return TIOCSER_TEMT when transmitter is not busy.
  371. */
  372. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  373. {
  374. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  375. unsigned short lsr;
  376. lsr = UART_GET_LSR(uart);
  377. if (lsr & TEMT)
  378. return TIOCSER_TEMT;
  379. else
  380. return 0;
  381. }
  382. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  383. {
  384. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  385. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  386. if (uart->cts_pin < 0)
  387. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  388. if (gpio_get_value(uart->cts_pin))
  389. return TIOCM_DSR | TIOCM_CAR;
  390. else
  391. #endif
  392. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  393. }
  394. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  395. {
  396. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  397. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  398. if (uart->rts_pin < 0)
  399. return;
  400. if (mctrl & TIOCM_RTS)
  401. gpio_set_value(uart->rts_pin, 0);
  402. else
  403. gpio_set_value(uart->rts_pin, 1);
  404. #endif
  405. }
  406. /*
  407. * Handle any change of modem status signal since we were last called.
  408. */
  409. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  410. {
  411. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  412. unsigned int status;
  413. # ifdef CONFIG_SERIAL_BFIN_DMA
  414. struct uart_info *info = uart->port.info;
  415. struct tty_struct *tty = info->tty;
  416. status = bfin_serial_get_mctrl(&uart->port);
  417. if (!(status & TIOCM_CTS)) {
  418. tty->hw_stopped = 1;
  419. } else {
  420. tty->hw_stopped = 0;
  421. }
  422. # else
  423. status = bfin_serial_get_mctrl(&uart->port);
  424. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  425. if (!(status & TIOCM_CTS))
  426. schedule_work(&uart->cts_workqueue);
  427. # endif
  428. #endif
  429. }
  430. /*
  431. * Interrupts are always disabled.
  432. */
  433. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  434. {
  435. }
  436. static int bfin_serial_startup(struct uart_port *port)
  437. {
  438. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  439. #ifdef CONFIG_SERIAL_BFIN_DMA
  440. dma_addr_t dma_handle;
  441. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  442. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  443. return -EBUSY;
  444. }
  445. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  446. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  447. free_dma(uart->rx_dma_channel);
  448. return -EBUSY;
  449. }
  450. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  451. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  452. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  453. uart->rx_dma_buf.head = 0;
  454. uart->rx_dma_buf.tail = 0;
  455. uart->rx_dma_nrows = 0;
  456. set_dma_config(uart->rx_dma_channel,
  457. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  458. INTR_ON_ROW, DIMENSION_2D,
  459. DATA_SIZE_8));
  460. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  461. set_dma_x_modify(uart->rx_dma_channel, 1);
  462. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  463. set_dma_y_modify(uart->rx_dma_channel, 1);
  464. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  465. enable_dma(uart->rx_dma_channel);
  466. uart->rx_dma_timer.data = (unsigned long)(uart);
  467. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  468. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  469. add_timer(&(uart->rx_dma_timer));
  470. #else
  471. if (request_irq
  472. (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  473. "BFIN_UART_RX", uart)) {
  474. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  475. return -EBUSY;
  476. }
  477. if (request_irq
  478. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  479. "BFIN_UART_TX", uart)) {
  480. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  481. free_irq(uart->port.irq, uart);
  482. return -EBUSY;
  483. }
  484. #endif
  485. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  486. return 0;
  487. }
  488. static void bfin_serial_shutdown(struct uart_port *port)
  489. {
  490. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  491. #ifdef CONFIG_SERIAL_BFIN_DMA
  492. disable_dma(uart->tx_dma_channel);
  493. free_dma(uart->tx_dma_channel);
  494. disable_dma(uart->rx_dma_channel);
  495. free_dma(uart->rx_dma_channel);
  496. del_timer(&(uart->rx_dma_timer));
  497. #else
  498. free_irq(uart->port.irq, uart);
  499. free_irq(uart->port.irq+1, uart);
  500. #endif
  501. }
  502. static void
  503. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  504. struct ktermios *old)
  505. {
  506. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  507. unsigned long flags;
  508. unsigned int baud, quot;
  509. unsigned short val, ier, lsr, lcr = 0;
  510. switch (termios->c_cflag & CSIZE) {
  511. case CS8:
  512. lcr = WLS(8);
  513. break;
  514. case CS7:
  515. lcr = WLS(7);
  516. break;
  517. case CS6:
  518. lcr = WLS(6);
  519. break;
  520. case CS5:
  521. lcr = WLS(5);
  522. break;
  523. default:
  524. printk(KERN_ERR "%s: word lengh not supported\n",
  525. __FUNCTION__);
  526. }
  527. if (termios->c_cflag & CSTOPB)
  528. lcr |= STB;
  529. if (termios->c_cflag & PARENB) {
  530. lcr |= PEN;
  531. if (!(termios->c_cflag & PARODD))
  532. lcr |= EPS;
  533. }
  534. /* These controls are not implemented for this port */
  535. termios->c_iflag |= INPCK | BRKINT | PARMRK;
  536. termios->c_iflag &= ~(IGNPAR | IGNBRK);
  537. /* These controls are not implemented for this port */
  538. termios->c_iflag |= INPCK | BRKINT | PARMRK;
  539. termios->c_iflag &= ~(IGNPAR | IGNBRK);
  540. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  541. quot = uart_get_divisor(port, baud);
  542. spin_lock_irqsave(&uart->port.lock, flags);
  543. do {
  544. lsr = UART_GET_LSR(uart);
  545. } while (!(lsr & TEMT));
  546. /* Disable UART */
  547. ier = UART_GET_IER(uart);
  548. UART_PUT_IER(uart, 0);
  549. /* Set DLAB in LCR to Access DLL and DLH */
  550. val = UART_GET_LCR(uart);
  551. val |= DLAB;
  552. UART_PUT_LCR(uart, val);
  553. SSYNC();
  554. UART_PUT_DLL(uart, quot & 0xFF);
  555. SSYNC();
  556. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  557. SSYNC();
  558. /* Clear DLAB in LCR to Access THR RBR IER */
  559. val = UART_GET_LCR(uart);
  560. val &= ~DLAB;
  561. UART_PUT_LCR(uart, val);
  562. SSYNC();
  563. UART_PUT_LCR(uart, lcr);
  564. /* Enable UART */
  565. UART_PUT_IER(uart, ier);
  566. val = UART_GET_GCTL(uart);
  567. val |= UCEN;
  568. UART_PUT_GCTL(uart, val);
  569. spin_unlock_irqrestore(&uart->port.lock, flags);
  570. }
  571. static const char *bfin_serial_type(struct uart_port *port)
  572. {
  573. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  574. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  575. }
  576. /*
  577. * Release the memory region(s) being used by 'port'.
  578. */
  579. static void bfin_serial_release_port(struct uart_port *port)
  580. {
  581. }
  582. /*
  583. * Request the memory region(s) being used by 'port'.
  584. */
  585. static int bfin_serial_request_port(struct uart_port *port)
  586. {
  587. return 0;
  588. }
  589. /*
  590. * Configure/autoconfigure the port.
  591. */
  592. static void bfin_serial_config_port(struct uart_port *port, int flags)
  593. {
  594. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  595. if (flags & UART_CONFIG_TYPE &&
  596. bfin_serial_request_port(&uart->port) == 0)
  597. uart->port.type = PORT_BFIN;
  598. }
  599. /*
  600. * Verify the new serial_struct (for TIOCSSERIAL).
  601. * The only change we allow are to the flags and type, and
  602. * even then only between PORT_BFIN and PORT_UNKNOWN
  603. */
  604. static int
  605. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  606. {
  607. return 0;
  608. }
  609. static struct uart_ops bfin_serial_pops = {
  610. .tx_empty = bfin_serial_tx_empty,
  611. .set_mctrl = bfin_serial_set_mctrl,
  612. .get_mctrl = bfin_serial_get_mctrl,
  613. .stop_tx = bfin_serial_stop_tx,
  614. .start_tx = bfin_serial_start_tx,
  615. .stop_rx = bfin_serial_stop_rx,
  616. .enable_ms = bfin_serial_enable_ms,
  617. .break_ctl = bfin_serial_break_ctl,
  618. .startup = bfin_serial_startup,
  619. .shutdown = bfin_serial_shutdown,
  620. .set_termios = bfin_serial_set_termios,
  621. .type = bfin_serial_type,
  622. .release_port = bfin_serial_release_port,
  623. .request_port = bfin_serial_request_port,
  624. .config_port = bfin_serial_config_port,
  625. .verify_port = bfin_serial_verify_port,
  626. };
  627. static void __init bfin_serial_init_ports(void)
  628. {
  629. static int first = 1;
  630. int i;
  631. if (!first)
  632. return;
  633. first = 0;
  634. for (i = 0; i < nr_ports; i++) {
  635. bfin_serial_ports[i].port.uartclk = get_sclk();
  636. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  637. bfin_serial_ports[i].port.line = i;
  638. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  639. bfin_serial_ports[i].port.membase =
  640. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  641. bfin_serial_ports[i].port.mapbase =
  642. bfin_serial_resource[i].uart_base_addr;
  643. bfin_serial_ports[i].port.irq =
  644. bfin_serial_resource[i].uart_irq;
  645. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  646. #ifdef CONFIG_SERIAL_BFIN_DMA
  647. bfin_serial_ports[i].tx_done = 1;
  648. bfin_serial_ports[i].tx_count = 0;
  649. bfin_serial_ports[i].tx_dma_channel =
  650. bfin_serial_resource[i].uart_tx_dma_channel;
  651. bfin_serial_ports[i].rx_dma_channel =
  652. bfin_serial_resource[i].uart_rx_dma_channel;
  653. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  654. #else
  655. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  656. #endif
  657. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  658. bfin_serial_ports[i].cts_pin =
  659. bfin_serial_resource[i].uart_cts_pin;
  660. bfin_serial_ports[i].rts_pin =
  661. bfin_serial_resource[i].uart_rts_pin;
  662. #endif
  663. bfin_serial_hw_init(&bfin_serial_ports[i]);
  664. }
  665. }
  666. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  667. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  668. {
  669. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  670. while (!(UART_GET_LSR(uart)))
  671. barrier();
  672. UART_PUT_CHAR(uart, ch);
  673. SSYNC();
  674. }
  675. /*
  676. * Interrupts are disabled on entering
  677. */
  678. static void
  679. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  680. {
  681. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  682. int flags = 0;
  683. spin_lock_irqsave(&uart->port.lock, flags);
  684. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  685. spin_unlock_irqrestore(&uart->port.lock, flags);
  686. }
  687. /*
  688. * If the port was already initialised (eg, by a boot loader),
  689. * try to determine the current setup.
  690. */
  691. static void __init
  692. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  693. int *parity, int *bits)
  694. {
  695. unsigned short status;
  696. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  697. if (status == (ERBFI | ETBEI)) {
  698. /* ok, the port was enabled */
  699. unsigned short lcr, val;
  700. unsigned short dlh, dll;
  701. lcr = UART_GET_LCR(uart);
  702. *parity = 'n';
  703. if (lcr & PEN) {
  704. if (lcr & EPS)
  705. *parity = 'e';
  706. else
  707. *parity = 'o';
  708. }
  709. switch (lcr & 0x03) {
  710. case 0: *bits = 5; break;
  711. case 1: *bits = 6; break;
  712. case 2: *bits = 7; break;
  713. case 3: *bits = 8; break;
  714. }
  715. /* Set DLAB in LCR to Access DLL and DLH */
  716. val = UART_GET_LCR(uart);
  717. val |= DLAB;
  718. UART_PUT_LCR(uart, val);
  719. dll = UART_GET_DLL(uart);
  720. dlh = UART_GET_DLH(uart);
  721. /* Clear DLAB in LCR to Access THR RBR IER */
  722. val = UART_GET_LCR(uart);
  723. val &= ~DLAB;
  724. UART_PUT_LCR(uart, val);
  725. *baud = get_sclk() / (16*(dll | dlh << 8));
  726. }
  727. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  728. }
  729. static int __init
  730. bfin_serial_console_setup(struct console *co, char *options)
  731. {
  732. struct bfin_serial_port *uart;
  733. int baud = 57600;
  734. int bits = 8;
  735. int parity = 'n';
  736. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  737. int flow = 'r';
  738. #else
  739. int flow = 'n';
  740. #endif
  741. /*
  742. * Check whether an invalid uart number has been specified, and
  743. * if so, search for the first available port that does have
  744. * console support.
  745. */
  746. if (co->index == -1 || co->index >= nr_ports)
  747. co->index = 0;
  748. uart = &bfin_serial_ports[co->index];
  749. if (options)
  750. uart_parse_options(options, &baud, &parity, &bits, &flow);
  751. else
  752. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  753. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  754. }
  755. static struct uart_driver bfin_serial_reg;
  756. static struct console bfin_serial_console = {
  757. .name = BFIN_SERIAL_NAME,
  758. .write = bfin_serial_console_write,
  759. .device = uart_console_device,
  760. .setup = bfin_serial_console_setup,
  761. .flags = CON_PRINTBUFFER,
  762. .index = -1,
  763. .data = &bfin_serial_reg,
  764. };
  765. static int __init bfin_serial_rs_console_init(void)
  766. {
  767. bfin_serial_init_ports();
  768. register_console(&bfin_serial_console);
  769. return 0;
  770. }
  771. console_initcall(bfin_serial_rs_console_init);
  772. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  773. #else
  774. #define BFIN_SERIAL_CONSOLE NULL
  775. #endif
  776. static struct uart_driver bfin_serial_reg = {
  777. .owner = THIS_MODULE,
  778. .driver_name = "bfin-uart",
  779. .dev_name = BFIN_SERIAL_NAME,
  780. .major = BFIN_SERIAL_MAJOR,
  781. .minor = BFIN_SERIAL_MINOR,
  782. .nr = NR_PORTS,
  783. .cons = BFIN_SERIAL_CONSOLE,
  784. };
  785. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  786. {
  787. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  788. if (uart)
  789. uart_suspend_port(&bfin_serial_reg, &uart->port);
  790. return 0;
  791. }
  792. static int bfin_serial_resume(struct platform_device *dev)
  793. {
  794. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  795. if (uart)
  796. uart_resume_port(&bfin_serial_reg, &uart->port);
  797. return 0;
  798. }
  799. static int bfin_serial_probe(struct platform_device *dev)
  800. {
  801. struct resource *res = dev->resource;
  802. int i;
  803. for (i = 0; i < dev->num_resources; i++, res++)
  804. if (res->flags & IORESOURCE_MEM)
  805. break;
  806. if (i < dev->num_resources) {
  807. for (i = 0; i < nr_ports; i++, res++) {
  808. if (bfin_serial_ports[i].port.mapbase != res->start)
  809. continue;
  810. bfin_serial_ports[i].port.dev = &dev->dev;
  811. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  812. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  813. }
  814. }
  815. return 0;
  816. }
  817. static int bfin_serial_remove(struct platform_device *pdev)
  818. {
  819. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  820. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  821. gpio_free(uart->cts_pin);
  822. gpio_free(uart->rts_pin);
  823. #endif
  824. platform_set_drvdata(pdev, NULL);
  825. if (uart)
  826. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  827. return 0;
  828. }
  829. static struct platform_driver bfin_serial_driver = {
  830. .probe = bfin_serial_probe,
  831. .remove = bfin_serial_remove,
  832. .suspend = bfin_serial_suspend,
  833. .resume = bfin_serial_resume,
  834. .driver = {
  835. .name = "bfin-uart",
  836. },
  837. };
  838. static int __init bfin_serial_init(void)
  839. {
  840. int ret;
  841. pr_info("Serial: Blackfin serial driver\n");
  842. bfin_serial_init_ports();
  843. ret = uart_register_driver(&bfin_serial_reg);
  844. if (ret == 0) {
  845. ret = platform_driver_register(&bfin_serial_driver);
  846. if (ret) {
  847. pr_debug("uart register failed\n");
  848. uart_unregister_driver(&bfin_serial_reg);
  849. }
  850. }
  851. return ret;
  852. }
  853. static void __exit bfin_serial_exit(void)
  854. {
  855. platform_driver_unregister(&bfin_serial_driver);
  856. uart_unregister_driver(&bfin_serial_reg);
  857. }
  858. module_init(bfin_serial_init);
  859. module_exit(bfin_serial_exit);
  860. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  861. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  862. MODULE_LICENSE("GPL");
  863. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);