Kconfig 51 KB

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  1. config ARM
  2. bool
  3. default y
  4. select HAVE_AOUT
  5. select HAVE_IDE
  6. select HAVE_MEMBLOCK
  7. select RTC_LIB
  8. select SYS_SUPPORTS_APM_EMULATION
  9. select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI)
  10. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  11. select HAVE_ARCH_KGDB
  12. select HAVE_KPROBES if (!XIP_KERNEL)
  13. select HAVE_KRETPROBES if (HAVE_KPROBES)
  14. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  15. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  16. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  17. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  18. select HAVE_GENERIC_DMA_COHERENT
  19. select HAVE_KERNEL_GZIP
  20. select HAVE_KERNEL_LZO
  21. select HAVE_KERNEL_LZMA
  22. select HAVE_IRQ_WORK
  23. select HAVE_PERF_EVENTS
  24. select PERF_USE_VMALLOC
  25. select HAVE_REGS_AND_STACK_ACCESS_API
  26. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
  27. help
  28. The ARM series is a line of low-power-consumption RISC chip designs
  29. licensed by ARM Ltd and targeted at embedded applications and
  30. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  31. manufactured, but legacy ARM-based PC hardware remains popular in
  32. Europe. There is an ARM Linux project with a web page at
  33. <http://www.arm.linux.org.uk/>.
  34. config HAVE_PWM
  35. bool
  36. config SYS_SUPPORTS_APM_EMULATION
  37. bool
  38. config HAVE_SCHED_CLOCK
  39. bool
  40. config GENERIC_GPIO
  41. bool
  42. config ARCH_USES_GETTIMEOFFSET
  43. bool
  44. default n
  45. config GENERIC_CLOCKEVENTS
  46. bool
  47. config GENERIC_CLOCKEVENTS_BROADCAST
  48. bool
  49. depends on GENERIC_CLOCKEVENTS
  50. default y if SMP
  51. config HAVE_TCM
  52. bool
  53. select GENERIC_ALLOCATOR
  54. config HAVE_PROC_CPU
  55. bool
  56. config NO_IOPORT
  57. bool
  58. config EISA
  59. bool
  60. ---help---
  61. The Extended Industry Standard Architecture (EISA) bus was
  62. developed as an open alternative to the IBM MicroChannel bus.
  63. The EISA bus provided some of the features of the IBM MicroChannel
  64. bus while maintaining backward compatibility with cards made for
  65. the older ISA bus. The EISA bus saw limited use between 1988 and
  66. 1995 when it was made obsolete by the PCI bus.
  67. Say Y here if you are building a kernel for an EISA-based machine.
  68. Otherwise, say N.
  69. config SBUS
  70. bool
  71. config MCA
  72. bool
  73. help
  74. MicroChannel Architecture is found in some IBM PS/2 machines and
  75. laptops. It is a bus system similar to PCI or ISA. See
  76. <file:Documentation/mca.txt> (and especially the web page given
  77. there) before attempting to build an MCA bus kernel.
  78. config GENERIC_HARDIRQS
  79. bool
  80. default y
  81. config STACKTRACE_SUPPORT
  82. bool
  83. default y
  84. config HAVE_LATENCYTOP_SUPPORT
  85. bool
  86. depends on !SMP
  87. default y
  88. config LOCKDEP_SUPPORT
  89. bool
  90. default y
  91. config TRACE_IRQFLAGS_SUPPORT
  92. bool
  93. default y
  94. config HARDIRQS_SW_RESEND
  95. bool
  96. default y
  97. config GENERIC_IRQ_PROBE
  98. bool
  99. default y
  100. config GENERIC_LOCKBREAK
  101. bool
  102. default y
  103. depends on SMP && PREEMPT
  104. config RWSEM_GENERIC_SPINLOCK
  105. bool
  106. default y
  107. config RWSEM_XCHGADD_ALGORITHM
  108. bool
  109. config ARCH_HAS_ILOG2_U32
  110. bool
  111. config ARCH_HAS_ILOG2_U64
  112. bool
  113. config ARCH_HAS_CPUFREQ
  114. bool
  115. help
  116. Internal node to signify that the ARCH has CPUFREQ support
  117. and that the relevant menu configurations are displayed for
  118. it.
  119. config ARCH_HAS_CPU_IDLE_WAIT
  120. def_bool y
  121. config GENERIC_HWEIGHT
  122. bool
  123. default y
  124. config GENERIC_CALIBRATE_DELAY
  125. bool
  126. default y
  127. config ARCH_MAY_HAVE_PC_FDC
  128. bool
  129. config ZONE_DMA
  130. bool
  131. config NEED_DMA_MAP_STATE
  132. def_bool y
  133. config GENERIC_ISA_DMA
  134. bool
  135. config FIQ
  136. bool
  137. config ARCH_MTD_XIP
  138. bool
  139. config GENERIC_HARDIRQS_NO__DO_IRQ
  140. def_bool y
  141. config ARM_L1_CACHE_SHIFT_6
  142. bool
  143. help
  144. Setting ARM L1 cache line size to 64 Bytes.
  145. config VECTORS_BASE
  146. hex
  147. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  148. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  149. default 0x00000000
  150. help
  151. The base address of exception vectors.
  152. source "init/Kconfig"
  153. source "kernel/Kconfig.freezer"
  154. menu "System Type"
  155. config MMU
  156. bool "MMU-based Paged Memory Management Support"
  157. default y
  158. help
  159. Select if you want MMU-based virtualised addressing space
  160. support by paged memory management. If unsure, say 'Y'.
  161. #
  162. # The "ARM system type" choice list is ordered alphabetically by option
  163. # text. Please add new entries in the option alphabetic order.
  164. #
  165. choice
  166. prompt "ARM system type"
  167. default ARCH_VERSATILE
  168. config ARCH_AAEC2000
  169. bool "Agilent AAEC-2000 based"
  170. select CPU_ARM920T
  171. select ARM_AMBA
  172. select HAVE_CLK
  173. select ARCH_USES_GETTIMEOFFSET
  174. help
  175. This enables support for systems based on the Agilent AAEC-2000
  176. config ARCH_INTEGRATOR
  177. bool "ARM Ltd. Integrator family"
  178. select ARM_AMBA
  179. select ARCH_HAS_CPUFREQ
  180. select COMMON_CLKDEV
  181. select ICST
  182. select GENERIC_CLOCKEVENTS
  183. select PLAT_VERSATILE
  184. help
  185. Support for ARM's Integrator platform.
  186. config ARCH_REALVIEW
  187. bool "ARM Ltd. RealView family"
  188. select ARM_AMBA
  189. select COMMON_CLKDEV
  190. select ICST
  191. select GENERIC_CLOCKEVENTS
  192. select ARCH_WANT_OPTIONAL_GPIOLIB
  193. select PLAT_VERSATILE
  194. select ARM_TIMER_SP804
  195. select GPIO_PL061 if GPIOLIB
  196. help
  197. This enables support for ARM Ltd RealView boards.
  198. config ARCH_VERSATILE
  199. bool "ARM Ltd. Versatile family"
  200. select ARM_AMBA
  201. select ARM_VIC
  202. select COMMON_CLKDEV
  203. select ICST
  204. select GENERIC_CLOCKEVENTS
  205. select ARCH_WANT_OPTIONAL_GPIOLIB
  206. select PLAT_VERSATILE
  207. select ARM_TIMER_SP804
  208. help
  209. This enables support for ARM Ltd Versatile board.
  210. config ARCH_VEXPRESS
  211. bool "ARM Ltd. Versatile Express family"
  212. select ARCH_WANT_OPTIONAL_GPIOLIB
  213. select ARM_AMBA
  214. select ARM_TIMER_SP804
  215. select COMMON_CLKDEV
  216. select GENERIC_CLOCKEVENTS
  217. select HAVE_CLK
  218. select ICST
  219. select PLAT_VERSATILE
  220. help
  221. This enables support for the ARM Ltd Versatile Express boards.
  222. config ARCH_AT91
  223. bool "Atmel AT91"
  224. select ARCH_REQUIRE_GPIOLIB
  225. select HAVE_CLK
  226. help
  227. This enables support for systems based on the Atmel AT91RM9200,
  228. AT91SAM9 and AT91CAP9 processors.
  229. config ARCH_BCMRING
  230. bool "Broadcom BCMRING"
  231. depends on MMU
  232. select CPU_V6
  233. select ARM_AMBA
  234. select COMMON_CLKDEV
  235. select GENERIC_CLOCKEVENTS
  236. select ARCH_WANT_OPTIONAL_GPIOLIB
  237. help
  238. Support for Broadcom's BCMRing platform.
  239. config ARCH_CLPS711X
  240. bool "Cirrus Logic CLPS711x/EP721x-based"
  241. select CPU_ARM720T
  242. select ARCH_USES_GETTIMEOFFSET
  243. help
  244. Support for Cirrus Logic 711x/721x based boards.
  245. config ARCH_CNS3XXX
  246. bool "Cavium Networks CNS3XXX family"
  247. select CPU_V6
  248. select GENERIC_CLOCKEVENTS
  249. select ARM_GIC
  250. select PCI_DOMAINS if PCI
  251. help
  252. Support for Cavium Networks CNS3XXX platform.
  253. config ARCH_GEMINI
  254. bool "Cortina Systems Gemini"
  255. select CPU_FA526
  256. select ARCH_REQUIRE_GPIOLIB
  257. select ARCH_USES_GETTIMEOFFSET
  258. help
  259. Support for the Cortina Systems Gemini family SoCs
  260. config ARCH_EBSA110
  261. bool "EBSA-110"
  262. select CPU_SA110
  263. select ISA
  264. select NO_IOPORT
  265. select ARCH_USES_GETTIMEOFFSET
  266. help
  267. This is an evaluation board for the StrongARM processor available
  268. from Digital. It has limited hardware on-board, including an
  269. Ethernet interface, two PCMCIA sockets, two serial ports and a
  270. parallel port.
  271. config ARCH_EP93XX
  272. bool "EP93xx-based"
  273. select CPU_ARM920T
  274. select ARM_AMBA
  275. select ARM_VIC
  276. select COMMON_CLKDEV
  277. select ARCH_REQUIRE_GPIOLIB
  278. select ARCH_HAS_HOLES_MEMORYMODEL
  279. select ARCH_USES_GETTIMEOFFSET
  280. help
  281. This enables support for the Cirrus EP93xx series of CPUs.
  282. config ARCH_FOOTBRIDGE
  283. bool "FootBridge"
  284. select CPU_SA110
  285. select FOOTBRIDGE
  286. select ARCH_USES_GETTIMEOFFSET
  287. help
  288. Support for systems based on the DC21285 companion chip
  289. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  290. config ARCH_MXC
  291. bool "Freescale MXC/iMX-based"
  292. select GENERIC_CLOCKEVENTS
  293. select ARCH_REQUIRE_GPIOLIB
  294. select COMMON_CLKDEV
  295. help
  296. Support for Freescale MXC/iMX-based family of processors
  297. config ARCH_STMP3XXX
  298. bool "Freescale STMP3xxx"
  299. select CPU_ARM926T
  300. select COMMON_CLKDEV
  301. select ARCH_REQUIRE_GPIOLIB
  302. select GENERIC_CLOCKEVENTS
  303. select USB_ARCH_HAS_EHCI
  304. help
  305. Support for systems based on the Freescale 3xxx CPUs.
  306. config ARCH_NETX
  307. bool "Hilscher NetX based"
  308. select CPU_ARM926T
  309. select ARM_VIC
  310. select GENERIC_CLOCKEVENTS
  311. help
  312. This enables support for systems based on the Hilscher NetX Soc
  313. config ARCH_H720X
  314. bool "Hynix HMS720x-based"
  315. select CPU_ARM720T
  316. select ISA_DMA_API
  317. select ARCH_USES_GETTIMEOFFSET
  318. help
  319. This enables support for systems based on the Hynix HMS720x
  320. config ARCH_IOP13XX
  321. bool "IOP13xx-based"
  322. depends on MMU
  323. select CPU_XSC3
  324. select PLAT_IOP
  325. select PCI
  326. select ARCH_SUPPORTS_MSI
  327. select VMSPLIT_1G
  328. help
  329. Support for Intel's IOP13XX (XScale) family of processors.
  330. config ARCH_IOP32X
  331. bool "IOP32x-based"
  332. depends on MMU
  333. select CPU_XSCALE
  334. select PLAT_IOP
  335. select PCI
  336. select ARCH_REQUIRE_GPIOLIB
  337. help
  338. Support for Intel's 80219 and IOP32X (XScale) family of
  339. processors.
  340. config ARCH_IOP33X
  341. bool "IOP33x-based"
  342. depends on MMU
  343. select CPU_XSCALE
  344. select PLAT_IOP
  345. select PCI
  346. select ARCH_REQUIRE_GPIOLIB
  347. help
  348. Support for Intel's IOP33X (XScale) family of processors.
  349. config ARCH_IXP23XX
  350. bool "IXP23XX-based"
  351. depends on MMU
  352. select CPU_XSC3
  353. select PCI
  354. select ARCH_USES_GETTIMEOFFSET
  355. help
  356. Support for Intel's IXP23xx (XScale) family of processors.
  357. config ARCH_IXP2000
  358. bool "IXP2400/2800-based"
  359. depends on MMU
  360. select CPU_XSCALE
  361. select PCI
  362. select ARCH_USES_GETTIMEOFFSET
  363. help
  364. Support for Intel's IXP2400/2800 (XScale) family of processors.
  365. config ARCH_IXP4XX
  366. bool "IXP4xx-based"
  367. depends on MMU
  368. select CPU_XSCALE
  369. select GENERIC_GPIO
  370. select GENERIC_CLOCKEVENTS
  371. select HAVE_SCHED_CLOCK
  372. select DMABOUNCE if PCI
  373. help
  374. Support for Intel's IXP4XX (XScale) family of processors.
  375. config ARCH_DOVE
  376. bool "Marvell Dove"
  377. select PCI
  378. select ARCH_REQUIRE_GPIOLIB
  379. select GENERIC_CLOCKEVENTS
  380. select PLAT_ORION
  381. help
  382. Support for the Marvell Dove SoC 88AP510
  383. config ARCH_KIRKWOOD
  384. bool "Marvell Kirkwood"
  385. select CPU_FEROCEON
  386. select PCI
  387. select ARCH_REQUIRE_GPIOLIB
  388. select GENERIC_CLOCKEVENTS
  389. select PLAT_ORION
  390. help
  391. Support for the following Marvell Kirkwood series SoCs:
  392. 88F6180, 88F6192 and 88F6281.
  393. config ARCH_LOKI
  394. bool "Marvell Loki (88RC8480)"
  395. select CPU_FEROCEON
  396. select GENERIC_CLOCKEVENTS
  397. select PLAT_ORION
  398. help
  399. Support for the Marvell Loki (88RC8480) SoC.
  400. config ARCH_LPC32XX
  401. bool "NXP LPC32XX"
  402. select CPU_ARM926T
  403. select ARCH_REQUIRE_GPIOLIB
  404. select HAVE_IDE
  405. select ARM_AMBA
  406. select USB_ARCH_HAS_OHCI
  407. select COMMON_CLKDEV
  408. select GENERIC_TIME
  409. select GENERIC_CLOCKEVENTS
  410. help
  411. Support for the NXP LPC32XX family of processors
  412. config ARCH_MV78XX0
  413. bool "Marvell MV78xx0"
  414. select CPU_FEROCEON
  415. select PCI
  416. select ARCH_REQUIRE_GPIOLIB
  417. select GENERIC_CLOCKEVENTS
  418. select PLAT_ORION
  419. help
  420. Support for the following Marvell MV78xx0 series SoCs:
  421. MV781x0, MV782x0.
  422. config ARCH_ORION5X
  423. bool "Marvell Orion"
  424. depends on MMU
  425. select CPU_FEROCEON
  426. select PCI
  427. select ARCH_REQUIRE_GPIOLIB
  428. select GENERIC_CLOCKEVENTS
  429. select PLAT_ORION
  430. help
  431. Support for the following Marvell Orion 5x series SoCs:
  432. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  433. Orion-2 (5281), Orion-1-90 (6183).
  434. config ARCH_MMP
  435. bool "Marvell PXA168/910/MMP2"
  436. depends on MMU
  437. select ARCH_REQUIRE_GPIOLIB
  438. select COMMON_CLKDEV
  439. select GENERIC_CLOCKEVENTS
  440. select HAVE_SCHED_CLOCK
  441. select TICK_ONESHOT
  442. select PLAT_PXA
  443. select SPARSE_IRQ
  444. help
  445. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  446. config ARCH_KS8695
  447. bool "Micrel/Kendin KS8695"
  448. select CPU_ARM922T
  449. select ARCH_REQUIRE_GPIOLIB
  450. select ARCH_USES_GETTIMEOFFSET
  451. help
  452. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  453. System-on-Chip devices.
  454. config ARCH_NS9XXX
  455. bool "NetSilicon NS9xxx"
  456. select CPU_ARM926T
  457. select GENERIC_GPIO
  458. select GENERIC_CLOCKEVENTS
  459. select HAVE_CLK
  460. help
  461. Say Y here if you intend to run this kernel on a NetSilicon NS9xxx
  462. System.
  463. <http://www.digi.com/products/microprocessors/index.jsp>
  464. config ARCH_W90X900
  465. bool "Nuvoton W90X900 CPU"
  466. select CPU_ARM926T
  467. select ARCH_REQUIRE_GPIOLIB
  468. select COMMON_CLKDEV
  469. select GENERIC_CLOCKEVENTS
  470. help
  471. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  472. At present, the w90x900 has been renamed nuc900, regarding
  473. the ARM series product line, you can login the following
  474. link address to know more.
  475. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  476. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  477. config ARCH_NUC93X
  478. bool "Nuvoton NUC93X CPU"
  479. select CPU_ARM926T
  480. select COMMON_CLKDEV
  481. help
  482. Support for Nuvoton (Winbond logic dept.) NUC93X MCU,The NUC93X is a
  483. low-power and high performance MPEG-4/JPEG multimedia controller chip.
  484. config ARCH_TEGRA
  485. bool "NVIDIA Tegra"
  486. select GENERIC_TIME
  487. select GENERIC_CLOCKEVENTS
  488. select GENERIC_GPIO
  489. select HAVE_CLK
  490. select HAVE_SCHED_CLOCK
  491. select COMMON_CLKDEV
  492. select ARCH_HAS_BARRIERS if CACHE_L2X0
  493. select ARCH_HAS_CPUFREQ
  494. help
  495. This enables support for NVIDIA Tegra based systems (Tegra APX,
  496. Tegra 6xx and Tegra 2 series).
  497. config ARCH_PNX4008
  498. bool "Philips Nexperia PNX4008 Mobile"
  499. select CPU_ARM926T
  500. select COMMON_CLKDEV
  501. select ARCH_USES_GETTIMEOFFSET
  502. help
  503. This enables support for Philips PNX4008 mobile platform.
  504. config ARCH_PXA
  505. bool "PXA2xx/PXA3xx-based"
  506. depends on MMU
  507. select ARCH_MTD_XIP
  508. select ARCH_HAS_CPUFREQ
  509. select COMMON_CLKDEV
  510. select ARCH_REQUIRE_GPIOLIB
  511. select GENERIC_CLOCKEVENTS
  512. select HAVE_SCHED_CLOCK
  513. select TICK_ONESHOT
  514. select PLAT_PXA
  515. select SPARSE_IRQ
  516. help
  517. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  518. config ARCH_MSM
  519. bool "Qualcomm MSM"
  520. select HAVE_CLK
  521. select GENERIC_CLOCKEVENTS
  522. select ARCH_REQUIRE_GPIOLIB
  523. help
  524. Support for Qualcomm MSM/QSD based systems. This runs on the
  525. apps processor of the MSM/QSD and depends on a shared memory
  526. interface to the modem processor which runs the baseband
  527. stack and controls some vital subsystems
  528. (clock and power control, etc).
  529. config ARCH_SHMOBILE
  530. bool "Renesas SH-Mobile"
  531. help
  532. Support for Renesas's SH-Mobile ARM platforms
  533. config ARCH_RPC
  534. bool "RiscPC"
  535. select ARCH_ACORN
  536. select FIQ
  537. select TIMER_ACORN
  538. select ARCH_MAY_HAVE_PC_FDC
  539. select HAVE_PATA_PLATFORM
  540. select ISA_DMA_API
  541. select NO_IOPORT
  542. select ARCH_SPARSEMEM_ENABLE
  543. select ARCH_USES_GETTIMEOFFSET
  544. help
  545. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  546. CD-ROM interface, serial and parallel port, and the floppy drive.
  547. config ARCH_SA1100
  548. bool "SA1100-based"
  549. select CPU_SA1100
  550. select ISA
  551. select ARCH_SPARSEMEM_ENABLE
  552. select ARCH_MTD_XIP
  553. select ARCH_HAS_CPUFREQ
  554. select CPU_FREQ
  555. select GENERIC_CLOCKEVENTS
  556. select HAVE_CLK
  557. select HAVE_SCHED_CLOCK
  558. select TICK_ONESHOT
  559. select ARCH_REQUIRE_GPIOLIB
  560. help
  561. Support for StrongARM 11x0 based boards.
  562. config ARCH_S3C2410
  563. bool "Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443, S3C2450"
  564. select GENERIC_GPIO
  565. select ARCH_HAS_CPUFREQ
  566. select HAVE_CLK
  567. select ARCH_USES_GETTIMEOFFSET
  568. select HAVE_S3C2410_I2C if I2C
  569. help
  570. Samsung S3C2410X CPU based systems, such as the Simtec Electronics
  571. BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
  572. the Samsung SMDK2410 development board (and derivatives).
  573. Note, the S3C2416 and the S3C2450 are so close that they even share
  574. the same SoC ID code. This means that there is no seperate machine
  575. directory (no arch/arm/mach-s3c2450) as the S3C2416 was first.
  576. config ARCH_S3C64XX
  577. bool "Samsung S3C64XX"
  578. select PLAT_SAMSUNG
  579. select CPU_V6
  580. select ARM_VIC
  581. select HAVE_CLK
  582. select NO_IOPORT
  583. select ARCH_USES_GETTIMEOFFSET
  584. select ARCH_HAS_CPUFREQ
  585. select ARCH_REQUIRE_GPIOLIB
  586. select SAMSUNG_CLKSRC
  587. select SAMSUNG_IRQ_VIC_TIMER
  588. select SAMSUNG_IRQ_UART
  589. select S3C_GPIO_TRACK
  590. select S3C_GPIO_PULL_UPDOWN
  591. select S3C_GPIO_CFG_S3C24XX
  592. select S3C_GPIO_CFG_S3C64XX
  593. select S3C_DEV_NAND
  594. select USB_ARCH_HAS_OHCI
  595. select SAMSUNG_GPIOLIB_4BIT
  596. select HAVE_S3C2410_I2C if I2C
  597. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  598. help
  599. Samsung S3C64XX series based systems
  600. config ARCH_S5P64X0
  601. bool "Samsung S5P6440 S5P6450"
  602. select CPU_V6
  603. select GENERIC_GPIO
  604. select HAVE_CLK
  605. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  606. select ARCH_USES_GETTIMEOFFSET
  607. select HAVE_S3C2410_I2C if I2C
  608. select HAVE_S3C_RTC if RTC_CLASS
  609. help
  610. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  611. SMDK6450.
  612. config ARCH_S5P6442
  613. bool "Samsung S5P6442"
  614. select CPU_V6
  615. select GENERIC_GPIO
  616. select HAVE_CLK
  617. select ARCH_USES_GETTIMEOFFSET
  618. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  619. help
  620. Samsung S5P6442 CPU based systems
  621. config ARCH_S5PC100
  622. bool "Samsung S5PC100"
  623. select GENERIC_GPIO
  624. select HAVE_CLK
  625. select CPU_V7
  626. select ARM_L1_CACHE_SHIFT_6
  627. select ARCH_USES_GETTIMEOFFSET
  628. select HAVE_S3C2410_I2C if I2C
  629. select HAVE_S3C_RTC if RTC_CLASS
  630. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  631. help
  632. Samsung S5PC100 series based systems
  633. config ARCH_S5PV210
  634. bool "Samsung S5PV210/S5PC110"
  635. select CPU_V7
  636. select ARCH_SPARSEMEM_ENABLE
  637. select GENERIC_GPIO
  638. select HAVE_CLK
  639. select ARM_L1_CACHE_SHIFT_6
  640. select ARCH_HAS_CPUFREQ
  641. select ARCH_USES_GETTIMEOFFSET
  642. select HAVE_S3C2410_I2C if I2C
  643. select HAVE_S3C_RTC if RTC_CLASS
  644. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  645. help
  646. Samsung S5PV210/S5PC110 series based systems
  647. config ARCH_S5PV310
  648. bool "Samsung S5PV310/S5PC210"
  649. select CPU_V7
  650. select ARCH_SPARSEMEM_ENABLE
  651. select GENERIC_GPIO
  652. select HAVE_CLK
  653. select GENERIC_CLOCKEVENTS
  654. select HAVE_S3C_RTC if RTC_CLASS
  655. select HAVE_S3C2410_I2C if I2C
  656. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  657. help
  658. Samsung S5PV310 series based systems
  659. config ARCH_SHARK
  660. bool "Shark"
  661. select CPU_SA110
  662. select ISA
  663. select ISA_DMA
  664. select ZONE_DMA
  665. select PCI
  666. select ARCH_USES_GETTIMEOFFSET
  667. help
  668. Support for the StrongARM based Digital DNARD machine, also known
  669. as "Shark" (<http://www.shark-linux.de/shark.html>).
  670. config ARCH_TCC_926
  671. bool "Telechips TCC ARM926-based systems"
  672. select CPU_ARM926T
  673. select HAVE_CLK
  674. select COMMON_CLKDEV
  675. select GENERIC_CLOCKEVENTS
  676. help
  677. Support for Telechips TCC ARM926-based systems.
  678. config ARCH_LH7A40X
  679. bool "Sharp LH7A40X"
  680. select CPU_ARM922T
  681. select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
  682. select ARCH_USES_GETTIMEOFFSET
  683. help
  684. Say Y here for systems based on one of the Sharp LH7A40X
  685. System on a Chip processors. These CPUs include an ARM922T
  686. core with a wide array of integrated devices for
  687. hand-held and low-power applications.
  688. config ARCH_U300
  689. bool "ST-Ericsson U300 Series"
  690. depends on MMU
  691. select CPU_ARM926T
  692. select HAVE_SCHED_CLOCK
  693. select HAVE_TCM
  694. select ARM_AMBA
  695. select ARM_VIC
  696. select GENERIC_CLOCKEVENTS
  697. select COMMON_CLKDEV
  698. select GENERIC_GPIO
  699. help
  700. Support for ST-Ericsson U300 series mobile platforms.
  701. config ARCH_U8500
  702. bool "ST-Ericsson U8500 Series"
  703. select CPU_V7
  704. select ARM_AMBA
  705. select GENERIC_CLOCKEVENTS
  706. select COMMON_CLKDEV
  707. select ARCH_REQUIRE_GPIOLIB
  708. help
  709. Support for ST-Ericsson's Ux500 architecture
  710. config ARCH_NOMADIK
  711. bool "STMicroelectronics Nomadik"
  712. select ARM_AMBA
  713. select ARM_VIC
  714. select CPU_ARM926T
  715. select COMMON_CLKDEV
  716. select GENERIC_CLOCKEVENTS
  717. select ARCH_REQUIRE_GPIOLIB
  718. help
  719. Support for the Nomadik platform by ST-Ericsson
  720. config ARCH_DAVINCI
  721. bool "TI DaVinci"
  722. select GENERIC_CLOCKEVENTS
  723. select ARCH_REQUIRE_GPIOLIB
  724. select ZONE_DMA
  725. select HAVE_IDE
  726. select COMMON_CLKDEV
  727. select GENERIC_ALLOCATOR
  728. select ARCH_HAS_HOLES_MEMORYMODEL
  729. help
  730. Support for TI's DaVinci platform.
  731. config ARCH_OMAP
  732. bool "TI OMAP"
  733. select HAVE_CLK
  734. select ARCH_REQUIRE_GPIOLIB
  735. select ARCH_HAS_CPUFREQ
  736. select GENERIC_CLOCKEVENTS
  737. select ARCH_HAS_HOLES_MEMORYMODEL
  738. help
  739. Support for TI's OMAP platform (OMAP1/2/3/4).
  740. config PLAT_SPEAR
  741. bool "ST SPEAr"
  742. select ARM_AMBA
  743. select ARCH_REQUIRE_GPIOLIB
  744. select COMMON_CLKDEV
  745. select GENERIC_CLOCKEVENTS
  746. select HAVE_CLK
  747. help
  748. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  749. endchoice
  750. #
  751. # This is sorted alphabetically by mach-* pathname. However, plat-*
  752. # Kconfigs may be included either alphabetically (according to the
  753. # plat- suffix) or along side the corresponding mach-* source.
  754. #
  755. source "arch/arm/mach-aaec2000/Kconfig"
  756. source "arch/arm/mach-at91/Kconfig"
  757. source "arch/arm/mach-bcmring/Kconfig"
  758. source "arch/arm/mach-clps711x/Kconfig"
  759. source "arch/arm/mach-cns3xxx/Kconfig"
  760. source "arch/arm/mach-davinci/Kconfig"
  761. source "arch/arm/mach-dove/Kconfig"
  762. source "arch/arm/mach-ep93xx/Kconfig"
  763. source "arch/arm/mach-footbridge/Kconfig"
  764. source "arch/arm/mach-gemini/Kconfig"
  765. source "arch/arm/mach-h720x/Kconfig"
  766. source "arch/arm/mach-integrator/Kconfig"
  767. source "arch/arm/mach-iop32x/Kconfig"
  768. source "arch/arm/mach-iop33x/Kconfig"
  769. source "arch/arm/mach-iop13xx/Kconfig"
  770. source "arch/arm/mach-ixp4xx/Kconfig"
  771. source "arch/arm/mach-ixp2000/Kconfig"
  772. source "arch/arm/mach-ixp23xx/Kconfig"
  773. source "arch/arm/mach-kirkwood/Kconfig"
  774. source "arch/arm/mach-ks8695/Kconfig"
  775. source "arch/arm/mach-lh7a40x/Kconfig"
  776. source "arch/arm/mach-loki/Kconfig"
  777. source "arch/arm/mach-lpc32xx/Kconfig"
  778. source "arch/arm/mach-msm/Kconfig"
  779. source "arch/arm/mach-mv78xx0/Kconfig"
  780. source "arch/arm/plat-mxc/Kconfig"
  781. source "arch/arm/mach-netx/Kconfig"
  782. source "arch/arm/mach-nomadik/Kconfig"
  783. source "arch/arm/plat-nomadik/Kconfig"
  784. source "arch/arm/mach-ns9xxx/Kconfig"
  785. source "arch/arm/mach-nuc93x/Kconfig"
  786. source "arch/arm/plat-omap/Kconfig"
  787. source "arch/arm/mach-omap1/Kconfig"
  788. source "arch/arm/mach-omap2/Kconfig"
  789. source "arch/arm/mach-orion5x/Kconfig"
  790. source "arch/arm/mach-pxa/Kconfig"
  791. source "arch/arm/plat-pxa/Kconfig"
  792. source "arch/arm/mach-mmp/Kconfig"
  793. source "arch/arm/mach-realview/Kconfig"
  794. source "arch/arm/mach-sa1100/Kconfig"
  795. source "arch/arm/plat-samsung/Kconfig"
  796. source "arch/arm/plat-s3c24xx/Kconfig"
  797. source "arch/arm/plat-s5p/Kconfig"
  798. source "arch/arm/plat-spear/Kconfig"
  799. source "arch/arm/plat-tcc/Kconfig"
  800. if ARCH_S3C2410
  801. source "arch/arm/mach-s3c2400/Kconfig"
  802. source "arch/arm/mach-s3c2410/Kconfig"
  803. source "arch/arm/mach-s3c2412/Kconfig"
  804. source "arch/arm/mach-s3c2416/Kconfig"
  805. source "arch/arm/mach-s3c2440/Kconfig"
  806. source "arch/arm/mach-s3c2443/Kconfig"
  807. endif
  808. if ARCH_S3C64XX
  809. source "arch/arm/mach-s3c64xx/Kconfig"
  810. endif
  811. source "arch/arm/mach-s5p64x0/Kconfig"
  812. source "arch/arm/mach-s5p6442/Kconfig"
  813. source "arch/arm/mach-s5pc100/Kconfig"
  814. source "arch/arm/mach-s5pv210/Kconfig"
  815. source "arch/arm/mach-s5pv310/Kconfig"
  816. source "arch/arm/mach-shmobile/Kconfig"
  817. source "arch/arm/plat-stmp3xxx/Kconfig"
  818. source "arch/arm/mach-tegra/Kconfig"
  819. source "arch/arm/mach-u300/Kconfig"
  820. source "arch/arm/mach-ux500/Kconfig"
  821. source "arch/arm/mach-versatile/Kconfig"
  822. source "arch/arm/mach-vexpress/Kconfig"
  823. source "arch/arm/mach-w90x900/Kconfig"
  824. # Definitions to make life easier
  825. config ARCH_ACORN
  826. bool
  827. config PLAT_IOP
  828. bool
  829. select GENERIC_CLOCKEVENTS
  830. config PLAT_ORION
  831. bool
  832. config PLAT_PXA
  833. bool
  834. config PLAT_VERSATILE
  835. bool
  836. config ARM_TIMER_SP804
  837. bool
  838. source arch/arm/mm/Kconfig
  839. config IWMMXT
  840. bool "Enable iWMMXt support"
  841. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
  842. default y if PXA27x || PXA3xx || ARCH_MMP
  843. help
  844. Enable support for iWMMXt context switching at run time if
  845. running on a CPU that supports it.
  846. # bool 'Use XScale PMU as timer source' CONFIG_XSCALE_PMU_TIMER
  847. config XSCALE_PMU
  848. bool
  849. depends on CPU_XSCALE && !XSCALE_PMU_TIMER
  850. default y
  851. config CPU_HAS_PMU
  852. depends on (CPU_V6 || CPU_V7 || XSCALE_PMU) && \
  853. (!ARCH_OMAP3 || OMAP3_EMU)
  854. default y
  855. bool
  856. if !MMU
  857. source "arch/arm/Kconfig-nommu"
  858. endif
  859. config ARM_ERRATA_411920
  860. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  861. depends on CPU_V6
  862. help
  863. Invalidation of the Instruction Cache operation can
  864. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  865. It does not affect the MPCore. This option enables the ARM Ltd.
  866. recommended workaround.
  867. config ARM_ERRATA_430973
  868. bool "ARM errata: Stale prediction on replaced interworking branch"
  869. depends on CPU_V7
  870. help
  871. This option enables the workaround for the 430973 Cortex-A8
  872. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  873. interworking branch is replaced with another code sequence at the
  874. same virtual address, whether due to self-modifying code or virtual
  875. to physical address re-mapping, Cortex-A8 does not recover from the
  876. stale interworking branch prediction. This results in Cortex-A8
  877. executing the new code sequence in the incorrect ARM or Thumb state.
  878. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  879. and also flushes the branch target cache at every context switch.
  880. Note that setting specific bits in the ACTLR register may not be
  881. available in non-secure mode.
  882. config ARM_ERRATA_458693
  883. bool "ARM errata: Processor deadlock when a false hazard is created"
  884. depends on CPU_V7
  885. help
  886. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  887. erratum. For very specific sequences of memory operations, it is
  888. possible for a hazard condition intended for a cache line to instead
  889. be incorrectly associated with a different cache line. This false
  890. hazard might then cause a processor deadlock. The workaround enables
  891. the L1 caching of the NEON accesses and disables the PLD instruction
  892. in the ACTLR register. Note that setting specific bits in the ACTLR
  893. register may not be available in non-secure mode.
  894. config ARM_ERRATA_460075
  895. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  896. depends on CPU_V7
  897. help
  898. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  899. erratum. Any asynchronous access to the L2 cache may encounter a
  900. situation in which recent store transactions to the L2 cache are lost
  901. and overwritten with stale memory contents from external memory. The
  902. workaround disables the write-allocate mode for the L2 cache via the
  903. ACTLR register. Note that setting specific bits in the ACTLR register
  904. may not be available in non-secure mode.
  905. config ARM_ERRATA_742230
  906. bool "ARM errata: DMB operation may be faulty"
  907. depends on CPU_V7 && SMP
  908. help
  909. This option enables the workaround for the 742230 Cortex-A9
  910. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  911. between two write operations may not ensure the correct visibility
  912. ordering of the two writes. This workaround sets a specific bit in
  913. the diagnostic register of the Cortex-A9 which causes the DMB
  914. instruction to behave as a DSB, ensuring the correct behaviour of
  915. the two writes.
  916. config ARM_ERRATA_742231
  917. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  918. depends on CPU_V7 && SMP
  919. help
  920. This option enables the workaround for the 742231 Cortex-A9
  921. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  922. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  923. accessing some data located in the same cache line, may get corrupted
  924. data due to bad handling of the address hazard when the line gets
  925. replaced from one of the CPUs at the same time as another CPU is
  926. accessing it. This workaround sets specific bits in the diagnostic
  927. register of the Cortex-A9 which reduces the linefill issuing
  928. capabilities of the processor.
  929. config PL310_ERRATA_588369
  930. bool "Clean & Invalidate maintenance operations do not invalidate clean lines"
  931. depends on CACHE_L2X0 && ARCH_OMAP4
  932. help
  933. The PL310 L2 cache controller implements three types of Clean &
  934. Invalidate maintenance operations: by Physical Address
  935. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  936. They are architecturally defined to behave as the execution of a
  937. clean operation followed immediately by an invalidate operation,
  938. both performing to the same memory location. This functionality
  939. is not correctly implemented in PL310 as clean lines are not
  940. invalidated as a result of these operations. Note that this errata
  941. uses Texas Instrument's secure monitor api.
  942. config ARM_ERRATA_720789
  943. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  944. depends on CPU_V7 && SMP
  945. help
  946. This option enables the workaround for the 720789 Cortex-A9 (prior to
  947. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  948. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  949. As a consequence of this erratum, some TLB entries which should be
  950. invalidated are not, resulting in an incoherency in the system page
  951. tables. The workaround changes the TLB flushing routines to invalidate
  952. entries regardless of the ASID.
  953. config ARM_ERRATA_743622
  954. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  955. depends on CPU_V7
  956. help
  957. This option enables the workaround for the 743622 Cortex-A9
  958. (r2p0..r2p2) erratum. Under very rare conditions, a faulty
  959. optimisation in the Cortex-A9 Store Buffer may lead to data
  960. corruption. This workaround sets a specific bit in the diagnostic
  961. register of the Cortex-A9 which disables the Store Buffer
  962. optimisation, preventing the defect from occurring. This has no
  963. visible impact on the overall performance or power consumption of the
  964. processor.
  965. endmenu
  966. source "arch/arm/common/Kconfig"
  967. menu "Bus support"
  968. config ARM_AMBA
  969. bool
  970. config ISA
  971. bool
  972. help
  973. Find out whether you have ISA slots on your motherboard. ISA is the
  974. name of a bus system, i.e. the way the CPU talks to the other stuff
  975. inside your box. Other bus systems are PCI, EISA, MicroChannel
  976. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  977. newer boards don't support it. If you have ISA, say Y, otherwise N.
  978. # Select ISA DMA controller support
  979. config ISA_DMA
  980. bool
  981. select ISA_DMA_API
  982. # Select ISA DMA interface
  983. config ISA_DMA_API
  984. bool
  985. config PCI
  986. bool "PCI support" if ARCH_INTEGRATOR_AP || ARCH_VERSATILE_PB || ARCH_IXP4XX || ARCH_KS8695 || MACH_ARMCORE || ARCH_CNS3XXX
  987. help
  988. Find out whether you have a PCI motherboard. PCI is the name of a
  989. bus system, i.e. the way the CPU talks to the other stuff inside
  990. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  991. VESA. If you have PCI, say Y, otherwise N.
  992. config PCI_DOMAINS
  993. bool
  994. depends on PCI
  995. config PCI_SYSCALL
  996. def_bool PCI
  997. # Select the host bridge type
  998. config PCI_HOST_VIA82C505
  999. bool
  1000. depends on PCI && ARCH_SHARK
  1001. default y
  1002. config PCI_HOST_ITE8152
  1003. bool
  1004. depends on PCI && MACH_ARMCORE
  1005. default y
  1006. select DMABOUNCE
  1007. source "drivers/pci/Kconfig"
  1008. source "drivers/pcmcia/Kconfig"
  1009. endmenu
  1010. menu "Kernel Features"
  1011. source "kernel/time/Kconfig"
  1012. config SMP
  1013. bool "Symmetric Multi-Processing (EXPERIMENTAL)"
  1014. depends on EXPERIMENTAL
  1015. depends on GENERIC_CLOCKEVENTS
  1016. depends on REALVIEW_EB_ARM11MP || REALVIEW_EB_A9MP || \
  1017. MACH_REALVIEW_PB11MP || MACH_REALVIEW_PBX || ARCH_OMAP4 || \
  1018. ARCH_S5PV310 || ARCH_TEGRA || ARCH_U8500 || ARCH_VEXPRESS_CA9X4 || \
  1019. ARCH_MSM_SCORPIONMP
  1020. select USE_GENERIC_SMP_HELPERS
  1021. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1022. help
  1023. This enables support for systems with more than one CPU. If you have
  1024. a system with only one CPU, like most personal computers, say N. If
  1025. you have a system with more than one CPU, say Y.
  1026. If you say N here, the kernel will run on single and multiprocessor
  1027. machines, but will use only one CPU of a multiprocessor machine. If
  1028. you say Y here, the kernel will run on many, but not all, single
  1029. processor machines. On a single processor machine, the kernel will
  1030. run faster if you say N here.
  1031. See also <file:Documentation/i386/IO-APIC.txt>,
  1032. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1033. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1034. If you don't know what to do here, say N.
  1035. config SMP_ON_UP
  1036. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1037. depends on EXPERIMENTAL
  1038. depends on SMP && !XIP && !THUMB2_KERNEL
  1039. default y
  1040. help
  1041. SMP kernels contain instructions which fail on non-SMP processors.
  1042. Enabling this option allows the kernel to modify itself to make
  1043. these instructions safe. Disabling it allows about 1K of space
  1044. savings.
  1045. If you don't know what to do here, say Y.
  1046. config HAVE_ARM_SCU
  1047. bool
  1048. depends on SMP
  1049. help
  1050. This option enables support for the ARM system coherency unit
  1051. config HAVE_ARM_TWD
  1052. bool
  1053. depends on SMP
  1054. help
  1055. This options enables support for the ARM timer and watchdog unit
  1056. choice
  1057. prompt "Memory split"
  1058. default VMSPLIT_3G
  1059. help
  1060. Select the desired split between kernel and user memory.
  1061. If you are not absolutely sure what you are doing, leave this
  1062. option alone!
  1063. config VMSPLIT_3G
  1064. bool "3G/1G user/kernel split"
  1065. config VMSPLIT_2G
  1066. bool "2G/2G user/kernel split"
  1067. config VMSPLIT_1G
  1068. bool "1G/3G user/kernel split"
  1069. endchoice
  1070. config PAGE_OFFSET
  1071. hex
  1072. default 0x40000000 if VMSPLIT_1G
  1073. default 0x80000000 if VMSPLIT_2G
  1074. default 0xC0000000
  1075. config NR_CPUS
  1076. int "Maximum number of CPUs (2-32)"
  1077. range 2 32
  1078. depends on SMP
  1079. default "4"
  1080. config HOTPLUG_CPU
  1081. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1082. depends on SMP && HOTPLUG && EXPERIMENTAL
  1083. depends on !ARCH_MSM
  1084. help
  1085. Say Y here to experiment with turning CPUs off and on. CPUs
  1086. can be controlled through /sys/devices/system/cpu.
  1087. config LOCAL_TIMERS
  1088. bool "Use local timer interrupts"
  1089. depends on SMP
  1090. default y
  1091. select HAVE_ARM_TWD if !ARCH_MSM_SCORPIONMP
  1092. help
  1093. Enable support for local timers on SMP platforms, rather then the
  1094. legacy IPI broadcast method. Local timers allows the system
  1095. accounting to be spread across the timer interval, preventing a
  1096. "thundering herd" at every timer tick.
  1097. source kernel/Kconfig.preempt
  1098. config HZ
  1099. int
  1100. default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
  1101. ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
  1102. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1103. default AT91_TIMER_HZ if ARCH_AT91
  1104. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1105. default 100
  1106. config THUMB2_KERNEL
  1107. bool "Compile the kernel in Thumb-2 mode"
  1108. depends on CPU_V7 && EXPERIMENTAL
  1109. select AEABI
  1110. select ARM_ASM_UNIFIED
  1111. help
  1112. By enabling this option, the kernel will be compiled in
  1113. Thumb-2 mode. A compiler/assembler that understand the unified
  1114. ARM-Thumb syntax is needed.
  1115. If unsure, say N.
  1116. config ARM_ASM_UNIFIED
  1117. bool
  1118. config AEABI
  1119. bool "Use the ARM EABI to compile the kernel"
  1120. help
  1121. This option allows for the kernel to be compiled using the latest
  1122. ARM ABI (aka EABI). This is only useful if you are using a user
  1123. space environment that is also compiled with EABI.
  1124. Since there are major incompatibilities between the legacy ABI and
  1125. EABI, especially with regard to structure member alignment, this
  1126. option also changes the kernel syscall calling convention to
  1127. disambiguate both ABIs and allow for backward compatibility support
  1128. (selected with CONFIG_OABI_COMPAT).
  1129. To use this you need GCC version 4.0.0 or later.
  1130. config OABI_COMPAT
  1131. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1132. depends on AEABI && EXPERIMENTAL
  1133. default y
  1134. help
  1135. This option preserves the old syscall interface along with the
  1136. new (ARM EABI) one. It also provides a compatibility layer to
  1137. intercept syscalls that have structure arguments which layout
  1138. in memory differs between the legacy ABI and the new ARM EABI
  1139. (only for non "thumb" binaries). This option adds a tiny
  1140. overhead to all syscalls and produces a slightly larger kernel.
  1141. If you know you'll be using only pure EABI user space then you
  1142. can say N here. If this option is not selected and you attempt
  1143. to execute a legacy ABI binary then the result will be
  1144. UNPREDICTABLE (in fact it can be predicted that it won't work
  1145. at all). If in doubt say Y.
  1146. config ARCH_HAS_HOLES_MEMORYMODEL
  1147. bool
  1148. config ARCH_SPARSEMEM_ENABLE
  1149. bool
  1150. config ARCH_SPARSEMEM_DEFAULT
  1151. def_bool ARCH_SPARSEMEM_ENABLE
  1152. config ARCH_SELECT_MEMORY_MODEL
  1153. def_bool ARCH_SPARSEMEM_ENABLE
  1154. config HIGHMEM
  1155. bool "High Memory Support (EXPERIMENTAL)"
  1156. depends on MMU && EXPERIMENTAL
  1157. help
  1158. The address space of ARM processors is only 4 Gigabytes large
  1159. and it has to accommodate user address space, kernel address
  1160. space as well as some memory mapped IO. That means that, if you
  1161. have a large amount of physical memory and/or IO, not all of the
  1162. memory can be "permanently mapped" by the kernel. The physical
  1163. memory that is not permanently mapped is called "high memory".
  1164. Depending on the selected kernel/user memory split, minimum
  1165. vmalloc space and actual amount of RAM, you may not need this
  1166. option which should result in a slightly faster kernel.
  1167. If unsure, say n.
  1168. config HIGHPTE
  1169. bool "Allocate 2nd-level pagetables from highmem"
  1170. depends on HIGHMEM
  1171. depends on !OUTER_CACHE
  1172. config HW_PERF_EVENTS
  1173. bool "Enable hardware performance counter support for perf events"
  1174. depends on PERF_EVENTS && CPU_HAS_PMU
  1175. default y
  1176. help
  1177. Enable hardware performance counter support for perf events. If
  1178. disabled, perf events will use software events only.
  1179. config SPARSE_IRQ
  1180. def_bool n
  1181. help
  1182. This enables support for sparse irqs. This is useful in general
  1183. as most CPUs have a fairly sparse array of IRQ vectors, which
  1184. the irq_desc then maps directly on to. Systems with a high
  1185. number of off-chip IRQs will want to treat this as
  1186. experimental until they have been independently verified.
  1187. source "mm/Kconfig"
  1188. config FORCE_MAX_ZONEORDER
  1189. int "Maximum zone order" if ARCH_SHMOBILE
  1190. range 11 64 if ARCH_SHMOBILE
  1191. default "9" if SA1111
  1192. default "11"
  1193. help
  1194. The kernel memory allocator divides physically contiguous memory
  1195. blocks into "zones", where each zone is a power of two number of
  1196. pages. This option selects the largest power of two that the kernel
  1197. keeps in the memory allocator. If you need to allocate very large
  1198. blocks of physically contiguous memory, then you may need to
  1199. increase this value.
  1200. This config option is actually maximum order plus one. For example,
  1201. a value of 11 means that the largest free memory block is 2^10 pages.
  1202. config LEDS
  1203. bool "Timer and CPU usage LEDs"
  1204. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1205. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1206. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1207. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1208. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1209. ARCH_AT91 || ARCH_DAVINCI || \
  1210. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1211. help
  1212. If you say Y here, the LEDs on your machine will be used
  1213. to provide useful information about your current system status.
  1214. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1215. be able to select which LEDs are active using the options below. If
  1216. you are compiling a kernel for the EBSA-110 or the LART however, the
  1217. red LED will simply flash regularly to indicate that the system is
  1218. still functional. It is safe to say Y here if you have a CATS
  1219. system, but the driver will do nothing.
  1220. config LEDS_TIMER
  1221. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1222. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1223. || MACH_OMAP_PERSEUS2
  1224. depends on LEDS
  1225. depends on !GENERIC_CLOCKEVENTS
  1226. default y if ARCH_EBSA110
  1227. help
  1228. If you say Y here, one of the system LEDs (the green one on the
  1229. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1230. will flash regularly to indicate that the system is still
  1231. operational. This is mainly useful to kernel hackers who are
  1232. debugging unstable kernels.
  1233. The LART uses the same LED for both Timer LED and CPU usage LED
  1234. functions. You may choose to use both, but the Timer LED function
  1235. will overrule the CPU usage LED.
  1236. config LEDS_CPU
  1237. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1238. !ARCH_OMAP) \
  1239. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1240. || MACH_OMAP_PERSEUS2
  1241. depends on LEDS
  1242. help
  1243. If you say Y here, the red LED will be used to give a good real
  1244. time indication of CPU usage, by lighting whenever the idle task
  1245. is not currently executing.
  1246. The LART uses the same LED for both Timer LED and CPU usage LED
  1247. functions. You may choose to use both, but the Timer LED function
  1248. will overrule the CPU usage LED.
  1249. config ALIGNMENT_TRAP
  1250. bool
  1251. depends on CPU_CP15_MMU
  1252. default y if !ARCH_EBSA110
  1253. select HAVE_PROC_CPU if PROC_FS
  1254. help
  1255. ARM processors cannot fetch/store information which is not
  1256. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1257. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1258. fetch/store instructions will be emulated in software if you say
  1259. here, which has a severe performance impact. This is necessary for
  1260. correct operation of some network protocols. With an IP-only
  1261. configuration it is safe to say N, otherwise say Y.
  1262. config UACCESS_WITH_MEMCPY
  1263. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1264. depends on MMU && EXPERIMENTAL
  1265. default y if CPU_FEROCEON
  1266. help
  1267. Implement faster copy_to_user and clear_user methods for CPU
  1268. cores where a 8-word STM instruction give significantly higher
  1269. memory write throughput than a sequence of individual 32bit stores.
  1270. A possible side effect is a slight increase in scheduling latency
  1271. between threads sharing the same address space if they invoke
  1272. such copy operations with large buffers.
  1273. However, if the CPU data cache is using a write-allocate mode,
  1274. this option is unlikely to provide any performance gain.
  1275. config SECCOMP
  1276. bool
  1277. prompt "Enable seccomp to safely compute untrusted bytecode"
  1278. ---help---
  1279. This kernel feature is useful for number crunching applications
  1280. that may need to compute untrusted bytecode during their
  1281. execution. By using pipes or other transports made available to
  1282. the process as file descriptors supporting the read/write
  1283. syscalls, it's possible to isolate those applications in
  1284. their own address space using seccomp. Once seccomp is
  1285. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1286. and the task is only allowed to execute a few safe syscalls
  1287. defined by each seccomp mode.
  1288. config CC_STACKPROTECTOR
  1289. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1290. help
  1291. This option turns on the -fstack-protector GCC feature. This
  1292. feature puts, at the beginning of functions, a canary value on
  1293. the stack just before the return address, and validates
  1294. the value just before actually returning. Stack based buffer
  1295. overflows (that need to overwrite this return address) now also
  1296. overwrite the canary, which gets detected and the attack is then
  1297. neutralized via a kernel panic.
  1298. This feature requires gcc version 4.2 or above.
  1299. config DEPRECATED_PARAM_STRUCT
  1300. bool "Provide old way to pass kernel parameters"
  1301. help
  1302. This was deprecated in 2001 and announced to live on for 5 years.
  1303. Some old boot loaders still use this way.
  1304. endmenu
  1305. menu "Boot options"
  1306. # Compressed boot loader in ROM. Yes, we really want to ask about
  1307. # TEXT and BSS so we preserve their values in the config files.
  1308. config ZBOOT_ROM_TEXT
  1309. hex "Compressed ROM boot loader base address"
  1310. default "0"
  1311. help
  1312. The physical address at which the ROM-able zImage is to be
  1313. placed in the target. Platforms which normally make use of
  1314. ROM-able zImage formats normally set this to a suitable
  1315. value in their defconfig file.
  1316. If ZBOOT_ROM is not enabled, this has no effect.
  1317. config ZBOOT_ROM_BSS
  1318. hex "Compressed ROM boot loader BSS address"
  1319. default "0"
  1320. help
  1321. The base address of an area of read/write memory in the target
  1322. for the ROM-able zImage which must be available while the
  1323. decompressor is running. It must be large enough to hold the
  1324. entire decompressed kernel plus an additional 128 KiB.
  1325. Platforms which normally make use of ROM-able zImage formats
  1326. normally set this to a suitable value in their defconfig file.
  1327. If ZBOOT_ROM is not enabled, this has no effect.
  1328. config ZBOOT_ROM
  1329. bool "Compressed boot loader in ROM/flash"
  1330. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1331. help
  1332. Say Y here if you intend to execute your compressed kernel image
  1333. (zImage) directly from ROM or flash. If unsure, say N.
  1334. config CMDLINE
  1335. string "Default kernel command string"
  1336. default ""
  1337. help
  1338. On some architectures (EBSA110 and CATS), there is currently no way
  1339. for the boot loader to pass arguments to the kernel. For these
  1340. architectures, you should supply some command-line options at build
  1341. time by entering them here. As a minimum, you should specify the
  1342. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1343. config CMDLINE_FORCE
  1344. bool "Always use the default kernel command string"
  1345. depends on CMDLINE != ""
  1346. help
  1347. Always use the default kernel command string, even if the boot
  1348. loader passes other arguments to the kernel.
  1349. This is useful if you cannot or don't want to change the
  1350. command-line options your boot loader passes to the kernel.
  1351. If unsure, say N.
  1352. config XIP_KERNEL
  1353. bool "Kernel Execute-In-Place from ROM"
  1354. depends on !ZBOOT_ROM
  1355. help
  1356. Execute-In-Place allows the kernel to run from non-volatile storage
  1357. directly addressable by the CPU, such as NOR flash. This saves RAM
  1358. space since the text section of the kernel is not loaded from flash
  1359. to RAM. Read-write sections, such as the data section and stack,
  1360. are still copied to RAM. The XIP kernel is not compressed since
  1361. it has to run directly from flash, so it will take more space to
  1362. store it. The flash address used to link the kernel object files,
  1363. and for storing it, is configuration dependent. Therefore, if you
  1364. say Y here, you must know the proper physical address where to
  1365. store the kernel image depending on your own flash memory usage.
  1366. Also note that the make target becomes "make xipImage" rather than
  1367. "make zImage" or "make Image". The final kernel binary to put in
  1368. ROM memory will be arch/arm/boot/xipImage.
  1369. If unsure, say N.
  1370. config XIP_PHYS_ADDR
  1371. hex "XIP Kernel Physical Location"
  1372. depends on XIP_KERNEL
  1373. default "0x00080000"
  1374. help
  1375. This is the physical address in your flash memory the kernel will
  1376. be linked for and stored to. This address is dependent on your
  1377. own flash usage.
  1378. config KEXEC
  1379. bool "Kexec system call (EXPERIMENTAL)"
  1380. depends on EXPERIMENTAL
  1381. help
  1382. kexec is a system call that implements the ability to shutdown your
  1383. current kernel, and to start another kernel. It is like a reboot
  1384. but it is independent of the system firmware. And like a reboot
  1385. you can start any kernel with it, not just Linux.
  1386. It is an ongoing process to be certain the hardware in a machine
  1387. is properly shutdown, so do not be surprised if this code does not
  1388. initially work for you. It may help to enable device hotplugging
  1389. support.
  1390. config ATAGS_PROC
  1391. bool "Export atags in procfs"
  1392. depends on KEXEC
  1393. default y
  1394. help
  1395. Should the atags used to boot the kernel be exported in an "atags"
  1396. file in procfs. Useful with kexec.
  1397. config AUTO_ZRELADDR
  1398. bool "Auto calculation of the decompressed kernel image address"
  1399. depends on !ZBOOT_ROM && !ARCH_U300
  1400. help
  1401. ZRELADDR is the physical address where the decompressed kernel
  1402. image will be placed. If AUTO_ZRELADDR is selected, the address
  1403. will be determined at run-time by masking the current IP with
  1404. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1405. from start of memory.
  1406. endmenu
  1407. menu "CPU Power Management"
  1408. if ARCH_HAS_CPUFREQ
  1409. source "drivers/cpufreq/Kconfig"
  1410. config CPU_FREQ_IMX
  1411. tristate "CPUfreq driver for i.MX CPUs"
  1412. depends on ARCH_MXC && CPU_FREQ
  1413. help
  1414. This enables the CPUfreq driver for i.MX CPUs.
  1415. config CPU_FREQ_SA1100
  1416. bool
  1417. config CPU_FREQ_SA1110
  1418. bool
  1419. config CPU_FREQ_INTEGRATOR
  1420. tristate "CPUfreq driver for ARM Integrator CPUs"
  1421. depends on ARCH_INTEGRATOR && CPU_FREQ
  1422. default y
  1423. help
  1424. This enables the CPUfreq driver for ARM Integrator CPUs.
  1425. For details, take a look at <file:Documentation/cpu-freq>.
  1426. If in doubt, say Y.
  1427. config CPU_FREQ_PXA
  1428. bool
  1429. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1430. default y
  1431. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1432. config CPU_FREQ_S3C64XX
  1433. bool "CPUfreq support for Samsung S3C64XX CPUs"
  1434. depends on CPU_FREQ && CPU_S3C6410
  1435. config CPU_FREQ_S3C
  1436. bool
  1437. help
  1438. Internal configuration node for common cpufreq on Samsung SoC
  1439. config CPU_FREQ_S3C24XX
  1440. bool "CPUfreq driver for Samsung S3C24XX series CPUs"
  1441. depends on ARCH_S3C2410 && CPU_FREQ && EXPERIMENTAL
  1442. select CPU_FREQ_S3C
  1443. help
  1444. This enables the CPUfreq driver for the Samsung S3C24XX family
  1445. of CPUs.
  1446. For details, take a look at <file:Documentation/cpu-freq>.
  1447. If in doubt, say N.
  1448. config CPU_FREQ_S3C24XX_PLL
  1449. bool "Support CPUfreq changing of PLL frequency"
  1450. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1451. help
  1452. Compile in support for changing the PLL frequency from the
  1453. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1454. after a frequency change, so by default it is not enabled.
  1455. This also means that the PLL tables for the selected CPU(s) will
  1456. be built which may increase the size of the kernel image.
  1457. config CPU_FREQ_S3C24XX_DEBUG
  1458. bool "Debug CPUfreq Samsung driver core"
  1459. depends on CPU_FREQ_S3C24XX
  1460. help
  1461. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1462. config CPU_FREQ_S3C24XX_IODEBUG
  1463. bool "Debug CPUfreq Samsung driver IO timing"
  1464. depends on CPU_FREQ_S3C24XX
  1465. help
  1466. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1467. config CPU_FREQ_S3C24XX_DEBUGFS
  1468. bool "Export debugfs for CPUFreq"
  1469. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1470. help
  1471. Export status information via debugfs.
  1472. endif
  1473. source "drivers/cpuidle/Kconfig"
  1474. endmenu
  1475. menu "Floating point emulation"
  1476. comment "At least one emulation must be selected"
  1477. config FPE_NWFPE
  1478. bool "NWFPE math emulation"
  1479. depends on !AEABI || OABI_COMPAT
  1480. ---help---
  1481. Say Y to include the NWFPE floating point emulator in the kernel.
  1482. This is necessary to run most binaries. Linux does not currently
  1483. support floating point hardware so you need to say Y here even if
  1484. your machine has an FPA or floating point co-processor podule.
  1485. You may say N here if you are going to load the Acorn FPEmulator
  1486. early in the bootup.
  1487. config FPE_NWFPE_XP
  1488. bool "Support extended precision"
  1489. depends on FPE_NWFPE
  1490. help
  1491. Say Y to include 80-bit support in the kernel floating-point
  1492. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1493. Note that gcc does not generate 80-bit operations by default,
  1494. so in most cases this option only enlarges the size of the
  1495. floating point emulator without any good reason.
  1496. You almost surely want to say N here.
  1497. config FPE_FASTFPE
  1498. bool "FastFPE math emulation (EXPERIMENTAL)"
  1499. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1500. ---help---
  1501. Say Y here to include the FAST floating point emulator in the kernel.
  1502. This is an experimental much faster emulator which now also has full
  1503. precision for the mantissa. It does not support any exceptions.
  1504. It is very simple, and approximately 3-6 times faster than NWFPE.
  1505. It should be sufficient for most programs. It may be not suitable
  1506. for scientific calculations, but you have to check this for yourself.
  1507. If you do not feel you need a faster FP emulation you should better
  1508. choose NWFPE.
  1509. config VFP
  1510. bool "VFP-format floating point maths"
  1511. depends on CPU_V6 || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1512. help
  1513. Say Y to include VFP support code in the kernel. This is needed
  1514. if your hardware includes a VFP unit.
  1515. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1516. release notes and additional status information.
  1517. Say N if your target does not have VFP hardware.
  1518. config VFPv3
  1519. bool
  1520. depends on VFP
  1521. default y if CPU_V7
  1522. config NEON
  1523. bool "Advanced SIMD (NEON) Extension support"
  1524. depends on VFPv3 && CPU_V7
  1525. help
  1526. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1527. Extension.
  1528. endmenu
  1529. menu "Userspace binary formats"
  1530. source "fs/Kconfig.binfmt"
  1531. config ARTHUR
  1532. tristate "RISC OS personality"
  1533. depends on !AEABI
  1534. help
  1535. Say Y here to include the kernel code necessary if you want to run
  1536. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1537. experimental; if this sounds frightening, say N and sleep in peace.
  1538. You can also say M here to compile this support as a module (which
  1539. will be called arthur).
  1540. endmenu
  1541. menu "Power management options"
  1542. source "kernel/power/Kconfig"
  1543. config ARCH_SUSPEND_POSSIBLE
  1544. def_bool y
  1545. endmenu
  1546. source "net/Kconfig"
  1547. source "drivers/Kconfig"
  1548. source "fs/Kconfig"
  1549. source "arch/arm/Kconfig.debug"
  1550. source "security/Kconfig"
  1551. source "crypto/Kconfig"
  1552. source "lib/Kconfig"