cx88-dvb.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878
  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-xc2028.h"
  46. #include "tuner-xc2028-types.h"
  47. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  48. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  49. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  50. MODULE_LICENSE("GPL");
  51. static unsigned int debug;
  52. module_param(debug, int, 0644);
  53. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  54. #define dprintk(level,fmt, arg...) if (debug >= level) \
  55. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  56. /* ------------------------------------------------------------------ */
  57. static int dvb_buf_setup(struct videobuf_queue *q,
  58. unsigned int *count, unsigned int *size)
  59. {
  60. struct cx8802_dev *dev = q->priv_data;
  61. dev->ts_packet_size = 188 * 4;
  62. dev->ts_packet_count = 32;
  63. *size = dev->ts_packet_size * dev->ts_packet_count;
  64. *count = 32;
  65. return 0;
  66. }
  67. static int dvb_buf_prepare(struct videobuf_queue *q,
  68. struct videobuf_buffer *vb, enum v4l2_field field)
  69. {
  70. struct cx8802_dev *dev = q->priv_data;
  71. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  72. }
  73. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  74. {
  75. struct cx8802_dev *dev = q->priv_data;
  76. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  77. }
  78. static void dvb_buf_release(struct videobuf_queue *q,
  79. struct videobuf_buffer *vb)
  80. {
  81. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  82. }
  83. static struct videobuf_queue_ops dvb_qops = {
  84. .buf_setup = dvb_buf_setup,
  85. .buf_prepare = dvb_buf_prepare,
  86. .buf_queue = dvb_buf_queue,
  87. .buf_release = dvb_buf_release,
  88. };
  89. /* ------------------------------------------------------------------ */
  90. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  91. {
  92. struct cx8802_dev *dev= fe->dvb->priv;
  93. struct cx8802_driver *drv = NULL;
  94. int ret = 0;
  95. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  96. if (drv) {
  97. if (acquire)
  98. ret = drv->request_acquire(drv);
  99. else
  100. ret = drv->request_release(drv);
  101. }
  102. return ret;
  103. }
  104. /* ------------------------------------------------------------------ */
  105. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  106. {
  107. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  108. static u8 reset [] = { RESET, 0x80 };
  109. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  110. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  111. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  112. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  113. mt352_write(fe, clock_config, sizeof(clock_config));
  114. udelay(200);
  115. mt352_write(fe, reset, sizeof(reset));
  116. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  117. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  118. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  119. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  120. return 0;
  121. }
  122. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  123. {
  124. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  125. static u8 reset [] = { RESET, 0x80 };
  126. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  127. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  128. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  129. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  130. mt352_write(fe, clock_config, sizeof(clock_config));
  131. udelay(200);
  132. mt352_write(fe, reset, sizeof(reset));
  133. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  134. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  135. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  136. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  137. return 0;
  138. }
  139. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  140. {
  141. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  142. static u8 reset [] = { 0x50, 0x80 };
  143. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  144. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  145. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  146. static u8 dntv_extra[] = { 0xB5, 0x7A };
  147. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  148. mt352_write(fe, clock_config, sizeof(clock_config));
  149. udelay(2000);
  150. mt352_write(fe, reset, sizeof(reset));
  151. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  152. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  153. udelay(2000);
  154. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  155. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  156. return 0;
  157. }
  158. static struct mt352_config dvico_fusionhdtv = {
  159. .demod_address = 0x0f,
  160. .demod_init = dvico_fusionhdtv_demod_init,
  161. };
  162. static struct mt352_config dntv_live_dvbt_config = {
  163. .demod_address = 0x0f,
  164. .demod_init = dntv_live_dvbt_demod_init,
  165. };
  166. static struct mt352_config dvico_fusionhdtv_dual = {
  167. .demod_address = 0x0f,
  168. .demod_init = dvico_dual_demod_init,
  169. };
  170. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  171. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  172. {
  173. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  174. static u8 reset [] = { 0x50, 0x80 };
  175. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  176. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  177. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  178. static u8 dntv_extra[] = { 0xB5, 0x7A };
  179. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  180. mt352_write(fe, clock_config, sizeof(clock_config));
  181. udelay(2000);
  182. mt352_write(fe, reset, sizeof(reset));
  183. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  184. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  185. udelay(2000);
  186. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  187. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  188. return 0;
  189. }
  190. static struct mt352_config dntv_live_dvbt_pro_config = {
  191. .demod_address = 0x0f,
  192. .no_tuner = 1,
  193. .demod_init = dntv_live_dvbt_pro_demod_init,
  194. };
  195. #endif
  196. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  197. .demod_address = 0x0f,
  198. .no_tuner = 1,
  199. };
  200. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  201. .demod_address = 0x0f,
  202. };
  203. static struct cx22702_config connexant_refboard_config = {
  204. .demod_address = 0x43,
  205. .output_mode = CX22702_SERIAL_OUTPUT,
  206. };
  207. static struct cx22702_config hauppauge_hvr_config = {
  208. .demod_address = 0x63,
  209. .output_mode = CX22702_SERIAL_OUTPUT,
  210. };
  211. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  212. {
  213. struct cx8802_dev *dev= fe->dvb->priv;
  214. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  215. return 0;
  216. }
  217. static struct or51132_config pchdtv_hd3000 = {
  218. .demod_address = 0x15,
  219. .set_ts_params = or51132_set_ts_param,
  220. };
  221. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  222. {
  223. struct cx8802_dev *dev= fe->dvb->priv;
  224. struct cx88_core *core = dev->core;
  225. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  226. if (index == 0)
  227. cx_clear(MO_GP0_IO, 8);
  228. else
  229. cx_set(MO_GP0_IO, 8);
  230. return 0;
  231. }
  232. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  233. {
  234. struct cx8802_dev *dev= fe->dvb->priv;
  235. if (is_punctured)
  236. dev->ts_gen_cntrl |= 0x04;
  237. else
  238. dev->ts_gen_cntrl &= ~0x04;
  239. return 0;
  240. }
  241. static struct lgdt330x_config fusionhdtv_3_gold = {
  242. .demod_address = 0x0e,
  243. .demod_chip = LGDT3302,
  244. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  245. .set_ts_params = lgdt330x_set_ts_param,
  246. };
  247. static struct lgdt330x_config fusionhdtv_5_gold = {
  248. .demod_address = 0x0e,
  249. .demod_chip = LGDT3303,
  250. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  251. .set_ts_params = lgdt330x_set_ts_param,
  252. };
  253. static struct lgdt330x_config pchdtv_hd5500 = {
  254. .demod_address = 0x59,
  255. .demod_chip = LGDT3303,
  256. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  257. .set_ts_params = lgdt330x_set_ts_param,
  258. };
  259. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  260. {
  261. struct cx8802_dev *dev= fe->dvb->priv;
  262. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  263. return 0;
  264. }
  265. static struct nxt200x_config ati_hdtvwonder = {
  266. .demod_address = 0x0a,
  267. .set_ts_params = nxt200x_set_ts_param,
  268. };
  269. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  270. int is_punctured)
  271. {
  272. struct cx8802_dev *dev= fe->dvb->priv;
  273. dev->ts_gen_cntrl = 0x02;
  274. return 0;
  275. }
  276. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  277. fe_sec_voltage_t voltage)
  278. {
  279. struct cx8802_dev *dev= fe->dvb->priv;
  280. struct cx88_core *core = dev->core;
  281. if (voltage == SEC_VOLTAGE_OFF)
  282. cx_write(MO_GP0_IO, 0x000006fb);
  283. else
  284. cx_write(MO_GP0_IO, 0x000006f9);
  285. if (core->prev_set_voltage)
  286. return core->prev_set_voltage(fe, voltage);
  287. return 0;
  288. }
  289. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  290. fe_sec_voltage_t voltage)
  291. {
  292. struct cx8802_dev *dev= fe->dvb->priv;
  293. struct cx88_core *core = dev->core;
  294. if (voltage == SEC_VOLTAGE_OFF) {
  295. dprintk(1,"LNB Voltage OFF\n");
  296. cx_write(MO_GP0_IO, 0x0000efff);
  297. }
  298. if (core->prev_set_voltage)
  299. return core->prev_set_voltage(fe, voltage);
  300. return 0;
  301. }
  302. static int cx88_xc3028_callback(void *ptr, int command, int arg)
  303. {
  304. struct cx88_core *core = ptr;
  305. switch (command) {
  306. case XC2028_TUNER_RESET:
  307. /* Send the tuner in then out of reset */
  308. dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
  309. switch (core->boardnr) {
  310. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  311. /* GPIO-4 xc3028 tuner */
  312. cx_set(MO_GP0_IO, 0x00001000);
  313. cx_clear(MO_GP0_IO, 0x00000010);
  314. msleep(100);
  315. cx_set(MO_GP0_IO, 0x00000010);
  316. msleep(100);
  317. break;
  318. }
  319. break;
  320. case XC2028_RESET_CLK:
  321. dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
  322. break;
  323. default:
  324. dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
  325. command, arg);
  326. return -EINVAL;
  327. }
  328. return 0;
  329. }
  330. static struct cx24123_config geniatech_dvbs_config = {
  331. .demod_address = 0x55,
  332. .set_ts_params = cx24123_set_ts_param,
  333. };
  334. static struct cx24123_config hauppauge_novas_config = {
  335. .demod_address = 0x55,
  336. .set_ts_params = cx24123_set_ts_param,
  337. };
  338. static struct cx24123_config kworld_dvbs_100_config = {
  339. .demod_address = 0x15,
  340. .set_ts_params = cx24123_set_ts_param,
  341. .lnb_polarity = 1,
  342. };
  343. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  344. .demod_address = 0x32 >> 1,
  345. .output_mode = S5H1409_PARALLEL_OUTPUT,
  346. .gpio = S5H1409_GPIO_ON,
  347. .qam_if = 44000,
  348. .inversion = S5H1409_INVERSION_OFF,
  349. .status_mode = S5H1409_DEMODLOCKING,
  350. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  351. };
  352. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  353. .demod_address = 0x32 >> 1,
  354. .output_mode = S5H1409_SERIAL_OUTPUT,
  355. .gpio = S5H1409_GPIO_OFF,
  356. .inversion = S5H1409_INVERSION_OFF,
  357. .status_mode = S5H1409_DEMODLOCKING,
  358. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  359. };
  360. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  361. .i2c_address = 0x64,
  362. .if_khz = 5380,
  363. .tuner_callback = cx88_tuner_callback,
  364. };
  365. static int dvb_register(struct cx8802_dev *dev)
  366. {
  367. /* init struct videobuf_dvb */
  368. dev->dvb.name = dev->core->name;
  369. dev->ts_gen_cntrl = 0x0c;
  370. /* init frontend */
  371. switch (dev->core->boardnr) {
  372. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  373. dev->dvb.frontend = dvb_attach(cx22702_attach,
  374. &connexant_refboard_config,
  375. &dev->core->i2c_adap);
  376. if (dev->dvb.frontend != NULL) {
  377. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  378. &dev->core->i2c_adap,
  379. DVB_PLL_THOMSON_DTT759X);
  380. }
  381. break;
  382. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  383. case CX88_BOARD_CONEXANT_DVB_T1:
  384. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  385. case CX88_BOARD_WINFAST_DTV1000:
  386. dev->dvb.frontend = dvb_attach(cx22702_attach,
  387. &connexant_refboard_config,
  388. &dev->core->i2c_adap);
  389. if (dev->dvb.frontend != NULL) {
  390. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  391. &dev->core->i2c_adap,
  392. DVB_PLL_THOMSON_DTT7579);
  393. }
  394. break;
  395. case CX88_BOARD_WINFAST_DTV2000H:
  396. case CX88_BOARD_HAUPPAUGE_HVR1100:
  397. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  398. case CX88_BOARD_HAUPPAUGE_HVR1300:
  399. case CX88_BOARD_HAUPPAUGE_HVR3000:
  400. dev->dvb.frontend = dvb_attach(cx22702_attach,
  401. &hauppauge_hvr_config,
  402. &dev->core->i2c_adap);
  403. if (dev->dvb.frontend != NULL) {
  404. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  405. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  406. }
  407. break;
  408. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  409. dev->dvb.frontend = dvb_attach(mt352_attach,
  410. &dvico_fusionhdtv,
  411. &dev->core->i2c_adap);
  412. if (dev->dvb.frontend != NULL) {
  413. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  414. NULL, DVB_PLL_THOMSON_DTT7579);
  415. break;
  416. }
  417. /* ZL10353 replaces MT352 on later cards */
  418. dev->dvb.frontend = dvb_attach(zl10353_attach,
  419. &dvico_fusionhdtv_plus_v1_1,
  420. &dev->core->i2c_adap);
  421. if (dev->dvb.frontend != NULL) {
  422. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  423. NULL, DVB_PLL_THOMSON_DTT7579);
  424. }
  425. break;
  426. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  427. /* The tin box says DEE1601, but it seems to be DTT7579
  428. * compatible, with a slightly different MT352 AGC gain. */
  429. dev->dvb.frontend = dvb_attach(mt352_attach,
  430. &dvico_fusionhdtv_dual,
  431. &dev->core->i2c_adap);
  432. if (dev->dvb.frontend != NULL) {
  433. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  434. NULL, DVB_PLL_THOMSON_DTT7579);
  435. break;
  436. }
  437. /* ZL10353 replaces MT352 on later cards */
  438. dev->dvb.frontend = dvb_attach(zl10353_attach,
  439. &dvico_fusionhdtv_plus_v1_1,
  440. &dev->core->i2c_adap);
  441. if (dev->dvb.frontend != NULL) {
  442. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  443. NULL, DVB_PLL_THOMSON_DTT7579);
  444. }
  445. break;
  446. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  447. dev->dvb.frontend = dvb_attach(mt352_attach,
  448. &dvico_fusionhdtv,
  449. &dev->core->i2c_adap);
  450. if (dev->dvb.frontend != NULL) {
  451. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  452. NULL, DVB_PLL_LG_Z201);
  453. }
  454. break;
  455. case CX88_BOARD_KWORLD_DVB_T:
  456. case CX88_BOARD_DNTV_LIVE_DVB_T:
  457. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  458. dev->dvb.frontend = dvb_attach(mt352_attach,
  459. &dntv_live_dvbt_config,
  460. &dev->core->i2c_adap);
  461. if (dev->dvb.frontend != NULL) {
  462. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  463. NULL, DVB_PLL_UNKNOWN_1);
  464. }
  465. break;
  466. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  467. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  468. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  469. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  470. &dev->vp3054->adap);
  471. if (dev->dvb.frontend != NULL) {
  472. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  473. &dev->core->i2c_adap, DVB_PLL_FMD1216ME);
  474. }
  475. #else
  476. printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
  477. #endif
  478. break;
  479. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  480. dev->dvb.frontend = dvb_attach(zl10353_attach,
  481. &dvico_fusionhdtv_hybrid,
  482. &dev->core->i2c_adap);
  483. if (dev->dvb.frontend != NULL) {
  484. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  485. &dev->core->i2c_adap,
  486. DVB_PLL_THOMSON_FE6600);
  487. }
  488. break;
  489. case CX88_BOARD_PCHDTV_HD3000:
  490. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  491. &dev->core->i2c_adap);
  492. if (dev->dvb.frontend != NULL) {
  493. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  494. &dev->core->i2c_adap,
  495. DVB_PLL_THOMSON_DTT761X);
  496. }
  497. break;
  498. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  499. dev->ts_gen_cntrl = 0x08;
  500. {
  501. /* Do a hardware reset of chip before using it. */
  502. struct cx88_core *core = dev->core;
  503. cx_clear(MO_GP0_IO, 1);
  504. mdelay(100);
  505. cx_set(MO_GP0_IO, 1);
  506. mdelay(200);
  507. /* Select RF connector callback */
  508. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  509. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  510. &fusionhdtv_3_gold,
  511. &dev->core->i2c_adap);
  512. if (dev->dvb.frontend != NULL) {
  513. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  514. &dev->core->i2c_adap,
  515. DVB_PLL_MICROTUNE_4042);
  516. }
  517. }
  518. break;
  519. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  520. dev->ts_gen_cntrl = 0x08;
  521. {
  522. /* Do a hardware reset of chip before using it. */
  523. struct cx88_core *core = dev->core;
  524. cx_clear(MO_GP0_IO, 1);
  525. mdelay(100);
  526. cx_set(MO_GP0_IO, 9);
  527. mdelay(200);
  528. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  529. &fusionhdtv_3_gold,
  530. &dev->core->i2c_adap);
  531. if (dev->dvb.frontend != NULL) {
  532. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  533. &dev->core->i2c_adap,
  534. DVB_PLL_THOMSON_DTT761X);
  535. }
  536. }
  537. break;
  538. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  539. dev->ts_gen_cntrl = 0x08;
  540. {
  541. /* Do a hardware reset of chip before using it. */
  542. struct cx88_core *core = dev->core;
  543. cx_clear(MO_GP0_IO, 1);
  544. mdelay(100);
  545. cx_set(MO_GP0_IO, 1);
  546. mdelay(200);
  547. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  548. &fusionhdtv_5_gold,
  549. &dev->core->i2c_adap);
  550. if (dev->dvb.frontend != NULL) {
  551. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  552. &dev->core->i2c_adap,
  553. DVB_PLL_LG_TDVS_H06XF);
  554. }
  555. }
  556. break;
  557. case CX88_BOARD_PCHDTV_HD5500:
  558. dev->ts_gen_cntrl = 0x08;
  559. {
  560. /* Do a hardware reset of chip before using it. */
  561. struct cx88_core *core = dev->core;
  562. cx_clear(MO_GP0_IO, 1);
  563. mdelay(100);
  564. cx_set(MO_GP0_IO, 1);
  565. mdelay(200);
  566. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  567. &pchdtv_hd5500,
  568. &dev->core->i2c_adap);
  569. if (dev->dvb.frontend != NULL) {
  570. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  571. &dev->core->i2c_adap,
  572. DVB_PLL_LG_TDVS_H06XF);
  573. }
  574. }
  575. break;
  576. case CX88_BOARD_ATI_HDTVWONDER:
  577. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  578. &ati_hdtvwonder,
  579. &dev->core->i2c_adap);
  580. if (dev->dvb.frontend != NULL) {
  581. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  582. NULL, DVB_PLL_TUV1236D);
  583. }
  584. break;
  585. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  586. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  587. dev->dvb.frontend = dvb_attach(cx24123_attach,
  588. &hauppauge_novas_config,
  589. &dev->core->i2c_adap);
  590. if (dev->dvb.frontend) {
  591. dvb_attach(isl6421_attach, dev->dvb.frontend,
  592. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  593. }
  594. break;
  595. case CX88_BOARD_KWORLD_DVBS_100:
  596. dev->dvb.frontend = dvb_attach(cx24123_attach,
  597. &kworld_dvbs_100_config,
  598. &dev->core->i2c_adap);
  599. if (dev->dvb.frontend) {
  600. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  601. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  602. }
  603. break;
  604. case CX88_BOARD_GENIATECH_DVBS:
  605. dev->dvb.frontend = dvb_attach(cx24123_attach,
  606. &geniatech_dvbs_config,
  607. &dev->core->i2c_adap);
  608. if (dev->dvb.frontend) {
  609. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  610. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  611. }
  612. break;
  613. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  614. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  615. &pinnacle_pctv_hd_800i_config,
  616. &dev->core->i2c_adap);
  617. if (dev->dvb.frontend != NULL) {
  618. /* tuner_config.video_dev must point to
  619. * i2c_adap.algo_data
  620. */
  621. pinnacle_pctv_hd_800i_tuner_config.priv =
  622. dev->core->i2c_adap.algo_data;
  623. dvb_attach(xc5000_attach, dev->dvb.frontend,
  624. &dev->core->i2c_adap,
  625. &pinnacle_pctv_hd_800i_tuner_config);
  626. }
  627. break;
  628. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  629. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  630. &dvico_hdtv5_pci_nano_config,
  631. &dev->core->i2c_adap);
  632. if (dev->dvb.frontend != NULL) {
  633. struct dvb_frontend *fe;
  634. struct xc2028_config cfg = {
  635. .i2c_adap = &dev->core->i2c_adap,
  636. .i2c_addr = 0x61,
  637. .video_dev = dev->core,
  638. .callback = cx88_xc3028_callback,
  639. };
  640. static struct xc2028_ctrl ctl = {
  641. .fname = "xc3028-v27.fw",
  642. .max_len = 64,
  643. .scode_table = OREN538,
  644. };
  645. fe = dvb_attach(xc2028_attach,
  646. dev->dvb.frontend, &cfg);
  647. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  648. fe->ops.tuner_ops.set_config(fe, &ctl);
  649. }
  650. break;
  651. default:
  652. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  653. dev->core->name);
  654. break;
  655. }
  656. if (NULL == dev->dvb.frontend) {
  657. printk(KERN_ERR "%s/2: frontend initialization failed\n", dev->core->name);
  658. return -1;
  659. }
  660. /* Ensure all frontends negotiate bus access */
  661. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  662. /* Put the analog decoder in standby to keep it quiet */
  663. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  664. /* register everything */
  665. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  666. }
  667. /* ----------------------------------------------------------- */
  668. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  669. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  670. {
  671. struct cx88_core *core = drv->core;
  672. int err = 0;
  673. dprintk( 1, "%s\n", __FUNCTION__);
  674. switch (core->boardnr) {
  675. case CX88_BOARD_HAUPPAUGE_HVR1300:
  676. /* We arrive here with either the cx23416 or the cx22702
  677. * on the bus. Take the bus from the cx23416 and enable the
  678. * cx22702 demod
  679. */
  680. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  681. cx_clear(MO_GP0_IO, 0x00000004);
  682. udelay(1000);
  683. break;
  684. default:
  685. err = -ENODEV;
  686. }
  687. return err;
  688. }
  689. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  690. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  691. {
  692. struct cx88_core *core = drv->core;
  693. int err = 0;
  694. dprintk( 1, "%s\n", __FUNCTION__);
  695. switch (core->boardnr) {
  696. case CX88_BOARD_HAUPPAUGE_HVR1300:
  697. /* Do Nothing, leave the cx22702 on the bus. */
  698. break;
  699. default:
  700. err = -ENODEV;
  701. }
  702. return err;
  703. }
  704. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  705. {
  706. struct cx88_core *core = drv->core;
  707. struct cx8802_dev *dev = drv->core->dvbdev;
  708. int err;
  709. dprintk( 1, "%s\n", __FUNCTION__);
  710. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  711. core->boardnr,
  712. core->name,
  713. core->pci_bus,
  714. core->pci_slot);
  715. err = -ENODEV;
  716. if (!(core->board.mpeg & CX88_MPEG_DVB))
  717. goto fail_core;
  718. /* If vp3054 isn't enabled, a stub will just return 0 */
  719. err = vp3054_i2c_probe(dev);
  720. if (0 != err)
  721. goto fail_core;
  722. /* dvb stuff */
  723. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  724. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  725. &dev->pci->dev, &dev->slock,
  726. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  727. V4L2_FIELD_TOP,
  728. sizeof(struct cx88_buffer),
  729. dev);
  730. err = dvb_register(dev);
  731. if (err != 0)
  732. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  733. core->name, err);
  734. fail_core:
  735. return err;
  736. }
  737. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  738. {
  739. struct cx8802_dev *dev = drv->core->dvbdev;
  740. /* dvb */
  741. videobuf_dvb_unregister(&dev->dvb);
  742. vp3054_i2c_remove(dev);
  743. return 0;
  744. }
  745. static struct cx8802_driver cx8802_dvb_driver = {
  746. .type_id = CX88_MPEG_DVB,
  747. .hw_access = CX8802_DRVCTL_SHARED,
  748. .probe = cx8802_dvb_probe,
  749. .remove = cx8802_dvb_remove,
  750. .advise_acquire = cx8802_dvb_advise_acquire,
  751. .advise_release = cx8802_dvb_advise_release,
  752. };
  753. static int dvb_init(void)
  754. {
  755. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  756. (CX88_VERSION_CODE >> 16) & 0xff,
  757. (CX88_VERSION_CODE >> 8) & 0xff,
  758. CX88_VERSION_CODE & 0xff);
  759. #ifdef SNAPSHOT
  760. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  761. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  762. #endif
  763. return cx8802_register_driver(&cx8802_dvb_driver);
  764. }
  765. static void dvb_fini(void)
  766. {
  767. cx8802_unregister_driver(&cx8802_dvb_driver);
  768. }
  769. module_init(dvb_init);
  770. module_exit(dvb_fini);
  771. /*
  772. * Local variables:
  773. * c-basic-offset: 8
  774. * compile-command: "make DVB=1"
  775. * End:
  776. */