setup.c 15 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/config.h>
  19. #include <linux/cpu.h>
  20. #include <linux/errno.h>
  21. #include <linux/sched.h>
  22. #include <linux/kernel.h>
  23. #include <linux/mm.h>
  24. #include <linux/stddef.h>
  25. #include <linux/unistd.h>
  26. #include <linux/slab.h>
  27. #include <linux/user.h>
  28. #include <linux/a.out.h>
  29. #include <linux/tty.h>
  30. #include <linux/major.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/reboot.h>
  33. #include <linux/init.h>
  34. #include <linux/ioport.h>
  35. #include <linux/console.h>
  36. #include <linux/pci.h>
  37. #include <linux/utsname.h>
  38. #include <linux/adb.h>
  39. #include <linux/module.h>
  40. #include <linux/delay.h>
  41. #include <linux/irq.h>
  42. #include <linux/seq_file.h>
  43. #include <linux/root_dev.h>
  44. #include <asm/mmu.h>
  45. #include <asm/processor.h>
  46. #include <asm/io.h>
  47. #include <asm/pgtable.h>
  48. #include <asm/prom.h>
  49. #include <asm/rtas.h>
  50. #include <asm/pci-bridge.h>
  51. #include <asm/iommu.h>
  52. #include <asm/dma.h>
  53. #include <asm/machdep.h>
  54. #include <asm/irq.h>
  55. #include <asm/time.h>
  56. #include <asm/nvram.h>
  57. #include "xics.h"
  58. #include <asm/firmware.h>
  59. #include <asm/pmc.h>
  60. #include <asm/mpic.h>
  61. #include <asm/ppc-pci.h>
  62. #include <asm/i8259.h>
  63. #include <asm/udbg.h>
  64. #include <asm/smp.h>
  65. #include "plpar_wrappers.h"
  66. #ifdef DEBUG
  67. #define DBG(fmt...) udbg_printf(fmt)
  68. #else
  69. #define DBG(fmt...)
  70. #endif
  71. extern void find_udbg_vterm(void);
  72. extern void system_reset_fwnmi(void); /* from head.S */
  73. extern void machine_check_fwnmi(void); /* from head.S */
  74. extern void generic_find_legacy_serial_ports(u64 *physport,
  75. unsigned int *default_speed);
  76. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  77. extern void pSeries_system_reset_exception(struct pt_regs *regs);
  78. extern int pSeries_machine_check_exception(struct pt_regs *regs);
  79. static void pseries_shared_idle(void);
  80. static void pseries_dedicated_idle(void);
  81. struct mpic *pSeries_mpic;
  82. void pSeries_show_cpuinfo(struct seq_file *m)
  83. {
  84. struct device_node *root;
  85. const char *model = "";
  86. root = of_find_node_by_path("/");
  87. if (root)
  88. model = get_property(root, "model", NULL);
  89. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  90. of_node_put(root);
  91. }
  92. /* Initialize firmware assisted non-maskable interrupts if
  93. * the firmware supports this feature.
  94. *
  95. */
  96. static void __init fwnmi_init(void)
  97. {
  98. int ret;
  99. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  100. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  101. return;
  102. ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
  103. __pa((unsigned long)system_reset_fwnmi),
  104. __pa((unsigned long)machine_check_fwnmi));
  105. if (ret == 0)
  106. fwnmi_active = 1;
  107. }
  108. static void __init pSeries_init_mpic(void)
  109. {
  110. unsigned int *addrp;
  111. struct device_node *np;
  112. unsigned long intack = 0;
  113. /* All ISUs are setup, complete initialization */
  114. mpic_init(pSeries_mpic);
  115. /* Check what kind of cascade ACK we have */
  116. if (!(np = of_find_node_by_name(NULL, "pci"))
  117. || !(addrp = (unsigned int *)
  118. get_property(np, "8259-interrupt-acknowledge", NULL)))
  119. printk(KERN_ERR "Cannot find pci to get ack address\n");
  120. else
  121. intack = addrp[prom_n_addr_cells(np)-1];
  122. of_node_put(np);
  123. /* Setup the legacy interrupts & controller */
  124. i8259_init(intack, 0);
  125. /* Hook cascade to mpic */
  126. mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
  127. }
  128. static void __init pSeries_setup_mpic(void)
  129. {
  130. unsigned int *opprop;
  131. unsigned long openpic_addr = 0;
  132. unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
  133. struct device_node *root;
  134. int irq_count;
  135. /* Find the Open PIC if present */
  136. root = of_find_node_by_path("/");
  137. opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
  138. if (opprop != 0) {
  139. int n = prom_n_addr_cells(root);
  140. for (openpic_addr = 0; n > 0; --n)
  141. openpic_addr = (openpic_addr << 32) + *opprop++;
  142. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  143. }
  144. of_node_put(root);
  145. BUG_ON(openpic_addr == 0);
  146. /* Get the sense values from OF */
  147. prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
  148. /* Setup the openpic driver */
  149. irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
  150. pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
  151. 16, 16, irq_count, /* isu size, irq offset, irq count */
  152. NR_IRQS - 4, /* ipi offset */
  153. senses, irq_count, /* sense & sense size */
  154. " MPIC ");
  155. }
  156. static void pseries_lpar_enable_pmcs(void)
  157. {
  158. unsigned long set, reset;
  159. power4_enable_pmcs();
  160. set = 1UL << 63;
  161. reset = 0;
  162. plpar_hcall_norets(H_PERFMON, set, reset);
  163. /* instruct hypervisor to maintain PMCs */
  164. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  165. get_paca()->lppaca.pmcregs_in_use = 1;
  166. }
  167. static void __init pSeries_setup_arch(void)
  168. {
  169. /* Fixup ppc_md depending on the type of interrupt controller */
  170. if (ppc64_interrupt_controller == IC_OPEN_PIC) {
  171. ppc_md.init_IRQ = pSeries_init_mpic;
  172. ppc_md.get_irq = mpic_get_irq;
  173. ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
  174. /* Allocate the mpic now, so that find_and_init_phbs() can
  175. * fill the ISUs */
  176. pSeries_setup_mpic();
  177. } else {
  178. ppc_md.init_IRQ = xics_init_IRQ;
  179. ppc_md.get_irq = xics_get_irq;
  180. ppc_md.cpu_irq_down = xics_teardown_cpu;
  181. }
  182. #ifdef CONFIG_SMP
  183. smp_init_pSeries();
  184. #endif
  185. /* openpic global configuration register (64-bit format). */
  186. /* openpic Interrupt Source Unit pointer (64-bit format). */
  187. /* python0 facility area (mmio) (64-bit format) REAL address. */
  188. /* init to some ~sane value until calibrate_delay() runs */
  189. loops_per_jiffy = 50000000;
  190. if (ROOT_DEV == 0) {
  191. printk("No ramdisk, default root is /dev/sda2\n");
  192. ROOT_DEV = Root_SDA2;
  193. }
  194. fwnmi_init();
  195. /* Find and initialize PCI host bridges */
  196. init_pci_config_tokens();
  197. find_and_init_phbs();
  198. eeh_init();
  199. pSeries_nvram_init();
  200. /* Choose an idle loop */
  201. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  202. vpa_init(boot_cpuid);
  203. if (get_paca()->lppaca.shared_proc) {
  204. printk(KERN_INFO "Using shared processor idle loop\n");
  205. ppc_md.idle_loop = pseries_shared_idle;
  206. } else {
  207. printk(KERN_INFO "Using dedicated idle loop\n");
  208. ppc_md.idle_loop = pseries_dedicated_idle;
  209. }
  210. } else {
  211. printk(KERN_INFO "Using default idle loop\n");
  212. ppc_md.idle_loop = default_idle;
  213. }
  214. if (systemcfg->platform & PLATFORM_LPAR)
  215. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  216. else
  217. ppc_md.enable_pmcs = power4_enable_pmcs;
  218. }
  219. static int __init pSeries_init_panel(void)
  220. {
  221. /* Manually leave the kernel version on the panel. */
  222. ppc_md.progress("Linux ppc64\n", 0);
  223. ppc_md.progress(system_utsname.version, 0);
  224. return 0;
  225. }
  226. arch_initcall(pSeries_init_panel);
  227. /* Build up the ppc64_firmware_features bitmask field
  228. * using contents of device-tree/ibm,hypertas-functions.
  229. * Ultimately this functionality may be moved into prom.c prom_init().
  230. */
  231. static void __init fw_feature_init(void)
  232. {
  233. struct device_node * dn;
  234. char * hypertas;
  235. unsigned int len;
  236. DBG(" -> fw_feature_init()\n");
  237. ppc64_firmware_features = 0;
  238. dn = of_find_node_by_path("/rtas");
  239. if (dn == NULL) {
  240. printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
  241. goto no_rtas;
  242. }
  243. hypertas = get_property(dn, "ibm,hypertas-functions", &len);
  244. if (hypertas) {
  245. while (len > 0){
  246. int i, hypertas_len;
  247. /* check value against table of strings */
  248. for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
  249. if ((firmware_features_table[i].name) &&
  250. (strcmp(firmware_features_table[i].name,hypertas))==0) {
  251. /* we have a match */
  252. ppc64_firmware_features |=
  253. (firmware_features_table[i].val);
  254. break;
  255. }
  256. }
  257. hypertas_len = strlen(hypertas);
  258. len -= hypertas_len +1;
  259. hypertas+= hypertas_len +1;
  260. }
  261. }
  262. of_node_put(dn);
  263. no_rtas:
  264. printk(KERN_INFO "firmware_features = 0x%lx\n",
  265. ppc64_firmware_features);
  266. DBG(" <- fw_feature_init()\n");
  267. }
  268. static void __init pSeries_discover_pic(void)
  269. {
  270. struct device_node *np;
  271. char *typep;
  272. /*
  273. * Setup interrupt mapping options that are needed for finish_device_tree
  274. * to properly parse the OF interrupt tree & do the virtual irq mapping
  275. */
  276. __irq_offset_value = NUM_ISA_INTERRUPTS;
  277. ppc64_interrupt_controller = IC_INVALID;
  278. for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
  279. typep = (char *)get_property(np, "compatible", NULL);
  280. if (strstr(typep, "open-pic"))
  281. ppc64_interrupt_controller = IC_OPEN_PIC;
  282. else if (strstr(typep, "ppc-xicp"))
  283. ppc64_interrupt_controller = IC_PPC_XIC;
  284. else
  285. printk("pSeries_discover_pic: failed to recognize"
  286. " interrupt-controller\n");
  287. break;
  288. }
  289. }
  290. static void pSeries_mach_cpu_die(void)
  291. {
  292. local_irq_disable();
  293. idle_task_exit();
  294. /* Some hardware requires clearing the CPPR, while other hardware does not
  295. * it is safe either way
  296. */
  297. pSeriesLP_cppr_info(0, 0);
  298. rtas_stop_self();
  299. /* Should never get here... */
  300. BUG();
  301. for(;;);
  302. }
  303. static int pseries_set_dabr(unsigned long dabr)
  304. {
  305. return plpar_hcall_norets(H_SET_DABR, dabr);
  306. }
  307. static int pseries_set_xdabr(unsigned long dabr)
  308. {
  309. /* We want to catch accesses from kernel and userspace */
  310. return plpar_hcall_norets(H_SET_XDABR, dabr,
  311. H_DABRX_KERNEL | H_DABRX_USER);
  312. }
  313. /*
  314. * Early initialization. Relocation is on but do not reference unbolted pages
  315. */
  316. static void __init pSeries_init_early(void)
  317. {
  318. void *comport;
  319. int iommu_off = 0;
  320. unsigned int default_speed;
  321. u64 physport;
  322. DBG(" -> pSeries_init_early()\n");
  323. fw_feature_init();
  324. if (systemcfg->platform & PLATFORM_LPAR)
  325. hpte_init_lpar();
  326. else {
  327. hpte_init_native();
  328. iommu_off = (of_chosen &&
  329. get_property(of_chosen, "linux,iommu-off", NULL));
  330. }
  331. generic_find_legacy_serial_ports(&physport, &default_speed);
  332. if (systemcfg->platform & PLATFORM_LPAR)
  333. find_udbg_vterm();
  334. else if (physport) {
  335. /* Map the uart for udbg. */
  336. comport = (void *)ioremap(physport, 16);
  337. udbg_init_uart(comport, default_speed);
  338. DBG("Hello World !\n");
  339. }
  340. if (firmware_has_feature(FW_FEATURE_DABR))
  341. ppc_md.set_dabr = pseries_set_dabr;
  342. else if (firmware_has_feature(FW_FEATURE_XDABR))
  343. ppc_md.set_dabr = pseries_set_xdabr;
  344. iommu_init_early_pSeries();
  345. pSeries_discover_pic();
  346. DBG(" <- pSeries_init_early()\n");
  347. }
  348. static int pSeries_check_legacy_ioport(unsigned int baseport)
  349. {
  350. struct device_node *np;
  351. #define I8042_DATA_REG 0x60
  352. #define FDC_BASE 0x3f0
  353. switch(baseport) {
  354. case I8042_DATA_REG:
  355. np = of_find_node_by_type(NULL, "8042");
  356. if (np == NULL)
  357. return -ENODEV;
  358. of_node_put(np);
  359. break;
  360. case FDC_BASE:
  361. np = of_find_node_by_type(NULL, "fdc");
  362. if (np == NULL)
  363. return -ENODEV;
  364. of_node_put(np);
  365. break;
  366. }
  367. return 0;
  368. }
  369. /*
  370. * Called very early, MMU is off, device-tree isn't unflattened
  371. */
  372. extern struct machdep_calls pSeries_md;
  373. static int __init pSeries_probe(int platform)
  374. {
  375. if (platform != PLATFORM_PSERIES &&
  376. platform != PLATFORM_PSERIES_LPAR)
  377. return 0;
  378. /* if we have some ppc_md fixups for LPAR to do, do
  379. * it here ...
  380. */
  381. return 1;
  382. }
  383. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  384. static inline void dedicated_idle_sleep(unsigned int cpu)
  385. {
  386. struct paca_struct *ppaca = &paca[cpu ^ 1];
  387. /* Only sleep if the other thread is not idle */
  388. if (!(ppaca->lppaca.idle)) {
  389. local_irq_disable();
  390. /*
  391. * We are about to sleep the thread and so wont be polling any
  392. * more.
  393. */
  394. clear_thread_flag(TIF_POLLING_NRFLAG);
  395. /*
  396. * SMT dynamic mode. Cede will result in this thread going
  397. * dormant, if the partner thread is still doing work. Thread
  398. * wakes up if partner goes idle, an interrupt is presented, or
  399. * a prod occurs. Returning from the cede enables external
  400. * interrupts.
  401. */
  402. if (!need_resched())
  403. cede_processor();
  404. else
  405. local_irq_enable();
  406. } else {
  407. /*
  408. * Give the HV an opportunity at the processor, since we are
  409. * not doing any work.
  410. */
  411. poll_pending();
  412. }
  413. }
  414. static void pseries_dedicated_idle(void)
  415. {
  416. long oldval;
  417. struct paca_struct *lpaca = get_paca();
  418. unsigned int cpu = smp_processor_id();
  419. unsigned long start_snooze;
  420. unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
  421. while (1) {
  422. /*
  423. * Indicate to the HV that we are idle. Now would be
  424. * a good time to find other work to dispatch.
  425. */
  426. lpaca->lppaca.idle = 1;
  427. oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
  428. if (!oldval) {
  429. set_thread_flag(TIF_POLLING_NRFLAG);
  430. start_snooze = __get_tb() +
  431. *smt_snooze_delay * tb_ticks_per_usec;
  432. while (!need_resched() && !cpu_is_offline(cpu)) {
  433. ppc64_runlatch_off();
  434. /*
  435. * Go into low thread priority and possibly
  436. * low power mode.
  437. */
  438. HMT_low();
  439. HMT_very_low();
  440. if (*smt_snooze_delay != 0 &&
  441. __get_tb() > start_snooze) {
  442. HMT_medium();
  443. dedicated_idle_sleep(cpu);
  444. }
  445. }
  446. HMT_medium();
  447. clear_thread_flag(TIF_POLLING_NRFLAG);
  448. } else {
  449. set_need_resched();
  450. }
  451. lpaca->lppaca.idle = 0;
  452. ppc64_runlatch_on();
  453. preempt_enable_no_resched();
  454. schedule();
  455. preempt_disable();
  456. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  457. cpu_die();
  458. }
  459. }
  460. static void pseries_shared_idle(void)
  461. {
  462. struct paca_struct *lpaca = get_paca();
  463. unsigned int cpu = smp_processor_id();
  464. while (1) {
  465. /*
  466. * Indicate to the HV that we are idle. Now would be
  467. * a good time to find other work to dispatch.
  468. */
  469. lpaca->lppaca.idle = 1;
  470. while (!need_resched() && !cpu_is_offline(cpu)) {
  471. local_irq_disable();
  472. ppc64_runlatch_off();
  473. /*
  474. * Yield the processor to the hypervisor. We return if
  475. * an external interrupt occurs (which are driven prior
  476. * to returning here) or if a prod occurs from another
  477. * processor. When returning here, external interrupts
  478. * are enabled.
  479. *
  480. * Check need_resched() again with interrupts disabled
  481. * to avoid a race.
  482. */
  483. if (!need_resched())
  484. cede_processor();
  485. else
  486. local_irq_enable();
  487. HMT_medium();
  488. }
  489. lpaca->lppaca.idle = 0;
  490. ppc64_runlatch_on();
  491. preempt_enable_no_resched();
  492. schedule();
  493. preempt_disable();
  494. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  495. cpu_die();
  496. }
  497. }
  498. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  499. {
  500. if (systemcfg->platform & PLATFORM_LPAR)
  501. return PCI_PROBE_DEVTREE;
  502. return PCI_PROBE_NORMAL;
  503. }
  504. struct machdep_calls __initdata pSeries_md = {
  505. .probe = pSeries_probe,
  506. .setup_arch = pSeries_setup_arch,
  507. .init_early = pSeries_init_early,
  508. .show_cpuinfo = pSeries_show_cpuinfo,
  509. .log_error = pSeries_log_error,
  510. .pcibios_fixup = pSeries_final_fixup,
  511. .pci_probe_mode = pSeries_pci_probe_mode,
  512. .irq_bus_setup = pSeries_irq_bus_setup,
  513. .restart = rtas_restart,
  514. .power_off = rtas_power_off,
  515. .halt = rtas_halt,
  516. .panic = rtas_os_term,
  517. .cpu_die = pSeries_mach_cpu_die,
  518. .get_boot_time = rtas_get_boot_time,
  519. .get_rtc_time = rtas_get_rtc_time,
  520. .set_rtc_time = rtas_set_rtc_time,
  521. .calibrate_decr = generic_calibrate_decr,
  522. .progress = rtas_progress,
  523. .check_legacy_ioport = pSeries_check_legacy_ioport,
  524. .system_reset_exception = pSeries_system_reset_exception,
  525. .machine_check_exception = pSeries_machine_check_exception,
  526. };