cx88-dvb.c 30 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "cx24116.h"
  49. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  50. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  51. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  52. MODULE_LICENSE("GPL");
  53. static unsigned int debug;
  54. module_param(debug, int, 0644);
  55. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  56. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  57. #define dprintk(level,fmt, arg...) if (debug >= level) \
  58. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  59. /* ------------------------------------------------------------------ */
  60. static int dvb_buf_setup(struct videobuf_queue *q,
  61. unsigned int *count, unsigned int *size)
  62. {
  63. struct cx8802_dev *dev = q->priv_data;
  64. dev->ts_packet_size = 188 * 4;
  65. dev->ts_packet_count = 32;
  66. *size = dev->ts_packet_size * dev->ts_packet_count;
  67. *count = 32;
  68. return 0;
  69. }
  70. static int dvb_buf_prepare(struct videobuf_queue *q,
  71. struct videobuf_buffer *vb, enum v4l2_field field)
  72. {
  73. struct cx8802_dev *dev = q->priv_data;
  74. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  75. }
  76. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  77. {
  78. struct cx8802_dev *dev = q->priv_data;
  79. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  80. }
  81. static void dvb_buf_release(struct videobuf_queue *q,
  82. struct videobuf_buffer *vb)
  83. {
  84. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  85. }
  86. static struct videobuf_queue_ops dvb_qops = {
  87. .buf_setup = dvb_buf_setup,
  88. .buf_prepare = dvb_buf_prepare,
  89. .buf_queue = dvb_buf_queue,
  90. .buf_release = dvb_buf_release,
  91. };
  92. /* ------------------------------------------------------------------ */
  93. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  94. {
  95. struct cx8802_dev *dev= fe->dvb->priv;
  96. struct cx8802_driver *drv = NULL;
  97. int ret = 0;
  98. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  99. if (drv) {
  100. if (acquire)
  101. ret = drv->request_acquire(drv);
  102. else
  103. ret = drv->request_release(drv);
  104. }
  105. return ret;
  106. }
  107. /* ------------------------------------------------------------------ */
  108. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  109. {
  110. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  111. static u8 reset [] = { RESET, 0x80 };
  112. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  113. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  114. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  115. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  116. mt352_write(fe, clock_config, sizeof(clock_config));
  117. udelay(200);
  118. mt352_write(fe, reset, sizeof(reset));
  119. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  120. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  121. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  122. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  123. return 0;
  124. }
  125. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  126. {
  127. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  128. static u8 reset [] = { RESET, 0x80 };
  129. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  130. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  131. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  132. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  133. mt352_write(fe, clock_config, sizeof(clock_config));
  134. udelay(200);
  135. mt352_write(fe, reset, sizeof(reset));
  136. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  137. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  138. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  139. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  140. return 0;
  141. }
  142. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  143. {
  144. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  145. static u8 reset [] = { 0x50, 0x80 };
  146. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  147. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  148. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  149. static u8 dntv_extra[] = { 0xB5, 0x7A };
  150. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  151. mt352_write(fe, clock_config, sizeof(clock_config));
  152. udelay(2000);
  153. mt352_write(fe, reset, sizeof(reset));
  154. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  155. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  156. udelay(2000);
  157. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  158. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  159. return 0;
  160. }
  161. static struct mt352_config dvico_fusionhdtv = {
  162. .demod_address = 0x0f,
  163. .demod_init = dvico_fusionhdtv_demod_init,
  164. };
  165. static struct mt352_config dntv_live_dvbt_config = {
  166. .demod_address = 0x0f,
  167. .demod_init = dntv_live_dvbt_demod_init,
  168. };
  169. static struct mt352_config dvico_fusionhdtv_dual = {
  170. .demod_address = 0x0f,
  171. .demod_init = dvico_dual_demod_init,
  172. };
  173. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  174. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  175. {
  176. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  177. static u8 reset [] = { 0x50, 0x80 };
  178. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  179. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  180. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  181. static u8 dntv_extra[] = { 0xB5, 0x7A };
  182. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  183. mt352_write(fe, clock_config, sizeof(clock_config));
  184. udelay(2000);
  185. mt352_write(fe, reset, sizeof(reset));
  186. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  187. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  188. udelay(2000);
  189. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  190. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  191. return 0;
  192. }
  193. static struct mt352_config dntv_live_dvbt_pro_config = {
  194. .demod_address = 0x0f,
  195. .no_tuner = 1,
  196. .demod_init = dntv_live_dvbt_pro_demod_init,
  197. };
  198. #endif
  199. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  200. .demod_address = 0x0f,
  201. .no_tuner = 1,
  202. };
  203. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  204. .demod_address = 0x0f,
  205. .if2 = 45600,
  206. .no_tuner = 1,
  207. };
  208. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  209. .demod_address = 0x0f,
  210. .if2 = 4560,
  211. .no_tuner = 1,
  212. .demod_init = dvico_fusionhdtv_demod_init,
  213. };
  214. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  215. .demod_address = 0x0f,
  216. };
  217. static struct cx22702_config connexant_refboard_config = {
  218. .demod_address = 0x43,
  219. .output_mode = CX22702_SERIAL_OUTPUT,
  220. };
  221. static struct cx22702_config hauppauge_hvr_config = {
  222. .demod_address = 0x63,
  223. .output_mode = CX22702_SERIAL_OUTPUT,
  224. };
  225. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  226. {
  227. struct cx8802_dev *dev= fe->dvb->priv;
  228. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  229. return 0;
  230. }
  231. static struct or51132_config pchdtv_hd3000 = {
  232. .demod_address = 0x15,
  233. .set_ts_params = or51132_set_ts_param,
  234. };
  235. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  236. {
  237. struct cx8802_dev *dev= fe->dvb->priv;
  238. struct cx88_core *core = dev->core;
  239. dprintk(1, "%s: index = %d\n", __func__, index);
  240. if (index == 0)
  241. cx_clear(MO_GP0_IO, 8);
  242. else
  243. cx_set(MO_GP0_IO, 8);
  244. return 0;
  245. }
  246. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  247. {
  248. struct cx8802_dev *dev= fe->dvb->priv;
  249. if (is_punctured)
  250. dev->ts_gen_cntrl |= 0x04;
  251. else
  252. dev->ts_gen_cntrl &= ~0x04;
  253. return 0;
  254. }
  255. static struct lgdt330x_config fusionhdtv_3_gold = {
  256. .demod_address = 0x0e,
  257. .demod_chip = LGDT3302,
  258. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  259. .set_ts_params = lgdt330x_set_ts_param,
  260. };
  261. static struct lgdt330x_config fusionhdtv_5_gold = {
  262. .demod_address = 0x0e,
  263. .demod_chip = LGDT3303,
  264. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  265. .set_ts_params = lgdt330x_set_ts_param,
  266. };
  267. static struct lgdt330x_config pchdtv_hd5500 = {
  268. .demod_address = 0x59,
  269. .demod_chip = LGDT3303,
  270. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  271. .set_ts_params = lgdt330x_set_ts_param,
  272. };
  273. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  274. {
  275. struct cx8802_dev *dev= fe->dvb->priv;
  276. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  277. return 0;
  278. }
  279. static struct nxt200x_config ati_hdtvwonder = {
  280. .demod_address = 0x0a,
  281. .set_ts_params = nxt200x_set_ts_param,
  282. };
  283. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  284. int is_punctured)
  285. {
  286. struct cx8802_dev *dev= fe->dvb->priv;
  287. dev->ts_gen_cntrl = 0x02;
  288. return 0;
  289. }
  290. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  291. fe_sec_voltage_t voltage)
  292. {
  293. struct cx8802_dev *dev= fe->dvb->priv;
  294. struct cx88_core *core = dev->core;
  295. if (voltage == SEC_VOLTAGE_OFF)
  296. cx_write(MO_GP0_IO, 0x000006fb);
  297. else
  298. cx_write(MO_GP0_IO, 0x000006f9);
  299. if (core->prev_set_voltage)
  300. return core->prev_set_voltage(fe, voltage);
  301. return 0;
  302. }
  303. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  304. fe_sec_voltage_t voltage)
  305. {
  306. struct cx8802_dev *dev= fe->dvb->priv;
  307. struct cx88_core *core = dev->core;
  308. if (voltage == SEC_VOLTAGE_OFF) {
  309. dprintk(1,"LNB Voltage OFF\n");
  310. cx_write(MO_GP0_IO, 0x0000efff);
  311. }
  312. if (core->prev_set_voltage)
  313. return core->prev_set_voltage(fe, voltage);
  314. return 0;
  315. }
  316. static int cx88_pci_nano_callback(void *ptr, int command, int arg)
  317. {
  318. struct cx88_core *core = ptr;
  319. switch (command) {
  320. case XC2028_TUNER_RESET:
  321. /* Send the tuner in then out of reset */
  322. dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __func__, arg);
  323. switch (core->boardnr) {
  324. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  325. /* GPIO-4 xc3028 tuner */
  326. cx_set(MO_GP0_IO, 0x00001000);
  327. cx_clear(MO_GP0_IO, 0x00000010);
  328. msleep(100);
  329. cx_set(MO_GP0_IO, 0x00000010);
  330. msleep(100);
  331. break;
  332. }
  333. break;
  334. case XC2028_RESET_CLK:
  335. dprintk(1, "%s: XC2028_RESET_CLK %d\n", __func__, arg);
  336. break;
  337. default:
  338. dprintk(1, "%s: unknown command %d, arg %d\n", __func__,
  339. command, arg);
  340. return -EINVAL;
  341. }
  342. return 0;
  343. }
  344. static struct cx24123_config geniatech_dvbs_config = {
  345. .demod_address = 0x55,
  346. .set_ts_params = cx24123_set_ts_param,
  347. };
  348. static struct cx24123_config hauppauge_novas_config = {
  349. .demod_address = 0x55,
  350. .set_ts_params = cx24123_set_ts_param,
  351. };
  352. static struct cx24123_config kworld_dvbs_100_config = {
  353. .demod_address = 0x15,
  354. .set_ts_params = cx24123_set_ts_param,
  355. .lnb_polarity = 1,
  356. };
  357. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  358. .demod_address = 0x32 >> 1,
  359. .output_mode = S5H1409_PARALLEL_OUTPUT,
  360. .gpio = S5H1409_GPIO_ON,
  361. .qam_if = 44000,
  362. .inversion = S5H1409_INVERSION_OFF,
  363. .status_mode = S5H1409_DEMODLOCKING,
  364. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  365. };
  366. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  367. .demod_address = 0x32 >> 1,
  368. .output_mode = S5H1409_SERIAL_OUTPUT,
  369. .gpio = S5H1409_GPIO_OFF,
  370. .inversion = S5H1409_INVERSION_OFF,
  371. .status_mode = S5H1409_DEMODLOCKING,
  372. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  373. };
  374. static struct s5h1409_config kworld_atsc_120_config = {
  375. .demod_address = 0x32 >> 1,
  376. .output_mode = S5H1409_SERIAL_OUTPUT,
  377. .gpio = S5H1409_GPIO_OFF,
  378. .inversion = S5H1409_INVERSION_OFF,
  379. .status_mode = S5H1409_DEMODLOCKING,
  380. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  381. };
  382. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  383. .i2c_address = 0x64,
  384. .if_khz = 5380,
  385. .tuner_callback = cx88_tuner_callback,
  386. };
  387. static struct zl10353_config cx88_geniatech_x8000_mt = {
  388. .demod_address = (0x1e >> 1),
  389. .no_tuner = 1,
  390. };
  391. static struct s5h1411_config dvico_fusionhdtv7_config = {
  392. .output_mode = S5H1411_SERIAL_OUTPUT,
  393. .gpio = S5H1411_GPIO_ON,
  394. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  395. .qam_if = S5H1411_IF_44000,
  396. .vsb_if = S5H1411_IF_44000,
  397. .inversion = S5H1411_INVERSION_OFF,
  398. .status_mode = S5H1411_DEMODLOCKING
  399. };
  400. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  401. .i2c_address = 0xc2 >> 1,
  402. .if_khz = 5380,
  403. .tuner_callback = cx88_tuner_callback,
  404. };
  405. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  406. {
  407. struct dvb_frontend *fe;
  408. struct xc2028_ctrl ctl;
  409. struct xc2028_config cfg = {
  410. .i2c_adap = &dev->core->i2c_adap,
  411. .i2c_addr = addr,
  412. .ctrl = &ctl,
  413. .callback = cx88_tuner_callback,
  414. };
  415. if (!dev->dvb.frontend) {
  416. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  417. "Can't attach xc3028\n",
  418. dev->core->name);
  419. return -EINVAL;
  420. }
  421. /*
  422. * Some xc3028 devices may be hidden by an I2C gate. This is known
  423. * to happen with some s5h1409-based devices.
  424. * Now that I2C gate is open, sets up xc3028 configuration
  425. */
  426. cx88_setup_xc3028(dev->core, &ctl);
  427. fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
  428. if (!fe) {
  429. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  430. dev->core->name);
  431. return -EINVAL;
  432. }
  433. printk(KERN_INFO "%s/2: xc3028 attached\n",
  434. dev->core->name);
  435. return 0;
  436. }
  437. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  438. int is_punctured)
  439. {
  440. struct cx8802_dev *dev = fe->dvb->priv;
  441. dev->ts_gen_cntrl = 0x2;
  442. return 0;
  443. }
  444. static int cx24116_reset_device(struct dvb_frontend *fe)
  445. {
  446. struct cx8802_dev *dev = fe->dvb->priv;
  447. struct cx88_core *core = dev->core;
  448. /* Reset the part */
  449. cx_write(MO_SRST_IO, 0);
  450. msleep(10);
  451. cx_write(MO_SRST_IO, 1);
  452. msleep(10);
  453. return 0;
  454. }
  455. static struct cx24116_config hauppauge_hvr4000_config = {
  456. .demod_address = 0x05,
  457. .set_ts_params = cx24116_set_ts_param,
  458. .reset_device = cx24116_reset_device,
  459. };
  460. static int dvb_register(struct cx8802_dev *dev)
  461. {
  462. struct cx88_core *core = dev->core;
  463. /* init struct videobuf_dvb */
  464. dev->dvb.name = core->name;
  465. dev->ts_gen_cntrl = 0x0c;
  466. /* init frontend */
  467. switch (core->boardnr) {
  468. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  469. dev->dvb.frontend = dvb_attach(cx22702_attach,
  470. &connexant_refboard_config,
  471. &core->i2c_adap);
  472. if (dev->dvb.frontend != NULL) {
  473. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  474. 0x61, &core->i2c_adap,
  475. DVB_PLL_THOMSON_DTT759X))
  476. goto frontend_detach;
  477. }
  478. break;
  479. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  480. case CX88_BOARD_CONEXANT_DVB_T1:
  481. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  482. case CX88_BOARD_WINFAST_DTV1000:
  483. dev->dvb.frontend = dvb_attach(cx22702_attach,
  484. &connexant_refboard_config,
  485. &core->i2c_adap);
  486. if (dev->dvb.frontend != NULL) {
  487. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  488. 0x60, &core->i2c_adap,
  489. DVB_PLL_THOMSON_DTT7579))
  490. goto frontend_detach;
  491. }
  492. break;
  493. case CX88_BOARD_WINFAST_DTV2000H:
  494. case CX88_BOARD_HAUPPAUGE_HVR1100:
  495. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  496. case CX88_BOARD_HAUPPAUGE_HVR1300:
  497. case CX88_BOARD_HAUPPAUGE_HVR3000:
  498. dev->dvb.frontend = dvb_attach(cx22702_attach,
  499. &hauppauge_hvr_config,
  500. &core->i2c_adap);
  501. if (dev->dvb.frontend != NULL) {
  502. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  503. &core->i2c_adap, 0x61,
  504. TUNER_PHILIPS_FMD1216ME_MK3))
  505. goto frontend_detach;
  506. }
  507. break;
  508. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  509. dev->dvb.frontend = dvb_attach(mt352_attach,
  510. &dvico_fusionhdtv,
  511. &core->i2c_adap);
  512. if (dev->dvb.frontend != NULL) {
  513. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  514. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  515. goto frontend_detach;
  516. break;
  517. }
  518. /* ZL10353 replaces MT352 on later cards */
  519. dev->dvb.frontend = dvb_attach(zl10353_attach,
  520. &dvico_fusionhdtv_plus_v1_1,
  521. &core->i2c_adap);
  522. if (dev->dvb.frontend != NULL) {
  523. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  524. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  525. goto frontend_detach;
  526. }
  527. break;
  528. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  529. /* The tin box says DEE1601, but it seems to be DTT7579
  530. * compatible, with a slightly different MT352 AGC gain. */
  531. dev->dvb.frontend = dvb_attach(mt352_attach,
  532. &dvico_fusionhdtv_dual,
  533. &core->i2c_adap);
  534. if (dev->dvb.frontend != NULL) {
  535. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  536. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  537. goto frontend_detach;
  538. break;
  539. }
  540. /* ZL10353 replaces MT352 on later cards */
  541. dev->dvb.frontend = dvb_attach(zl10353_attach,
  542. &dvico_fusionhdtv_plus_v1_1,
  543. &core->i2c_adap);
  544. if (dev->dvb.frontend != NULL) {
  545. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  546. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  547. goto frontend_detach;
  548. }
  549. break;
  550. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  551. dev->dvb.frontend = dvb_attach(mt352_attach,
  552. &dvico_fusionhdtv,
  553. &core->i2c_adap);
  554. if (dev->dvb.frontend != NULL) {
  555. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  556. 0x61, NULL, DVB_PLL_LG_Z201))
  557. goto frontend_detach;
  558. }
  559. break;
  560. case CX88_BOARD_KWORLD_DVB_T:
  561. case CX88_BOARD_DNTV_LIVE_DVB_T:
  562. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  563. dev->dvb.frontend = dvb_attach(mt352_attach,
  564. &dntv_live_dvbt_config,
  565. &core->i2c_adap);
  566. if (dev->dvb.frontend != NULL) {
  567. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  568. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  569. goto frontend_detach;
  570. }
  571. break;
  572. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  573. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  574. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  575. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  576. &dev->vp3054->adap);
  577. if (dev->dvb.frontend != NULL) {
  578. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  579. &core->i2c_adap, 0x61,
  580. TUNER_PHILIPS_FMD1216ME_MK3))
  581. goto frontend_detach;
  582. }
  583. #else
  584. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  585. core->name);
  586. #endif
  587. break;
  588. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  589. dev->dvb.frontend = dvb_attach(zl10353_attach,
  590. &dvico_fusionhdtv_hybrid,
  591. &core->i2c_adap);
  592. if (dev->dvb.frontend != NULL) {
  593. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  594. &core->i2c_adap, 0x61,
  595. TUNER_THOMSON_FE6600))
  596. goto frontend_detach;
  597. }
  598. break;
  599. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  600. dev->dvb.frontend = dvb_attach(zl10353_attach,
  601. &dvico_fusionhdtv_xc3028,
  602. &core->i2c_adap);
  603. if (dev->dvb.frontend == NULL)
  604. dev->dvb.frontend = dvb_attach(mt352_attach,
  605. &dvico_fusionhdtv_mt352_xc3028,
  606. &core->i2c_adap);
  607. /*
  608. * On this board, the demod provides the I2C bus pullup.
  609. * We must not permit gate_ctrl to be performed, or
  610. * the xc3028 cannot communicate on the bus.
  611. */
  612. if (dev->dvb.frontend)
  613. dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  614. if (attach_xc3028(0x61, dev) < 0)
  615. return -EINVAL;
  616. break;
  617. case CX88_BOARD_PCHDTV_HD3000:
  618. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  619. &core->i2c_adap);
  620. if (dev->dvb.frontend != NULL) {
  621. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  622. &core->i2c_adap, 0x61,
  623. TUNER_THOMSON_DTT761X))
  624. goto frontend_detach;
  625. }
  626. break;
  627. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  628. dev->ts_gen_cntrl = 0x08;
  629. /* Do a hardware reset of chip before using it. */
  630. cx_clear(MO_GP0_IO, 1);
  631. mdelay(100);
  632. cx_set(MO_GP0_IO, 1);
  633. mdelay(200);
  634. /* Select RF connector callback */
  635. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  636. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  637. &fusionhdtv_3_gold,
  638. &core->i2c_adap);
  639. if (dev->dvb.frontend != NULL) {
  640. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  641. &core->i2c_adap, 0x61,
  642. TUNER_MICROTUNE_4042FI5))
  643. goto frontend_detach;
  644. }
  645. break;
  646. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  647. dev->ts_gen_cntrl = 0x08;
  648. /* Do a hardware reset of chip before using it. */
  649. cx_clear(MO_GP0_IO, 1);
  650. mdelay(100);
  651. cx_set(MO_GP0_IO, 9);
  652. mdelay(200);
  653. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  654. &fusionhdtv_3_gold,
  655. &core->i2c_adap);
  656. if (dev->dvb.frontend != NULL) {
  657. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  658. &core->i2c_adap, 0x61,
  659. TUNER_THOMSON_DTT761X))
  660. goto frontend_detach;
  661. }
  662. break;
  663. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  664. dev->ts_gen_cntrl = 0x08;
  665. /* Do a hardware reset of chip before using it. */
  666. cx_clear(MO_GP0_IO, 1);
  667. mdelay(100);
  668. cx_set(MO_GP0_IO, 1);
  669. mdelay(200);
  670. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  671. &fusionhdtv_5_gold,
  672. &core->i2c_adap);
  673. if (dev->dvb.frontend != NULL) {
  674. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  675. &core->i2c_adap, 0x61,
  676. TUNER_LG_TDVS_H06XF))
  677. goto frontend_detach;
  678. if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
  679. &core->i2c_adap, 0x43))
  680. goto frontend_detach;
  681. }
  682. break;
  683. case CX88_BOARD_PCHDTV_HD5500:
  684. dev->ts_gen_cntrl = 0x08;
  685. /* Do a hardware reset of chip before using it. */
  686. cx_clear(MO_GP0_IO, 1);
  687. mdelay(100);
  688. cx_set(MO_GP0_IO, 1);
  689. mdelay(200);
  690. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  691. &pchdtv_hd5500,
  692. &core->i2c_adap);
  693. if (dev->dvb.frontend != NULL) {
  694. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  695. &core->i2c_adap, 0x61,
  696. TUNER_LG_TDVS_H06XF))
  697. goto frontend_detach;
  698. if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
  699. &core->i2c_adap, 0x43))
  700. goto frontend_detach;
  701. }
  702. break;
  703. case CX88_BOARD_ATI_HDTVWONDER:
  704. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  705. &ati_hdtvwonder,
  706. &core->i2c_adap);
  707. if (dev->dvb.frontend != NULL) {
  708. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  709. &core->i2c_adap, 0x61,
  710. TUNER_PHILIPS_TUV1236D))
  711. goto frontend_detach;
  712. }
  713. break;
  714. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  715. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  716. dev->dvb.frontend = dvb_attach(cx24123_attach,
  717. &hauppauge_novas_config,
  718. &core->i2c_adap);
  719. if (dev->dvb.frontend) {
  720. if (!dvb_attach(isl6421_attach, dev->dvb.frontend,
  721. &core->i2c_adap, 0x08, 0x00, 0x00))
  722. goto frontend_detach;
  723. }
  724. break;
  725. case CX88_BOARD_KWORLD_DVBS_100:
  726. dev->dvb.frontend = dvb_attach(cx24123_attach,
  727. &kworld_dvbs_100_config,
  728. &core->i2c_adap);
  729. if (dev->dvb.frontend) {
  730. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  731. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  732. }
  733. break;
  734. case CX88_BOARD_GENIATECH_DVBS:
  735. dev->dvb.frontend = dvb_attach(cx24123_attach,
  736. &geniatech_dvbs_config,
  737. &core->i2c_adap);
  738. if (dev->dvb.frontend) {
  739. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  740. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  741. }
  742. break;
  743. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  744. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  745. &pinnacle_pctv_hd_800i_config,
  746. &core->i2c_adap);
  747. if (dev->dvb.frontend != NULL) {
  748. if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
  749. &core->i2c_adap,
  750. &pinnacle_pctv_hd_800i_tuner_config))
  751. goto frontend_detach;
  752. }
  753. break;
  754. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  755. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  756. &dvico_hdtv5_pci_nano_config,
  757. &core->i2c_adap);
  758. if (dev->dvb.frontend != NULL) {
  759. struct dvb_frontend *fe;
  760. struct xc2028_config cfg = {
  761. .i2c_adap = &core->i2c_adap,
  762. .i2c_addr = 0x61,
  763. .callback = cx88_pci_nano_callback,
  764. };
  765. static struct xc2028_ctrl ctl = {
  766. .fname = XC2028_DEFAULT_FIRMWARE,
  767. .max_len = 64,
  768. .scode_table = XC3028_FE_OREN538,
  769. };
  770. fe = dvb_attach(xc2028_attach,
  771. dev->dvb.frontend, &cfg);
  772. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  773. fe->ops.tuner_ops.set_config(fe, &ctl);
  774. }
  775. break;
  776. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  777. dev->dvb.frontend = dvb_attach(zl10353_attach,
  778. &cx88_geniatech_x8000_mt,
  779. &core->i2c_adap);
  780. if (attach_xc3028(0x61, dev) < 0)
  781. goto frontend_detach;
  782. break;
  783. case CX88_BOARD_GENIATECH_X8000_MT:
  784. dev->ts_gen_cntrl = 0x00;
  785. dev->dvb.frontend = dvb_attach(zl10353_attach,
  786. &cx88_geniatech_x8000_mt,
  787. &core->i2c_adap);
  788. if (attach_xc3028(0x61, dev) < 0)
  789. goto frontend_detach;
  790. break;
  791. case CX88_BOARD_KWORLD_ATSC_120:
  792. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  793. &kworld_atsc_120_config,
  794. &core->i2c_adap);
  795. if (attach_xc3028(0x61, dev) < 0)
  796. goto frontend_detach;
  797. break;
  798. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  799. dev->dvb.frontend = dvb_attach(s5h1411_attach,
  800. &dvico_fusionhdtv7_config,
  801. &core->i2c_adap);
  802. if (dev->dvb.frontend != NULL) {
  803. if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
  804. &core->i2c_adap,
  805. &dvico_fusionhdtv7_tuner_config))
  806. goto frontend_detach;
  807. }
  808. break;
  809. case CX88_BOARD_HAUPPAUGE_HVR4000:
  810. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  811. /* Support for DVB-S only, not DVB-T support */
  812. dev->dvb.frontend = dvb_attach(cx24116_attach,
  813. &hauppauge_hvr4000_config,
  814. &dev->core->i2c_adap);
  815. if (dev->dvb.frontend) {
  816. dvb_attach(isl6421_attach, dev->dvb.frontend,
  817. &dev->core->i2c_adap,
  818. 0x08, 0x00, 0x00);
  819. }
  820. break;
  821. default:
  822. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  823. core->name);
  824. break;
  825. }
  826. if (NULL == dev->dvb.frontend) {
  827. printk(KERN_ERR
  828. "%s/2: frontend initialization failed\n",
  829. core->name);
  830. return -EINVAL;
  831. }
  832. /* Ensure all frontends negotiate bus access */
  833. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  834. /* Put the analog decoder in standby to keep it quiet */
  835. cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
  836. /* register everything */
  837. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev,
  838. &dev->pci->dev, adapter_nr);
  839. frontend_detach:
  840. if (dev->dvb.frontend) {
  841. dvb_frontend_detach(dev->dvb.frontend);
  842. dev->dvb.frontend = NULL;
  843. }
  844. return -EINVAL;
  845. }
  846. /* ----------------------------------------------------------- */
  847. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  848. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  849. {
  850. struct cx88_core *core = drv->core;
  851. int err = 0;
  852. dprintk( 1, "%s\n", __func__);
  853. switch (core->boardnr) {
  854. case CX88_BOARD_HAUPPAUGE_HVR1300:
  855. /* We arrive here with either the cx23416 or the cx22702
  856. * on the bus. Take the bus from the cx23416 and enable the
  857. * cx22702 demod
  858. */
  859. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  860. cx_clear(MO_GP0_IO, 0x00000004);
  861. udelay(1000);
  862. break;
  863. default:
  864. err = -ENODEV;
  865. }
  866. return err;
  867. }
  868. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  869. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  870. {
  871. struct cx88_core *core = drv->core;
  872. int err = 0;
  873. dprintk( 1, "%s\n", __func__);
  874. switch (core->boardnr) {
  875. case CX88_BOARD_HAUPPAUGE_HVR1300:
  876. /* Do Nothing, leave the cx22702 on the bus. */
  877. break;
  878. default:
  879. err = -ENODEV;
  880. }
  881. return err;
  882. }
  883. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  884. {
  885. struct cx88_core *core = drv->core;
  886. struct cx8802_dev *dev = drv->core->dvbdev;
  887. int err;
  888. dprintk( 1, "%s\n", __func__);
  889. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  890. core->boardnr,
  891. core->name,
  892. core->pci_bus,
  893. core->pci_slot);
  894. err = -ENODEV;
  895. if (!(core->board.mpeg & CX88_MPEG_DVB))
  896. goto fail_core;
  897. /* If vp3054 isn't enabled, a stub will just return 0 */
  898. err = vp3054_i2c_probe(dev);
  899. if (0 != err)
  900. goto fail_core;
  901. /* dvb stuff */
  902. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  903. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  904. &dev->pci->dev, &dev->slock,
  905. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  906. V4L2_FIELD_TOP,
  907. sizeof(struct cx88_buffer),
  908. dev);
  909. err = dvb_register(dev);
  910. if (err != 0)
  911. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  912. core->name, err);
  913. fail_core:
  914. return err;
  915. }
  916. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  917. {
  918. struct cx8802_dev *dev = drv->core->dvbdev;
  919. /* dvb */
  920. if (dev->dvb.frontend)
  921. videobuf_dvb_unregister(&dev->dvb);
  922. vp3054_i2c_remove(dev);
  923. return 0;
  924. }
  925. static struct cx8802_driver cx8802_dvb_driver = {
  926. .type_id = CX88_MPEG_DVB,
  927. .hw_access = CX8802_DRVCTL_SHARED,
  928. .probe = cx8802_dvb_probe,
  929. .remove = cx8802_dvb_remove,
  930. .advise_acquire = cx8802_dvb_advise_acquire,
  931. .advise_release = cx8802_dvb_advise_release,
  932. };
  933. static int dvb_init(void)
  934. {
  935. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  936. (CX88_VERSION_CODE >> 16) & 0xff,
  937. (CX88_VERSION_CODE >> 8) & 0xff,
  938. CX88_VERSION_CODE & 0xff);
  939. #ifdef SNAPSHOT
  940. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  941. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  942. #endif
  943. return cx8802_register_driver(&cx8802_dvb_driver);
  944. }
  945. static void dvb_fini(void)
  946. {
  947. cx8802_unregister_driver(&cx8802_dvb_driver);
  948. }
  949. module_init(dvb_init);
  950. module_exit(dvb_fini);
  951. /*
  952. * Local variables:
  953. * c-basic-offset: 8
  954. * compile-command: "make DVB=1"
  955. * End:
  956. */