cx22702.c 14 KB

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  1. /*
  2. Conexant 22702 DVB OFDM demodulator driver
  3. based on:
  4. Alps TDMB7 DVB OFDM demodulator driver
  5. Copyright (C) 2001-2002 Convergence Integrated Media GmbH
  6. Holger Waechtler <holger@convergence.de>
  7. Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/string.h>
  24. #include <linux/slab.h>
  25. #include <linux/delay.h>
  26. #include "dvb_frontend.h"
  27. #include "cx22702.h"
  28. struct cx22702_state {
  29. struct i2c_adapter *i2c;
  30. /* configuration settings */
  31. const struct cx22702_config *config;
  32. struct dvb_frontend frontend;
  33. /* previous uncorrected block counter */
  34. u8 prevUCBlocks;
  35. };
  36. static int debug;
  37. module_param(debug, int, 0644);
  38. MODULE_PARM_DESC(debug, "Enable verbose debug messages");
  39. #define dprintk if (debug) printk
  40. /* Register values to initialise the demod */
  41. static u8 init_tab[] = {
  42. 0x00, 0x00, /* Stop aquisition */
  43. 0x0B, 0x06,
  44. 0x09, 0x01,
  45. 0x0D, 0x41,
  46. 0x16, 0x32,
  47. 0x20, 0x0A,
  48. 0x21, 0x17,
  49. 0x24, 0x3e,
  50. 0x26, 0xff,
  51. 0x27, 0x10,
  52. 0x28, 0x00,
  53. 0x29, 0x00,
  54. 0x2a, 0x10,
  55. 0x2b, 0x00,
  56. 0x2c, 0x10,
  57. 0x2d, 0x00,
  58. 0x48, 0xd4,
  59. 0x49, 0x56,
  60. 0x6b, 0x1e,
  61. 0xc8, 0x02,
  62. 0xf9, 0x00,
  63. 0xfa, 0x00,
  64. 0xfb, 0x00,
  65. 0xfc, 0x00,
  66. 0xfd, 0x00,
  67. };
  68. static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data)
  69. {
  70. int ret;
  71. u8 buf[] = { reg, data };
  72. struct i2c_msg msg = {
  73. .addr = state->config->demod_address, .flags = 0,
  74. .buf = buf, .len = 2 };
  75. ret = i2c_transfer(state->i2c, &msg, 1);
  76. if (unlikely(ret != 1)) {
  77. printk(KERN_ERR
  78. "%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  79. __func__, reg, data, ret);
  80. return -1;
  81. }
  82. return 0;
  83. }
  84. static u8 cx22702_readreg(struct cx22702_state *state, u8 reg)
  85. {
  86. int ret;
  87. u8 data;
  88. struct i2c_msg msg[] = {
  89. { .addr = state->config->demod_address, .flags = 0,
  90. .buf = &reg, .len = 1 },
  91. { .addr = state->config->demod_address, .flags = I2C_M_RD,
  92. .buf = &data, .len = 1 } };
  93. ret = i2c_transfer(state->i2c, msg, 2);
  94. if (unlikely(ret != 2)) {
  95. printk(KERN_ERR "%s: error (reg == 0x%02x, ret == %i)\n",
  96. __func__, reg, ret);
  97. return 0;
  98. }
  99. return data;
  100. }
  101. static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
  102. {
  103. u8 val;
  104. switch (inversion) {
  105. case INVERSION_AUTO:
  106. return -EOPNOTSUPP;
  107. case INVERSION_ON:
  108. val = cx22702_readreg(state, 0x0C);
  109. return cx22702_writereg(state, 0x0C, val | 0x01);
  110. case INVERSION_OFF:
  111. val = cx22702_readreg(state, 0x0C);
  112. return cx22702_writereg(state, 0x0C, val & 0xfe);
  113. default:
  114. return -EINVAL;
  115. }
  116. }
  117. /* Retrieve the demod settings */
  118. static int cx22702_get_tps(struct cx22702_state *state,
  119. struct dvb_ofdm_parameters *p)
  120. {
  121. u8 val;
  122. /* Make sure the TPS regs are valid */
  123. if (!(cx22702_readreg(state, 0x0A) & 0x20))
  124. return -EAGAIN;
  125. val = cx22702_readreg(state, 0x01);
  126. switch ((val & 0x18) >> 3) {
  127. case 0:
  128. p->constellation = QPSK;
  129. break;
  130. case 1:
  131. p->constellation = QAM_16;
  132. break;
  133. case 2:
  134. p->constellation = QAM_64;
  135. break;
  136. }
  137. switch (val & 0x07) {
  138. case 0:
  139. p->hierarchy_information = HIERARCHY_NONE;
  140. break;
  141. case 1:
  142. p->hierarchy_information = HIERARCHY_1;
  143. break;
  144. case 2:
  145. p->hierarchy_information = HIERARCHY_2;
  146. break;
  147. case 3:
  148. p->hierarchy_information = HIERARCHY_4;
  149. break;
  150. }
  151. val = cx22702_readreg(state, 0x02);
  152. switch ((val & 0x38) >> 3) {
  153. case 0:
  154. p->code_rate_HP = FEC_1_2;
  155. break;
  156. case 1:
  157. p->code_rate_HP = FEC_2_3;
  158. break;
  159. case 2:
  160. p->code_rate_HP = FEC_3_4;
  161. break;
  162. case 3:
  163. p->code_rate_HP = FEC_5_6;
  164. break;
  165. case 4:
  166. p->code_rate_HP = FEC_7_8;
  167. break;
  168. }
  169. switch (val & 0x07) {
  170. case 0:
  171. p->code_rate_LP = FEC_1_2;
  172. break;
  173. case 1:
  174. p->code_rate_LP = FEC_2_3;
  175. break;
  176. case 2:
  177. p->code_rate_LP = FEC_3_4;
  178. break;
  179. case 3:
  180. p->code_rate_LP = FEC_5_6;
  181. break;
  182. case 4:
  183. p->code_rate_LP = FEC_7_8;
  184. break;
  185. }
  186. val = cx22702_readreg(state, 0x03);
  187. switch ((val & 0x0c) >> 2) {
  188. case 0:
  189. p->guard_interval = GUARD_INTERVAL_1_32;
  190. break;
  191. case 1:
  192. p->guard_interval = GUARD_INTERVAL_1_16;
  193. break;
  194. case 2:
  195. p->guard_interval = GUARD_INTERVAL_1_8;
  196. break;
  197. case 3:
  198. p->guard_interval = GUARD_INTERVAL_1_4;
  199. break;
  200. }
  201. switch (val & 0x03) {
  202. case 0:
  203. p->transmission_mode = TRANSMISSION_MODE_2K;
  204. break;
  205. case 1:
  206. p->transmission_mode = TRANSMISSION_MODE_8K;
  207. break;
  208. }
  209. return 0;
  210. }
  211. static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  212. {
  213. struct cx22702_state *state = fe->demodulator_priv;
  214. dprintk("%s(%d)\n", __func__, enable);
  215. if (enable)
  216. return cx22702_writereg(state, 0x0D,
  217. cx22702_readreg(state, 0x0D) & 0xfe);
  218. else
  219. return cx22702_writereg(state, 0x0D,
  220. cx22702_readreg(state, 0x0D) | 1);
  221. }
  222. /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
  223. static int cx22702_set_tps(struct dvb_frontend *fe,
  224. struct dvb_frontend_parameters *p)
  225. {
  226. u8 val;
  227. struct cx22702_state *state = fe->demodulator_priv;
  228. if (fe->ops.tuner_ops.set_params) {
  229. fe->ops.tuner_ops.set_params(fe, p);
  230. if (fe->ops.i2c_gate_ctrl)
  231. fe->ops.i2c_gate_ctrl(fe, 0);
  232. }
  233. /* set inversion */
  234. cx22702_set_inversion(state, p->inversion);
  235. /* set bandwidth */
  236. switch (p->u.ofdm.bandwidth) {
  237. case BANDWIDTH_6_MHZ:
  238. cx22702_writereg(state, 0x0C,
  239. (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20);
  240. break;
  241. case BANDWIDTH_7_MHZ:
  242. cx22702_writereg(state, 0x0C,
  243. (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10);
  244. break;
  245. case BANDWIDTH_8_MHZ:
  246. cx22702_writereg(state, 0x0C,
  247. cx22702_readreg(state, 0x0C) & 0xcf);
  248. break;
  249. default:
  250. dprintk("%s: invalid bandwidth\n", __func__);
  251. return -EINVAL;
  252. }
  253. p->u.ofdm.code_rate_LP = FEC_AUTO; /* temp hack as manual not working */
  254. /* use auto configuration? */
  255. if ((p->u.ofdm.hierarchy_information == HIERARCHY_AUTO) ||
  256. (p->u.ofdm.constellation == QAM_AUTO) ||
  257. (p->u.ofdm.code_rate_HP == FEC_AUTO) ||
  258. (p->u.ofdm.code_rate_LP == FEC_AUTO) ||
  259. (p->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO) ||
  260. (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO)) {
  261. /* TPS Source - use hardware driven values */
  262. cx22702_writereg(state, 0x06, 0x10);
  263. cx22702_writereg(state, 0x07, 0x9);
  264. cx22702_writereg(state, 0x08, 0xC1);
  265. cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B)
  266. & 0xfc);
  267. cx22702_writereg(state, 0x0C,
  268. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  269. cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
  270. dprintk("%s: Autodetecting\n", __func__);
  271. return 0;
  272. }
  273. /* manually programmed values */
  274. val = 0;
  275. switch (p->u.ofdm.constellation) {
  276. case QPSK:
  277. val = (val & 0xe7);
  278. break;
  279. case QAM_16:
  280. val = (val & 0xe7) | 0x08;
  281. break;
  282. case QAM_64:
  283. val = (val & 0xe7) | 0x10;
  284. break;
  285. default:
  286. dprintk("%s: invalid constellation\n", __func__);
  287. return -EINVAL;
  288. }
  289. switch (p->u.ofdm.hierarchy_information) {
  290. case HIERARCHY_NONE:
  291. val = (val & 0xf8);
  292. break;
  293. case HIERARCHY_1:
  294. val = (val & 0xf8) | 1;
  295. break;
  296. case HIERARCHY_2:
  297. val = (val & 0xf8) | 2;
  298. break;
  299. case HIERARCHY_4:
  300. val = (val & 0xf8) | 3;
  301. break;
  302. default:
  303. dprintk("%s: invalid hierarchy\n", __func__);
  304. return -EINVAL;
  305. }
  306. cx22702_writereg(state, 0x06, val);
  307. val = 0;
  308. switch (p->u.ofdm.code_rate_HP) {
  309. case FEC_NONE:
  310. case FEC_1_2:
  311. val = (val & 0xc7);
  312. break;
  313. case FEC_2_3:
  314. val = (val & 0xc7) | 0x08;
  315. break;
  316. case FEC_3_4:
  317. val = (val & 0xc7) | 0x10;
  318. break;
  319. case FEC_5_6:
  320. val = (val & 0xc7) | 0x18;
  321. break;
  322. case FEC_7_8:
  323. val = (val & 0xc7) | 0x20;
  324. break;
  325. default:
  326. dprintk("%s: invalid code_rate_HP\n", __func__);
  327. return -EINVAL;
  328. }
  329. switch (p->u.ofdm.code_rate_LP) {
  330. case FEC_NONE:
  331. case FEC_1_2:
  332. val = (val & 0xf8);
  333. break;
  334. case FEC_2_3:
  335. val = (val & 0xf8) | 1;
  336. break;
  337. case FEC_3_4:
  338. val = (val & 0xf8) | 2;
  339. break;
  340. case FEC_5_6:
  341. val = (val & 0xf8) | 3;
  342. break;
  343. case FEC_7_8:
  344. val = (val & 0xf8) | 4;
  345. break;
  346. default:
  347. dprintk("%s: invalid code_rate_LP\n", __func__);
  348. return -EINVAL;
  349. }
  350. cx22702_writereg(state, 0x07, val);
  351. val = 0;
  352. switch (p->u.ofdm.guard_interval) {
  353. case GUARD_INTERVAL_1_32:
  354. val = (val & 0xf3);
  355. break;
  356. case GUARD_INTERVAL_1_16:
  357. val = (val & 0xf3) | 0x04;
  358. break;
  359. case GUARD_INTERVAL_1_8:
  360. val = (val & 0xf3) | 0x08;
  361. break;
  362. case GUARD_INTERVAL_1_4:
  363. val = (val & 0xf3) | 0x0c;
  364. break;
  365. default:
  366. dprintk("%s: invalid guard_interval\n", __func__);
  367. return -EINVAL;
  368. }
  369. switch (p->u.ofdm.transmission_mode) {
  370. case TRANSMISSION_MODE_2K:
  371. val = (val & 0xfc);
  372. break;
  373. case TRANSMISSION_MODE_8K:
  374. val = (val & 0xfc) | 1;
  375. break;
  376. default:
  377. dprintk("%s: invalid transmission_mode\n", __func__);
  378. return -EINVAL;
  379. }
  380. cx22702_writereg(state, 0x08, val);
  381. cx22702_writereg(state, 0x0B,
  382. (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02);
  383. cx22702_writereg(state, 0x0C,
  384. (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
  385. /* Begin channel aquisition */
  386. cx22702_writereg(state, 0x00, 0x01);
  387. return 0;
  388. }
  389. /* Reset the demod hardware and reset all of the configuration registers
  390. to a default state. */
  391. static int cx22702_init(struct dvb_frontend *fe)
  392. {
  393. int i;
  394. struct cx22702_state *state = fe->demodulator_priv;
  395. cx22702_writereg(state, 0x00, 0x02);
  396. msleep(10);
  397. for (i = 0; i < ARRAY_SIZE(init_tab); i += 2)
  398. cx22702_writereg(state, init_tab[i], init_tab[i + 1]);
  399. cx22702_writereg(state, 0xf8, (state->config->output_mode << 1)
  400. & 0x02);
  401. cx22702_i2c_gate_ctrl(fe, 0);
  402. return 0;
  403. }
  404. static int cx22702_read_status(struct dvb_frontend *fe, fe_status_t *status)
  405. {
  406. struct cx22702_state *state = fe->demodulator_priv;
  407. u8 reg0A;
  408. u8 reg23;
  409. *status = 0;
  410. reg0A = cx22702_readreg(state, 0x0A);
  411. reg23 = cx22702_readreg(state, 0x23);
  412. dprintk("%s: status demod=0x%02x agc=0x%02x\n"
  413. , __func__, reg0A, reg23);
  414. if (reg0A & 0x10) {
  415. *status |= FE_HAS_LOCK;
  416. *status |= FE_HAS_VITERBI;
  417. *status |= FE_HAS_SYNC;
  418. }
  419. if (reg0A & 0x20)
  420. *status |= FE_HAS_CARRIER;
  421. if (reg23 < 0xf0)
  422. *status |= FE_HAS_SIGNAL;
  423. return 0;
  424. }
  425. static int cx22702_read_ber(struct dvb_frontend *fe, u32 *ber)
  426. {
  427. struct cx22702_state *state = fe->demodulator_priv;
  428. if (cx22702_readreg(state, 0xE4) & 0x02) {
  429. /* Realtime statistics */
  430. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  431. | (cx22702_readreg(state, 0xDF) & 0x7F);
  432. } else {
  433. /* Averagtine statistics */
  434. *ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  435. | cx22702_readreg(state, 0xDF);
  436. }
  437. return 0;
  438. }
  439. static int cx22702_read_signal_strength(struct dvb_frontend *fe,
  440. u16 *signal_strength)
  441. {
  442. struct cx22702_state *state = fe->demodulator_priv;
  443. u16 rs_ber;
  444. rs_ber = cx22702_readreg(state, 0x23);
  445. *signal_strength = (rs_ber << 8) | rs_ber;
  446. return 0;
  447. }
  448. static int cx22702_read_snr(struct dvb_frontend *fe, u16 *snr)
  449. {
  450. struct cx22702_state *state = fe->demodulator_priv;
  451. u16 rs_ber;
  452. if (cx22702_readreg(state, 0xE4) & 0x02) {
  453. /* Realtime statistics */
  454. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
  455. | (cx22702_readreg(state, 0xDF) & 0x7F);
  456. } else {
  457. /* Averagine statistics */
  458. rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 8
  459. | cx22702_readreg(state, 0xDF);
  460. }
  461. *snr = ~rs_ber;
  462. return 0;
  463. }
  464. static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  465. {
  466. struct cx22702_state *state = fe->demodulator_priv;
  467. u8 _ucblocks;
  468. /* RS Uncorrectable Packet Count then reset */
  469. _ucblocks = cx22702_readreg(state, 0xE3);
  470. if (state->prevUCBlocks < _ucblocks)
  471. *ucblocks = (_ucblocks - state->prevUCBlocks);
  472. else
  473. *ucblocks = state->prevUCBlocks - _ucblocks;
  474. state->prevUCBlocks = _ucblocks;
  475. return 0;
  476. }
  477. static int cx22702_get_frontend(struct dvb_frontend *fe,
  478. struct dvb_frontend_parameters *p)
  479. {
  480. struct cx22702_state *state = fe->demodulator_priv;
  481. u8 reg0C = cx22702_readreg(state, 0x0C);
  482. p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
  483. return cx22702_get_tps(state, &p->u.ofdm);
  484. }
  485. static int cx22702_get_tune_settings(struct dvb_frontend *fe,
  486. struct dvb_frontend_tune_settings *tune)
  487. {
  488. tune->min_delay_ms = 1000;
  489. return 0;
  490. }
  491. static void cx22702_release(struct dvb_frontend *fe)
  492. {
  493. struct cx22702_state *state = fe->demodulator_priv;
  494. kfree(state);
  495. }
  496. static struct dvb_frontend_ops cx22702_ops;
  497. struct dvb_frontend *cx22702_attach(const struct cx22702_config *config,
  498. struct i2c_adapter *i2c)
  499. {
  500. struct cx22702_state *state = NULL;
  501. /* allocate memory for the internal state */
  502. state = kzalloc(sizeof(struct cx22702_state), GFP_KERNEL);
  503. if (state == NULL)
  504. goto error;
  505. /* setup the state */
  506. state->config = config;
  507. state->i2c = i2c;
  508. /* check if the demod is there */
  509. if (cx22702_readreg(state, 0x1f) != 0x3)
  510. goto error;
  511. /* create dvb_frontend */
  512. memcpy(&state->frontend.ops, &cx22702_ops,
  513. sizeof(struct dvb_frontend_ops));
  514. state->frontend.demodulator_priv = state;
  515. return &state->frontend;
  516. error:
  517. kfree(state);
  518. return NULL;
  519. }
  520. EXPORT_SYMBOL(cx22702_attach);
  521. static struct dvb_frontend_ops cx22702_ops = {
  522. .info = {
  523. .name = "Conexant CX22702 DVB-T",
  524. .type = FE_OFDM,
  525. .frequency_min = 177000000,
  526. .frequency_max = 858000000,
  527. .frequency_stepsize = 166666,
  528. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  529. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  530. FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
  531. FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
  532. FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
  533. },
  534. .release = cx22702_release,
  535. .init = cx22702_init,
  536. .i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
  537. .set_frontend = cx22702_set_tps,
  538. .get_frontend = cx22702_get_frontend,
  539. .get_tune_settings = cx22702_get_tune_settings,
  540. .read_status = cx22702_read_status,
  541. .read_ber = cx22702_read_ber,
  542. .read_signal_strength = cx22702_read_signal_strength,
  543. .read_snr = cx22702_read_snr,
  544. .read_ucblocks = cx22702_read_ucblocks,
  545. };
  546. MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
  547. MODULE_AUTHOR("Steven Toth");
  548. MODULE_LICENSE("GPL");