sam9g20_wm8731.c 8.8 KB

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  1. /*
  2. * sam9g20_wm8731 -- SoC audio for AT91SAM9G20-based
  3. * ATMEL AT91SAM9G20ek board.
  4. *
  5. * Copyright (C) 2005 SAN People
  6. * Copyright (C) 2008 Atmel
  7. *
  8. * Authors: Sedji Gaouaou <sedji.gaouaou@atmel.com>
  9. *
  10. * Based on ati_b1_wm8731.c by:
  11. * Frank Mandarino <fmandarino@endrelia.com>
  12. * Copyright 2006 Endrelia Technologies Inc.
  13. * Based on corgi.c by:
  14. * Copyright 2005 Wolfson Microelectronics PLC.
  15. * Copyright 2005 Openedhand Ltd.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. */
  31. #include <linux/module.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/version.h>
  34. #include <linux/kernel.h>
  35. #include <linux/clk.h>
  36. #include <linux/timer.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/atmel-ssc.h>
  40. #include <sound/core.h>
  41. #include <sound/pcm.h>
  42. #include <sound/pcm_params.h>
  43. #include <sound/soc.h>
  44. #include <sound/soc-dapm.h>
  45. #include <mach/hardware.h>
  46. #include <mach/gpio.h>
  47. #include "../codecs/wm8731.h"
  48. #include "atmel-pcm.h"
  49. #include "atmel_ssc_dai.h"
  50. static int at91sam9g20ek_startup(struct snd_pcm_substream *substream)
  51. {
  52. struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
  53. struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
  54. int ret;
  55. /* codec system clock is supplied by PCK0, set to 12MHz */
  56. ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK,
  57. 12000000, SND_SOC_CLOCK_IN);
  58. if (ret < 0)
  59. return ret;
  60. return 0;
  61. }
  62. static void at91sam9g20ek_shutdown(struct snd_pcm_substream *substream)
  63. {
  64. struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
  65. dev_dbg(rtd->socdev->dev, "shutdown");
  66. }
  67. static int at91sam9g20ek_hw_params(struct snd_pcm_substream *substream,
  68. struct snd_pcm_hw_params *params)
  69. {
  70. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  71. struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
  72. struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
  73. struct atmel_ssc_info *ssc_p = cpu_dai->private_data;
  74. struct ssc_device *ssc = ssc_p->ssc;
  75. int ret;
  76. unsigned int rate;
  77. int cmr_div, period;
  78. if (ssc == NULL) {
  79. printk(KERN_INFO "at91sam9g20ek_hw_params: ssc is NULL!\n");
  80. return -EINVAL;
  81. }
  82. /* set codec DAI configuration */
  83. ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
  84. SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
  85. if (ret < 0)
  86. return ret;
  87. /* set cpu DAI configuration */
  88. ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
  89. SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
  90. if (ret < 0)
  91. return ret;
  92. /*
  93. * The SSC clock dividers depend on the sample rate. The CMR.DIV
  94. * field divides the system master clock MCK to drive the SSC TK
  95. * signal which provides the codec BCLK. The TCMR.PERIOD and
  96. * RCMR.PERIOD fields further divide the BCLK signal to drive
  97. * the SSC TF and RF signals which provide the codec DACLRC and
  98. * ADCLRC clocks.
  99. *
  100. * The dividers were determined through trial and error, where a
  101. * CMR.DIV value is chosen such that the resulting BCLK value is
  102. * divisible, or almost divisible, by (2 * sample rate), and then
  103. * the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1.
  104. */
  105. rate = params_rate(params);
  106. switch (rate) {
  107. case 8000:
  108. cmr_div = 55; /* BCLK = 133MHz/(2*55) = 1.209MHz */
  109. period = 74; /* LRC = BCLK/(2*(74+1)) ~= 8060,6Hz */
  110. break;
  111. case 11025:
  112. cmr_div = 67; /* BCLK = 133MHz/(2*60) = 1.108MHz */
  113. period = 45; /* LRC = BCLK/(2*(49+1)) = 11083,3Hz */
  114. break;
  115. case 16000:
  116. cmr_div = 63; /* BCLK = 133MHz/(2*63) = 1.055MHz */
  117. period = 32; /* LRC = BCLK/(2*(32+1)) = 15993,2Hz */
  118. break;
  119. case 22050:
  120. cmr_div = 52; /* BCLK = 133MHz/(2*52) = 1.278MHz */
  121. period = 28; /* LRC = BCLK/(2*(28+1)) = 22049Hz */
  122. break;
  123. case 32000:
  124. cmr_div = 66; /* BCLK = 133MHz/(2*66) = 1.007MHz */
  125. period = 15; /* LRC = BCLK/(2*(15+1)) = 31486,742Hz */
  126. break;
  127. case 44100:
  128. cmr_div = 29; /* BCLK = 133MHz/(2*29) = 2.293MHz */
  129. period = 25; /* LRC = BCLK/(2*(25+1)) = 44098Hz */
  130. break;
  131. case 48000:
  132. cmr_div = 33; /* BCLK = 133MHz/(2*33) = 2.015MHz */
  133. period = 20; /* LRC = BCLK/(2*(20+1)) = 47979,79Hz */
  134. break;
  135. case 88200:
  136. cmr_div = 29; /* BCLK = 133MHz/(2*29) = 2.293MHz */
  137. period = 12; /* LRC = BCLK/(2*(12+1)) = 88196Hz */
  138. break;
  139. case 96000:
  140. cmr_div = 23; /* BCLK = 133MHz/(2*23) = 2.891MHz */
  141. period = 14; /* LRC = BCLK/(2*(14+1)) = 96376Hz */
  142. break;
  143. default:
  144. printk(KERN_WARNING "unsupported rate %d"
  145. " on at91sam9g20ek board\n", rate);
  146. return -EINVAL;
  147. }
  148. /* set the MCK divider for BCLK */
  149. ret = snd_soc_dai_set_clkdiv(cpu_dai, ATMEL_SSC_CMR_DIV, cmr_div);
  150. if (ret < 0)
  151. return ret;
  152. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  153. /* set the BCLK divider for DACLRC */
  154. ret = snd_soc_dai_set_clkdiv(cpu_dai,
  155. ATMEL_SSC_TCMR_PERIOD, period);
  156. } else {
  157. /* set the BCLK divider for ADCLRC */
  158. ret = snd_soc_dai_set_clkdiv(cpu_dai,
  159. ATMEL_SSC_RCMR_PERIOD, period);
  160. }
  161. if (ret < 0)
  162. return ret;
  163. return 0;
  164. }
  165. static struct snd_soc_ops at91sam9g20ek_ops = {
  166. .startup = at91sam9g20ek_startup,
  167. .hw_params = at91sam9g20ek_hw_params,
  168. .shutdown = at91sam9g20ek_shutdown,
  169. };
  170. static const struct snd_soc_dapm_widget at91sam9g20ek_dapm_widgets[] = {
  171. SND_SOC_DAPM_MIC("Int Mic", NULL),
  172. SND_SOC_DAPM_SPK("Ext Spk", NULL),
  173. };
  174. static const struct snd_soc_dapm_route intercon[] = {
  175. /* speaker connected to LHPOUT */
  176. {"Ext Spk", NULL, "LHPOUT"},
  177. /* mic is connected to Mic Jack, with WM8731 Mic Bias */
  178. {"MICIN", NULL, "Mic Bias"},
  179. {"Mic Bias", NULL, "Int Mic"},
  180. };
  181. /*
  182. * Logic for a wm8731 as connected on a at91sam9g20ek board.
  183. */
  184. static int at91sam9g20ek_wm8731_init(struct snd_soc_codec *codec)
  185. {
  186. printk(KERN_DEBUG
  187. "at91sam9g20ek_wm8731 "
  188. ": at91sam9g20ek_wm8731_init() called\n");
  189. /* Add specific widgets */
  190. snd_soc_dapm_new_controls(codec, at91sam9g20ek_dapm_widgets,
  191. ARRAY_SIZE(at91sam9g20ek_dapm_widgets));
  192. /* Set up specific audio path interconnects */
  193. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  194. /* not connected */
  195. snd_soc_dapm_disable_pin(codec, "RLINEIN");
  196. snd_soc_dapm_disable_pin(codec, "LLINEIN");
  197. /* always connected */
  198. snd_soc_dapm_enable_pin(codec, "Int Mic");
  199. snd_soc_dapm_enable_pin(codec, "Ext Spk");
  200. snd_soc_dapm_sync(codec);
  201. return 0;
  202. }
  203. static struct snd_soc_dai_link at91sam9g20ek_dai = {
  204. .name = "WM8731",
  205. .stream_name = "WM8731 PCM",
  206. .cpu_dai = &atmel_ssc_dai[0],
  207. .codec_dai = &wm8731_dai,
  208. .init = at91sam9g20ek_wm8731_init,
  209. .ops = &at91sam9g20ek_ops,
  210. };
  211. static struct snd_soc_machine snd_soc_machine_at91sam9g20ek = {
  212. .name = "WM8731",
  213. .dai_link = &at91sam9g20ek_dai,
  214. .num_links = 1,
  215. };
  216. static struct wm8731_setup_data at91sam9g20ek_wm8731_setup = {
  217. .i2c_bus = 0,
  218. .i2c_address = 0x1b,
  219. };
  220. static struct snd_soc_device at91sam9g20ek_snd_devdata = {
  221. .machine = &snd_soc_machine_at91sam9g20ek,
  222. .platform = &atmel_soc_platform,
  223. .codec_dev = &soc_codec_dev_wm8731,
  224. .codec_data = &at91sam9g20ek_wm8731_setup,
  225. };
  226. static struct platform_device *at91sam9g20ek_snd_device;
  227. static int __init at91sam9g20ek_init(void)
  228. {
  229. struct atmel_ssc_info *ssc_p = at91sam9g20ek_dai.cpu_dai->private_data;
  230. struct ssc_device *ssc = NULL;
  231. int ret;
  232. /*
  233. * Request SSC device
  234. */
  235. ssc = ssc_request(0);
  236. if (IS_ERR(ssc)) {
  237. ret = PTR_ERR(ssc);
  238. ssc = NULL;
  239. goto err_ssc;
  240. }
  241. ssc_p->ssc = ssc;
  242. at91sam9g20ek_snd_device = platform_device_alloc("soc-audio", -1);
  243. if (!at91sam9g20ek_snd_device) {
  244. printk(KERN_DEBUG
  245. "platform device allocation failed\n");
  246. ret = -ENOMEM;
  247. }
  248. platform_set_drvdata(at91sam9g20ek_snd_device,
  249. &at91sam9g20ek_snd_devdata);
  250. at91sam9g20ek_snd_devdata.dev = &at91sam9g20ek_snd_device->dev;
  251. ret = platform_device_add(at91sam9g20ek_snd_device);
  252. if (ret) {
  253. printk(KERN_DEBUG
  254. "platform device allocation failed\n");
  255. platform_device_put(at91sam9g20ek_snd_device);
  256. }
  257. return ret;
  258. err_ssc:
  259. return ret;
  260. }
  261. static void __exit at91sam9g20ek_exit(void)
  262. {
  263. struct atmel_ssc_info *ssc_p = at91sam9g20ek_dai.cpu_dai->private_data;
  264. struct ssc_device *ssc;
  265. if (ssc_p != NULL) {
  266. ssc = ssc_p->ssc;
  267. if (ssc != NULL)
  268. ssc_free(ssc);
  269. ssc_p->ssc = NULL;
  270. }
  271. platform_device_unregister(at91sam9g20ek_snd_device);
  272. at91sam9g20ek_snd_device = NULL;
  273. }
  274. module_init(at91sam9g20ek_init);
  275. module_exit(at91sam9g20ek_exit);
  276. /* Module information */
  277. MODULE_AUTHOR("Sedji Gaouaou <sedji.gaouaou@atmel.com>");
  278. MODULE_DESCRIPTION("ALSA SoC AT91SAM9G20EK_WM8731");
  279. MODULE_LICENSE("GPL");