qla_init.c 142 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. iocb->free(sp);
  54. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  55. }
  56. void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. del_timer_sync(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. }
  66. inline srb_t *
  67. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  68. unsigned long tmo)
  69. {
  70. srb_t *sp;
  71. struct qla_hw_data *ha = vha->hw;
  72. struct srb_ctx *ctx;
  73. struct srb_iocb *iocb;
  74. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  75. if (!sp)
  76. goto done;
  77. ctx = kzalloc(size, GFP_KERNEL);
  78. if (!ctx) {
  79. mempool_free(sp, ha->srb_mempool);
  80. sp = NULL;
  81. goto done;
  82. }
  83. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  84. if (!iocb) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. kfree(ctx);
  88. goto done;
  89. }
  90. memset(sp, 0, sizeof(*sp));
  91. sp->fcport = fcport;
  92. sp->ctx = ctx;
  93. ctx->u.iocb_cmd = iocb;
  94. iocb->free = qla2x00_ctx_sp_free;
  95. init_timer(&iocb->timer);
  96. if (!tmo)
  97. goto done;
  98. iocb->timer.expires = jiffies + tmo * HZ;
  99. iocb->timer.data = (unsigned long)sp;
  100. iocb->timer.function = qla2x00_ctx_sp_timeout;
  101. add_timer(&iocb->timer);
  102. done:
  103. return sp;
  104. }
  105. /* Asynchronous Login/Logout Routines -------------------------------------- */
  106. static inline unsigned long
  107. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  108. {
  109. unsigned long tmo;
  110. struct qla_hw_data *ha = vha->hw;
  111. /* Firmware should use switch negotiated r_a_tov for timeout. */
  112. tmo = ha->r_a_tov / 10 * 2;
  113. if (!IS_FWI2_CAPABLE(ha)) {
  114. /*
  115. * Except for earlier ISPs where the timeout is seeded from the
  116. * initialization control block.
  117. */
  118. tmo = ha->login_timeout;
  119. }
  120. return tmo;
  121. }
  122. static void
  123. qla2x00_async_iocb_timeout(srb_t *sp)
  124. {
  125. fc_port_t *fcport = sp->fcport;
  126. struct srb_ctx *ctx = sp->ctx;
  127. DEBUG2(printk(KERN_WARNING
  128. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  129. fcport->vha->host_no, sp->handle,
  130. ctx->name, fcport->d_id.b.domain,
  131. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  132. fcport->flags &= ~FCF_ASYNC_SENT;
  133. if (ctx->type == SRB_LOGIN_CMD) {
  134. struct srb_iocb *lio = ctx->u.iocb_cmd;
  135. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  136. /* Retry as needed. */
  137. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  138. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  139. QLA_LOGIO_LOGIN_RETRIED : 0;
  140. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  141. lio->u.logio.data);
  142. }
  143. }
  144. static void
  145. qla2x00_async_login_ctx_done(srb_t *sp)
  146. {
  147. struct srb_ctx *ctx = sp->ctx;
  148. struct srb_iocb *lio = ctx->u.iocb_cmd;
  149. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  150. lio->u.logio.data);
  151. lio->free(sp);
  152. }
  153. int
  154. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  155. uint16_t *data)
  156. {
  157. srb_t *sp;
  158. struct srb_ctx *ctx;
  159. struct srb_iocb *lio;
  160. int rval;
  161. rval = QLA_FUNCTION_FAILED;
  162. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  163. qla2x00_get_async_timeout(vha) + 2);
  164. if (!sp)
  165. goto done;
  166. ctx = sp->ctx;
  167. ctx->type = SRB_LOGIN_CMD;
  168. ctx->name = "login";
  169. lio = ctx->u.iocb_cmd;
  170. lio->timeout = qla2x00_async_iocb_timeout;
  171. lio->done = qla2x00_async_login_ctx_done;
  172. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  173. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  174. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  175. rval = qla2x00_start_sp(sp);
  176. if (rval != QLA_SUCCESS)
  177. goto done_free_sp;
  178. DEBUG2(printk(KERN_DEBUG
  179. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  180. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  181. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  182. fcport->login_retry));
  183. return rval;
  184. done_free_sp:
  185. lio->free(sp);
  186. done:
  187. return rval;
  188. }
  189. static void
  190. qla2x00_async_logout_ctx_done(srb_t *sp)
  191. {
  192. struct srb_ctx *ctx = sp->ctx;
  193. struct srb_iocb *lio = ctx->u.iocb_cmd;
  194. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  195. lio->u.logio.data);
  196. lio->free(sp);
  197. }
  198. int
  199. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  200. {
  201. srb_t *sp;
  202. struct srb_ctx *ctx;
  203. struct srb_iocb *lio;
  204. int rval;
  205. rval = QLA_FUNCTION_FAILED;
  206. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  207. qla2x00_get_async_timeout(vha) + 2);
  208. if (!sp)
  209. goto done;
  210. ctx = sp->ctx;
  211. ctx->type = SRB_LOGOUT_CMD;
  212. ctx->name = "logout";
  213. lio = ctx->u.iocb_cmd;
  214. lio->timeout = qla2x00_async_iocb_timeout;
  215. lio->done = qla2x00_async_logout_ctx_done;
  216. rval = qla2x00_start_sp(sp);
  217. if (rval != QLA_SUCCESS)
  218. goto done_free_sp;
  219. DEBUG2(printk(KERN_DEBUG
  220. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  221. fcport->vha->host_no, sp->handle, fcport->loop_id,
  222. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  223. return rval;
  224. done_free_sp:
  225. lio->free(sp);
  226. done:
  227. return rval;
  228. }
  229. static void
  230. qla2x00_async_adisc_ctx_done(srb_t *sp)
  231. {
  232. struct srb_ctx *ctx = sp->ctx;
  233. struct srb_iocb *lio = ctx->u.iocb_cmd;
  234. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  235. lio->u.logio.data);
  236. lio->free(sp);
  237. }
  238. int
  239. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  240. uint16_t *data)
  241. {
  242. srb_t *sp;
  243. struct srb_ctx *ctx;
  244. struct srb_iocb *lio;
  245. int rval;
  246. rval = QLA_FUNCTION_FAILED;
  247. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  248. qla2x00_get_async_timeout(vha) + 2);
  249. if (!sp)
  250. goto done;
  251. ctx = sp->ctx;
  252. ctx->type = SRB_ADISC_CMD;
  253. ctx->name = "adisc";
  254. lio = ctx->u.iocb_cmd;
  255. lio->timeout = qla2x00_async_iocb_timeout;
  256. lio->done = qla2x00_async_adisc_ctx_done;
  257. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  258. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  259. rval = qla2x00_start_sp(sp);
  260. if (rval != QLA_SUCCESS)
  261. goto done_free_sp;
  262. DEBUG2(printk(KERN_DEBUG
  263. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  264. fcport->vha->host_no, sp->handle, fcport->loop_id,
  265. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  266. return rval;
  267. done_free_sp:
  268. lio->free(sp);
  269. done:
  270. return rval;
  271. }
  272. static void
  273. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  274. {
  275. struct srb_ctx *ctx = sp->ctx;
  276. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  277. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  278. iocb->free(sp);
  279. }
  280. int
  281. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  282. uint32_t tag)
  283. {
  284. struct scsi_qla_host *vha = fcport->vha;
  285. srb_t *sp;
  286. struct srb_ctx *ctx;
  287. struct srb_iocb *tcf;
  288. int rval;
  289. rval = QLA_FUNCTION_FAILED;
  290. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  291. qla2x00_get_async_timeout(vha) + 2);
  292. if (!sp)
  293. goto done;
  294. ctx = sp->ctx;
  295. ctx->type = SRB_TM_CMD;
  296. ctx->name = "tmf";
  297. tcf = ctx->u.iocb_cmd;
  298. tcf->u.tmf.flags = flags;
  299. tcf->u.tmf.lun = lun;
  300. tcf->u.tmf.data = tag;
  301. tcf->timeout = qla2x00_async_iocb_timeout;
  302. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  303. rval = qla2x00_start_sp(sp);
  304. if (rval != QLA_SUCCESS)
  305. goto done_free_sp;
  306. DEBUG2(printk(KERN_DEBUG
  307. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  308. fcport->vha->host_no, sp->handle, fcport->loop_id,
  309. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  310. return rval;
  311. done_free_sp:
  312. tcf->free(sp);
  313. done:
  314. return rval;
  315. }
  316. static void
  317. qla2x00_async_marker_ctx_done(srb_t *sp)
  318. {
  319. struct srb_ctx *ctx = sp->ctx;
  320. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  321. qla2x00_async_marker_done(sp->fcport->vha, sp->fcport, iocb);
  322. iocb->free(sp);
  323. }
  324. int
  325. qla2x00_async_marker(fc_port_t *fcport, uint16_t lun, uint8_t modif)
  326. {
  327. struct scsi_qla_host *vha = fcport->vha;
  328. srb_t *sp;
  329. struct srb_ctx *ctx;
  330. struct srb_iocb *mrk;
  331. int rval;
  332. rval = QLA_FUNCTION_FAILED;
  333. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 0);
  334. if (!sp)
  335. goto done;
  336. ctx = sp->ctx;
  337. ctx->type = SRB_MARKER_CMD;
  338. ctx->name = "marker";
  339. mrk = ctx->u.iocb_cmd;
  340. mrk->u.marker.lun = lun;
  341. mrk->u.marker.modif = modif;
  342. mrk->timeout = qla2x00_async_iocb_timeout;
  343. mrk->done = qla2x00_async_marker_ctx_done;
  344. rval = qla2x00_start_sp(sp);
  345. if (rval != QLA_SUCCESS)
  346. goto done_free_sp;
  347. DEBUG2(printk(KERN_DEBUG
  348. "scsi(%ld:%x): Async-marker - loop-id=%x "
  349. "portid=%02x%02x%02x.\n",
  350. fcport->vha->host_no, sp->handle, fcport->loop_id,
  351. fcport->d_id.b.domain, fcport->d_id.b.area,
  352. fcport->d_id.b.al_pa));
  353. return rval;
  354. done_free_sp:
  355. mrk->free(sp);
  356. done:
  357. return rval;
  358. }
  359. void
  360. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  361. uint16_t *data)
  362. {
  363. int rval;
  364. switch (data[0]) {
  365. case MBS_COMMAND_COMPLETE:
  366. if (fcport->flags & FCF_FCP2_DEVICE) {
  367. fcport->flags |= FCF_ASYNC_SENT;
  368. qla2x00_post_async_adisc_work(vha, fcport, data);
  369. break;
  370. }
  371. qla2x00_update_fcport(vha, fcport);
  372. break;
  373. case MBS_COMMAND_ERROR:
  374. fcport->flags &= ~FCF_ASYNC_SENT;
  375. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  376. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  377. else
  378. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  379. break;
  380. case MBS_PORT_ID_USED:
  381. fcport->loop_id = data[1];
  382. qla2x00_post_async_logout_work(vha, fcport, NULL);
  383. qla2x00_post_async_login_work(vha, fcport, NULL);
  384. break;
  385. case MBS_LOOP_ID_USED:
  386. fcport->loop_id++;
  387. rval = qla2x00_find_new_loop_id(vha, fcport);
  388. if (rval != QLA_SUCCESS) {
  389. fcport->flags &= ~FCF_ASYNC_SENT;
  390. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  391. break;
  392. }
  393. qla2x00_post_async_login_work(vha, fcport, NULL);
  394. break;
  395. }
  396. return;
  397. }
  398. void
  399. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  400. uint16_t *data)
  401. {
  402. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  403. return;
  404. }
  405. void
  406. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  407. uint16_t *data)
  408. {
  409. if (data[0] == MBS_COMMAND_COMPLETE) {
  410. qla2x00_update_fcport(vha, fcport);
  411. return;
  412. }
  413. /* Retry login. */
  414. fcport->flags &= ~FCF_ASYNC_SENT;
  415. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  416. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  417. else
  418. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  419. return;
  420. }
  421. void
  422. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  423. struct srb_iocb *iocb)
  424. {
  425. int rval;
  426. uint32_t flags;
  427. uint16_t lun;
  428. flags = iocb->u.tmf.flags;
  429. lun = (uint16_t)iocb->u.tmf.lun;
  430. /* Issue Marker IOCB */
  431. rval = qla2x00_async_marker(fcport, lun,
  432. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  433. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  434. DEBUG2_3_11(printk(KERN_WARNING
  435. "%s(%ld): TM IOCB failed (%x).\n",
  436. __func__, vha->host_no, rval));
  437. }
  438. return;
  439. }
  440. void
  441. qla2x00_async_marker_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  442. struct srb_iocb *iocb)
  443. {
  444. /*
  445. * Currently we dont have any specific post response processing
  446. * for this IOCB. We'll just return success or failed
  447. * depending on whether the IOCB command succeeded or failed.
  448. */
  449. if (iocb->u.tmf.data) {
  450. DEBUG2_3_11(printk(KERN_WARNING
  451. "%s(%ld): Marker IOCB failed (%x).\n",
  452. __func__, vha->host_no, iocb->u.tmf.data));
  453. }
  454. return;
  455. }
  456. /****************************************************************************/
  457. /* QLogic ISP2x00 Hardware Support Functions. */
  458. /****************************************************************************/
  459. /*
  460. * qla2x00_initialize_adapter
  461. * Initialize board.
  462. *
  463. * Input:
  464. * ha = adapter block pointer.
  465. *
  466. * Returns:
  467. * 0 = success
  468. */
  469. int
  470. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  471. {
  472. int rval;
  473. struct qla_hw_data *ha = vha->hw;
  474. struct req_que *req = ha->req_q_map[0];
  475. /* Clear adapter flags. */
  476. vha->flags.online = 0;
  477. ha->flags.chip_reset_done = 0;
  478. vha->flags.reset_active = 0;
  479. ha->flags.pci_channel_io_perm_failure = 0;
  480. ha->flags.eeh_busy = 0;
  481. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  482. atomic_set(&vha->loop_state, LOOP_DOWN);
  483. vha->device_flags = DFLG_NO_CABLE;
  484. vha->dpc_flags = 0;
  485. vha->flags.management_server_logged_in = 0;
  486. vha->marker_needed = 0;
  487. ha->isp_abort_cnt = 0;
  488. ha->beacon_blink_led = 0;
  489. set_bit(0, ha->req_qid_map);
  490. set_bit(0, ha->rsp_qid_map);
  491. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  492. rval = ha->isp_ops->pci_config(vha);
  493. if (rval) {
  494. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  495. vha->host_no));
  496. return (rval);
  497. }
  498. ha->isp_ops->reset_chip(vha);
  499. rval = qla2xxx_get_flash_info(vha);
  500. if (rval) {
  501. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  502. vha->host_no));
  503. return (rval);
  504. }
  505. ha->isp_ops->get_flash_version(vha, req->ring);
  506. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  507. ha->isp_ops->nvram_config(vha);
  508. if (ha->flags.disable_serdes) {
  509. /* Mask HBA via NVRAM settings? */
  510. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  511. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  512. vha->port_name[0], vha->port_name[1],
  513. vha->port_name[2], vha->port_name[3],
  514. vha->port_name[4], vha->port_name[5],
  515. vha->port_name[6], vha->port_name[7]);
  516. return QLA_FUNCTION_FAILED;
  517. }
  518. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  519. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  520. rval = ha->isp_ops->chip_diag(vha);
  521. if (rval)
  522. return (rval);
  523. rval = qla2x00_setup_chip(vha);
  524. if (rval)
  525. return (rval);
  526. }
  527. if (IS_QLA84XX(ha)) {
  528. ha->cs84xx = qla84xx_get_chip(vha);
  529. if (!ha->cs84xx) {
  530. qla_printk(KERN_ERR, ha,
  531. "Unable to configure ISP84XX.\n");
  532. return QLA_FUNCTION_FAILED;
  533. }
  534. }
  535. rval = qla2x00_init_rings(vha);
  536. ha->flags.chip_reset_done = 1;
  537. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  538. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  539. rval = qla84xx_init_chip(vha);
  540. if (rval != QLA_SUCCESS) {
  541. qla_printk(KERN_ERR, ha,
  542. "Unable to initialize ISP84XX.\n");
  543. qla84xx_put_chip(vha);
  544. }
  545. }
  546. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) {
  547. if (qla24xx_read_fcp_prio_cfg(vha))
  548. qla_printk(KERN_ERR, ha,
  549. "Unable to read FCP priority data.\n");
  550. }
  551. return (rval);
  552. }
  553. /**
  554. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  555. * @ha: HA context
  556. *
  557. * Returns 0 on success.
  558. */
  559. int
  560. qla2100_pci_config(scsi_qla_host_t *vha)
  561. {
  562. uint16_t w;
  563. unsigned long flags;
  564. struct qla_hw_data *ha = vha->hw;
  565. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  566. pci_set_master(ha->pdev);
  567. pci_try_set_mwi(ha->pdev);
  568. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  569. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  570. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  571. pci_disable_rom(ha->pdev);
  572. /* Get PCI bus information. */
  573. spin_lock_irqsave(&ha->hardware_lock, flags);
  574. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  575. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  576. return QLA_SUCCESS;
  577. }
  578. /**
  579. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  580. * @ha: HA context
  581. *
  582. * Returns 0 on success.
  583. */
  584. int
  585. qla2300_pci_config(scsi_qla_host_t *vha)
  586. {
  587. uint16_t w;
  588. unsigned long flags = 0;
  589. uint32_t cnt;
  590. struct qla_hw_data *ha = vha->hw;
  591. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  592. pci_set_master(ha->pdev);
  593. pci_try_set_mwi(ha->pdev);
  594. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  595. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  596. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  597. w &= ~PCI_COMMAND_INTX_DISABLE;
  598. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  599. /*
  600. * If this is a 2300 card and not 2312, reset the
  601. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  602. * the 2310 also reports itself as a 2300 so we need to get the
  603. * fb revision level -- a 6 indicates it really is a 2300 and
  604. * not a 2310.
  605. */
  606. if (IS_QLA2300(ha)) {
  607. spin_lock_irqsave(&ha->hardware_lock, flags);
  608. /* Pause RISC. */
  609. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  610. for (cnt = 0; cnt < 30000; cnt++) {
  611. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  612. break;
  613. udelay(10);
  614. }
  615. /* Select FPM registers. */
  616. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  617. RD_REG_WORD(&reg->ctrl_status);
  618. /* Get the fb rev level */
  619. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  620. if (ha->fb_rev == FPM_2300)
  621. pci_clear_mwi(ha->pdev);
  622. /* Deselect FPM registers. */
  623. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  624. RD_REG_WORD(&reg->ctrl_status);
  625. /* Release RISC module. */
  626. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  627. for (cnt = 0; cnt < 30000; cnt++) {
  628. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  629. break;
  630. udelay(10);
  631. }
  632. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  633. }
  634. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  635. pci_disable_rom(ha->pdev);
  636. /* Get PCI bus information. */
  637. spin_lock_irqsave(&ha->hardware_lock, flags);
  638. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  639. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  640. return QLA_SUCCESS;
  641. }
  642. /**
  643. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  644. * @ha: HA context
  645. *
  646. * Returns 0 on success.
  647. */
  648. int
  649. qla24xx_pci_config(scsi_qla_host_t *vha)
  650. {
  651. uint16_t w;
  652. unsigned long flags = 0;
  653. struct qla_hw_data *ha = vha->hw;
  654. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  655. pci_set_master(ha->pdev);
  656. pci_try_set_mwi(ha->pdev);
  657. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  658. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  659. w &= ~PCI_COMMAND_INTX_DISABLE;
  660. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  661. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  662. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  663. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  664. pcix_set_mmrbc(ha->pdev, 2048);
  665. /* PCIe -- adjust Maximum Read Request Size (2048). */
  666. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  667. pcie_set_readrq(ha->pdev, 2048);
  668. pci_disable_rom(ha->pdev);
  669. ha->chip_revision = ha->pdev->revision;
  670. /* Get PCI bus information. */
  671. spin_lock_irqsave(&ha->hardware_lock, flags);
  672. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  673. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  674. return QLA_SUCCESS;
  675. }
  676. /**
  677. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  678. * @ha: HA context
  679. *
  680. * Returns 0 on success.
  681. */
  682. int
  683. qla25xx_pci_config(scsi_qla_host_t *vha)
  684. {
  685. uint16_t w;
  686. struct qla_hw_data *ha = vha->hw;
  687. pci_set_master(ha->pdev);
  688. pci_try_set_mwi(ha->pdev);
  689. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  690. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  691. w &= ~PCI_COMMAND_INTX_DISABLE;
  692. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  693. /* PCIe -- adjust Maximum Read Request Size (2048). */
  694. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  695. pcie_set_readrq(ha->pdev, 2048);
  696. pci_disable_rom(ha->pdev);
  697. ha->chip_revision = ha->pdev->revision;
  698. return QLA_SUCCESS;
  699. }
  700. /**
  701. * qla2x00_isp_firmware() - Choose firmware image.
  702. * @ha: HA context
  703. *
  704. * Returns 0 on success.
  705. */
  706. static int
  707. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  708. {
  709. int rval;
  710. uint16_t loop_id, topo, sw_cap;
  711. uint8_t domain, area, al_pa;
  712. struct qla_hw_data *ha = vha->hw;
  713. /* Assume loading risc code */
  714. rval = QLA_FUNCTION_FAILED;
  715. if (ha->flags.disable_risc_code_load) {
  716. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  717. vha->host_no));
  718. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  719. /* Verify checksum of loaded RISC code. */
  720. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  721. if (rval == QLA_SUCCESS) {
  722. /* And, verify we are not in ROM code. */
  723. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  724. &area, &domain, &topo, &sw_cap);
  725. }
  726. }
  727. if (rval) {
  728. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  729. vha->host_no));
  730. }
  731. return (rval);
  732. }
  733. /**
  734. * qla2x00_reset_chip() - Reset ISP chip.
  735. * @ha: HA context
  736. *
  737. * Returns 0 on success.
  738. */
  739. void
  740. qla2x00_reset_chip(scsi_qla_host_t *vha)
  741. {
  742. unsigned long flags = 0;
  743. struct qla_hw_data *ha = vha->hw;
  744. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  745. uint32_t cnt;
  746. uint16_t cmd;
  747. if (unlikely(pci_channel_offline(ha->pdev)))
  748. return;
  749. ha->isp_ops->disable_intrs(ha);
  750. spin_lock_irqsave(&ha->hardware_lock, flags);
  751. /* Turn off master enable */
  752. cmd = 0;
  753. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  754. cmd &= ~PCI_COMMAND_MASTER;
  755. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  756. if (!IS_QLA2100(ha)) {
  757. /* Pause RISC. */
  758. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  759. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  760. for (cnt = 0; cnt < 30000; cnt++) {
  761. if ((RD_REG_WORD(&reg->hccr) &
  762. HCCR_RISC_PAUSE) != 0)
  763. break;
  764. udelay(100);
  765. }
  766. } else {
  767. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  768. udelay(10);
  769. }
  770. /* Select FPM registers. */
  771. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  772. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  773. /* FPM Soft Reset. */
  774. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  775. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  776. /* Toggle Fpm Reset. */
  777. if (!IS_QLA2200(ha)) {
  778. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  779. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  780. }
  781. /* Select frame buffer registers. */
  782. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  783. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  784. /* Reset frame buffer FIFOs. */
  785. if (IS_QLA2200(ha)) {
  786. WRT_FB_CMD_REG(ha, reg, 0xa000);
  787. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  788. } else {
  789. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  790. /* Read back fb_cmd until zero or 3 seconds max */
  791. for (cnt = 0; cnt < 3000; cnt++) {
  792. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  793. break;
  794. udelay(100);
  795. }
  796. }
  797. /* Select RISC module registers. */
  798. WRT_REG_WORD(&reg->ctrl_status, 0);
  799. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  800. /* Reset RISC processor. */
  801. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  802. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  803. /* Release RISC processor. */
  804. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  805. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  806. }
  807. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  808. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  809. /* Reset ISP chip. */
  810. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  811. /* Wait for RISC to recover from reset. */
  812. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  813. /*
  814. * It is necessary to for a delay here since the card doesn't
  815. * respond to PCI reads during a reset. On some architectures
  816. * this will result in an MCA.
  817. */
  818. udelay(20);
  819. for (cnt = 30000; cnt; cnt--) {
  820. if ((RD_REG_WORD(&reg->ctrl_status) &
  821. CSR_ISP_SOFT_RESET) == 0)
  822. break;
  823. udelay(100);
  824. }
  825. } else
  826. udelay(10);
  827. /* Reset RISC processor. */
  828. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  829. WRT_REG_WORD(&reg->semaphore, 0);
  830. /* Release RISC processor. */
  831. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  832. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  833. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  834. for (cnt = 0; cnt < 30000; cnt++) {
  835. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  836. break;
  837. udelay(100);
  838. }
  839. } else
  840. udelay(100);
  841. /* Turn on master enable */
  842. cmd |= PCI_COMMAND_MASTER;
  843. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  844. /* Disable RISC pause on FPM parity error. */
  845. if (!IS_QLA2100(ha)) {
  846. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  847. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  848. }
  849. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  850. }
  851. /**
  852. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  853. * @ha: HA context
  854. *
  855. * Returns 0 on success.
  856. */
  857. static inline void
  858. qla24xx_reset_risc(scsi_qla_host_t *vha)
  859. {
  860. unsigned long flags = 0;
  861. struct qla_hw_data *ha = vha->hw;
  862. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  863. uint32_t cnt, d2;
  864. uint16_t wd;
  865. spin_lock_irqsave(&ha->hardware_lock, flags);
  866. /* Reset RISC. */
  867. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  868. for (cnt = 0; cnt < 30000; cnt++) {
  869. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  870. break;
  871. udelay(10);
  872. }
  873. WRT_REG_DWORD(&reg->ctrl_status,
  874. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  875. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  876. udelay(100);
  877. /* Wait for firmware to complete NVRAM accesses. */
  878. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  879. for (cnt = 10000 ; cnt && d2; cnt--) {
  880. udelay(5);
  881. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  882. barrier();
  883. }
  884. /* Wait for soft-reset to complete. */
  885. d2 = RD_REG_DWORD(&reg->ctrl_status);
  886. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  887. udelay(5);
  888. d2 = RD_REG_DWORD(&reg->ctrl_status);
  889. barrier();
  890. }
  891. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  892. RD_REG_DWORD(&reg->hccr);
  893. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  894. RD_REG_DWORD(&reg->hccr);
  895. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  896. RD_REG_DWORD(&reg->hccr);
  897. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  898. for (cnt = 6000000 ; cnt && d2; cnt--) {
  899. udelay(5);
  900. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  901. barrier();
  902. }
  903. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  904. if (IS_NOPOLLING_TYPE(ha))
  905. ha->isp_ops->enable_intrs(ha);
  906. }
  907. /**
  908. * qla24xx_reset_chip() - Reset ISP24xx chip.
  909. * @ha: HA context
  910. *
  911. * Returns 0 on success.
  912. */
  913. void
  914. qla24xx_reset_chip(scsi_qla_host_t *vha)
  915. {
  916. struct qla_hw_data *ha = vha->hw;
  917. if (pci_channel_offline(ha->pdev) &&
  918. ha->flags.pci_channel_io_perm_failure) {
  919. return;
  920. }
  921. ha->isp_ops->disable_intrs(ha);
  922. /* Perform RISC reset. */
  923. qla24xx_reset_risc(vha);
  924. }
  925. /**
  926. * qla2x00_chip_diag() - Test chip for proper operation.
  927. * @ha: HA context
  928. *
  929. * Returns 0 on success.
  930. */
  931. int
  932. qla2x00_chip_diag(scsi_qla_host_t *vha)
  933. {
  934. int rval;
  935. struct qla_hw_data *ha = vha->hw;
  936. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  937. unsigned long flags = 0;
  938. uint16_t data;
  939. uint32_t cnt;
  940. uint16_t mb[5];
  941. struct req_que *req = ha->req_q_map[0];
  942. /* Assume a failed state */
  943. rval = QLA_FUNCTION_FAILED;
  944. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  945. vha->host_no, (u_long)&reg->flash_address));
  946. spin_lock_irqsave(&ha->hardware_lock, flags);
  947. /* Reset ISP chip. */
  948. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  949. /*
  950. * We need to have a delay here since the card will not respond while
  951. * in reset causing an MCA on some architectures.
  952. */
  953. udelay(20);
  954. data = qla2x00_debounce_register(&reg->ctrl_status);
  955. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  956. udelay(5);
  957. data = RD_REG_WORD(&reg->ctrl_status);
  958. barrier();
  959. }
  960. if (!cnt)
  961. goto chip_diag_failed;
  962. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  963. vha->host_no));
  964. /* Reset RISC processor. */
  965. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  966. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  967. /* Workaround for QLA2312 PCI parity error */
  968. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  969. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  970. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  971. udelay(5);
  972. data = RD_MAILBOX_REG(ha, reg, 0);
  973. barrier();
  974. }
  975. } else
  976. udelay(10);
  977. if (!cnt)
  978. goto chip_diag_failed;
  979. /* Check product ID of chip */
  980. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  981. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  982. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  983. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  984. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  985. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  986. mb[3] != PROD_ID_3) {
  987. qla_printk(KERN_WARNING, ha,
  988. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  989. goto chip_diag_failed;
  990. }
  991. ha->product_id[0] = mb[1];
  992. ha->product_id[1] = mb[2];
  993. ha->product_id[2] = mb[3];
  994. ha->product_id[3] = mb[4];
  995. /* Adjust fw RISC transfer size */
  996. if (req->length > 1024)
  997. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  998. else
  999. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  1000. req->length;
  1001. if (IS_QLA2200(ha) &&
  1002. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  1003. /* Limit firmware transfer size with a 2200A */
  1004. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  1005. vha->host_no));
  1006. ha->device_type |= DT_ISP2200A;
  1007. ha->fw_transfer_size = 128;
  1008. }
  1009. /* Wrap Incoming Mailboxes Test. */
  1010. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1011. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  1012. rval = qla2x00_mbx_reg_test(vha);
  1013. if (rval) {
  1014. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1015. vha->host_no));
  1016. qla_printk(KERN_WARNING, ha,
  1017. "Failed mailbox send register test\n");
  1018. }
  1019. else {
  1020. /* Flag a successful rval */
  1021. rval = QLA_SUCCESS;
  1022. }
  1023. spin_lock_irqsave(&ha->hardware_lock, flags);
  1024. chip_diag_failed:
  1025. if (rval)
  1026. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1027. "****\n", vha->host_no));
  1028. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1029. return (rval);
  1030. }
  1031. /**
  1032. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1033. * @ha: HA context
  1034. *
  1035. * Returns 0 on success.
  1036. */
  1037. int
  1038. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1039. {
  1040. int rval;
  1041. struct qla_hw_data *ha = vha->hw;
  1042. struct req_que *req = ha->req_q_map[0];
  1043. if (IS_QLA82XX(ha))
  1044. return QLA_SUCCESS;
  1045. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1046. rval = qla2x00_mbx_reg_test(vha);
  1047. if (rval) {
  1048. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1049. vha->host_no));
  1050. qla_printk(KERN_WARNING, ha,
  1051. "Failed mailbox send register test\n");
  1052. } else {
  1053. /* Flag a successful rval */
  1054. rval = QLA_SUCCESS;
  1055. }
  1056. return rval;
  1057. }
  1058. void
  1059. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1060. {
  1061. int rval;
  1062. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1063. eft_size, fce_size, mq_size;
  1064. dma_addr_t tc_dma;
  1065. void *tc;
  1066. struct qla_hw_data *ha = vha->hw;
  1067. struct req_que *req = ha->req_q_map[0];
  1068. struct rsp_que *rsp = ha->rsp_q_map[0];
  1069. if (ha->fw_dump) {
  1070. qla_printk(KERN_WARNING, ha,
  1071. "Firmware dump previously allocated.\n");
  1072. return;
  1073. }
  1074. ha->fw_dumped = 0;
  1075. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1076. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1077. fixed_size = sizeof(struct qla2100_fw_dump);
  1078. } else if (IS_QLA23XX(ha)) {
  1079. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1080. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1081. sizeof(uint16_t);
  1082. } else if (IS_FWI2_CAPABLE(ha)) {
  1083. if (IS_QLA81XX(ha))
  1084. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1085. else if (IS_QLA25XX(ha))
  1086. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1087. else
  1088. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1089. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1090. sizeof(uint32_t);
  1091. if (ha->mqenable)
  1092. mq_size = sizeof(struct qla2xxx_mq_chain);
  1093. /* Allocate memory for Fibre Channel Event Buffer. */
  1094. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1095. goto try_eft;
  1096. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1097. GFP_KERNEL);
  1098. if (!tc) {
  1099. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1100. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1101. goto try_eft;
  1102. }
  1103. memset(tc, 0, FCE_SIZE);
  1104. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1105. ha->fce_mb, &ha->fce_bufs);
  1106. if (rval) {
  1107. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1108. "FCE (%d).\n", rval);
  1109. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1110. tc_dma);
  1111. ha->flags.fce_enabled = 0;
  1112. goto try_eft;
  1113. }
  1114. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1115. FCE_SIZE / 1024);
  1116. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1117. ha->flags.fce_enabled = 1;
  1118. ha->fce_dma = tc_dma;
  1119. ha->fce = tc;
  1120. try_eft:
  1121. /* Allocate memory for Extended Trace Buffer. */
  1122. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1123. GFP_KERNEL);
  1124. if (!tc) {
  1125. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1126. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1127. goto cont_alloc;
  1128. }
  1129. memset(tc, 0, EFT_SIZE);
  1130. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1131. if (rval) {
  1132. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1133. "EFT (%d).\n", rval);
  1134. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1135. tc_dma);
  1136. goto cont_alloc;
  1137. }
  1138. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1139. EFT_SIZE / 1024);
  1140. eft_size = EFT_SIZE;
  1141. ha->eft_dma = tc_dma;
  1142. ha->eft = tc;
  1143. }
  1144. cont_alloc:
  1145. req_q_size = req->length * sizeof(request_t);
  1146. rsp_q_size = rsp->length * sizeof(response_t);
  1147. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1148. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1149. ha->chain_offset = dump_size;
  1150. dump_size += mq_size + fce_size;
  1151. ha->fw_dump = vmalloc(dump_size);
  1152. if (!ha->fw_dump) {
  1153. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1154. "firmware dump!!!\n", dump_size / 1024);
  1155. if (ha->eft) {
  1156. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1157. ha->eft_dma);
  1158. ha->eft = NULL;
  1159. ha->eft_dma = 0;
  1160. }
  1161. return;
  1162. }
  1163. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1164. dump_size / 1024);
  1165. ha->fw_dump_len = dump_size;
  1166. ha->fw_dump->signature[0] = 'Q';
  1167. ha->fw_dump->signature[1] = 'L';
  1168. ha->fw_dump->signature[2] = 'G';
  1169. ha->fw_dump->signature[3] = 'C';
  1170. ha->fw_dump->version = __constant_htonl(1);
  1171. ha->fw_dump->fixed_size = htonl(fixed_size);
  1172. ha->fw_dump->mem_size = htonl(mem_size);
  1173. ha->fw_dump->req_q_size = htonl(req_q_size);
  1174. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1175. ha->fw_dump->eft_size = htonl(eft_size);
  1176. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1177. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1178. ha->fw_dump->header_size =
  1179. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1180. }
  1181. static int
  1182. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1183. {
  1184. #define MPS_MASK 0xe0
  1185. int rval;
  1186. uint16_t dc;
  1187. uint32_t dw;
  1188. struct qla_hw_data *ha = vha->hw;
  1189. if (!IS_QLA81XX(vha->hw))
  1190. return QLA_SUCCESS;
  1191. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1192. if (rval != QLA_SUCCESS) {
  1193. DEBUG2(qla_printk(KERN_WARNING, ha,
  1194. "Sync-MPI: Unable to acquire semaphore.\n"));
  1195. goto done;
  1196. }
  1197. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1198. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1199. if (rval != QLA_SUCCESS) {
  1200. DEBUG2(qla_printk(KERN_WARNING, ha,
  1201. "Sync-MPI: Unable to read sync.\n"));
  1202. goto done_release;
  1203. }
  1204. dc &= MPS_MASK;
  1205. if (dc == (dw & MPS_MASK))
  1206. goto done_release;
  1207. dw &= ~MPS_MASK;
  1208. dw |= dc;
  1209. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1210. if (rval != QLA_SUCCESS) {
  1211. DEBUG2(qla_printk(KERN_WARNING, ha,
  1212. "Sync-MPI: Unable to gain sync.\n"));
  1213. }
  1214. done_release:
  1215. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1216. if (rval != QLA_SUCCESS) {
  1217. DEBUG2(qla_printk(KERN_WARNING, ha,
  1218. "Sync-MPI: Unable to release semaphore.\n"));
  1219. }
  1220. done:
  1221. return rval;
  1222. }
  1223. /**
  1224. * qla2x00_setup_chip() - Load and start RISC firmware.
  1225. * @ha: HA context
  1226. *
  1227. * Returns 0 on success.
  1228. */
  1229. static int
  1230. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1231. {
  1232. int rval;
  1233. uint32_t srisc_address = 0;
  1234. struct qla_hw_data *ha = vha->hw;
  1235. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1236. unsigned long flags;
  1237. uint16_t fw_major_version;
  1238. if (IS_QLA82XX(ha)) {
  1239. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1240. if (rval == QLA_SUCCESS)
  1241. goto enable_82xx_npiv;
  1242. else
  1243. goto failed;
  1244. }
  1245. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1246. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1247. spin_lock_irqsave(&ha->hardware_lock, flags);
  1248. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1249. RD_REG_WORD(&reg->hccr);
  1250. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1251. }
  1252. qla81xx_mpi_sync(vha);
  1253. /* Load firmware sequences */
  1254. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1255. if (rval == QLA_SUCCESS) {
  1256. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1257. "code.\n", vha->host_no));
  1258. rval = qla2x00_verify_checksum(vha, srisc_address);
  1259. if (rval == QLA_SUCCESS) {
  1260. /* Start firmware execution. */
  1261. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1262. "firmware.\n", vha->host_no));
  1263. rval = qla2x00_execute_fw(vha, srisc_address);
  1264. /* Retrieve firmware information. */
  1265. if (rval == QLA_SUCCESS) {
  1266. enable_82xx_npiv:
  1267. fw_major_version = ha->fw_major_version;
  1268. rval = qla2x00_get_fw_version(vha,
  1269. &ha->fw_major_version,
  1270. &ha->fw_minor_version,
  1271. &ha->fw_subminor_version,
  1272. &ha->fw_attributes, &ha->fw_memory_size,
  1273. ha->mpi_version, &ha->mpi_capabilities,
  1274. ha->phy_version);
  1275. if (rval != QLA_SUCCESS)
  1276. goto failed;
  1277. ha->flags.npiv_supported = 0;
  1278. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1279. (ha->fw_attributes & BIT_2)) {
  1280. ha->flags.npiv_supported = 1;
  1281. if ((!ha->max_npiv_vports) ||
  1282. ((ha->max_npiv_vports + 1) %
  1283. MIN_MULTI_ID_FABRIC))
  1284. ha->max_npiv_vports =
  1285. MIN_MULTI_ID_FABRIC - 1;
  1286. }
  1287. qla2x00_get_resource_cnts(vha, NULL,
  1288. &ha->fw_xcb_count, NULL, NULL,
  1289. &ha->max_npiv_vports, NULL);
  1290. if (!fw_major_version && ql2xallocfwdump) {
  1291. if (!IS_QLA82XX(ha))
  1292. qla2x00_alloc_fw_dump(vha);
  1293. }
  1294. }
  1295. } else {
  1296. DEBUG2(printk(KERN_INFO
  1297. "scsi(%ld): ISP Firmware failed checksum.\n",
  1298. vha->host_no));
  1299. }
  1300. }
  1301. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1302. /* Enable proper parity. */
  1303. spin_lock_irqsave(&ha->hardware_lock, flags);
  1304. if (IS_QLA2300(ha))
  1305. /* SRAM parity */
  1306. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1307. else
  1308. /* SRAM, Instruction RAM and GP RAM parity */
  1309. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1310. RD_REG_WORD(&reg->hccr);
  1311. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1312. }
  1313. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1314. uint32_t size;
  1315. rval = qla81xx_fac_get_sector_size(vha, &size);
  1316. if (rval == QLA_SUCCESS) {
  1317. ha->flags.fac_supported = 1;
  1318. ha->fdt_block_size = size << 2;
  1319. } else {
  1320. qla_printk(KERN_ERR, ha,
  1321. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1322. ha->fw_major_version, ha->fw_minor_version,
  1323. ha->fw_subminor_version);
  1324. }
  1325. }
  1326. failed:
  1327. if (rval) {
  1328. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1329. vha->host_no));
  1330. }
  1331. return (rval);
  1332. }
  1333. /**
  1334. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1335. * @ha: HA context
  1336. *
  1337. * Beginning of request ring has initialization control block already built
  1338. * by nvram config routine.
  1339. *
  1340. * Returns 0 on success.
  1341. */
  1342. void
  1343. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1344. {
  1345. uint16_t cnt;
  1346. response_t *pkt;
  1347. rsp->ring_ptr = rsp->ring;
  1348. rsp->ring_index = 0;
  1349. rsp->status_srb = NULL;
  1350. pkt = rsp->ring_ptr;
  1351. for (cnt = 0; cnt < rsp->length; cnt++) {
  1352. pkt->signature = RESPONSE_PROCESSED;
  1353. pkt++;
  1354. }
  1355. }
  1356. /**
  1357. * qla2x00_update_fw_options() - Read and process firmware options.
  1358. * @ha: HA context
  1359. *
  1360. * Returns 0 on success.
  1361. */
  1362. void
  1363. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1364. {
  1365. uint16_t swing, emphasis, tx_sens, rx_sens;
  1366. struct qla_hw_data *ha = vha->hw;
  1367. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1368. qla2x00_get_fw_options(vha, ha->fw_options);
  1369. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1370. return;
  1371. /* Serial Link options. */
  1372. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1373. vha->host_no));
  1374. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1375. sizeof(ha->fw_seriallink_options)));
  1376. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1377. if (ha->fw_seriallink_options[3] & BIT_2) {
  1378. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1379. /* 1G settings */
  1380. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1381. emphasis = (ha->fw_seriallink_options[2] &
  1382. (BIT_4 | BIT_3)) >> 3;
  1383. tx_sens = ha->fw_seriallink_options[0] &
  1384. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1385. rx_sens = (ha->fw_seriallink_options[0] &
  1386. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1387. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1388. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1389. if (rx_sens == 0x0)
  1390. rx_sens = 0x3;
  1391. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1392. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1393. ha->fw_options[10] |= BIT_5 |
  1394. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1395. (tx_sens & (BIT_1 | BIT_0));
  1396. /* 2G settings */
  1397. swing = (ha->fw_seriallink_options[2] &
  1398. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1399. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1400. tx_sens = ha->fw_seriallink_options[1] &
  1401. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1402. rx_sens = (ha->fw_seriallink_options[1] &
  1403. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1404. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1405. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1406. if (rx_sens == 0x0)
  1407. rx_sens = 0x3;
  1408. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1409. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1410. ha->fw_options[11] |= BIT_5 |
  1411. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1412. (tx_sens & (BIT_1 | BIT_0));
  1413. }
  1414. /* FCP2 options. */
  1415. /* Return command IOCBs without waiting for an ABTS to complete. */
  1416. ha->fw_options[3] |= BIT_13;
  1417. /* LED scheme. */
  1418. if (ha->flags.enable_led_scheme)
  1419. ha->fw_options[2] |= BIT_12;
  1420. /* Detect ISP6312. */
  1421. if (IS_QLA6312(ha))
  1422. ha->fw_options[2] |= BIT_13;
  1423. /* Update firmware options. */
  1424. qla2x00_set_fw_options(vha, ha->fw_options);
  1425. }
  1426. void
  1427. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1428. {
  1429. int rval;
  1430. struct qla_hw_data *ha = vha->hw;
  1431. if (IS_QLA82XX(ha))
  1432. return;
  1433. /* Update Serial Link options. */
  1434. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1435. return;
  1436. rval = qla2x00_set_serdes_params(vha,
  1437. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1438. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1439. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1440. if (rval != QLA_SUCCESS) {
  1441. qla_printk(KERN_WARNING, ha,
  1442. "Unable to update Serial Link options (%x).\n", rval);
  1443. }
  1444. }
  1445. void
  1446. qla2x00_config_rings(struct scsi_qla_host *vha)
  1447. {
  1448. struct qla_hw_data *ha = vha->hw;
  1449. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1450. struct req_que *req = ha->req_q_map[0];
  1451. struct rsp_que *rsp = ha->rsp_q_map[0];
  1452. /* Setup ring parameters in initialization control block. */
  1453. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1454. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1455. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1456. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1457. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1458. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1459. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1460. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1461. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1462. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1463. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1464. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1465. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1466. }
  1467. void
  1468. qla24xx_config_rings(struct scsi_qla_host *vha)
  1469. {
  1470. struct qla_hw_data *ha = vha->hw;
  1471. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1472. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1473. struct qla_msix_entry *msix;
  1474. struct init_cb_24xx *icb;
  1475. uint16_t rid = 0;
  1476. struct req_que *req = ha->req_q_map[0];
  1477. struct rsp_que *rsp = ha->rsp_q_map[0];
  1478. /* Setup ring parameters in initialization control block. */
  1479. icb = (struct init_cb_24xx *)ha->init_cb;
  1480. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1481. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1482. icb->request_q_length = cpu_to_le16(req->length);
  1483. icb->response_q_length = cpu_to_le16(rsp->length);
  1484. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1485. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1486. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1487. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1488. if (ha->mqenable) {
  1489. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1490. icb->rid = __constant_cpu_to_le16(rid);
  1491. if (ha->flags.msix_enabled) {
  1492. msix = &ha->msix_entries[1];
  1493. DEBUG2_17(printk(KERN_INFO
  1494. "Registering vector 0x%x for base que\n", msix->entry));
  1495. icb->msix = cpu_to_le16(msix->entry);
  1496. }
  1497. /* Use alternate PCI bus number */
  1498. if (MSB(rid))
  1499. icb->firmware_options_2 |=
  1500. __constant_cpu_to_le32(BIT_19);
  1501. /* Use alternate PCI devfn */
  1502. if (LSB(rid))
  1503. icb->firmware_options_2 |=
  1504. __constant_cpu_to_le32(BIT_18);
  1505. /* Use Disable MSIX Handshake mode for capable adapters */
  1506. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1507. icb->firmware_options_2 &=
  1508. __constant_cpu_to_le32(~BIT_22);
  1509. ha->flags.disable_msix_handshake = 1;
  1510. qla_printk(KERN_INFO, ha,
  1511. "MSIX Handshake Disable Mode turned on\n");
  1512. } else {
  1513. icb->firmware_options_2 |=
  1514. __constant_cpu_to_le32(BIT_22);
  1515. }
  1516. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1517. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1518. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1519. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1520. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1521. } else {
  1522. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1523. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1524. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1525. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1526. }
  1527. /* PCI posting */
  1528. RD_REG_DWORD(&ioreg->hccr);
  1529. }
  1530. /**
  1531. * qla2x00_init_rings() - Initializes firmware.
  1532. * @ha: HA context
  1533. *
  1534. * Beginning of request ring has initialization control block already built
  1535. * by nvram config routine.
  1536. *
  1537. * Returns 0 on success.
  1538. */
  1539. static int
  1540. qla2x00_init_rings(scsi_qla_host_t *vha)
  1541. {
  1542. int rval;
  1543. unsigned long flags = 0;
  1544. int cnt, que;
  1545. struct qla_hw_data *ha = vha->hw;
  1546. struct req_que *req;
  1547. struct rsp_que *rsp;
  1548. struct scsi_qla_host *vp;
  1549. struct mid_init_cb_24xx *mid_init_cb =
  1550. (struct mid_init_cb_24xx *) ha->init_cb;
  1551. spin_lock_irqsave(&ha->hardware_lock, flags);
  1552. /* Clear outstanding commands array. */
  1553. for (que = 0; que < ha->max_req_queues; que++) {
  1554. req = ha->req_q_map[que];
  1555. if (!req)
  1556. continue;
  1557. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1558. req->outstanding_cmds[cnt] = NULL;
  1559. req->current_outstanding_cmd = 1;
  1560. /* Initialize firmware. */
  1561. req->ring_ptr = req->ring;
  1562. req->ring_index = 0;
  1563. req->cnt = req->length;
  1564. }
  1565. for (que = 0; que < ha->max_rsp_queues; que++) {
  1566. rsp = ha->rsp_q_map[que];
  1567. if (!rsp)
  1568. continue;
  1569. /* Initialize response queue entries */
  1570. qla2x00_init_response_q_entries(rsp);
  1571. }
  1572. /* Clear RSCN queue. */
  1573. list_for_each_entry(vp, &ha->vp_list, list) {
  1574. vp->rscn_in_ptr = 0;
  1575. vp->rscn_out_ptr = 0;
  1576. }
  1577. ha->isp_ops->config_rings(vha);
  1578. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1579. /* Update any ISP specific firmware options before initialization. */
  1580. ha->isp_ops->update_fw_options(vha);
  1581. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1582. if (ha->flags.npiv_supported) {
  1583. if (ha->operating_mode == LOOP)
  1584. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1585. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1586. }
  1587. if (IS_FWI2_CAPABLE(ha)) {
  1588. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1589. mid_init_cb->init_cb.execution_throttle =
  1590. cpu_to_le16(ha->fw_xcb_count);
  1591. }
  1592. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1593. if (rval) {
  1594. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1595. vha->host_no));
  1596. } else {
  1597. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1598. vha->host_no));
  1599. }
  1600. return (rval);
  1601. }
  1602. /**
  1603. * qla2x00_fw_ready() - Waits for firmware ready.
  1604. * @ha: HA context
  1605. *
  1606. * Returns 0 on success.
  1607. */
  1608. static int
  1609. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1610. {
  1611. int rval;
  1612. unsigned long wtime, mtime, cs84xx_time;
  1613. uint16_t min_wait; /* Minimum wait time if loop is down */
  1614. uint16_t wait_time; /* Wait time if loop is coming ready */
  1615. uint16_t state[5];
  1616. struct qla_hw_data *ha = vha->hw;
  1617. rval = QLA_SUCCESS;
  1618. /* 20 seconds for loop down. */
  1619. min_wait = 20;
  1620. /*
  1621. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1622. * our own processing.
  1623. */
  1624. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1625. wait_time = min_wait;
  1626. }
  1627. /* Min wait time if loop down */
  1628. mtime = jiffies + (min_wait * HZ);
  1629. /* wait time before firmware ready */
  1630. wtime = jiffies + (wait_time * HZ);
  1631. /* Wait for ISP to finish LIP */
  1632. if (!vha->flags.init_done)
  1633. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1634. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1635. vha->host_no));
  1636. do {
  1637. rval = qla2x00_get_firmware_state(vha, state);
  1638. if (rval == QLA_SUCCESS) {
  1639. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1640. vha->device_flags &= ~DFLG_NO_CABLE;
  1641. }
  1642. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1643. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1644. "84xx=%x.\n", vha->host_no, state[0],
  1645. state[2]));
  1646. if ((state[2] & FSTATE_LOGGED_IN) &&
  1647. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1648. DEBUG16(printk("scsi(%ld): Sending "
  1649. "verify iocb.\n", vha->host_no));
  1650. cs84xx_time = jiffies;
  1651. rval = qla84xx_init_chip(vha);
  1652. if (rval != QLA_SUCCESS)
  1653. break;
  1654. /* Add time taken to initialize. */
  1655. cs84xx_time = jiffies - cs84xx_time;
  1656. wtime += cs84xx_time;
  1657. mtime += cs84xx_time;
  1658. DEBUG16(printk("scsi(%ld): Increasing "
  1659. "wait time by %ld. New time %ld\n",
  1660. vha->host_no, cs84xx_time, wtime));
  1661. }
  1662. } else if (state[0] == FSTATE_READY) {
  1663. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1664. vha->host_no));
  1665. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1666. &ha->login_timeout, &ha->r_a_tov);
  1667. rval = QLA_SUCCESS;
  1668. break;
  1669. }
  1670. rval = QLA_FUNCTION_FAILED;
  1671. if (atomic_read(&vha->loop_down_timer) &&
  1672. state[0] != FSTATE_READY) {
  1673. /* Loop down. Timeout on min_wait for states
  1674. * other than Wait for Login.
  1675. */
  1676. if (time_after_eq(jiffies, mtime)) {
  1677. qla_printk(KERN_INFO, ha,
  1678. "Cable is unplugged...\n");
  1679. vha->device_flags |= DFLG_NO_CABLE;
  1680. break;
  1681. }
  1682. }
  1683. } else {
  1684. /* Mailbox cmd failed. Timeout on min_wait. */
  1685. if (time_after_eq(jiffies, mtime) ||
  1686. (IS_QLA82XX(ha) && ha->flags.fw_hung))
  1687. break;
  1688. }
  1689. if (time_after_eq(jiffies, wtime))
  1690. break;
  1691. /* Delay for a while */
  1692. msleep(500);
  1693. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1694. vha->host_no, state[0], jiffies));
  1695. } while (1);
  1696. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1697. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1698. jiffies));
  1699. if (rval) {
  1700. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1701. vha->host_no));
  1702. }
  1703. return (rval);
  1704. }
  1705. /*
  1706. * qla2x00_configure_hba
  1707. * Setup adapter context.
  1708. *
  1709. * Input:
  1710. * ha = adapter state pointer.
  1711. *
  1712. * Returns:
  1713. * 0 = success
  1714. *
  1715. * Context:
  1716. * Kernel context.
  1717. */
  1718. static int
  1719. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1720. {
  1721. int rval;
  1722. uint16_t loop_id;
  1723. uint16_t topo;
  1724. uint16_t sw_cap;
  1725. uint8_t al_pa;
  1726. uint8_t area;
  1727. uint8_t domain;
  1728. char connect_type[22];
  1729. struct qla_hw_data *ha = vha->hw;
  1730. /* Get host addresses. */
  1731. rval = qla2x00_get_adapter_id(vha,
  1732. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1733. if (rval != QLA_SUCCESS) {
  1734. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1735. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1736. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1737. __func__, vha->host_no));
  1738. } else {
  1739. qla_printk(KERN_WARNING, ha,
  1740. "ERROR -- Unable to get host loop ID.\n");
  1741. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1742. }
  1743. return (rval);
  1744. }
  1745. if (topo == 4) {
  1746. qla_printk(KERN_INFO, ha,
  1747. "Cannot get topology - retrying.\n");
  1748. return (QLA_FUNCTION_FAILED);
  1749. }
  1750. vha->loop_id = loop_id;
  1751. /* initialize */
  1752. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1753. ha->operating_mode = LOOP;
  1754. ha->switch_cap = 0;
  1755. switch (topo) {
  1756. case 0:
  1757. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1758. vha->host_no));
  1759. ha->current_topology = ISP_CFG_NL;
  1760. strcpy(connect_type, "(Loop)");
  1761. break;
  1762. case 1:
  1763. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1764. vha->host_no));
  1765. ha->switch_cap = sw_cap;
  1766. ha->current_topology = ISP_CFG_FL;
  1767. strcpy(connect_type, "(FL_Port)");
  1768. break;
  1769. case 2:
  1770. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1771. vha->host_no));
  1772. ha->operating_mode = P2P;
  1773. ha->current_topology = ISP_CFG_N;
  1774. strcpy(connect_type, "(N_Port-to-N_Port)");
  1775. break;
  1776. case 3:
  1777. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1778. vha->host_no));
  1779. ha->switch_cap = sw_cap;
  1780. ha->operating_mode = P2P;
  1781. ha->current_topology = ISP_CFG_F;
  1782. strcpy(connect_type, "(F_Port)");
  1783. break;
  1784. default:
  1785. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1786. "Using NL.\n",
  1787. vha->host_no, topo));
  1788. ha->current_topology = ISP_CFG_NL;
  1789. strcpy(connect_type, "(Loop)");
  1790. break;
  1791. }
  1792. /* Save Host port and loop ID. */
  1793. /* byte order - Big Endian */
  1794. vha->d_id.b.domain = domain;
  1795. vha->d_id.b.area = area;
  1796. vha->d_id.b.al_pa = al_pa;
  1797. if (!vha->flags.init_done)
  1798. qla_printk(KERN_INFO, ha,
  1799. "Topology - %s, Host Loop address 0x%x\n",
  1800. connect_type, vha->loop_id);
  1801. if (rval) {
  1802. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1803. } else {
  1804. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1805. }
  1806. return(rval);
  1807. }
  1808. inline void
  1809. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1810. char *def)
  1811. {
  1812. char *st, *en;
  1813. uint16_t index;
  1814. struct qla_hw_data *ha = vha->hw;
  1815. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1816. !IS_QLA8XXX_TYPE(ha);
  1817. if (memcmp(model, BINZERO, len) != 0) {
  1818. strncpy(ha->model_number, model, len);
  1819. st = en = ha->model_number;
  1820. en += len - 1;
  1821. while (en > st) {
  1822. if (*en != 0x20 && *en != 0x00)
  1823. break;
  1824. *en-- = '\0';
  1825. }
  1826. index = (ha->pdev->subsystem_device & 0xff);
  1827. if (use_tbl &&
  1828. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1829. index < QLA_MODEL_NAMES)
  1830. strncpy(ha->model_desc,
  1831. qla2x00_model_name[index * 2 + 1],
  1832. sizeof(ha->model_desc) - 1);
  1833. } else {
  1834. index = (ha->pdev->subsystem_device & 0xff);
  1835. if (use_tbl &&
  1836. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1837. index < QLA_MODEL_NAMES) {
  1838. strcpy(ha->model_number,
  1839. qla2x00_model_name[index * 2]);
  1840. strncpy(ha->model_desc,
  1841. qla2x00_model_name[index * 2 + 1],
  1842. sizeof(ha->model_desc) - 1);
  1843. } else {
  1844. strcpy(ha->model_number, def);
  1845. }
  1846. }
  1847. if (IS_FWI2_CAPABLE(ha))
  1848. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1849. sizeof(ha->model_desc));
  1850. }
  1851. /* On sparc systems, obtain port and node WWN from firmware
  1852. * properties.
  1853. */
  1854. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1855. {
  1856. #ifdef CONFIG_SPARC
  1857. struct qla_hw_data *ha = vha->hw;
  1858. struct pci_dev *pdev = ha->pdev;
  1859. struct device_node *dp = pci_device_to_OF_node(pdev);
  1860. const u8 *val;
  1861. int len;
  1862. val = of_get_property(dp, "port-wwn", &len);
  1863. if (val && len >= WWN_SIZE)
  1864. memcpy(nv->port_name, val, WWN_SIZE);
  1865. val = of_get_property(dp, "node-wwn", &len);
  1866. if (val && len >= WWN_SIZE)
  1867. memcpy(nv->node_name, val, WWN_SIZE);
  1868. #endif
  1869. }
  1870. /*
  1871. * NVRAM configuration for ISP 2xxx
  1872. *
  1873. * Input:
  1874. * ha = adapter block pointer.
  1875. *
  1876. * Output:
  1877. * initialization control block in response_ring
  1878. * host adapters parameters in host adapter block
  1879. *
  1880. * Returns:
  1881. * 0 = success.
  1882. */
  1883. int
  1884. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1885. {
  1886. int rval;
  1887. uint8_t chksum = 0;
  1888. uint16_t cnt;
  1889. uint8_t *dptr1, *dptr2;
  1890. struct qla_hw_data *ha = vha->hw;
  1891. init_cb_t *icb = ha->init_cb;
  1892. nvram_t *nv = ha->nvram;
  1893. uint8_t *ptr = ha->nvram;
  1894. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1895. rval = QLA_SUCCESS;
  1896. /* Determine NVRAM starting address. */
  1897. ha->nvram_size = sizeof(nvram_t);
  1898. ha->nvram_base = 0;
  1899. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1900. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1901. ha->nvram_base = 0x80;
  1902. /* Get NVRAM data and calculate checksum. */
  1903. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1904. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1905. chksum += *ptr++;
  1906. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1907. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1908. /* Bad NVRAM data, set defaults parameters. */
  1909. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1910. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1911. /* Reset NVRAM data. */
  1912. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1913. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1914. nv->nvram_version);
  1915. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1916. "invalid -- WWPN) defaults.\n");
  1917. /*
  1918. * Set default initialization control block.
  1919. */
  1920. memset(nv, 0, ha->nvram_size);
  1921. nv->parameter_block_version = ICB_VERSION;
  1922. if (IS_QLA23XX(ha)) {
  1923. nv->firmware_options[0] = BIT_2 | BIT_1;
  1924. nv->firmware_options[1] = BIT_7 | BIT_5;
  1925. nv->add_firmware_options[0] = BIT_5;
  1926. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1927. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1928. nv->special_options[1] = BIT_7;
  1929. } else if (IS_QLA2200(ha)) {
  1930. nv->firmware_options[0] = BIT_2 | BIT_1;
  1931. nv->firmware_options[1] = BIT_7 | BIT_5;
  1932. nv->add_firmware_options[0] = BIT_5;
  1933. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1934. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1935. } else if (IS_QLA2100(ha)) {
  1936. nv->firmware_options[0] = BIT_3 | BIT_1;
  1937. nv->firmware_options[1] = BIT_5;
  1938. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1939. }
  1940. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1941. nv->execution_throttle = __constant_cpu_to_le16(16);
  1942. nv->retry_count = 8;
  1943. nv->retry_delay = 1;
  1944. nv->port_name[0] = 33;
  1945. nv->port_name[3] = 224;
  1946. nv->port_name[4] = 139;
  1947. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1948. nv->login_timeout = 4;
  1949. /*
  1950. * Set default host adapter parameters
  1951. */
  1952. nv->host_p[1] = BIT_2;
  1953. nv->reset_delay = 5;
  1954. nv->port_down_retry_count = 8;
  1955. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1956. nv->link_down_timeout = 60;
  1957. rval = 1;
  1958. }
  1959. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1960. /*
  1961. * The SN2 does not provide BIOS emulation which means you can't change
  1962. * potentially bogus BIOS settings. Force the use of default settings
  1963. * for link rate and frame size. Hope that the rest of the settings
  1964. * are valid.
  1965. */
  1966. if (ia64_platform_is("sn2")) {
  1967. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1968. if (IS_QLA23XX(ha))
  1969. nv->special_options[1] = BIT_7;
  1970. }
  1971. #endif
  1972. /* Reset Initialization control block */
  1973. memset(icb, 0, ha->init_cb_size);
  1974. /*
  1975. * Setup driver NVRAM options.
  1976. */
  1977. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1978. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1979. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1980. nv->firmware_options[1] &= ~BIT_4;
  1981. if (IS_QLA23XX(ha)) {
  1982. nv->firmware_options[0] |= BIT_2;
  1983. nv->firmware_options[0] &= ~BIT_3;
  1984. nv->firmware_options[0] &= ~BIT_6;
  1985. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1986. if (IS_QLA2300(ha)) {
  1987. if (ha->fb_rev == FPM_2310) {
  1988. strcpy(ha->model_number, "QLA2310");
  1989. } else {
  1990. strcpy(ha->model_number, "QLA2300");
  1991. }
  1992. } else {
  1993. qla2x00_set_model_info(vha, nv->model_number,
  1994. sizeof(nv->model_number), "QLA23xx");
  1995. }
  1996. } else if (IS_QLA2200(ha)) {
  1997. nv->firmware_options[0] |= BIT_2;
  1998. /*
  1999. * 'Point-to-point preferred, else loop' is not a safe
  2000. * connection mode setting.
  2001. */
  2002. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  2003. (BIT_5 | BIT_4)) {
  2004. /* Force 'loop preferred, else point-to-point'. */
  2005. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  2006. nv->add_firmware_options[0] |= BIT_5;
  2007. }
  2008. strcpy(ha->model_number, "QLA22xx");
  2009. } else /*if (IS_QLA2100(ha))*/ {
  2010. strcpy(ha->model_number, "QLA2100");
  2011. }
  2012. /*
  2013. * Copy over NVRAM RISC parameter block to initialization control block.
  2014. */
  2015. dptr1 = (uint8_t *)icb;
  2016. dptr2 = (uint8_t *)&nv->parameter_block_version;
  2017. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  2018. while (cnt--)
  2019. *dptr1++ = *dptr2++;
  2020. /* Copy 2nd half. */
  2021. dptr1 = (uint8_t *)icb->add_firmware_options;
  2022. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  2023. while (cnt--)
  2024. *dptr1++ = *dptr2++;
  2025. /* Use alternate WWN? */
  2026. if (nv->host_p[1] & BIT_7) {
  2027. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2028. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2029. }
  2030. /* Prepare nodename */
  2031. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2032. /*
  2033. * Firmware will apply the following mask if the nodename was
  2034. * not provided.
  2035. */
  2036. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2037. icb->node_name[0] &= 0xF0;
  2038. }
  2039. /*
  2040. * Set host adapter parameters.
  2041. */
  2042. if (nv->host_p[0] & BIT_7)
  2043. ql2xextended_error_logging = 1;
  2044. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2045. /* Always load RISC code on non ISP2[12]00 chips. */
  2046. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2047. ha->flags.disable_risc_code_load = 0;
  2048. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2049. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2050. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2051. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2052. ha->flags.disable_serdes = 0;
  2053. ha->operating_mode =
  2054. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2055. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2056. sizeof(ha->fw_seriallink_options));
  2057. /* save HBA serial number */
  2058. ha->serial0 = icb->port_name[5];
  2059. ha->serial1 = icb->port_name[6];
  2060. ha->serial2 = icb->port_name[7];
  2061. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2062. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2063. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2064. ha->retry_count = nv->retry_count;
  2065. /* Set minimum login_timeout to 4 seconds. */
  2066. if (nv->login_timeout != ql2xlogintimeout)
  2067. nv->login_timeout = ql2xlogintimeout;
  2068. if (nv->login_timeout < 4)
  2069. nv->login_timeout = 4;
  2070. ha->login_timeout = nv->login_timeout;
  2071. icb->login_timeout = nv->login_timeout;
  2072. /* Set minimum RATOV to 100 tenths of a second. */
  2073. ha->r_a_tov = 100;
  2074. ha->loop_reset_delay = nv->reset_delay;
  2075. /* Link Down Timeout = 0:
  2076. *
  2077. * When Port Down timer expires we will start returning
  2078. * I/O's to OS with "DID_NO_CONNECT".
  2079. *
  2080. * Link Down Timeout != 0:
  2081. *
  2082. * The driver waits for the link to come up after link down
  2083. * before returning I/Os to OS with "DID_NO_CONNECT".
  2084. */
  2085. if (nv->link_down_timeout == 0) {
  2086. ha->loop_down_abort_time =
  2087. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2088. } else {
  2089. ha->link_down_timeout = nv->link_down_timeout;
  2090. ha->loop_down_abort_time =
  2091. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2092. }
  2093. /*
  2094. * Need enough time to try and get the port back.
  2095. */
  2096. ha->port_down_retry_count = nv->port_down_retry_count;
  2097. if (qlport_down_retry)
  2098. ha->port_down_retry_count = qlport_down_retry;
  2099. /* Set login_retry_count */
  2100. ha->login_retry_count = nv->retry_count;
  2101. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2102. ha->port_down_retry_count > 3)
  2103. ha->login_retry_count = ha->port_down_retry_count;
  2104. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2105. ha->login_retry_count = ha->port_down_retry_count;
  2106. if (ql2xloginretrycount)
  2107. ha->login_retry_count = ql2xloginretrycount;
  2108. icb->lun_enables = __constant_cpu_to_le16(0);
  2109. icb->command_resource_count = 0;
  2110. icb->immediate_notify_resource_count = 0;
  2111. icb->timeout = __constant_cpu_to_le16(0);
  2112. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2113. /* Enable RIO */
  2114. icb->firmware_options[0] &= ~BIT_3;
  2115. icb->add_firmware_options[0] &=
  2116. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2117. icb->add_firmware_options[0] |= BIT_2;
  2118. icb->response_accumulation_timer = 3;
  2119. icb->interrupt_delay_timer = 5;
  2120. vha->flags.process_response_queue = 1;
  2121. } else {
  2122. /* Enable ZIO. */
  2123. if (!vha->flags.init_done) {
  2124. ha->zio_mode = icb->add_firmware_options[0] &
  2125. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2126. ha->zio_timer = icb->interrupt_delay_timer ?
  2127. icb->interrupt_delay_timer: 2;
  2128. }
  2129. icb->add_firmware_options[0] &=
  2130. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2131. vha->flags.process_response_queue = 0;
  2132. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2133. ha->zio_mode = QLA_ZIO_MODE_6;
  2134. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2135. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2136. ha->zio_timer * 100));
  2137. qla_printk(KERN_INFO, ha,
  2138. "ZIO mode %d enabled; timer delay (%d us).\n",
  2139. ha->zio_mode, ha->zio_timer * 100);
  2140. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2141. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2142. vha->flags.process_response_queue = 1;
  2143. }
  2144. }
  2145. if (rval) {
  2146. DEBUG2_3(printk(KERN_WARNING
  2147. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2148. }
  2149. return (rval);
  2150. }
  2151. static void
  2152. qla2x00_rport_del(void *data)
  2153. {
  2154. fc_port_t *fcport = data;
  2155. struct fc_rport *rport;
  2156. spin_lock_irq(fcport->vha->host->host_lock);
  2157. rport = fcport->drport ? fcport->drport: fcport->rport;
  2158. fcport->drport = NULL;
  2159. spin_unlock_irq(fcport->vha->host->host_lock);
  2160. if (rport)
  2161. fc_remote_port_delete(rport);
  2162. }
  2163. /**
  2164. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2165. * @ha: HA context
  2166. * @flags: allocation flags
  2167. *
  2168. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2169. */
  2170. fc_port_t *
  2171. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2172. {
  2173. fc_port_t *fcport;
  2174. fcport = kzalloc(sizeof(fc_port_t), flags);
  2175. if (!fcport)
  2176. return NULL;
  2177. /* Setup fcport template structure. */
  2178. fcport->vha = vha;
  2179. fcport->vp_idx = vha->vp_idx;
  2180. fcport->port_type = FCT_UNKNOWN;
  2181. fcport->loop_id = FC_NO_LOOP_ID;
  2182. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2183. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2184. return fcport;
  2185. }
  2186. /*
  2187. * qla2x00_configure_loop
  2188. * Updates Fibre Channel Device Database with what is actually on loop.
  2189. *
  2190. * Input:
  2191. * ha = adapter block pointer.
  2192. *
  2193. * Returns:
  2194. * 0 = success.
  2195. * 1 = error.
  2196. * 2 = database was full and device was not configured.
  2197. */
  2198. static int
  2199. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2200. {
  2201. int rval;
  2202. unsigned long flags, save_flags;
  2203. struct qla_hw_data *ha = vha->hw;
  2204. rval = QLA_SUCCESS;
  2205. /* Get Initiator ID */
  2206. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2207. rval = qla2x00_configure_hba(vha);
  2208. if (rval != QLA_SUCCESS) {
  2209. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2210. vha->host_no));
  2211. return (rval);
  2212. }
  2213. }
  2214. save_flags = flags = vha->dpc_flags;
  2215. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2216. vha->host_no, flags));
  2217. /*
  2218. * If we have both an RSCN and PORT UPDATE pending then handle them
  2219. * both at the same time.
  2220. */
  2221. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2222. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2223. qla2x00_get_data_rate(vha);
  2224. /* Determine what we need to do */
  2225. if (ha->current_topology == ISP_CFG_FL &&
  2226. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2227. vha->flags.rscn_queue_overflow = 1;
  2228. set_bit(RSCN_UPDATE, &flags);
  2229. } else if (ha->current_topology == ISP_CFG_F &&
  2230. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2231. vha->flags.rscn_queue_overflow = 1;
  2232. set_bit(RSCN_UPDATE, &flags);
  2233. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2234. } else if (ha->current_topology == ISP_CFG_N) {
  2235. clear_bit(RSCN_UPDATE, &flags);
  2236. } else if (!vha->flags.online ||
  2237. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2238. vha->flags.rscn_queue_overflow = 1;
  2239. set_bit(RSCN_UPDATE, &flags);
  2240. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2241. }
  2242. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2243. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2244. rval = QLA_FUNCTION_FAILED;
  2245. else
  2246. rval = qla2x00_configure_local_loop(vha);
  2247. }
  2248. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2249. if (LOOP_TRANSITION(vha))
  2250. rval = QLA_FUNCTION_FAILED;
  2251. else
  2252. rval = qla2x00_configure_fabric(vha);
  2253. }
  2254. if (rval == QLA_SUCCESS) {
  2255. if (atomic_read(&vha->loop_down_timer) ||
  2256. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2257. rval = QLA_FUNCTION_FAILED;
  2258. } else {
  2259. atomic_set(&vha->loop_state, LOOP_READY);
  2260. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2261. }
  2262. }
  2263. if (rval) {
  2264. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2265. __func__, vha->host_no));
  2266. } else {
  2267. DEBUG3(printk("%s: exiting normally\n", __func__));
  2268. }
  2269. /* Restore state if a resync event occurred during processing */
  2270. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2271. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2272. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2273. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2274. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2275. if (!IS_ALOGIO_CAPABLE(ha))
  2276. vha->flags.rscn_queue_overflow = 1;
  2277. }
  2278. }
  2279. return (rval);
  2280. }
  2281. /*
  2282. * qla2x00_configure_local_loop
  2283. * Updates Fibre Channel Device Database with local loop devices.
  2284. *
  2285. * Input:
  2286. * ha = adapter block pointer.
  2287. *
  2288. * Returns:
  2289. * 0 = success.
  2290. */
  2291. static int
  2292. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2293. {
  2294. int rval, rval2;
  2295. int found_devs;
  2296. int found;
  2297. fc_port_t *fcport, *new_fcport;
  2298. uint16_t index;
  2299. uint16_t entries;
  2300. char *id_iter;
  2301. uint16_t loop_id;
  2302. uint8_t domain, area, al_pa;
  2303. struct qla_hw_data *ha = vha->hw;
  2304. found_devs = 0;
  2305. new_fcport = NULL;
  2306. entries = MAX_FIBRE_DEVICES;
  2307. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2308. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2309. /* Get list of logged in devices. */
  2310. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2311. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2312. &entries);
  2313. if (rval != QLA_SUCCESS)
  2314. goto cleanup_allocation;
  2315. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2316. vha->host_no, entries));
  2317. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2318. entries * sizeof(struct gid_list_info)));
  2319. /* Allocate temporary fcport for any new fcports discovered. */
  2320. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2321. if (new_fcport == NULL) {
  2322. rval = QLA_MEMORY_ALLOC_FAILED;
  2323. goto cleanup_allocation;
  2324. }
  2325. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2326. /*
  2327. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2328. */
  2329. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2330. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2331. fcport->port_type != FCT_BROADCAST &&
  2332. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2333. DEBUG(printk("scsi(%ld): Marking port lost, "
  2334. "loop_id=0x%04x\n",
  2335. vha->host_no, fcport->loop_id));
  2336. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2337. }
  2338. }
  2339. /* Add devices to port list. */
  2340. id_iter = (char *)ha->gid_list;
  2341. for (index = 0; index < entries; index++) {
  2342. domain = ((struct gid_list_info *)id_iter)->domain;
  2343. area = ((struct gid_list_info *)id_iter)->area;
  2344. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2345. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2346. loop_id = (uint16_t)
  2347. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2348. else
  2349. loop_id = le16_to_cpu(
  2350. ((struct gid_list_info *)id_iter)->loop_id);
  2351. id_iter += ha->gid_list_info_size;
  2352. /* Bypass reserved domain fields. */
  2353. if ((domain & 0xf0) == 0xf0)
  2354. continue;
  2355. /* Bypass if not same domain and area of adapter. */
  2356. if (area && domain &&
  2357. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2358. continue;
  2359. /* Bypass invalid local loop ID. */
  2360. if (loop_id > LAST_LOCAL_LOOP_ID)
  2361. continue;
  2362. /* Fill in member data. */
  2363. new_fcport->d_id.b.domain = domain;
  2364. new_fcport->d_id.b.area = area;
  2365. new_fcport->d_id.b.al_pa = al_pa;
  2366. new_fcport->loop_id = loop_id;
  2367. new_fcport->vp_idx = vha->vp_idx;
  2368. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2369. if (rval2 != QLA_SUCCESS) {
  2370. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2371. "information -- get_port_database=%x, "
  2372. "loop_id=0x%04x\n",
  2373. vha->host_no, rval2, new_fcport->loop_id));
  2374. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2375. vha->host_no));
  2376. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2377. continue;
  2378. }
  2379. /* Check for matching device in port list. */
  2380. found = 0;
  2381. fcport = NULL;
  2382. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2383. if (memcmp(new_fcport->port_name, fcport->port_name,
  2384. WWN_SIZE))
  2385. continue;
  2386. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2387. fcport->loop_id = new_fcport->loop_id;
  2388. fcport->port_type = new_fcport->port_type;
  2389. fcport->d_id.b24 = new_fcport->d_id.b24;
  2390. memcpy(fcport->node_name, new_fcport->node_name,
  2391. WWN_SIZE);
  2392. found++;
  2393. break;
  2394. }
  2395. if (!found) {
  2396. /* New device, add to fcports list. */
  2397. if (vha->vp_idx) {
  2398. new_fcport->vha = vha;
  2399. new_fcport->vp_idx = vha->vp_idx;
  2400. }
  2401. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2402. /* Allocate a new replacement fcport. */
  2403. fcport = new_fcport;
  2404. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2405. if (new_fcport == NULL) {
  2406. rval = QLA_MEMORY_ALLOC_FAILED;
  2407. goto cleanup_allocation;
  2408. }
  2409. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2410. }
  2411. /* Base iIDMA settings on HBA port speed. */
  2412. fcport->fp_speed = ha->link_data_rate;
  2413. qla2x00_update_fcport(vha, fcport);
  2414. found_devs++;
  2415. }
  2416. cleanup_allocation:
  2417. kfree(new_fcport);
  2418. if (rval != QLA_SUCCESS) {
  2419. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2420. "rval=%x\n", vha->host_no, rval));
  2421. }
  2422. return (rval);
  2423. }
  2424. static void
  2425. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2426. {
  2427. #define LS_UNKNOWN 2
  2428. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2429. char *link_speed;
  2430. int rval;
  2431. uint16_t mb[4];
  2432. struct qla_hw_data *ha = vha->hw;
  2433. if (!IS_IIDMA_CAPABLE(ha))
  2434. return;
  2435. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2436. fcport->fp_speed > ha->link_data_rate)
  2437. return;
  2438. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2439. mb);
  2440. if (rval != QLA_SUCCESS) {
  2441. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2442. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2443. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2444. fcport->port_name[2], fcport->port_name[3],
  2445. fcport->port_name[4], fcport->port_name[5],
  2446. fcport->port_name[6], fcport->port_name[7], rval,
  2447. fcport->fp_speed, mb[0], mb[1]));
  2448. } else {
  2449. link_speed = link_speeds[LS_UNKNOWN];
  2450. if (fcport->fp_speed < 5)
  2451. link_speed = link_speeds[fcport->fp_speed];
  2452. else if (fcport->fp_speed == 0x13)
  2453. link_speed = link_speeds[5];
  2454. DEBUG2(qla_printk(KERN_INFO, ha,
  2455. "iIDMA adjusted to %s GB/s on "
  2456. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2457. link_speed, fcport->port_name[0],
  2458. fcport->port_name[1], fcport->port_name[2],
  2459. fcport->port_name[3], fcport->port_name[4],
  2460. fcport->port_name[5], fcport->port_name[6],
  2461. fcport->port_name[7]));
  2462. }
  2463. }
  2464. static void
  2465. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2466. {
  2467. struct fc_rport_identifiers rport_ids;
  2468. struct fc_rport *rport;
  2469. struct qla_hw_data *ha = vha->hw;
  2470. qla2x00_rport_del(fcport);
  2471. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2472. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2473. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2474. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2475. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2476. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2477. if (!rport) {
  2478. qla_printk(KERN_WARNING, ha,
  2479. "Unable to allocate fc remote port!\n");
  2480. return;
  2481. }
  2482. spin_lock_irq(fcport->vha->host->host_lock);
  2483. *((fc_port_t **)rport->dd_data) = fcport;
  2484. spin_unlock_irq(fcport->vha->host->host_lock);
  2485. rport->supported_classes = fcport->supported_classes;
  2486. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2487. if (fcport->port_type == FCT_INITIATOR)
  2488. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2489. if (fcport->port_type == FCT_TARGET)
  2490. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2491. fc_remote_port_rolechg(rport, rport_ids.roles);
  2492. }
  2493. /*
  2494. * qla2x00_update_fcport
  2495. * Updates device on list.
  2496. *
  2497. * Input:
  2498. * ha = adapter block pointer.
  2499. * fcport = port structure pointer.
  2500. *
  2501. * Return:
  2502. * 0 - Success
  2503. * BIT_0 - error
  2504. *
  2505. * Context:
  2506. * Kernel context.
  2507. */
  2508. void
  2509. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2510. {
  2511. struct qla_hw_data *ha = vha->hw;
  2512. fcport->vha = vha;
  2513. fcport->login_retry = 0;
  2514. fcport->port_login_retry_count = ha->port_down_retry_count *
  2515. PORT_RETRY_TIME;
  2516. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2517. PORT_RETRY_TIME);
  2518. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2519. qla2x00_iidma_fcport(vha, fcport);
  2520. atomic_set(&fcport->state, FCS_ONLINE);
  2521. qla2x00_reg_remote_port(vha, fcport);
  2522. }
  2523. /*
  2524. * qla2x00_configure_fabric
  2525. * Setup SNS devices with loop ID's.
  2526. *
  2527. * Input:
  2528. * ha = adapter block pointer.
  2529. *
  2530. * Returns:
  2531. * 0 = success.
  2532. * BIT_0 = error
  2533. */
  2534. static int
  2535. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2536. {
  2537. int rval, rval2;
  2538. fc_port_t *fcport, *fcptemp;
  2539. uint16_t next_loopid;
  2540. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2541. uint16_t loop_id;
  2542. LIST_HEAD(new_fcports);
  2543. struct qla_hw_data *ha = vha->hw;
  2544. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2545. /* If FL port exists, then SNS is present */
  2546. if (IS_FWI2_CAPABLE(ha))
  2547. loop_id = NPH_F_PORT;
  2548. else
  2549. loop_id = SNS_FL_PORT;
  2550. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2551. if (rval != QLA_SUCCESS) {
  2552. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2553. "Port\n", vha->host_no));
  2554. vha->device_flags &= ~SWITCH_FOUND;
  2555. return (QLA_SUCCESS);
  2556. }
  2557. vha->device_flags |= SWITCH_FOUND;
  2558. /* Mark devices that need re-synchronization. */
  2559. rval2 = qla2x00_device_resync(vha);
  2560. if (rval2 == QLA_RSCNS_HANDLED) {
  2561. /* No point doing the scan, just continue. */
  2562. return (QLA_SUCCESS);
  2563. }
  2564. do {
  2565. /* FDMI support. */
  2566. if (ql2xfdmienable &&
  2567. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2568. qla2x00_fdmi_register(vha);
  2569. /* Ensure we are logged into the SNS. */
  2570. if (IS_FWI2_CAPABLE(ha))
  2571. loop_id = NPH_SNS;
  2572. else
  2573. loop_id = SIMPLE_NAME_SERVER;
  2574. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2575. 0xfc, mb, BIT_1 | BIT_0);
  2576. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2577. DEBUG2(qla_printk(KERN_INFO, ha,
  2578. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2579. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2580. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2581. return (QLA_SUCCESS);
  2582. }
  2583. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2584. if (qla2x00_rft_id(vha)) {
  2585. /* EMPTY */
  2586. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2587. "TYPE failed.\n", vha->host_no));
  2588. }
  2589. if (qla2x00_rff_id(vha)) {
  2590. /* EMPTY */
  2591. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2592. "Features failed.\n", vha->host_no));
  2593. }
  2594. if (qla2x00_rnn_id(vha)) {
  2595. /* EMPTY */
  2596. DEBUG2(printk("scsi(%ld): Register Node Name "
  2597. "failed.\n", vha->host_no));
  2598. } else if (qla2x00_rsnn_nn(vha)) {
  2599. /* EMPTY */
  2600. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2601. "Node Name failed.\n", vha->host_no));
  2602. }
  2603. }
  2604. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2605. if (rval != QLA_SUCCESS)
  2606. break;
  2607. /*
  2608. * Logout all previous fabric devices marked lost, except
  2609. * FCP2 devices.
  2610. */
  2611. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2612. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2613. break;
  2614. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2615. continue;
  2616. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2617. qla2x00_mark_device_lost(vha, fcport,
  2618. ql2xplogiabsentdevice, 0);
  2619. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2620. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2621. fcport->port_type != FCT_INITIATOR &&
  2622. fcport->port_type != FCT_BROADCAST) {
  2623. ha->isp_ops->fabric_logout(vha,
  2624. fcport->loop_id,
  2625. fcport->d_id.b.domain,
  2626. fcport->d_id.b.area,
  2627. fcport->d_id.b.al_pa);
  2628. fcport->loop_id = FC_NO_LOOP_ID;
  2629. }
  2630. }
  2631. }
  2632. /* Starting free loop ID. */
  2633. next_loopid = ha->min_external_loopid;
  2634. /*
  2635. * Scan through our port list and login entries that need to be
  2636. * logged in.
  2637. */
  2638. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2639. if (atomic_read(&vha->loop_down_timer) ||
  2640. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2641. break;
  2642. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2643. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2644. continue;
  2645. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2646. fcport->loop_id = next_loopid;
  2647. rval = qla2x00_find_new_loop_id(
  2648. base_vha, fcport);
  2649. if (rval != QLA_SUCCESS) {
  2650. /* Ran out of IDs to use */
  2651. break;
  2652. }
  2653. }
  2654. /* Login and update database */
  2655. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2656. }
  2657. /* Exit if out of loop IDs. */
  2658. if (rval != QLA_SUCCESS) {
  2659. break;
  2660. }
  2661. /*
  2662. * Login and add the new devices to our port list.
  2663. */
  2664. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2665. if (atomic_read(&vha->loop_down_timer) ||
  2666. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2667. break;
  2668. /* Find a new loop ID to use. */
  2669. fcport->loop_id = next_loopid;
  2670. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2671. if (rval != QLA_SUCCESS) {
  2672. /* Ran out of IDs to use */
  2673. break;
  2674. }
  2675. /* Login and update database */
  2676. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2677. if (vha->vp_idx) {
  2678. fcport->vha = vha;
  2679. fcport->vp_idx = vha->vp_idx;
  2680. }
  2681. list_move_tail(&fcport->list, &vha->vp_fcports);
  2682. }
  2683. } while (0);
  2684. /* Free all new device structures not processed. */
  2685. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2686. list_del(&fcport->list);
  2687. kfree(fcport);
  2688. }
  2689. if (rval) {
  2690. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2691. "rval=%d\n", vha->host_no, rval));
  2692. }
  2693. return (rval);
  2694. }
  2695. /*
  2696. * qla2x00_find_all_fabric_devs
  2697. *
  2698. * Input:
  2699. * ha = adapter block pointer.
  2700. * dev = database device entry pointer.
  2701. *
  2702. * Returns:
  2703. * 0 = success.
  2704. *
  2705. * Context:
  2706. * Kernel context.
  2707. */
  2708. static int
  2709. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2710. struct list_head *new_fcports)
  2711. {
  2712. int rval;
  2713. uint16_t loop_id;
  2714. fc_port_t *fcport, *new_fcport, *fcptemp;
  2715. int found;
  2716. sw_info_t *swl;
  2717. int swl_idx;
  2718. int first_dev, last_dev;
  2719. port_id_t wrap = {}, nxt_d_id;
  2720. struct qla_hw_data *ha = vha->hw;
  2721. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2722. struct scsi_qla_host *tvp;
  2723. rval = QLA_SUCCESS;
  2724. /* Try GID_PT to get device list, else GAN. */
  2725. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2726. if (!swl) {
  2727. /*EMPTY*/
  2728. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2729. "on GA_NXT\n", vha->host_no));
  2730. } else {
  2731. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2732. kfree(swl);
  2733. swl = NULL;
  2734. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2735. kfree(swl);
  2736. swl = NULL;
  2737. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2738. kfree(swl);
  2739. swl = NULL;
  2740. } else if (ql2xiidmaenable &&
  2741. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2742. qla2x00_gpsc(vha, swl);
  2743. }
  2744. }
  2745. swl_idx = 0;
  2746. /* Allocate temporary fcport for any new fcports discovered. */
  2747. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2748. if (new_fcport == NULL) {
  2749. kfree(swl);
  2750. return (QLA_MEMORY_ALLOC_FAILED);
  2751. }
  2752. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2753. /* Set start port ID scan at adapter ID. */
  2754. first_dev = 1;
  2755. last_dev = 0;
  2756. /* Starting free loop ID. */
  2757. loop_id = ha->min_external_loopid;
  2758. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2759. if (qla2x00_is_reserved_id(vha, loop_id))
  2760. continue;
  2761. if (ha->current_topology == ISP_CFG_FL &&
  2762. (atomic_read(&vha->loop_down_timer) ||
  2763. LOOP_TRANSITION(vha))) {
  2764. atomic_set(&vha->loop_down_timer, 0);
  2765. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2766. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2767. break;
  2768. }
  2769. if (swl != NULL) {
  2770. if (last_dev) {
  2771. wrap.b24 = new_fcport->d_id.b24;
  2772. } else {
  2773. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2774. memcpy(new_fcport->node_name,
  2775. swl[swl_idx].node_name, WWN_SIZE);
  2776. memcpy(new_fcport->port_name,
  2777. swl[swl_idx].port_name, WWN_SIZE);
  2778. memcpy(new_fcport->fabric_port_name,
  2779. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2780. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2781. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2782. last_dev = 1;
  2783. }
  2784. swl_idx++;
  2785. }
  2786. } else {
  2787. /* Send GA_NXT to the switch */
  2788. rval = qla2x00_ga_nxt(vha, new_fcport);
  2789. if (rval != QLA_SUCCESS) {
  2790. qla_printk(KERN_WARNING, ha,
  2791. "SNS scan failed -- assuming zero-entry "
  2792. "result...\n");
  2793. list_for_each_entry_safe(fcport, fcptemp,
  2794. new_fcports, list) {
  2795. list_del(&fcport->list);
  2796. kfree(fcport);
  2797. }
  2798. rval = QLA_SUCCESS;
  2799. break;
  2800. }
  2801. }
  2802. /* If wrap on switch device list, exit. */
  2803. if (first_dev) {
  2804. wrap.b24 = new_fcport->d_id.b24;
  2805. first_dev = 0;
  2806. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2807. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2808. vha->host_no, new_fcport->d_id.b.domain,
  2809. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2810. break;
  2811. }
  2812. /* Bypass if same physical adapter. */
  2813. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2814. continue;
  2815. /* Bypass virtual ports of the same host. */
  2816. found = 0;
  2817. if (ha->num_vhosts) {
  2818. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2819. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2820. found = 1;
  2821. break;
  2822. }
  2823. }
  2824. if (found)
  2825. continue;
  2826. }
  2827. /* Bypass if same domain and area of adapter. */
  2828. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2829. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2830. ISP_CFG_FL)
  2831. continue;
  2832. /* Bypass reserved domain fields. */
  2833. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2834. continue;
  2835. /* Locate matching device in database. */
  2836. found = 0;
  2837. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2838. if (memcmp(new_fcport->port_name, fcport->port_name,
  2839. WWN_SIZE))
  2840. continue;
  2841. found++;
  2842. /* Update port state. */
  2843. memcpy(fcport->fabric_port_name,
  2844. new_fcport->fabric_port_name, WWN_SIZE);
  2845. fcport->fp_speed = new_fcport->fp_speed;
  2846. /*
  2847. * If address the same and state FCS_ONLINE, nothing
  2848. * changed.
  2849. */
  2850. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2851. atomic_read(&fcport->state) == FCS_ONLINE) {
  2852. break;
  2853. }
  2854. /*
  2855. * If device was not a fabric device before.
  2856. */
  2857. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2858. fcport->d_id.b24 = new_fcport->d_id.b24;
  2859. fcport->loop_id = FC_NO_LOOP_ID;
  2860. fcport->flags |= (FCF_FABRIC_DEVICE |
  2861. FCF_LOGIN_NEEDED);
  2862. break;
  2863. }
  2864. /*
  2865. * Port ID changed or device was marked to be updated;
  2866. * Log it out if still logged in and mark it for
  2867. * relogin later.
  2868. */
  2869. fcport->d_id.b24 = new_fcport->d_id.b24;
  2870. fcport->flags |= FCF_LOGIN_NEEDED;
  2871. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2872. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2873. fcport->port_type != FCT_INITIATOR &&
  2874. fcport->port_type != FCT_BROADCAST) {
  2875. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2876. fcport->d_id.b.domain, fcport->d_id.b.area,
  2877. fcport->d_id.b.al_pa);
  2878. fcport->loop_id = FC_NO_LOOP_ID;
  2879. }
  2880. break;
  2881. }
  2882. if (found)
  2883. continue;
  2884. /* If device was not in our fcports list, then add it. */
  2885. list_add_tail(&new_fcport->list, new_fcports);
  2886. /* Allocate a new replacement fcport. */
  2887. nxt_d_id.b24 = new_fcport->d_id.b24;
  2888. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2889. if (new_fcport == NULL) {
  2890. kfree(swl);
  2891. return (QLA_MEMORY_ALLOC_FAILED);
  2892. }
  2893. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2894. new_fcport->d_id.b24 = nxt_d_id.b24;
  2895. }
  2896. kfree(swl);
  2897. kfree(new_fcport);
  2898. return (rval);
  2899. }
  2900. /*
  2901. * qla2x00_find_new_loop_id
  2902. * Scan through our port list and find a new usable loop ID.
  2903. *
  2904. * Input:
  2905. * ha: adapter state pointer.
  2906. * dev: port structure pointer.
  2907. *
  2908. * Returns:
  2909. * qla2x00 local function return status code.
  2910. *
  2911. * Context:
  2912. * Kernel context.
  2913. */
  2914. static int
  2915. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2916. {
  2917. int rval;
  2918. int found;
  2919. fc_port_t *fcport;
  2920. uint16_t first_loop_id;
  2921. struct qla_hw_data *ha = vha->hw;
  2922. struct scsi_qla_host *vp;
  2923. struct scsi_qla_host *tvp;
  2924. rval = QLA_SUCCESS;
  2925. /* Save starting loop ID. */
  2926. first_loop_id = dev->loop_id;
  2927. for (;;) {
  2928. /* Skip loop ID if already used by adapter. */
  2929. if (dev->loop_id == vha->loop_id)
  2930. dev->loop_id++;
  2931. /* Skip reserved loop IDs. */
  2932. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2933. dev->loop_id++;
  2934. /* Reset loop ID if passed the end. */
  2935. if (dev->loop_id > ha->max_loop_id) {
  2936. /* first loop ID. */
  2937. dev->loop_id = ha->min_external_loopid;
  2938. }
  2939. /* Check for loop ID being already in use. */
  2940. found = 0;
  2941. fcport = NULL;
  2942. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2943. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2944. if (fcport->loop_id == dev->loop_id &&
  2945. fcport != dev) {
  2946. /* ID possibly in use */
  2947. found++;
  2948. break;
  2949. }
  2950. }
  2951. if (found)
  2952. break;
  2953. }
  2954. /* If not in use then it is free to use. */
  2955. if (!found) {
  2956. break;
  2957. }
  2958. /* ID in use. Try next value. */
  2959. dev->loop_id++;
  2960. /* If wrap around. No free ID to use. */
  2961. if (dev->loop_id == first_loop_id) {
  2962. dev->loop_id = FC_NO_LOOP_ID;
  2963. rval = QLA_FUNCTION_FAILED;
  2964. break;
  2965. }
  2966. }
  2967. return (rval);
  2968. }
  2969. /*
  2970. * qla2x00_device_resync
  2971. * Marks devices in the database that needs resynchronization.
  2972. *
  2973. * Input:
  2974. * ha = adapter block pointer.
  2975. *
  2976. * Context:
  2977. * Kernel context.
  2978. */
  2979. static int
  2980. qla2x00_device_resync(scsi_qla_host_t *vha)
  2981. {
  2982. int rval;
  2983. uint32_t mask;
  2984. fc_port_t *fcport;
  2985. uint32_t rscn_entry;
  2986. uint8_t rscn_out_iter;
  2987. uint8_t format;
  2988. port_id_t d_id = {};
  2989. rval = QLA_RSCNS_HANDLED;
  2990. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2991. vha->flags.rscn_queue_overflow) {
  2992. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2993. format = MSB(MSW(rscn_entry));
  2994. d_id.b.domain = LSB(MSW(rscn_entry));
  2995. d_id.b.area = MSB(LSW(rscn_entry));
  2996. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2997. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2998. "[%02x/%02x%02x%02x].\n",
  2999. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  3000. d_id.b.area, d_id.b.al_pa));
  3001. vha->rscn_out_ptr++;
  3002. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  3003. vha->rscn_out_ptr = 0;
  3004. /* Skip duplicate entries. */
  3005. for (rscn_out_iter = vha->rscn_out_ptr;
  3006. !vha->flags.rscn_queue_overflow &&
  3007. rscn_out_iter != vha->rscn_in_ptr;
  3008. rscn_out_iter = (rscn_out_iter ==
  3009. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  3010. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  3011. break;
  3012. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  3013. "entry found at [%d].\n", vha->host_no,
  3014. rscn_out_iter));
  3015. vha->rscn_out_ptr = rscn_out_iter;
  3016. }
  3017. /* Queue overflow, set switch default case. */
  3018. if (vha->flags.rscn_queue_overflow) {
  3019. DEBUG(printk("scsi(%ld): device_resync: rscn "
  3020. "overflow.\n", vha->host_no));
  3021. format = 3;
  3022. vha->flags.rscn_queue_overflow = 0;
  3023. }
  3024. switch (format) {
  3025. case 0:
  3026. mask = 0xffffff;
  3027. break;
  3028. case 1:
  3029. mask = 0xffff00;
  3030. break;
  3031. case 2:
  3032. mask = 0xff0000;
  3033. break;
  3034. default:
  3035. mask = 0x0;
  3036. d_id.b24 = 0;
  3037. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3038. break;
  3039. }
  3040. rval = QLA_SUCCESS;
  3041. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3042. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3043. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3044. fcport->port_type == FCT_BROADCAST)
  3045. continue;
  3046. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3047. if (format != 3 ||
  3048. fcport->port_type != FCT_INITIATOR) {
  3049. qla2x00_mark_device_lost(vha, fcport,
  3050. 0, 0);
  3051. }
  3052. }
  3053. }
  3054. }
  3055. return (rval);
  3056. }
  3057. /*
  3058. * qla2x00_fabric_dev_login
  3059. * Login fabric target device and update FC port database.
  3060. *
  3061. * Input:
  3062. * ha: adapter state pointer.
  3063. * fcport: port structure list pointer.
  3064. * next_loopid: contains value of a new loop ID that can be used
  3065. * by the next login attempt.
  3066. *
  3067. * Returns:
  3068. * qla2x00 local function return status code.
  3069. *
  3070. * Context:
  3071. * Kernel context.
  3072. */
  3073. static int
  3074. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3075. uint16_t *next_loopid)
  3076. {
  3077. int rval;
  3078. int retry;
  3079. uint8_t opts;
  3080. struct qla_hw_data *ha = vha->hw;
  3081. rval = QLA_SUCCESS;
  3082. retry = 0;
  3083. if (IS_ALOGIO_CAPABLE(ha)) {
  3084. if (fcport->flags & FCF_ASYNC_SENT)
  3085. return rval;
  3086. fcport->flags |= FCF_ASYNC_SENT;
  3087. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3088. if (!rval)
  3089. return rval;
  3090. }
  3091. fcport->flags &= ~FCF_ASYNC_SENT;
  3092. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3093. if (rval == QLA_SUCCESS) {
  3094. /* Send an ADISC to FCP2 devices.*/
  3095. opts = 0;
  3096. if (fcport->flags & FCF_FCP2_DEVICE)
  3097. opts |= BIT_1;
  3098. rval = qla2x00_get_port_database(vha, fcport, opts);
  3099. if (rval != QLA_SUCCESS) {
  3100. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3101. fcport->d_id.b.domain, fcport->d_id.b.area,
  3102. fcport->d_id.b.al_pa);
  3103. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3104. } else {
  3105. qla2x00_update_fcport(vha, fcport);
  3106. }
  3107. }
  3108. return (rval);
  3109. }
  3110. /*
  3111. * qla2x00_fabric_login
  3112. * Issue fabric login command.
  3113. *
  3114. * Input:
  3115. * ha = adapter block pointer.
  3116. * device = pointer to FC device type structure.
  3117. *
  3118. * Returns:
  3119. * 0 - Login successfully
  3120. * 1 - Login failed
  3121. * 2 - Initiator device
  3122. * 3 - Fatal error
  3123. */
  3124. int
  3125. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3126. uint16_t *next_loopid)
  3127. {
  3128. int rval;
  3129. int retry;
  3130. uint16_t tmp_loopid;
  3131. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3132. struct qla_hw_data *ha = vha->hw;
  3133. retry = 0;
  3134. tmp_loopid = 0;
  3135. for (;;) {
  3136. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3137. "for port %02x%02x%02x.\n",
  3138. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3139. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3140. /* Login fcport on switch. */
  3141. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3142. fcport->d_id.b.domain, fcport->d_id.b.area,
  3143. fcport->d_id.b.al_pa, mb, BIT_0);
  3144. if (mb[0] == MBS_PORT_ID_USED) {
  3145. /*
  3146. * Device has another loop ID. The firmware team
  3147. * recommends the driver perform an implicit login with
  3148. * the specified ID again. The ID we just used is save
  3149. * here so we return with an ID that can be tried by
  3150. * the next login.
  3151. */
  3152. retry++;
  3153. tmp_loopid = fcport->loop_id;
  3154. fcport->loop_id = mb[1];
  3155. DEBUG(printk("Fabric Login: port in use - next "
  3156. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3157. fcport->loop_id, fcport->d_id.b.domain,
  3158. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3159. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3160. /*
  3161. * Login succeeded.
  3162. */
  3163. if (retry) {
  3164. /* A retry occurred before. */
  3165. *next_loopid = tmp_loopid;
  3166. } else {
  3167. /*
  3168. * No retry occurred before. Just increment the
  3169. * ID value for next login.
  3170. */
  3171. *next_loopid = (fcport->loop_id + 1);
  3172. }
  3173. if (mb[1] & BIT_0) {
  3174. fcport->port_type = FCT_INITIATOR;
  3175. } else {
  3176. fcport->port_type = FCT_TARGET;
  3177. if (mb[1] & BIT_1) {
  3178. fcport->flags |= FCF_FCP2_DEVICE;
  3179. }
  3180. }
  3181. if (mb[10] & BIT_0)
  3182. fcport->supported_classes |= FC_COS_CLASS2;
  3183. if (mb[10] & BIT_1)
  3184. fcport->supported_classes |= FC_COS_CLASS3;
  3185. rval = QLA_SUCCESS;
  3186. break;
  3187. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3188. /*
  3189. * Loop ID already used, try next loop ID.
  3190. */
  3191. fcport->loop_id++;
  3192. rval = qla2x00_find_new_loop_id(vha, fcport);
  3193. if (rval != QLA_SUCCESS) {
  3194. /* Ran out of loop IDs to use */
  3195. break;
  3196. }
  3197. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3198. /*
  3199. * Firmware possibly timed out during login. If NO
  3200. * retries are left to do then the device is declared
  3201. * dead.
  3202. */
  3203. *next_loopid = fcport->loop_id;
  3204. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3205. fcport->d_id.b.domain, fcport->d_id.b.area,
  3206. fcport->d_id.b.al_pa);
  3207. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3208. rval = 1;
  3209. break;
  3210. } else {
  3211. /*
  3212. * unrecoverable / not handled error
  3213. */
  3214. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3215. "loop_id=%x jiffies=%lx.\n",
  3216. __func__, vha->host_no, mb[0],
  3217. fcport->d_id.b.domain, fcport->d_id.b.area,
  3218. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3219. *next_loopid = fcport->loop_id;
  3220. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3221. fcport->d_id.b.domain, fcport->d_id.b.area,
  3222. fcport->d_id.b.al_pa);
  3223. fcport->loop_id = FC_NO_LOOP_ID;
  3224. fcport->login_retry = 0;
  3225. rval = 3;
  3226. break;
  3227. }
  3228. }
  3229. return (rval);
  3230. }
  3231. /*
  3232. * qla2x00_local_device_login
  3233. * Issue local device login command.
  3234. *
  3235. * Input:
  3236. * ha = adapter block pointer.
  3237. * loop_id = loop id of device to login to.
  3238. *
  3239. * Returns (Where's the #define!!!!):
  3240. * 0 - Login successfully
  3241. * 1 - Login failed
  3242. * 3 - Fatal error
  3243. */
  3244. int
  3245. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3246. {
  3247. int rval;
  3248. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3249. memset(mb, 0, sizeof(mb));
  3250. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3251. if (rval == QLA_SUCCESS) {
  3252. /* Interrogate mailbox registers for any errors */
  3253. if (mb[0] == MBS_COMMAND_ERROR)
  3254. rval = 1;
  3255. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3256. /* device not in PCB table */
  3257. rval = 3;
  3258. }
  3259. return (rval);
  3260. }
  3261. /*
  3262. * qla2x00_loop_resync
  3263. * Resync with fibre channel devices.
  3264. *
  3265. * Input:
  3266. * ha = adapter block pointer.
  3267. *
  3268. * Returns:
  3269. * 0 = success
  3270. */
  3271. int
  3272. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3273. {
  3274. int rval = QLA_SUCCESS;
  3275. uint32_t wait_time;
  3276. struct req_que *req;
  3277. struct rsp_que *rsp;
  3278. if (vha->hw->flags.cpu_affinity_enabled)
  3279. req = vha->hw->req_q_map[0];
  3280. else
  3281. req = vha->req;
  3282. rsp = req->rsp;
  3283. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3284. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3285. if (vha->flags.online) {
  3286. if (!(rval = qla2x00_fw_ready(vha))) {
  3287. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3288. wait_time = 256;
  3289. do {
  3290. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3291. /* Issue a marker after FW becomes ready. */
  3292. qla2x00_marker(vha, req, rsp, 0, 0,
  3293. MK_SYNC_ALL);
  3294. vha->marker_needed = 0;
  3295. /* Remap devices on Loop. */
  3296. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3297. qla2x00_configure_loop(vha);
  3298. wait_time--;
  3299. } while (!atomic_read(&vha->loop_down_timer) &&
  3300. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3301. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3302. &vha->dpc_flags)));
  3303. }
  3304. }
  3305. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3306. return (QLA_FUNCTION_FAILED);
  3307. if (rval)
  3308. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3309. return (rval);
  3310. }
  3311. void
  3312. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3313. {
  3314. fc_port_t *fcport;
  3315. struct scsi_qla_host *tvp, *vha;
  3316. /* Go with deferred removal of rport references. */
  3317. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3318. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3319. if (fcport && fcport->drport &&
  3320. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3321. qla2x00_rport_del(fcport);
  3322. }
  3323. void
  3324. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3325. {
  3326. struct qla_hw_data *ha = vha->hw;
  3327. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3328. struct scsi_qla_host *tvp;
  3329. vha->flags.online = 0;
  3330. ha->flags.chip_reset_done = 0;
  3331. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3332. ha->qla_stats.total_isp_aborts++;
  3333. qla_printk(KERN_INFO, ha,
  3334. "Performing ISP error recovery - ha= %p.\n", ha);
  3335. /* Chip reset does not apply to 82XX */
  3336. if (!IS_QLA82XX(ha))
  3337. ha->isp_ops->reset_chip(vha);
  3338. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3339. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3340. atomic_set(&vha->loop_state, LOOP_DOWN);
  3341. qla2x00_mark_all_devices_lost(vha, 0);
  3342. list_for_each_entry_safe(vp, tvp, &base_vha->hw->vp_list, list)
  3343. qla2x00_mark_all_devices_lost(vp, 0);
  3344. } else {
  3345. if (!atomic_read(&vha->loop_down_timer))
  3346. atomic_set(&vha->loop_down_timer,
  3347. LOOP_DOWN_TIME);
  3348. }
  3349. /* Make sure for ISP 82XX IO DMA is complete */
  3350. if (IS_QLA82XX(ha))
  3351. qla82xx_wait_for_pending_commands(vha);
  3352. /* Requeue all commands in outstanding command list. */
  3353. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3354. }
  3355. /*
  3356. * qla2x00_abort_isp
  3357. * Resets ISP and aborts all outstanding commands.
  3358. *
  3359. * Input:
  3360. * ha = adapter block pointer.
  3361. *
  3362. * Returns:
  3363. * 0 = success
  3364. */
  3365. int
  3366. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3367. {
  3368. int rval;
  3369. uint8_t status = 0;
  3370. struct qla_hw_data *ha = vha->hw;
  3371. struct scsi_qla_host *vp;
  3372. struct scsi_qla_host *tvp;
  3373. struct req_que *req = ha->req_q_map[0];
  3374. if (vha->flags.online) {
  3375. qla2x00_abort_isp_cleanup(vha);
  3376. if (unlikely(pci_channel_offline(ha->pdev) &&
  3377. ha->flags.pci_channel_io_perm_failure)) {
  3378. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3379. status = 0;
  3380. return status;
  3381. }
  3382. ha->isp_ops->get_flash_version(vha, req->ring);
  3383. ha->isp_ops->nvram_config(vha);
  3384. if (!qla2x00_restart_isp(vha)) {
  3385. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3386. if (!atomic_read(&vha->loop_down_timer)) {
  3387. /*
  3388. * Issue marker command only when we are going
  3389. * to start the I/O .
  3390. */
  3391. vha->marker_needed = 1;
  3392. }
  3393. vha->flags.online = 1;
  3394. ha->isp_ops->enable_intrs(ha);
  3395. ha->isp_abort_cnt = 0;
  3396. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3397. if (IS_QLA81XX(ha))
  3398. qla2x00_get_fw_version(vha,
  3399. &ha->fw_major_version,
  3400. &ha->fw_minor_version,
  3401. &ha->fw_subminor_version,
  3402. &ha->fw_attributes, &ha->fw_memory_size,
  3403. ha->mpi_version, &ha->mpi_capabilities,
  3404. ha->phy_version);
  3405. if (ha->fce) {
  3406. ha->flags.fce_enabled = 1;
  3407. memset(ha->fce, 0,
  3408. fce_calc_size(ha->fce_bufs));
  3409. rval = qla2x00_enable_fce_trace(vha,
  3410. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3411. &ha->fce_bufs);
  3412. if (rval) {
  3413. qla_printk(KERN_WARNING, ha,
  3414. "Unable to reinitialize FCE "
  3415. "(%d).\n", rval);
  3416. ha->flags.fce_enabled = 0;
  3417. }
  3418. }
  3419. if (ha->eft) {
  3420. memset(ha->eft, 0, EFT_SIZE);
  3421. rval = qla2x00_enable_eft_trace(vha,
  3422. ha->eft_dma, EFT_NUM_BUFFERS);
  3423. if (rval) {
  3424. qla_printk(KERN_WARNING, ha,
  3425. "Unable to reinitialize EFT "
  3426. "(%d).\n", rval);
  3427. }
  3428. }
  3429. } else { /* failed the ISP abort */
  3430. vha->flags.online = 1;
  3431. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3432. if (ha->isp_abort_cnt == 0) {
  3433. qla_printk(KERN_WARNING, ha,
  3434. "ISP error recovery failed - "
  3435. "board disabled\n");
  3436. /*
  3437. * The next call disables the board
  3438. * completely.
  3439. */
  3440. ha->isp_ops->reset_adapter(vha);
  3441. vha->flags.online = 0;
  3442. clear_bit(ISP_ABORT_RETRY,
  3443. &vha->dpc_flags);
  3444. status = 0;
  3445. } else { /* schedule another ISP abort */
  3446. ha->isp_abort_cnt--;
  3447. DEBUG(printk("qla%ld: ISP abort - "
  3448. "retry remaining %d\n",
  3449. vha->host_no, ha->isp_abort_cnt));
  3450. status = 1;
  3451. }
  3452. } else {
  3453. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3454. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3455. "- retrying (%d) more times\n",
  3456. vha->host_no, ha->isp_abort_cnt));
  3457. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3458. status = 1;
  3459. }
  3460. }
  3461. }
  3462. if (!status) {
  3463. DEBUG(printk(KERN_INFO
  3464. "qla2x00_abort_isp(%ld): succeeded.\n",
  3465. vha->host_no));
  3466. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3467. if (vp->vp_idx)
  3468. qla2x00_vp_abort_isp(vp);
  3469. }
  3470. } else {
  3471. qla_printk(KERN_INFO, ha,
  3472. "qla2x00_abort_isp: **** FAILED ****\n");
  3473. }
  3474. return(status);
  3475. }
  3476. /*
  3477. * qla2x00_restart_isp
  3478. * restarts the ISP after a reset
  3479. *
  3480. * Input:
  3481. * ha = adapter block pointer.
  3482. *
  3483. * Returns:
  3484. * 0 = success
  3485. */
  3486. static int
  3487. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3488. {
  3489. int status = 0;
  3490. uint32_t wait_time;
  3491. struct qla_hw_data *ha = vha->hw;
  3492. struct req_que *req = ha->req_q_map[0];
  3493. struct rsp_que *rsp = ha->rsp_q_map[0];
  3494. /* If firmware needs to be loaded */
  3495. if (qla2x00_isp_firmware(vha)) {
  3496. vha->flags.online = 0;
  3497. status = ha->isp_ops->chip_diag(vha);
  3498. if (!status)
  3499. status = qla2x00_setup_chip(vha);
  3500. }
  3501. if (!status && !(status = qla2x00_init_rings(vha))) {
  3502. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3503. ha->flags.chip_reset_done = 1;
  3504. /* Initialize the queues in use */
  3505. qla25xx_init_queues(ha);
  3506. status = qla2x00_fw_ready(vha);
  3507. if (!status) {
  3508. DEBUG(printk("%s(): Start configure loop, "
  3509. "status = %d\n", __func__, status));
  3510. /* Issue a marker after FW becomes ready. */
  3511. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3512. vha->flags.online = 1;
  3513. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3514. wait_time = 256;
  3515. do {
  3516. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3517. qla2x00_configure_loop(vha);
  3518. wait_time--;
  3519. } while (!atomic_read(&vha->loop_down_timer) &&
  3520. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3521. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3522. &vha->dpc_flags)));
  3523. }
  3524. /* if no cable then assume it's good */
  3525. if ((vha->device_flags & DFLG_NO_CABLE))
  3526. status = 0;
  3527. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3528. __func__,
  3529. status));
  3530. }
  3531. return (status);
  3532. }
  3533. static int
  3534. qla25xx_init_queues(struct qla_hw_data *ha)
  3535. {
  3536. struct rsp_que *rsp = NULL;
  3537. struct req_que *req = NULL;
  3538. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3539. int ret = -1;
  3540. int i;
  3541. for (i = 1; i < ha->max_rsp_queues; i++) {
  3542. rsp = ha->rsp_q_map[i];
  3543. if (rsp) {
  3544. rsp->options &= ~BIT_0;
  3545. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3546. if (ret != QLA_SUCCESS)
  3547. DEBUG2_17(printk(KERN_WARNING
  3548. "%s Rsp que:%d init failed\n", __func__,
  3549. rsp->id));
  3550. else
  3551. DEBUG2_17(printk(KERN_INFO
  3552. "%s Rsp que:%d inited\n", __func__,
  3553. rsp->id));
  3554. }
  3555. }
  3556. for (i = 1; i < ha->max_req_queues; i++) {
  3557. req = ha->req_q_map[i];
  3558. if (req) {
  3559. /* Clear outstanding commands array. */
  3560. req->options &= ~BIT_0;
  3561. ret = qla25xx_init_req_que(base_vha, req);
  3562. if (ret != QLA_SUCCESS)
  3563. DEBUG2_17(printk(KERN_WARNING
  3564. "%s Req que:%d init failed\n", __func__,
  3565. req->id));
  3566. else
  3567. DEBUG2_17(printk(KERN_WARNING
  3568. "%s Req que:%d inited\n", __func__,
  3569. req->id));
  3570. }
  3571. }
  3572. return ret;
  3573. }
  3574. /*
  3575. * qla2x00_reset_adapter
  3576. * Reset adapter.
  3577. *
  3578. * Input:
  3579. * ha = adapter block pointer.
  3580. */
  3581. void
  3582. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3583. {
  3584. unsigned long flags = 0;
  3585. struct qla_hw_data *ha = vha->hw;
  3586. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3587. vha->flags.online = 0;
  3588. ha->isp_ops->disable_intrs(ha);
  3589. spin_lock_irqsave(&ha->hardware_lock, flags);
  3590. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3591. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3592. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3593. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3594. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3595. }
  3596. void
  3597. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3598. {
  3599. unsigned long flags = 0;
  3600. struct qla_hw_data *ha = vha->hw;
  3601. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3602. if (IS_QLA82XX(ha))
  3603. return;
  3604. vha->flags.online = 0;
  3605. ha->isp_ops->disable_intrs(ha);
  3606. spin_lock_irqsave(&ha->hardware_lock, flags);
  3607. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3608. RD_REG_DWORD(&reg->hccr);
  3609. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3610. RD_REG_DWORD(&reg->hccr);
  3611. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3612. if (IS_NOPOLLING_TYPE(ha))
  3613. ha->isp_ops->enable_intrs(ha);
  3614. }
  3615. /* On sparc systems, obtain port and node WWN from firmware
  3616. * properties.
  3617. */
  3618. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3619. struct nvram_24xx *nv)
  3620. {
  3621. #ifdef CONFIG_SPARC
  3622. struct qla_hw_data *ha = vha->hw;
  3623. struct pci_dev *pdev = ha->pdev;
  3624. struct device_node *dp = pci_device_to_OF_node(pdev);
  3625. const u8 *val;
  3626. int len;
  3627. val = of_get_property(dp, "port-wwn", &len);
  3628. if (val && len >= WWN_SIZE)
  3629. memcpy(nv->port_name, val, WWN_SIZE);
  3630. val = of_get_property(dp, "node-wwn", &len);
  3631. if (val && len >= WWN_SIZE)
  3632. memcpy(nv->node_name, val, WWN_SIZE);
  3633. #endif
  3634. }
  3635. int
  3636. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3637. {
  3638. int rval;
  3639. struct init_cb_24xx *icb;
  3640. struct nvram_24xx *nv;
  3641. uint32_t *dptr;
  3642. uint8_t *dptr1, *dptr2;
  3643. uint32_t chksum;
  3644. uint16_t cnt;
  3645. struct qla_hw_data *ha = vha->hw;
  3646. rval = QLA_SUCCESS;
  3647. icb = (struct init_cb_24xx *)ha->init_cb;
  3648. nv = ha->nvram;
  3649. /* Determine NVRAM starting address. */
  3650. if (ha->flags.port0) {
  3651. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3652. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3653. } else {
  3654. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3655. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3656. }
  3657. ha->nvram_size = sizeof(struct nvram_24xx);
  3658. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3659. if (IS_QLA82XX(ha))
  3660. ha->vpd_size = FA_VPD_SIZE_82XX;
  3661. /* Get VPD data into cache */
  3662. ha->vpd = ha->nvram + VPD_OFFSET;
  3663. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3664. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3665. /* Get NVRAM data into cache and calculate checksum. */
  3666. dptr = (uint32_t *)nv;
  3667. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3668. ha->nvram_size);
  3669. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3670. chksum += le32_to_cpu(*dptr++);
  3671. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3672. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3673. /* Bad NVRAM data, set defaults parameters. */
  3674. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3675. || nv->id[3] != ' ' ||
  3676. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3677. /* Reset NVRAM data. */
  3678. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3679. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3680. le16_to_cpu(nv->nvram_version));
  3681. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3682. "invalid -- WWPN) defaults.\n");
  3683. /*
  3684. * Set default initialization control block.
  3685. */
  3686. memset(nv, 0, ha->nvram_size);
  3687. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3688. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3689. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3690. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3691. nv->exchange_count = __constant_cpu_to_le16(0);
  3692. nv->hard_address = __constant_cpu_to_le16(124);
  3693. nv->port_name[0] = 0x21;
  3694. nv->port_name[1] = 0x00 + ha->port_no;
  3695. nv->port_name[2] = 0x00;
  3696. nv->port_name[3] = 0xe0;
  3697. nv->port_name[4] = 0x8b;
  3698. nv->port_name[5] = 0x1c;
  3699. nv->port_name[6] = 0x55;
  3700. nv->port_name[7] = 0x86;
  3701. nv->node_name[0] = 0x20;
  3702. nv->node_name[1] = 0x00;
  3703. nv->node_name[2] = 0x00;
  3704. nv->node_name[3] = 0xe0;
  3705. nv->node_name[4] = 0x8b;
  3706. nv->node_name[5] = 0x1c;
  3707. nv->node_name[6] = 0x55;
  3708. nv->node_name[7] = 0x86;
  3709. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3710. nv->login_retry_count = __constant_cpu_to_le16(8);
  3711. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3712. nv->login_timeout = __constant_cpu_to_le16(0);
  3713. nv->firmware_options_1 =
  3714. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3715. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3716. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3717. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3718. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3719. nv->efi_parameters = __constant_cpu_to_le32(0);
  3720. nv->reset_delay = 5;
  3721. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3722. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3723. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3724. rval = 1;
  3725. }
  3726. /* Reset Initialization control block */
  3727. memset(icb, 0, ha->init_cb_size);
  3728. /* Copy 1st segment. */
  3729. dptr1 = (uint8_t *)icb;
  3730. dptr2 = (uint8_t *)&nv->version;
  3731. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3732. while (cnt--)
  3733. *dptr1++ = *dptr2++;
  3734. icb->login_retry_count = nv->login_retry_count;
  3735. icb->link_down_on_nos = nv->link_down_on_nos;
  3736. /* Copy 2nd segment. */
  3737. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3738. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3739. cnt = (uint8_t *)&icb->reserved_3 -
  3740. (uint8_t *)&icb->interrupt_delay_timer;
  3741. while (cnt--)
  3742. *dptr1++ = *dptr2++;
  3743. /*
  3744. * Setup driver NVRAM options.
  3745. */
  3746. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3747. "QLA2462");
  3748. /* Use alternate WWN? */
  3749. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3750. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3751. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3752. }
  3753. /* Prepare nodename */
  3754. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3755. /*
  3756. * Firmware will apply the following mask if the nodename was
  3757. * not provided.
  3758. */
  3759. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3760. icb->node_name[0] &= 0xF0;
  3761. }
  3762. /* Set host adapter parameters. */
  3763. ha->flags.disable_risc_code_load = 0;
  3764. ha->flags.enable_lip_reset = 0;
  3765. ha->flags.enable_lip_full_login =
  3766. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3767. ha->flags.enable_target_reset =
  3768. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3769. ha->flags.enable_led_scheme = 0;
  3770. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3771. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3772. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3773. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3774. sizeof(ha->fw_seriallink_options24));
  3775. /* save HBA serial number */
  3776. ha->serial0 = icb->port_name[5];
  3777. ha->serial1 = icb->port_name[6];
  3778. ha->serial2 = icb->port_name[7];
  3779. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3780. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3781. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3782. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3783. /* Set minimum login_timeout to 4 seconds. */
  3784. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3785. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3786. if (le16_to_cpu(nv->login_timeout) < 4)
  3787. nv->login_timeout = __constant_cpu_to_le16(4);
  3788. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3789. icb->login_timeout = nv->login_timeout;
  3790. /* Set minimum RATOV to 100 tenths of a second. */
  3791. ha->r_a_tov = 100;
  3792. ha->loop_reset_delay = nv->reset_delay;
  3793. /* Link Down Timeout = 0:
  3794. *
  3795. * When Port Down timer expires we will start returning
  3796. * I/O's to OS with "DID_NO_CONNECT".
  3797. *
  3798. * Link Down Timeout != 0:
  3799. *
  3800. * The driver waits for the link to come up after link down
  3801. * before returning I/Os to OS with "DID_NO_CONNECT".
  3802. */
  3803. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3804. ha->loop_down_abort_time =
  3805. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3806. } else {
  3807. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3808. ha->loop_down_abort_time =
  3809. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3810. }
  3811. /* Need enough time to try and get the port back. */
  3812. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3813. if (qlport_down_retry)
  3814. ha->port_down_retry_count = qlport_down_retry;
  3815. /* Set login_retry_count */
  3816. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3817. if (ha->port_down_retry_count ==
  3818. le16_to_cpu(nv->port_down_retry_count) &&
  3819. ha->port_down_retry_count > 3)
  3820. ha->login_retry_count = ha->port_down_retry_count;
  3821. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3822. ha->login_retry_count = ha->port_down_retry_count;
  3823. if (ql2xloginretrycount)
  3824. ha->login_retry_count = ql2xloginretrycount;
  3825. /* Enable ZIO. */
  3826. if (!vha->flags.init_done) {
  3827. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3828. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3829. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3830. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3831. }
  3832. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3833. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3834. vha->flags.process_response_queue = 0;
  3835. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3836. ha->zio_mode = QLA_ZIO_MODE_6;
  3837. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3838. "(%d us).\n", vha->host_no, ha->zio_mode,
  3839. ha->zio_timer * 100));
  3840. qla_printk(KERN_INFO, ha,
  3841. "ZIO mode %d enabled; timer delay (%d us).\n",
  3842. ha->zio_mode, ha->zio_timer * 100);
  3843. icb->firmware_options_2 |= cpu_to_le32(
  3844. (uint32_t)ha->zio_mode);
  3845. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3846. vha->flags.process_response_queue = 1;
  3847. }
  3848. if (rval) {
  3849. DEBUG2_3(printk(KERN_WARNING
  3850. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3851. }
  3852. return (rval);
  3853. }
  3854. static int
  3855. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3856. uint32_t faddr)
  3857. {
  3858. int rval = QLA_SUCCESS;
  3859. int segments, fragment;
  3860. uint32_t *dcode, dlen;
  3861. uint32_t risc_addr;
  3862. uint32_t risc_size;
  3863. uint32_t i;
  3864. struct qla_hw_data *ha = vha->hw;
  3865. struct req_que *req = ha->req_q_map[0];
  3866. qla_printk(KERN_INFO, ha,
  3867. "FW: Loading from flash (%x)...\n", faddr);
  3868. rval = QLA_SUCCESS;
  3869. segments = FA_RISC_CODE_SEGMENTS;
  3870. dcode = (uint32_t *)req->ring;
  3871. *srisc_addr = 0;
  3872. /* Validate firmware image by checking version. */
  3873. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3874. for (i = 0; i < 4; i++)
  3875. dcode[i] = be32_to_cpu(dcode[i]);
  3876. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3877. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3878. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3879. dcode[3] == 0)) {
  3880. qla_printk(KERN_WARNING, ha,
  3881. "Unable to verify integrity of flash firmware image!\n");
  3882. qla_printk(KERN_WARNING, ha,
  3883. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3884. dcode[1], dcode[2], dcode[3]);
  3885. return QLA_FUNCTION_FAILED;
  3886. }
  3887. while (segments && rval == QLA_SUCCESS) {
  3888. /* Read segment's load information. */
  3889. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3890. risc_addr = be32_to_cpu(dcode[2]);
  3891. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3892. risc_size = be32_to_cpu(dcode[3]);
  3893. fragment = 0;
  3894. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3895. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3896. if (dlen > risc_size)
  3897. dlen = risc_size;
  3898. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3899. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3900. vha->host_no, risc_addr, dlen, faddr));
  3901. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3902. for (i = 0; i < dlen; i++)
  3903. dcode[i] = swab32(dcode[i]);
  3904. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3905. dlen);
  3906. if (rval) {
  3907. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3908. "segment %d of firmware\n", vha->host_no,
  3909. fragment));
  3910. qla_printk(KERN_WARNING, ha,
  3911. "[ERROR] Failed to load segment %d of "
  3912. "firmware\n", fragment);
  3913. break;
  3914. }
  3915. faddr += dlen;
  3916. risc_addr += dlen;
  3917. risc_size -= dlen;
  3918. fragment++;
  3919. }
  3920. /* Next segment. */
  3921. segments--;
  3922. }
  3923. return rval;
  3924. }
  3925. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3926. int
  3927. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3928. {
  3929. int rval;
  3930. int i, fragment;
  3931. uint16_t *wcode, *fwcode;
  3932. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3933. struct fw_blob *blob;
  3934. struct qla_hw_data *ha = vha->hw;
  3935. struct req_que *req = ha->req_q_map[0];
  3936. /* Load firmware blob. */
  3937. blob = qla2x00_request_firmware(vha);
  3938. if (!blob) {
  3939. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3940. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3941. "from: " QLA_FW_URL ".\n");
  3942. return QLA_FUNCTION_FAILED;
  3943. }
  3944. rval = QLA_SUCCESS;
  3945. wcode = (uint16_t *)req->ring;
  3946. *srisc_addr = 0;
  3947. fwcode = (uint16_t *)blob->fw->data;
  3948. fwclen = 0;
  3949. /* Validate firmware image by checking version. */
  3950. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3951. qla_printk(KERN_WARNING, ha,
  3952. "Unable to verify integrity of firmware image (%Zd)!\n",
  3953. blob->fw->size);
  3954. goto fail_fw_integrity;
  3955. }
  3956. for (i = 0; i < 4; i++)
  3957. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3958. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3959. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3960. wcode[2] == 0 && wcode[3] == 0)) {
  3961. qla_printk(KERN_WARNING, ha,
  3962. "Unable to verify integrity of firmware image!\n");
  3963. qla_printk(KERN_WARNING, ha,
  3964. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3965. wcode[1], wcode[2], wcode[3]);
  3966. goto fail_fw_integrity;
  3967. }
  3968. seg = blob->segs;
  3969. while (*seg && rval == QLA_SUCCESS) {
  3970. risc_addr = *seg;
  3971. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3972. risc_size = be16_to_cpu(fwcode[3]);
  3973. /* Validate firmware image size. */
  3974. fwclen += risc_size * sizeof(uint16_t);
  3975. if (blob->fw->size < fwclen) {
  3976. qla_printk(KERN_WARNING, ha,
  3977. "Unable to verify integrity of firmware image "
  3978. "(%Zd)!\n", blob->fw->size);
  3979. goto fail_fw_integrity;
  3980. }
  3981. fragment = 0;
  3982. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3983. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3984. if (wlen > risc_size)
  3985. wlen = risc_size;
  3986. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3987. "addr %x, number of words 0x%x.\n", vha->host_no,
  3988. risc_addr, wlen));
  3989. for (i = 0; i < wlen; i++)
  3990. wcode[i] = swab16(fwcode[i]);
  3991. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3992. wlen);
  3993. if (rval) {
  3994. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3995. "segment %d of firmware\n", vha->host_no,
  3996. fragment));
  3997. qla_printk(KERN_WARNING, ha,
  3998. "[ERROR] Failed to load segment %d of "
  3999. "firmware\n", fragment);
  4000. break;
  4001. }
  4002. fwcode += wlen;
  4003. risc_addr += wlen;
  4004. risc_size -= wlen;
  4005. fragment++;
  4006. }
  4007. /* Next segment. */
  4008. seg++;
  4009. }
  4010. return rval;
  4011. fail_fw_integrity:
  4012. return QLA_FUNCTION_FAILED;
  4013. }
  4014. static int
  4015. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4016. {
  4017. int rval;
  4018. int segments, fragment;
  4019. uint32_t *dcode, dlen;
  4020. uint32_t risc_addr;
  4021. uint32_t risc_size;
  4022. uint32_t i;
  4023. struct fw_blob *blob;
  4024. uint32_t *fwcode, fwclen;
  4025. struct qla_hw_data *ha = vha->hw;
  4026. struct req_que *req = ha->req_q_map[0];
  4027. /* Load firmware blob. */
  4028. blob = qla2x00_request_firmware(vha);
  4029. if (!blob) {
  4030. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4031. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4032. "from: " QLA_FW_URL ".\n");
  4033. return QLA_FUNCTION_FAILED;
  4034. }
  4035. qla_printk(KERN_INFO, ha,
  4036. "FW: Loading via request-firmware...\n");
  4037. rval = QLA_SUCCESS;
  4038. segments = FA_RISC_CODE_SEGMENTS;
  4039. dcode = (uint32_t *)req->ring;
  4040. *srisc_addr = 0;
  4041. fwcode = (uint32_t *)blob->fw->data;
  4042. fwclen = 0;
  4043. /* Validate firmware image by checking version. */
  4044. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4045. qla_printk(KERN_WARNING, ha,
  4046. "Unable to verify integrity of firmware image (%Zd)!\n",
  4047. blob->fw->size);
  4048. goto fail_fw_integrity;
  4049. }
  4050. for (i = 0; i < 4; i++)
  4051. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4052. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4053. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4054. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4055. dcode[3] == 0)) {
  4056. qla_printk(KERN_WARNING, ha,
  4057. "Unable to verify integrity of firmware image!\n");
  4058. qla_printk(KERN_WARNING, ha,
  4059. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4060. dcode[1], dcode[2], dcode[3]);
  4061. goto fail_fw_integrity;
  4062. }
  4063. while (segments && rval == QLA_SUCCESS) {
  4064. risc_addr = be32_to_cpu(fwcode[2]);
  4065. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4066. risc_size = be32_to_cpu(fwcode[3]);
  4067. /* Validate firmware image size. */
  4068. fwclen += risc_size * sizeof(uint32_t);
  4069. if (blob->fw->size < fwclen) {
  4070. qla_printk(KERN_WARNING, ha,
  4071. "Unable to verify integrity of firmware image "
  4072. "(%Zd)!\n", blob->fw->size);
  4073. goto fail_fw_integrity;
  4074. }
  4075. fragment = 0;
  4076. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4077. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4078. if (dlen > risc_size)
  4079. dlen = risc_size;
  4080. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4081. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4082. risc_addr, dlen));
  4083. for (i = 0; i < dlen; i++)
  4084. dcode[i] = swab32(fwcode[i]);
  4085. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4086. dlen);
  4087. if (rval) {
  4088. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4089. "segment %d of firmware\n", vha->host_no,
  4090. fragment));
  4091. qla_printk(KERN_WARNING, ha,
  4092. "[ERROR] Failed to load segment %d of "
  4093. "firmware\n", fragment);
  4094. break;
  4095. }
  4096. fwcode += dlen;
  4097. risc_addr += dlen;
  4098. risc_size -= dlen;
  4099. fragment++;
  4100. }
  4101. /* Next segment. */
  4102. segments--;
  4103. }
  4104. return rval;
  4105. fail_fw_integrity:
  4106. return QLA_FUNCTION_FAILED;
  4107. }
  4108. int
  4109. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4110. {
  4111. int rval;
  4112. if (ql2xfwloadbin == 1)
  4113. return qla81xx_load_risc(vha, srisc_addr);
  4114. /*
  4115. * FW Load priority:
  4116. * 1) Firmware via request-firmware interface (.bin file).
  4117. * 2) Firmware residing in flash.
  4118. */
  4119. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4120. if (rval == QLA_SUCCESS)
  4121. return rval;
  4122. return qla24xx_load_risc_flash(vha, srisc_addr,
  4123. vha->hw->flt_region_fw);
  4124. }
  4125. int
  4126. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4127. {
  4128. int rval;
  4129. struct qla_hw_data *ha = vha->hw;
  4130. if (ql2xfwloadbin == 2)
  4131. goto try_blob_fw;
  4132. /*
  4133. * FW Load priority:
  4134. * 1) Firmware residing in flash.
  4135. * 2) Firmware via request-firmware interface (.bin file).
  4136. * 3) Golden-Firmware residing in flash -- limited operation.
  4137. */
  4138. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4139. if (rval == QLA_SUCCESS)
  4140. return rval;
  4141. try_blob_fw:
  4142. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4143. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4144. return rval;
  4145. qla_printk(KERN_ERR, ha,
  4146. "FW: Attempting to fallback to golden firmware...\n");
  4147. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4148. if (rval != QLA_SUCCESS)
  4149. return rval;
  4150. qla_printk(KERN_ERR, ha,
  4151. "FW: Please update operational firmware...\n");
  4152. ha->flags.running_gold_fw = 1;
  4153. return rval;
  4154. }
  4155. void
  4156. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4157. {
  4158. int ret, retries;
  4159. struct qla_hw_data *ha = vha->hw;
  4160. if (ha->flags.pci_channel_io_perm_failure)
  4161. return;
  4162. if (!IS_FWI2_CAPABLE(ha))
  4163. return;
  4164. if (!ha->fw_major_version)
  4165. return;
  4166. ret = qla2x00_stop_firmware(vha);
  4167. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4168. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4169. ha->isp_ops->reset_chip(vha);
  4170. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4171. continue;
  4172. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4173. continue;
  4174. qla_printk(KERN_INFO, ha,
  4175. "Attempting retry of stop-firmware command...\n");
  4176. ret = qla2x00_stop_firmware(vha);
  4177. }
  4178. }
  4179. int
  4180. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4181. {
  4182. int rval = QLA_SUCCESS;
  4183. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4184. struct qla_hw_data *ha = vha->hw;
  4185. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4186. struct req_que *req;
  4187. struct rsp_que *rsp;
  4188. if (!vha->vp_idx)
  4189. return -EINVAL;
  4190. rval = qla2x00_fw_ready(base_vha);
  4191. if (ha->flags.cpu_affinity_enabled)
  4192. req = ha->req_q_map[0];
  4193. else
  4194. req = vha->req;
  4195. rsp = req->rsp;
  4196. if (rval == QLA_SUCCESS) {
  4197. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4198. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4199. }
  4200. vha->flags.management_server_logged_in = 0;
  4201. /* Login to SNS first */
  4202. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4203. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4204. DEBUG15(qla_printk(KERN_INFO, ha,
  4205. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4206. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4207. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4208. return (QLA_FUNCTION_FAILED);
  4209. }
  4210. atomic_set(&vha->loop_down_timer, 0);
  4211. atomic_set(&vha->loop_state, LOOP_UP);
  4212. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4213. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4214. rval = qla2x00_loop_resync(base_vha);
  4215. return rval;
  4216. }
  4217. /* 84XX Support **************************************************************/
  4218. static LIST_HEAD(qla_cs84xx_list);
  4219. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4220. static struct qla_chip_state_84xx *
  4221. qla84xx_get_chip(struct scsi_qla_host *vha)
  4222. {
  4223. struct qla_chip_state_84xx *cs84xx;
  4224. struct qla_hw_data *ha = vha->hw;
  4225. mutex_lock(&qla_cs84xx_mutex);
  4226. /* Find any shared 84xx chip. */
  4227. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4228. if (cs84xx->bus == ha->pdev->bus) {
  4229. kref_get(&cs84xx->kref);
  4230. goto done;
  4231. }
  4232. }
  4233. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4234. if (!cs84xx)
  4235. goto done;
  4236. kref_init(&cs84xx->kref);
  4237. spin_lock_init(&cs84xx->access_lock);
  4238. mutex_init(&cs84xx->fw_update_mutex);
  4239. cs84xx->bus = ha->pdev->bus;
  4240. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4241. done:
  4242. mutex_unlock(&qla_cs84xx_mutex);
  4243. return cs84xx;
  4244. }
  4245. static void
  4246. __qla84xx_chip_release(struct kref *kref)
  4247. {
  4248. struct qla_chip_state_84xx *cs84xx =
  4249. container_of(kref, struct qla_chip_state_84xx, kref);
  4250. mutex_lock(&qla_cs84xx_mutex);
  4251. list_del(&cs84xx->list);
  4252. mutex_unlock(&qla_cs84xx_mutex);
  4253. kfree(cs84xx);
  4254. }
  4255. void
  4256. qla84xx_put_chip(struct scsi_qla_host *vha)
  4257. {
  4258. struct qla_hw_data *ha = vha->hw;
  4259. if (ha->cs84xx)
  4260. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4261. }
  4262. static int
  4263. qla84xx_init_chip(scsi_qla_host_t *vha)
  4264. {
  4265. int rval;
  4266. uint16_t status[2];
  4267. struct qla_hw_data *ha = vha->hw;
  4268. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4269. rval = qla84xx_verify_chip(vha, status);
  4270. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4271. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4272. QLA_SUCCESS;
  4273. }
  4274. /* 81XX Support **************************************************************/
  4275. int
  4276. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4277. {
  4278. int rval;
  4279. struct init_cb_81xx *icb;
  4280. struct nvram_81xx *nv;
  4281. uint32_t *dptr;
  4282. uint8_t *dptr1, *dptr2;
  4283. uint32_t chksum;
  4284. uint16_t cnt;
  4285. struct qla_hw_data *ha = vha->hw;
  4286. rval = QLA_SUCCESS;
  4287. icb = (struct init_cb_81xx *)ha->init_cb;
  4288. nv = ha->nvram;
  4289. /* Determine NVRAM starting address. */
  4290. ha->nvram_size = sizeof(struct nvram_81xx);
  4291. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4292. /* Get VPD data into cache */
  4293. ha->vpd = ha->nvram + VPD_OFFSET;
  4294. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4295. ha->vpd_size);
  4296. /* Get NVRAM data into cache and calculate checksum. */
  4297. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4298. ha->nvram_size);
  4299. dptr = (uint32_t *)nv;
  4300. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4301. chksum += le32_to_cpu(*dptr++);
  4302. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4303. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4304. /* Bad NVRAM data, set defaults parameters. */
  4305. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4306. || nv->id[3] != ' ' ||
  4307. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4308. /* Reset NVRAM data. */
  4309. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4310. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4311. le16_to_cpu(nv->nvram_version));
  4312. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4313. "invalid -- WWPN) defaults.\n");
  4314. /*
  4315. * Set default initialization control block.
  4316. */
  4317. memset(nv, 0, ha->nvram_size);
  4318. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4319. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4320. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4321. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4322. nv->exchange_count = __constant_cpu_to_le16(0);
  4323. nv->port_name[0] = 0x21;
  4324. nv->port_name[1] = 0x00 + ha->port_no;
  4325. nv->port_name[2] = 0x00;
  4326. nv->port_name[3] = 0xe0;
  4327. nv->port_name[4] = 0x8b;
  4328. nv->port_name[5] = 0x1c;
  4329. nv->port_name[6] = 0x55;
  4330. nv->port_name[7] = 0x86;
  4331. nv->node_name[0] = 0x20;
  4332. nv->node_name[1] = 0x00;
  4333. nv->node_name[2] = 0x00;
  4334. nv->node_name[3] = 0xe0;
  4335. nv->node_name[4] = 0x8b;
  4336. nv->node_name[5] = 0x1c;
  4337. nv->node_name[6] = 0x55;
  4338. nv->node_name[7] = 0x86;
  4339. nv->login_retry_count = __constant_cpu_to_le16(8);
  4340. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4341. nv->login_timeout = __constant_cpu_to_le16(0);
  4342. nv->firmware_options_1 =
  4343. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4344. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4345. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4346. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4347. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4348. nv->efi_parameters = __constant_cpu_to_le32(0);
  4349. nv->reset_delay = 5;
  4350. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4351. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4352. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4353. nv->enode_mac[0] = 0x00;
  4354. nv->enode_mac[1] = 0x02;
  4355. nv->enode_mac[2] = 0x03;
  4356. nv->enode_mac[3] = 0x04;
  4357. nv->enode_mac[4] = 0x05;
  4358. nv->enode_mac[5] = 0x06 + ha->port_no;
  4359. rval = 1;
  4360. }
  4361. /* Reset Initialization control block */
  4362. memset(icb, 0, sizeof(struct init_cb_81xx));
  4363. /* Copy 1st segment. */
  4364. dptr1 = (uint8_t *)icb;
  4365. dptr2 = (uint8_t *)&nv->version;
  4366. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4367. while (cnt--)
  4368. *dptr1++ = *dptr2++;
  4369. icb->login_retry_count = nv->login_retry_count;
  4370. /* Copy 2nd segment. */
  4371. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4372. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4373. cnt = (uint8_t *)&icb->reserved_5 -
  4374. (uint8_t *)&icb->interrupt_delay_timer;
  4375. while (cnt--)
  4376. *dptr1++ = *dptr2++;
  4377. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4378. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4379. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4380. icb->enode_mac[0] = 0x01;
  4381. icb->enode_mac[1] = 0x02;
  4382. icb->enode_mac[2] = 0x03;
  4383. icb->enode_mac[3] = 0x04;
  4384. icb->enode_mac[4] = 0x05;
  4385. icb->enode_mac[5] = 0x06 + ha->port_no;
  4386. }
  4387. /* Use extended-initialization control block. */
  4388. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4389. /*
  4390. * Setup driver NVRAM options.
  4391. */
  4392. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4393. "QLE8XXX");
  4394. /* Use alternate WWN? */
  4395. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4396. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4397. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4398. }
  4399. /* Prepare nodename */
  4400. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4401. /*
  4402. * Firmware will apply the following mask if the nodename was
  4403. * not provided.
  4404. */
  4405. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4406. icb->node_name[0] &= 0xF0;
  4407. }
  4408. /* Set host adapter parameters. */
  4409. ha->flags.disable_risc_code_load = 0;
  4410. ha->flags.enable_lip_reset = 0;
  4411. ha->flags.enable_lip_full_login =
  4412. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4413. ha->flags.enable_target_reset =
  4414. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4415. ha->flags.enable_led_scheme = 0;
  4416. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4417. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4418. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4419. /* save HBA serial number */
  4420. ha->serial0 = icb->port_name[5];
  4421. ha->serial1 = icb->port_name[6];
  4422. ha->serial2 = icb->port_name[7];
  4423. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4424. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4425. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4426. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4427. /* Set minimum login_timeout to 4 seconds. */
  4428. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4429. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4430. if (le16_to_cpu(nv->login_timeout) < 4)
  4431. nv->login_timeout = __constant_cpu_to_le16(4);
  4432. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4433. icb->login_timeout = nv->login_timeout;
  4434. /* Set minimum RATOV to 100 tenths of a second. */
  4435. ha->r_a_tov = 100;
  4436. ha->loop_reset_delay = nv->reset_delay;
  4437. /* Link Down Timeout = 0:
  4438. *
  4439. * When Port Down timer expires we will start returning
  4440. * I/O's to OS with "DID_NO_CONNECT".
  4441. *
  4442. * Link Down Timeout != 0:
  4443. *
  4444. * The driver waits for the link to come up after link down
  4445. * before returning I/Os to OS with "DID_NO_CONNECT".
  4446. */
  4447. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4448. ha->loop_down_abort_time =
  4449. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4450. } else {
  4451. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4452. ha->loop_down_abort_time =
  4453. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4454. }
  4455. /* Need enough time to try and get the port back. */
  4456. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4457. if (qlport_down_retry)
  4458. ha->port_down_retry_count = qlport_down_retry;
  4459. /* Set login_retry_count */
  4460. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4461. if (ha->port_down_retry_count ==
  4462. le16_to_cpu(nv->port_down_retry_count) &&
  4463. ha->port_down_retry_count > 3)
  4464. ha->login_retry_count = ha->port_down_retry_count;
  4465. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4466. ha->login_retry_count = ha->port_down_retry_count;
  4467. if (ql2xloginretrycount)
  4468. ha->login_retry_count = ql2xloginretrycount;
  4469. /* Enable ZIO. */
  4470. if (!vha->flags.init_done) {
  4471. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4472. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4473. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4474. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4475. }
  4476. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4477. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4478. vha->flags.process_response_queue = 0;
  4479. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4480. ha->zio_mode = QLA_ZIO_MODE_6;
  4481. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4482. "(%d us).\n", vha->host_no, ha->zio_mode,
  4483. ha->zio_timer * 100));
  4484. qla_printk(KERN_INFO, ha,
  4485. "ZIO mode %d enabled; timer delay (%d us).\n",
  4486. ha->zio_mode, ha->zio_timer * 100);
  4487. icb->firmware_options_2 |= cpu_to_le32(
  4488. (uint32_t)ha->zio_mode);
  4489. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4490. vha->flags.process_response_queue = 1;
  4491. }
  4492. if (rval) {
  4493. DEBUG2_3(printk(KERN_WARNING
  4494. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4495. }
  4496. return (rval);
  4497. }
  4498. int
  4499. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4500. {
  4501. int status, rval;
  4502. uint32_t wait_time;
  4503. struct qla_hw_data *ha = vha->hw;
  4504. struct req_que *req = ha->req_q_map[0];
  4505. struct rsp_que *rsp = ha->rsp_q_map[0];
  4506. struct scsi_qla_host *vp;
  4507. struct scsi_qla_host *tvp;
  4508. status = qla2x00_init_rings(vha);
  4509. if (!status) {
  4510. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4511. ha->flags.chip_reset_done = 1;
  4512. status = qla2x00_fw_ready(vha);
  4513. if (!status) {
  4514. qla_printk(KERN_INFO, ha,
  4515. "%s(): Start configure loop, "
  4516. "status = %d\n", __func__, status);
  4517. /* Issue a marker after FW becomes ready. */
  4518. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4519. vha->flags.online = 1;
  4520. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4521. wait_time = 256;
  4522. do {
  4523. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4524. qla2x00_configure_loop(vha);
  4525. wait_time--;
  4526. } while (!atomic_read(&vha->loop_down_timer) &&
  4527. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4528. wait_time &&
  4529. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4530. }
  4531. /* if no cable then assume it's good */
  4532. if ((vha->device_flags & DFLG_NO_CABLE))
  4533. status = 0;
  4534. qla_printk(KERN_INFO, ha,
  4535. "%s(): Configure loop done, status = 0x%x\n",
  4536. __func__, status);
  4537. }
  4538. if (!status) {
  4539. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4540. if (!atomic_read(&vha->loop_down_timer)) {
  4541. /*
  4542. * Issue marker command only when we are going
  4543. * to start the I/O .
  4544. */
  4545. vha->marker_needed = 1;
  4546. }
  4547. vha->flags.online = 1;
  4548. ha->isp_ops->enable_intrs(ha);
  4549. ha->isp_abort_cnt = 0;
  4550. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4551. if (ha->fce) {
  4552. ha->flags.fce_enabled = 1;
  4553. memset(ha->fce, 0,
  4554. fce_calc_size(ha->fce_bufs));
  4555. rval = qla2x00_enable_fce_trace(vha,
  4556. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4557. &ha->fce_bufs);
  4558. if (rval) {
  4559. qla_printk(KERN_WARNING, ha,
  4560. "Unable to reinitialize FCE "
  4561. "(%d).\n", rval);
  4562. ha->flags.fce_enabled = 0;
  4563. }
  4564. }
  4565. if (ha->eft) {
  4566. memset(ha->eft, 0, EFT_SIZE);
  4567. rval = qla2x00_enable_eft_trace(vha,
  4568. ha->eft_dma, EFT_NUM_BUFFERS);
  4569. if (rval) {
  4570. qla_printk(KERN_WARNING, ha,
  4571. "Unable to reinitialize EFT "
  4572. "(%d).\n", rval);
  4573. }
  4574. }
  4575. }
  4576. if (!status) {
  4577. DEBUG(printk(KERN_INFO
  4578. "qla82xx_restart_isp(%ld): succeeded.\n",
  4579. vha->host_no));
  4580. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  4581. if (vp->vp_idx)
  4582. qla2x00_vp_abort_isp(vp);
  4583. }
  4584. } else {
  4585. qla_printk(KERN_INFO, ha,
  4586. "qla82xx_restart_isp: **** FAILED ****\n");
  4587. }
  4588. return status;
  4589. }
  4590. void
  4591. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4592. {
  4593. struct qla_hw_data *ha = vha->hw;
  4594. if (!ql2xetsenable)
  4595. return;
  4596. /* Enable ETS Burst. */
  4597. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4598. ha->fw_options[2] |= BIT_9;
  4599. qla2x00_set_fw_options(vha, ha->fw_options);
  4600. }
  4601. /*
  4602. * qla24xx_get_fcp_prio
  4603. * Gets the fcp cmd priority value for the logged in port.
  4604. * Looks for a match of the port descriptors within
  4605. * each of the fcp prio config entries. If a match is found,
  4606. * the tag (priority) value is returned.
  4607. *
  4608. * Input:
  4609. * ha = adapter block po
  4610. * fcport = port structure pointer.
  4611. *
  4612. * Return:
  4613. * non-zero (if found)
  4614. * 0 (if not found)
  4615. *
  4616. * Context:
  4617. * Kernel context
  4618. */
  4619. uint8_t
  4620. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4621. {
  4622. int i, entries;
  4623. uint8_t pid_match, wwn_match;
  4624. uint8_t priority;
  4625. uint32_t pid1, pid2;
  4626. uint64_t wwn1, wwn2;
  4627. struct qla_fcp_prio_entry *pri_entry;
  4628. struct qla_hw_data *ha = vha->hw;
  4629. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4630. return 0;
  4631. priority = 0;
  4632. entries = ha->fcp_prio_cfg->num_entries;
  4633. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4634. for (i = 0; i < entries; i++) {
  4635. pid_match = wwn_match = 0;
  4636. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4637. pri_entry++;
  4638. continue;
  4639. }
  4640. /* check source pid for a match */
  4641. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4642. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4643. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4644. if (pid1 == INVALID_PORT_ID)
  4645. pid_match++;
  4646. else if (pid1 == pid2)
  4647. pid_match++;
  4648. }
  4649. /* check destination pid for a match */
  4650. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4651. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4652. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4653. if (pid1 == INVALID_PORT_ID)
  4654. pid_match++;
  4655. else if (pid1 == pid2)
  4656. pid_match++;
  4657. }
  4658. /* check source WWN for a match */
  4659. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4660. wwn1 = wwn_to_u64(vha->port_name);
  4661. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4662. if (wwn2 == (uint64_t)-1)
  4663. wwn_match++;
  4664. else if (wwn1 == wwn2)
  4665. wwn_match++;
  4666. }
  4667. /* check destination WWN for a match */
  4668. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4669. wwn1 = wwn_to_u64(fcport->port_name);
  4670. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4671. if (wwn2 == (uint64_t)-1)
  4672. wwn_match++;
  4673. else if (wwn1 == wwn2)
  4674. wwn_match++;
  4675. }
  4676. if (pid_match == 2 || wwn_match == 2) {
  4677. /* Found a matching entry */
  4678. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4679. priority = pri_entry->tag;
  4680. break;
  4681. }
  4682. pri_entry++;
  4683. }
  4684. return priority;
  4685. }
  4686. /*
  4687. * qla24xx_update_fcport_fcp_prio
  4688. * Activates fcp priority for the logged in fc port
  4689. *
  4690. * Input:
  4691. * ha = adapter block pointer.
  4692. * fcp = port structure pointer.
  4693. *
  4694. * Return:
  4695. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4696. *
  4697. * Context:
  4698. * Kernel context.
  4699. */
  4700. int
  4701. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4702. {
  4703. int ret;
  4704. uint8_t priority;
  4705. uint16_t mb[5];
  4706. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4707. fcport->port_type != FCT_TARGET ||
  4708. fcport->loop_id == FC_NO_LOOP_ID)
  4709. return QLA_FUNCTION_FAILED;
  4710. priority = qla24xx_get_fcp_prio(ha, fcport);
  4711. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4712. if (ret == QLA_SUCCESS)
  4713. fcport->fcp_prio = priority;
  4714. else
  4715. DEBUG2(printk(KERN_WARNING
  4716. "scsi(%ld): Unable to activate fcp priority, "
  4717. " ret=0x%x\n", ha->host_no, ret));
  4718. return ret;
  4719. }
  4720. /*
  4721. * qla24xx_update_all_fcp_prio
  4722. * Activates fcp priority for all the logged in ports
  4723. *
  4724. * Input:
  4725. * ha = adapter block pointer.
  4726. *
  4727. * Return:
  4728. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4729. *
  4730. * Context:
  4731. * Kernel context.
  4732. */
  4733. int
  4734. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4735. {
  4736. int ret;
  4737. fc_port_t *fcport;
  4738. ret = QLA_FUNCTION_FAILED;
  4739. /* We need to set priority for all logged in ports */
  4740. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4741. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4742. return ret;
  4743. }