lpfc_sli.c 83 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2006 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. struct lpfc_iocbq *
  62. lpfc_sli_get_iocbq(struct lpfc_hba * phba)
  63. {
  64. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  65. struct lpfc_iocbq * iocbq = NULL;
  66. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  67. return iocbq;
  68. }
  69. void
  70. lpfc_sli_release_iocbq(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  71. {
  72. size_t start_clean = (size_t)(&((struct lpfc_iocbq *)NULL)->iocb);
  73. /*
  74. * Clean all volatile data fields, preserve iotag and node struct.
  75. */
  76. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  77. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  78. }
  79. /*
  80. * Translate the iocb command to an iocb command type used to decide the final
  81. * disposition of each completed IOCB.
  82. */
  83. static lpfc_iocb_type
  84. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  85. {
  86. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  87. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  88. return 0;
  89. switch (iocb_cmnd) {
  90. case CMD_XMIT_SEQUENCE_CR:
  91. case CMD_XMIT_SEQUENCE_CX:
  92. case CMD_XMIT_BCAST_CN:
  93. case CMD_XMIT_BCAST_CX:
  94. case CMD_ELS_REQUEST_CR:
  95. case CMD_ELS_REQUEST_CX:
  96. case CMD_CREATE_XRI_CR:
  97. case CMD_CREATE_XRI_CX:
  98. case CMD_GET_RPI_CN:
  99. case CMD_XMIT_ELS_RSP_CX:
  100. case CMD_GET_RPI_CR:
  101. case CMD_FCP_IWRITE_CR:
  102. case CMD_FCP_IWRITE_CX:
  103. case CMD_FCP_IREAD_CR:
  104. case CMD_FCP_IREAD_CX:
  105. case CMD_FCP_ICMND_CR:
  106. case CMD_FCP_ICMND_CX:
  107. case CMD_FCP_TSEND_CX:
  108. case CMD_FCP_TRSP_CX:
  109. case CMD_FCP_TRECEIVE_CX:
  110. case CMD_FCP_AUTO_TRSP_CX:
  111. case CMD_ADAPTER_MSG:
  112. case CMD_ADAPTER_DUMP:
  113. case CMD_XMIT_SEQUENCE64_CR:
  114. case CMD_XMIT_SEQUENCE64_CX:
  115. case CMD_XMIT_BCAST64_CN:
  116. case CMD_XMIT_BCAST64_CX:
  117. case CMD_ELS_REQUEST64_CR:
  118. case CMD_ELS_REQUEST64_CX:
  119. case CMD_FCP_IWRITE64_CR:
  120. case CMD_FCP_IWRITE64_CX:
  121. case CMD_FCP_IREAD64_CR:
  122. case CMD_FCP_IREAD64_CX:
  123. case CMD_FCP_ICMND64_CR:
  124. case CMD_FCP_ICMND64_CX:
  125. case CMD_FCP_TSEND64_CX:
  126. case CMD_FCP_TRSP64_CX:
  127. case CMD_FCP_TRECEIVE64_CX:
  128. case CMD_GEN_REQUEST64_CR:
  129. case CMD_GEN_REQUEST64_CX:
  130. case CMD_XMIT_ELS_RSP64_CX:
  131. type = LPFC_SOL_IOCB;
  132. break;
  133. case CMD_ABORT_XRI_CN:
  134. case CMD_ABORT_XRI_CX:
  135. case CMD_CLOSE_XRI_CN:
  136. case CMD_CLOSE_XRI_CX:
  137. case CMD_XRI_ABORTED_CX:
  138. case CMD_ABORT_MXRI64_CN:
  139. type = LPFC_ABORT_IOCB;
  140. break;
  141. case CMD_RCV_SEQUENCE_CX:
  142. case CMD_RCV_ELS_REQ_CX:
  143. case CMD_RCV_SEQUENCE64_CX:
  144. case CMD_RCV_ELS_REQ64_CX:
  145. type = LPFC_UNSOL_IOCB;
  146. break;
  147. default:
  148. type = LPFC_UNKNOWN_IOCB;
  149. break;
  150. }
  151. return type;
  152. }
  153. static int
  154. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  155. {
  156. struct lpfc_sli *psli = &phba->sli;
  157. MAILBOX_t *pmbox = &pmb->mb;
  158. int i, rc;
  159. for (i = 0; i < psli->num_rings; i++) {
  160. phba->hba_state = LPFC_INIT_MBX_CMDS;
  161. lpfc_config_ring(phba, i, pmb);
  162. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  163. if (rc != MBX_SUCCESS) {
  164. lpfc_printf_log(phba,
  165. KERN_ERR,
  166. LOG_INIT,
  167. "%d:0446 Adapter failed to init, "
  168. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  169. "ring %d\n",
  170. phba->brd_no,
  171. pmbox->mbxCommand,
  172. pmbox->mbxStatus,
  173. i);
  174. phba->hba_state = LPFC_HBA_ERROR;
  175. return -ENXIO;
  176. }
  177. }
  178. return 0;
  179. }
  180. static int
  181. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  182. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  183. {
  184. list_add_tail(&piocb->list, &pring->txcmplq);
  185. pring->txcmplq_cnt++;
  186. if (unlikely(pring->ringno == LPFC_ELS_RING))
  187. mod_timer(&phba->els_tmofunc,
  188. jiffies + HZ * (phba->fc_ratov << 1));
  189. return (0);
  190. }
  191. static struct lpfc_iocbq *
  192. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  193. {
  194. struct list_head *dlp;
  195. struct lpfc_iocbq *cmd_iocb;
  196. dlp = &pring->txq;
  197. cmd_iocb = NULL;
  198. list_remove_head((&pring->txq), cmd_iocb,
  199. struct lpfc_iocbq,
  200. list);
  201. if (cmd_iocb) {
  202. /* If the first ptr is not equal to the list header,
  203. * deque the IOCBQ_t and return it.
  204. */
  205. pring->txq_cnt--;
  206. }
  207. return (cmd_iocb);
  208. }
  209. static IOCB_t *
  210. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  211. {
  212. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  213. uint32_t max_cmd_idx = pring->numCiocb;
  214. IOCB_t *iocb = NULL;
  215. if ((pring->next_cmdidx == pring->cmdidx) &&
  216. (++pring->next_cmdidx >= max_cmd_idx))
  217. pring->next_cmdidx = 0;
  218. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  219. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  220. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  221. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  222. "%d:0315 Ring %d issue: portCmdGet %d "
  223. "is bigger then cmd ring %d\n",
  224. phba->brd_no, pring->ringno,
  225. pring->local_getidx, max_cmd_idx);
  226. phba->hba_state = LPFC_HBA_ERROR;
  227. /*
  228. * All error attention handlers are posted to
  229. * worker thread
  230. */
  231. phba->work_ha |= HA_ERATT;
  232. phba->work_hs = HS_FFER3;
  233. if (phba->work_wait)
  234. wake_up(phba->work_wait);
  235. return NULL;
  236. }
  237. if (pring->local_getidx == pring->next_cmdidx)
  238. return NULL;
  239. }
  240. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  241. return iocb;
  242. }
  243. uint16_t
  244. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_iocbq * iocbq)
  245. {
  246. struct lpfc_iocbq ** new_arr;
  247. struct lpfc_iocbq ** old_arr;
  248. size_t new_len;
  249. struct lpfc_sli *psli = &phba->sli;
  250. uint16_t iotag;
  251. spin_lock_irq(phba->host->host_lock);
  252. iotag = psli->last_iotag;
  253. if(++iotag < psli->iocbq_lookup_len) {
  254. psli->last_iotag = iotag;
  255. psli->iocbq_lookup[iotag] = iocbq;
  256. spin_unlock_irq(phba->host->host_lock);
  257. iocbq->iotag = iotag;
  258. return iotag;
  259. }
  260. else if (psli->iocbq_lookup_len < (0xffff
  261. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  262. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  263. spin_unlock_irq(phba->host->host_lock);
  264. new_arr = kmalloc(new_len * sizeof (struct lpfc_iocbq *),
  265. GFP_KERNEL);
  266. if (new_arr) {
  267. memset((char *)new_arr, 0,
  268. new_len * sizeof (struct lpfc_iocbq *));
  269. spin_lock_irq(phba->host->host_lock);
  270. old_arr = psli->iocbq_lookup;
  271. if (new_len <= psli->iocbq_lookup_len) {
  272. /* highly unprobable case */
  273. kfree(new_arr);
  274. iotag = psli->last_iotag;
  275. if(++iotag < psli->iocbq_lookup_len) {
  276. psli->last_iotag = iotag;
  277. psli->iocbq_lookup[iotag] = iocbq;
  278. spin_unlock_irq(phba->host->host_lock);
  279. iocbq->iotag = iotag;
  280. return iotag;
  281. }
  282. spin_unlock_irq(phba->host->host_lock);
  283. return 0;
  284. }
  285. if (psli->iocbq_lookup)
  286. memcpy(new_arr, old_arr,
  287. ((psli->last_iotag + 1) *
  288. sizeof (struct lpfc_iocbq *)));
  289. psli->iocbq_lookup = new_arr;
  290. psli->iocbq_lookup_len = new_len;
  291. psli->last_iotag = iotag;
  292. psli->iocbq_lookup[iotag] = iocbq;
  293. spin_unlock_irq(phba->host->host_lock);
  294. iocbq->iotag = iotag;
  295. kfree(old_arr);
  296. return iotag;
  297. }
  298. } else
  299. spin_unlock_irq(phba->host->host_lock);
  300. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  301. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  302. phba->brd_no, psli->last_iotag);
  303. return 0;
  304. }
  305. static void
  306. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  307. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  308. {
  309. /*
  310. * Set up an iotag
  311. */
  312. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  313. /*
  314. * Issue iocb command to adapter
  315. */
  316. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  317. wmb();
  318. pring->stats.iocb_cmd++;
  319. /*
  320. * If there is no completion routine to call, we can release the
  321. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  322. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  323. */
  324. if (nextiocb->iocb_cmpl)
  325. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  326. else
  327. lpfc_sli_release_iocbq(phba, nextiocb);
  328. /*
  329. * Let the HBA know what IOCB slot will be the next one the
  330. * driver will put a command into.
  331. */
  332. pring->cmdidx = pring->next_cmdidx;
  333. writel(pring->cmdidx, phba->MBslimaddr
  334. + (SLIMOFF + (pring->ringno * 2)) * 4);
  335. }
  336. static void
  337. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  338. struct lpfc_sli_ring *pring)
  339. {
  340. int ringno = pring->ringno;
  341. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  342. wmb();
  343. /*
  344. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  345. * The HBA will tell us when an IOCB entry is available.
  346. */
  347. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  348. readl(phba->CAregaddr); /* flush */
  349. pring->stats.iocb_cmd_full++;
  350. }
  351. static void
  352. lpfc_sli_update_ring(struct lpfc_hba * phba,
  353. struct lpfc_sli_ring *pring)
  354. {
  355. int ringno = pring->ringno;
  356. /*
  357. * Tell the HBA that there is work to do in this ring.
  358. */
  359. wmb();
  360. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  361. readl(phba->CAregaddr); /* flush */
  362. }
  363. static void
  364. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  365. {
  366. IOCB_t *iocb;
  367. struct lpfc_iocbq *nextiocb;
  368. /*
  369. * Check to see if:
  370. * (a) there is anything on the txq to send
  371. * (b) link is up
  372. * (c) link attention events can be processed (fcp ring only)
  373. * (d) IOCB processing is not blocked by the outstanding mbox command.
  374. */
  375. if (pring->txq_cnt &&
  376. (phba->hba_state > LPFC_LINK_DOWN) &&
  377. (pring->ringno != phba->sli.fcp_ring ||
  378. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  379. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  380. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  381. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  382. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  383. if (iocb)
  384. lpfc_sli_update_ring(phba, pring);
  385. else
  386. lpfc_sli_update_full_ring(phba, pring);
  387. }
  388. return;
  389. }
  390. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  391. static void
  392. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  393. {
  394. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  395. /* If the ring is active, flag it */
  396. if (phba->sli.ring[ringno].cmdringaddr) {
  397. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  398. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  399. /*
  400. * Force update of the local copy of cmdGetInx
  401. */
  402. phba->sli.ring[ringno].local_getidx
  403. = le32_to_cpu(pgp->cmdGetInx);
  404. spin_lock_irq(phba->host->host_lock);
  405. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  406. spin_unlock_irq(phba->host->host_lock);
  407. }
  408. }
  409. }
  410. static int
  411. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  412. {
  413. uint8_t ret;
  414. switch (mbxCommand) {
  415. case MBX_LOAD_SM:
  416. case MBX_READ_NV:
  417. case MBX_WRITE_NV:
  418. case MBX_RUN_BIU_DIAG:
  419. case MBX_INIT_LINK:
  420. case MBX_DOWN_LINK:
  421. case MBX_CONFIG_LINK:
  422. case MBX_CONFIG_RING:
  423. case MBX_RESET_RING:
  424. case MBX_READ_CONFIG:
  425. case MBX_READ_RCONFIG:
  426. case MBX_READ_SPARM:
  427. case MBX_READ_STATUS:
  428. case MBX_READ_RPI:
  429. case MBX_READ_XRI:
  430. case MBX_READ_REV:
  431. case MBX_READ_LNK_STAT:
  432. case MBX_REG_LOGIN:
  433. case MBX_UNREG_LOGIN:
  434. case MBX_READ_LA:
  435. case MBX_CLEAR_LA:
  436. case MBX_DUMP_MEMORY:
  437. case MBX_DUMP_CONTEXT:
  438. case MBX_RUN_DIAGS:
  439. case MBX_RESTART:
  440. case MBX_UPDATE_CFG:
  441. case MBX_DOWN_LOAD:
  442. case MBX_DEL_LD_ENTRY:
  443. case MBX_RUN_PROGRAM:
  444. case MBX_SET_MASK:
  445. case MBX_SET_SLIM:
  446. case MBX_UNREG_D_ID:
  447. case MBX_KILL_BOARD:
  448. case MBX_CONFIG_FARP:
  449. case MBX_BEACON:
  450. case MBX_LOAD_AREA:
  451. case MBX_RUN_BIU_DIAG64:
  452. case MBX_CONFIG_PORT:
  453. case MBX_READ_SPARM64:
  454. case MBX_READ_RPI64:
  455. case MBX_REG_LOGIN64:
  456. case MBX_READ_LA64:
  457. case MBX_FLASH_WR_ULA:
  458. case MBX_SET_DEBUG:
  459. case MBX_LOAD_EXP_ROM:
  460. ret = mbxCommand;
  461. break;
  462. default:
  463. ret = MBX_SHUTDOWN;
  464. break;
  465. }
  466. return (ret);
  467. }
  468. static void
  469. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  470. {
  471. wait_queue_head_t *pdone_q;
  472. /*
  473. * If pdone_q is empty, the driver thread gave up waiting and
  474. * continued running.
  475. */
  476. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  477. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  478. if (pdone_q)
  479. wake_up_interruptible(pdone_q);
  480. return;
  481. }
  482. void
  483. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  484. {
  485. struct lpfc_dmabuf *mp;
  486. uint16_t rpi;
  487. int rc;
  488. mp = (struct lpfc_dmabuf *) (pmb->context1);
  489. if (mp) {
  490. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  491. kfree(mp);
  492. }
  493. /*
  494. * If a REG_LOGIN succeeded after node is destroyed or node
  495. * is in re-discovery driver need to cleanup the RPI.
  496. */
  497. if (!(phba->fc_flag & FC_UNLOADING) &&
  498. (pmb->mb.mbxCommand == MBX_REG_LOGIN64) &&
  499. (!pmb->mb.mbxStatus)) {
  500. rpi = pmb->mb.un.varWords[0];
  501. lpfc_unreg_login(phba, rpi, pmb);
  502. pmb->mbox_cmpl=lpfc_sli_def_mbox_cmpl;
  503. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  504. if (rc != MBX_NOT_FINISHED)
  505. return;
  506. }
  507. mempool_free( pmb, phba->mbox_mem_pool);
  508. return;
  509. }
  510. int
  511. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  512. {
  513. MAILBOX_t *mbox;
  514. MAILBOX_t *pmbox;
  515. LPFC_MBOXQ_t *pmb;
  516. struct lpfc_sli *psli;
  517. int i, rc;
  518. uint32_t process_next;
  519. psli = &phba->sli;
  520. /* We should only get here if we are in SLI2 mode */
  521. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  522. return (1);
  523. }
  524. phba->sli.slistat.mbox_event++;
  525. /* Get a Mailbox buffer to setup mailbox commands for callback */
  526. if ((pmb = phba->sli.mbox_active)) {
  527. pmbox = &pmb->mb;
  528. mbox = &phba->slim2p->mbx;
  529. /* First check out the status word */
  530. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  531. /* Sanity check to ensure the host owns the mailbox */
  532. if (pmbox->mbxOwner != OWN_HOST) {
  533. /* Lets try for a while */
  534. for (i = 0; i < 10240; i++) {
  535. /* First copy command data */
  536. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  537. sizeof (uint32_t));
  538. if (pmbox->mbxOwner == OWN_HOST)
  539. goto mbout;
  540. }
  541. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  542. <status> */
  543. lpfc_printf_log(phba,
  544. KERN_WARNING,
  545. LOG_MBOX | LOG_SLI,
  546. "%d:0304 Stray Mailbox Interrupt "
  547. "mbxCommand x%x mbxStatus x%x\n",
  548. phba->brd_no,
  549. pmbox->mbxCommand,
  550. pmbox->mbxStatus);
  551. spin_lock_irq(phba->host->host_lock);
  552. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  553. spin_unlock_irq(phba->host->host_lock);
  554. return (1);
  555. }
  556. mbout:
  557. del_timer_sync(&phba->sli.mbox_tmo);
  558. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  559. /*
  560. * It is a fatal error if unknown mbox command completion.
  561. */
  562. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  563. MBX_SHUTDOWN) {
  564. /* Unknow mailbox command compl */
  565. lpfc_printf_log(phba,
  566. KERN_ERR,
  567. LOG_MBOX | LOG_SLI,
  568. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  569. phba->brd_no,
  570. pmbox->mbxCommand);
  571. phba->hba_state = LPFC_HBA_ERROR;
  572. phba->work_hs = HS_FFER3;
  573. lpfc_handle_eratt(phba);
  574. return (0);
  575. }
  576. phba->sli.mbox_active = NULL;
  577. if (pmbox->mbxStatus) {
  578. phba->sli.slistat.mbox_stat_err++;
  579. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  580. /* Mbox cmd cmpl error - RETRYing */
  581. lpfc_printf_log(phba,
  582. KERN_INFO,
  583. LOG_MBOX | LOG_SLI,
  584. "%d:0305 Mbox cmd cmpl error - "
  585. "RETRYing Data: x%x x%x x%x x%x\n",
  586. phba->brd_no,
  587. pmbox->mbxCommand,
  588. pmbox->mbxStatus,
  589. pmbox->un.varWords[0],
  590. phba->hba_state);
  591. pmbox->mbxStatus = 0;
  592. pmbox->mbxOwner = OWN_HOST;
  593. spin_lock_irq(phba->host->host_lock);
  594. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  595. spin_unlock_irq(phba->host->host_lock);
  596. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  597. if (rc == MBX_SUCCESS)
  598. return (0);
  599. }
  600. }
  601. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  602. lpfc_printf_log(phba,
  603. KERN_INFO,
  604. LOG_MBOX | LOG_SLI,
  605. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  606. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  607. phba->brd_no,
  608. pmbox->mbxCommand,
  609. pmb->mbox_cmpl,
  610. *((uint32_t *) pmbox),
  611. pmbox->un.varWords[0],
  612. pmbox->un.varWords[1],
  613. pmbox->un.varWords[2],
  614. pmbox->un.varWords[3],
  615. pmbox->un.varWords[4],
  616. pmbox->un.varWords[5],
  617. pmbox->un.varWords[6],
  618. pmbox->un.varWords[7]);
  619. if (pmb->mbox_cmpl) {
  620. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  621. pmb->mbox_cmpl(phba,pmb);
  622. }
  623. }
  624. do {
  625. process_next = 0; /* by default don't loop */
  626. spin_lock_irq(phba->host->host_lock);
  627. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  628. /* Process next mailbox command if there is one */
  629. if ((pmb = lpfc_mbox_get(phba))) {
  630. spin_unlock_irq(phba->host->host_lock);
  631. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  632. if (rc == MBX_NOT_FINISHED) {
  633. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  634. pmb->mbox_cmpl(phba,pmb);
  635. process_next = 1;
  636. continue; /* loop back */
  637. }
  638. } else {
  639. spin_unlock_irq(phba->host->host_lock);
  640. /* Turn on IOCB processing */
  641. for (i = 0; i < phba->sli.num_rings; i++)
  642. lpfc_sli_turn_on_ring(phba, i);
  643. }
  644. } while (process_next);
  645. return (0);
  646. }
  647. static int
  648. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  649. struct lpfc_iocbq *saveq)
  650. {
  651. IOCB_t * irsp;
  652. WORD5 * w5p;
  653. uint32_t Rctl, Type;
  654. uint32_t match, i;
  655. match = 0;
  656. irsp = &(saveq->iocb);
  657. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  658. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  659. Rctl = FC_ELS_REQ;
  660. Type = FC_ELS_DATA;
  661. } else {
  662. w5p =
  663. (WORD5 *) & (saveq->iocb.un.
  664. ulpWord[5]);
  665. Rctl = w5p->hcsw.Rctl;
  666. Type = w5p->hcsw.Type;
  667. /* Firmware Workaround */
  668. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  669. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  670. Rctl = FC_ELS_REQ;
  671. Type = FC_ELS_DATA;
  672. w5p->hcsw.Rctl = Rctl;
  673. w5p->hcsw.Type = Type;
  674. }
  675. }
  676. /* unSolicited Responses */
  677. if (pring->prt[0].profile) {
  678. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  679. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  680. saveq);
  681. match = 1;
  682. } else {
  683. /* We must search, based on rctl / type
  684. for the right routine */
  685. for (i = 0; i < pring->num_mask;
  686. i++) {
  687. if ((pring->prt[i].rctl ==
  688. Rctl)
  689. && (pring->prt[i].
  690. type == Type)) {
  691. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  692. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  693. (phba, pring, saveq);
  694. match = 1;
  695. break;
  696. }
  697. }
  698. }
  699. if (match == 0) {
  700. /* Unexpected Rctl / Type received */
  701. /* Ring <ringno> handler: unexpected
  702. Rctl <Rctl> Type <Type> received */
  703. lpfc_printf_log(phba,
  704. KERN_WARNING,
  705. LOG_SLI,
  706. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  707. "Type x%x received \n",
  708. phba->brd_no,
  709. pring->ringno,
  710. Rctl,
  711. Type);
  712. }
  713. return(1);
  714. }
  715. static struct lpfc_iocbq *
  716. lpfc_sli_iocbq_lookup(struct lpfc_hba * phba,
  717. struct lpfc_sli_ring * pring,
  718. struct lpfc_iocbq * prspiocb)
  719. {
  720. struct lpfc_iocbq *cmd_iocb = NULL;
  721. uint16_t iotag;
  722. iotag = prspiocb->iocb.ulpIoTag;
  723. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  724. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  725. list_del(&cmd_iocb->list);
  726. pring->txcmplq_cnt--;
  727. return cmd_iocb;
  728. }
  729. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  730. "%d:0317 iotag x%x is out off "
  731. "range: max iotag x%x wd0 x%x\n",
  732. phba->brd_no, iotag,
  733. phba->sli.last_iotag,
  734. *(((uint32_t *) &prspiocb->iocb) + 7));
  735. return NULL;
  736. }
  737. static int
  738. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  739. struct lpfc_iocbq *saveq)
  740. {
  741. struct lpfc_iocbq * cmdiocbp;
  742. int rc = 1;
  743. unsigned long iflag;
  744. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  745. spin_lock_irqsave(phba->host->host_lock, iflag);
  746. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  747. if (cmdiocbp) {
  748. if (cmdiocbp->iocb_cmpl) {
  749. /*
  750. * Post all ELS completions to the worker thread.
  751. * All other are passed to the completion callback.
  752. */
  753. if (pring->ringno == LPFC_ELS_RING) {
  754. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  755. cmdiocbp->iocb_flag &=
  756. ~LPFC_DRIVER_ABORTED;
  757. saveq->iocb.ulpStatus =
  758. IOSTAT_LOCAL_REJECT;
  759. saveq->iocb.un.ulpWord[4] =
  760. IOERR_SLI_ABORTED;
  761. }
  762. spin_unlock_irqrestore(phba->host->host_lock,
  763. iflag);
  764. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  765. spin_lock_irqsave(phba->host->host_lock, iflag);
  766. }
  767. else {
  768. spin_unlock_irqrestore(phba->host->host_lock,
  769. iflag);
  770. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  771. spin_lock_irqsave(phba->host->host_lock, iflag);
  772. }
  773. } else
  774. lpfc_sli_release_iocbq(phba, cmdiocbp);
  775. } else {
  776. /*
  777. * Unknown initiating command based on the response iotag.
  778. * This could be the case on the ELS ring because of
  779. * lpfc_els_abort().
  780. */
  781. if (pring->ringno != LPFC_ELS_RING) {
  782. /*
  783. * Ring <ringno> handler: unexpected completion IoTag
  784. * <IoTag>
  785. */
  786. lpfc_printf_log(phba,
  787. KERN_WARNING,
  788. LOG_SLI,
  789. "%d:0322 Ring %d handler: unexpected "
  790. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  791. phba->brd_no,
  792. pring->ringno,
  793. saveq->iocb.ulpIoTag,
  794. saveq->iocb.ulpStatus,
  795. saveq->iocb.un.ulpWord[4],
  796. saveq->iocb.ulpCommand,
  797. saveq->iocb.ulpContext);
  798. }
  799. }
  800. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  801. return rc;
  802. }
  803. static void lpfc_sli_rsp_pointers_error(struct lpfc_hba * phba,
  804. struct lpfc_sli_ring * pring)
  805. {
  806. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  807. /*
  808. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  809. * rsp ring <portRspMax>
  810. */
  811. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  812. "%d:0312 Ring %d handler: portRspPut %d "
  813. "is bigger then rsp ring %d\n",
  814. phba->brd_no, pring->ringno,
  815. le32_to_cpu(pgp->rspPutInx),
  816. pring->numRiocb);
  817. phba->hba_state = LPFC_HBA_ERROR;
  818. /*
  819. * All error attention handlers are posted to
  820. * worker thread
  821. */
  822. phba->work_ha |= HA_ERATT;
  823. phba->work_hs = HS_FFER3;
  824. if (phba->work_wait)
  825. wake_up(phba->work_wait);
  826. return;
  827. }
  828. void lpfc_sli_poll_fcp_ring(struct lpfc_hba * phba)
  829. {
  830. struct lpfc_sli * psli = &phba->sli;
  831. struct lpfc_sli_ring * pring = &psli->ring[LPFC_FCP_RING];
  832. IOCB_t *irsp = NULL;
  833. IOCB_t *entry = NULL;
  834. struct lpfc_iocbq *cmdiocbq = NULL;
  835. struct lpfc_iocbq rspiocbq;
  836. struct lpfc_pgp *pgp;
  837. uint32_t status;
  838. uint32_t portRspPut, portRspMax;
  839. int type;
  840. uint32_t rsp_cmpl = 0;
  841. void __iomem *to_slim;
  842. uint32_t ha_copy;
  843. pring->stats.iocb_event++;
  844. /* The driver assumes SLI-2 mode */
  845. pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  846. /*
  847. * The next available response entry should never exceed the maximum
  848. * entries. If it does, treat it as an adapter hardware error.
  849. */
  850. portRspMax = pring->numRiocb;
  851. portRspPut = le32_to_cpu(pgp->rspPutInx);
  852. if (unlikely(portRspPut >= portRspMax)) {
  853. lpfc_sli_rsp_pointers_error(phba, pring);
  854. return;
  855. }
  856. rmb();
  857. while (pring->rspidx != portRspPut) {
  858. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  859. if (++pring->rspidx >= portRspMax)
  860. pring->rspidx = 0;
  861. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  862. (uint32_t *) &rspiocbq.iocb,
  863. sizeof (IOCB_t));
  864. irsp = &rspiocbq.iocb;
  865. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  866. pring->stats.iocb_rsp++;
  867. rsp_cmpl++;
  868. if (unlikely(irsp->ulpStatus)) {
  869. /* Rsp ring <ringno> error: IOCB */
  870. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  871. "%d:0326 Rsp Ring %d error: IOCB Data: "
  872. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  873. phba->brd_no, pring->ringno,
  874. irsp->un.ulpWord[0],
  875. irsp->un.ulpWord[1],
  876. irsp->un.ulpWord[2],
  877. irsp->un.ulpWord[3],
  878. irsp->un.ulpWord[4],
  879. irsp->un.ulpWord[5],
  880. *(((uint32_t *) irsp) + 6),
  881. *(((uint32_t *) irsp) + 7));
  882. }
  883. switch (type) {
  884. case LPFC_ABORT_IOCB:
  885. case LPFC_SOL_IOCB:
  886. /*
  887. * Idle exchange closed via ABTS from port. No iocb
  888. * resources need to be recovered.
  889. */
  890. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  891. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  892. "%d:0314 IOCB cmd 0x%x"
  893. " processed. Skipping"
  894. " completion", phba->brd_no,
  895. irsp->ulpCommand);
  896. break;
  897. }
  898. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  899. &rspiocbq);
  900. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  901. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  902. &rspiocbq);
  903. }
  904. break;
  905. default:
  906. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  907. char adaptermsg[LPFC_MAX_ADPTMSG];
  908. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  909. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  910. MAX_MSG_DATA);
  911. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  912. phba->brd_no, adaptermsg);
  913. } else {
  914. /* Unknown IOCB command */
  915. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  916. "%d:0321 Unknown IOCB command "
  917. "Data: x%x, x%x x%x x%x x%x\n",
  918. phba->brd_no, type,
  919. irsp->ulpCommand,
  920. irsp->ulpStatus,
  921. irsp->ulpIoTag,
  922. irsp->ulpContext);
  923. }
  924. break;
  925. }
  926. /*
  927. * The response IOCB has been processed. Update the ring
  928. * pointer in SLIM. If the port response put pointer has not
  929. * been updated, sync the pgp->rspPutInx and fetch the new port
  930. * response put pointer.
  931. */
  932. to_slim = phba->MBslimaddr +
  933. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  934. writeb(pring->rspidx, to_slim);
  935. if (pring->rspidx == portRspPut)
  936. portRspPut = le32_to_cpu(pgp->rspPutInx);
  937. }
  938. ha_copy = readl(phba->HAregaddr);
  939. ha_copy >>= (LPFC_FCP_RING * 4);
  940. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  941. pring->stats.iocb_rsp_full++;
  942. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  943. writel(status, phba->CAregaddr);
  944. readl(phba->CAregaddr);
  945. }
  946. if ((ha_copy & HA_R0CE_RSP) &&
  947. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  948. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  949. pring->stats.iocb_cmd_empty++;
  950. /* Force update of the local copy of cmdGetInx */
  951. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  952. lpfc_sli_resume_iocb(phba, pring);
  953. if ((pring->lpfc_sli_cmd_available))
  954. (pring->lpfc_sli_cmd_available) (phba, pring);
  955. }
  956. return;
  957. }
  958. /*
  959. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  960. * to check it explicitly.
  961. */
  962. static int
  963. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  964. struct lpfc_sli_ring * pring, uint32_t mask)
  965. {
  966. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  967. IOCB_t *irsp = NULL;
  968. IOCB_t *entry = NULL;
  969. struct lpfc_iocbq *cmdiocbq = NULL;
  970. struct lpfc_iocbq rspiocbq;
  971. uint32_t status;
  972. uint32_t portRspPut, portRspMax;
  973. int rc = 1;
  974. lpfc_iocb_type type;
  975. unsigned long iflag;
  976. uint32_t rsp_cmpl = 0;
  977. void __iomem *to_slim;
  978. spin_lock_irqsave(phba->host->host_lock, iflag);
  979. pring->stats.iocb_event++;
  980. /*
  981. * The next available response entry should never exceed the maximum
  982. * entries. If it does, treat it as an adapter hardware error.
  983. */
  984. portRspMax = pring->numRiocb;
  985. portRspPut = le32_to_cpu(pgp->rspPutInx);
  986. if (unlikely(portRspPut >= portRspMax)) {
  987. lpfc_sli_rsp_pointers_error(phba, pring);
  988. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  989. return 1;
  990. }
  991. rmb();
  992. while (pring->rspidx != portRspPut) {
  993. /*
  994. * Fetch an entry off the ring and copy it into a local data
  995. * structure. The copy involves a byte-swap since the
  996. * network byte order and pci byte orders are different.
  997. */
  998. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  999. if (++pring->rspidx >= portRspMax)
  1000. pring->rspidx = 0;
  1001. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1002. (uint32_t *) &rspiocbq.iocb,
  1003. sizeof (IOCB_t));
  1004. INIT_LIST_HEAD(&(rspiocbq.list));
  1005. irsp = &rspiocbq.iocb;
  1006. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1007. pring->stats.iocb_rsp++;
  1008. rsp_cmpl++;
  1009. if (unlikely(irsp->ulpStatus)) {
  1010. /* Rsp ring <ringno> error: IOCB */
  1011. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1012. "%d:0336 Rsp Ring %d error: IOCB Data: "
  1013. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1014. phba->brd_no, pring->ringno,
  1015. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  1016. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  1017. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  1018. *(((uint32_t *) irsp) + 6),
  1019. *(((uint32_t *) irsp) + 7));
  1020. }
  1021. switch (type) {
  1022. case LPFC_ABORT_IOCB:
  1023. case LPFC_SOL_IOCB:
  1024. /*
  1025. * Idle exchange closed via ABTS from port. No iocb
  1026. * resources need to be recovered.
  1027. */
  1028. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1029. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1030. "%d:0333 IOCB cmd 0x%x"
  1031. " processed. Skipping"
  1032. " completion\n", phba->brd_no,
  1033. irsp->ulpCommand);
  1034. break;
  1035. }
  1036. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1037. &rspiocbq);
  1038. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1039. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1040. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1041. &rspiocbq);
  1042. } else {
  1043. spin_unlock_irqrestore(
  1044. phba->host->host_lock, iflag);
  1045. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1046. &rspiocbq);
  1047. spin_lock_irqsave(phba->host->host_lock,
  1048. iflag);
  1049. }
  1050. }
  1051. break;
  1052. case LPFC_UNSOL_IOCB:
  1053. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1054. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1055. spin_lock_irqsave(phba->host->host_lock, iflag);
  1056. break;
  1057. default:
  1058. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1059. char adaptermsg[LPFC_MAX_ADPTMSG];
  1060. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1061. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1062. MAX_MSG_DATA);
  1063. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1064. phba->brd_no, adaptermsg);
  1065. } else {
  1066. /* Unknown IOCB command */
  1067. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1068. "%d:0334 Unknown IOCB command "
  1069. "Data: x%x, x%x x%x x%x x%x\n",
  1070. phba->brd_no, type, irsp->ulpCommand,
  1071. irsp->ulpStatus, irsp->ulpIoTag,
  1072. irsp->ulpContext);
  1073. }
  1074. break;
  1075. }
  1076. /*
  1077. * The response IOCB has been processed. Update the ring
  1078. * pointer in SLIM. If the port response put pointer has not
  1079. * been updated, sync the pgp->rspPutInx and fetch the new port
  1080. * response put pointer.
  1081. */
  1082. to_slim = phba->MBslimaddr +
  1083. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  1084. writel(pring->rspidx, to_slim);
  1085. if (pring->rspidx == portRspPut)
  1086. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1087. }
  1088. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1089. pring->stats.iocb_rsp_full++;
  1090. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1091. writel(status, phba->CAregaddr);
  1092. readl(phba->CAregaddr);
  1093. }
  1094. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1095. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1096. pring->stats.iocb_cmd_empty++;
  1097. /* Force update of the local copy of cmdGetInx */
  1098. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1099. lpfc_sli_resume_iocb(phba, pring);
  1100. if ((pring->lpfc_sli_cmd_available))
  1101. (pring->lpfc_sli_cmd_available) (phba, pring);
  1102. }
  1103. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1104. return rc;
  1105. }
  1106. int
  1107. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  1108. struct lpfc_sli_ring * pring, uint32_t mask)
  1109. {
  1110. IOCB_t *entry;
  1111. IOCB_t *irsp = NULL;
  1112. struct lpfc_iocbq *rspiocbp = NULL;
  1113. struct lpfc_iocbq *next_iocb;
  1114. struct lpfc_iocbq *cmdiocbp;
  1115. struct lpfc_iocbq *saveq;
  1116. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1117. uint8_t iocb_cmd_type;
  1118. lpfc_iocb_type type;
  1119. uint32_t status, free_saveq;
  1120. uint32_t portRspPut, portRspMax;
  1121. int rc = 1;
  1122. unsigned long iflag;
  1123. void __iomem *to_slim;
  1124. spin_lock_irqsave(phba->host->host_lock, iflag);
  1125. pring->stats.iocb_event++;
  1126. /*
  1127. * The next available response entry should never exceed the maximum
  1128. * entries. If it does, treat it as an adapter hardware error.
  1129. */
  1130. portRspMax = pring->numRiocb;
  1131. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1132. if (portRspPut >= portRspMax) {
  1133. /*
  1134. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1135. * rsp ring <portRspMax>
  1136. */
  1137. lpfc_printf_log(phba,
  1138. KERN_ERR,
  1139. LOG_SLI,
  1140. "%d:0303 Ring %d handler: portRspPut %d "
  1141. "is bigger then rsp ring %d\n",
  1142. phba->brd_no,
  1143. pring->ringno, portRspPut, portRspMax);
  1144. phba->hba_state = LPFC_HBA_ERROR;
  1145. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1146. phba->work_hs = HS_FFER3;
  1147. lpfc_handle_eratt(phba);
  1148. return 1;
  1149. }
  1150. rmb();
  1151. while (pring->rspidx != portRspPut) {
  1152. /*
  1153. * Build a completion list and call the appropriate handler.
  1154. * The process is to get the next available response iocb, get
  1155. * a free iocb from the list, copy the response data into the
  1156. * free iocb, insert to the continuation list, and update the
  1157. * next response index to slim. This process makes response
  1158. * iocb's in the ring available to DMA as fast as possible but
  1159. * pays a penalty for a copy operation. Since the iocb is
  1160. * only 32 bytes, this penalty is considered small relative to
  1161. * the PCI reads for register values and a slim write. When
  1162. * the ulpLe field is set, the entire Command has been
  1163. * received.
  1164. */
  1165. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1166. rspiocbp = lpfc_sli_get_iocbq(phba);
  1167. if (rspiocbp == NULL) {
  1168. printk(KERN_ERR "%s: out of buffers! Failing "
  1169. "completion.\n", __FUNCTION__);
  1170. break;
  1171. }
  1172. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1173. irsp = &rspiocbp->iocb;
  1174. if (++pring->rspidx >= portRspMax)
  1175. pring->rspidx = 0;
  1176. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1177. + 1) * 4;
  1178. writel(pring->rspidx, to_slim);
  1179. if (list_empty(&(pring->iocb_continueq))) {
  1180. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1181. } else {
  1182. list_add_tail(&rspiocbp->list,
  1183. &(pring->iocb_continueq));
  1184. }
  1185. pring->iocb_continueq_cnt++;
  1186. if (irsp->ulpLe) {
  1187. /*
  1188. * By default, the driver expects to free all resources
  1189. * associated with this iocb completion.
  1190. */
  1191. free_saveq = 1;
  1192. saveq = list_get_first(&pring->iocb_continueq,
  1193. struct lpfc_iocbq, list);
  1194. irsp = &(saveq->iocb);
  1195. list_del_init(&pring->iocb_continueq);
  1196. pring->iocb_continueq_cnt = 0;
  1197. pring->stats.iocb_rsp++;
  1198. if (irsp->ulpStatus) {
  1199. /* Rsp ring <ringno> error: IOCB */
  1200. lpfc_printf_log(phba,
  1201. KERN_WARNING,
  1202. LOG_SLI,
  1203. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1204. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1205. phba->brd_no,
  1206. pring->ringno,
  1207. irsp->un.ulpWord[0],
  1208. irsp->un.ulpWord[1],
  1209. irsp->un.ulpWord[2],
  1210. irsp->un.ulpWord[3],
  1211. irsp->un.ulpWord[4],
  1212. irsp->un.ulpWord[5],
  1213. *(((uint32_t *) irsp) + 6),
  1214. *(((uint32_t *) irsp) + 7));
  1215. }
  1216. /*
  1217. * Fetch the IOCB command type and call the correct
  1218. * completion routine. Solicited and Unsolicited
  1219. * IOCBs on the ELS ring get freed back to the
  1220. * lpfc_iocb_list by the discovery kernel thread.
  1221. */
  1222. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1223. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1224. if (type == LPFC_SOL_IOCB) {
  1225. spin_unlock_irqrestore(phba->host->host_lock,
  1226. iflag);
  1227. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1228. saveq);
  1229. spin_lock_irqsave(phba->host->host_lock, iflag);
  1230. } else if (type == LPFC_UNSOL_IOCB) {
  1231. spin_unlock_irqrestore(phba->host->host_lock,
  1232. iflag);
  1233. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1234. saveq);
  1235. spin_lock_irqsave(phba->host->host_lock, iflag);
  1236. } else if (type == LPFC_ABORT_IOCB) {
  1237. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1238. ((cmdiocbp =
  1239. lpfc_sli_iocbq_lookup(phba, pring,
  1240. saveq)))) {
  1241. /* Call the specified completion
  1242. routine */
  1243. if (cmdiocbp->iocb_cmpl) {
  1244. spin_unlock_irqrestore(
  1245. phba->host->host_lock,
  1246. iflag);
  1247. (cmdiocbp->iocb_cmpl) (phba,
  1248. cmdiocbp, saveq);
  1249. spin_lock_irqsave(
  1250. phba->host->host_lock,
  1251. iflag);
  1252. } else
  1253. lpfc_sli_release_iocbq(phba,
  1254. cmdiocbp);
  1255. }
  1256. } else if (type == LPFC_UNKNOWN_IOCB) {
  1257. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1258. char adaptermsg[LPFC_MAX_ADPTMSG];
  1259. memset(adaptermsg, 0,
  1260. LPFC_MAX_ADPTMSG);
  1261. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1262. MAX_MSG_DATA);
  1263. dev_warn(&((phba->pcidev)->dev),
  1264. "lpfc%d: %s",
  1265. phba->brd_no, adaptermsg);
  1266. } else {
  1267. /* Unknown IOCB command */
  1268. lpfc_printf_log(phba,
  1269. KERN_ERR,
  1270. LOG_SLI,
  1271. "%d:0335 Unknown IOCB command "
  1272. "Data: x%x x%x x%x x%x\n",
  1273. phba->brd_no,
  1274. irsp->ulpCommand,
  1275. irsp->ulpStatus,
  1276. irsp->ulpIoTag,
  1277. irsp->ulpContext);
  1278. }
  1279. }
  1280. if (free_saveq) {
  1281. if (!list_empty(&saveq->list)) {
  1282. list_for_each_entry_safe(rspiocbp,
  1283. next_iocb,
  1284. &saveq->list,
  1285. list) {
  1286. list_del(&rspiocbp->list);
  1287. lpfc_sli_release_iocbq(phba,
  1288. rspiocbp);
  1289. }
  1290. }
  1291. lpfc_sli_release_iocbq(phba, saveq);
  1292. }
  1293. }
  1294. /*
  1295. * If the port response put pointer has not been updated, sync
  1296. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1297. * response put pointer.
  1298. */
  1299. if (pring->rspidx == portRspPut) {
  1300. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1301. }
  1302. } /* while (pring->rspidx != portRspPut) */
  1303. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1304. /* At least one response entry has been freed */
  1305. pring->stats.iocb_rsp_full++;
  1306. /* SET RxRE_RSP in Chip Att register */
  1307. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1308. writel(status, phba->CAregaddr);
  1309. readl(phba->CAregaddr); /* flush */
  1310. }
  1311. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1312. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1313. pring->stats.iocb_cmd_empty++;
  1314. /* Force update of the local copy of cmdGetInx */
  1315. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1316. lpfc_sli_resume_iocb(phba, pring);
  1317. if ((pring->lpfc_sli_cmd_available))
  1318. (pring->lpfc_sli_cmd_available) (phba, pring);
  1319. }
  1320. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1321. return rc;
  1322. }
  1323. int
  1324. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1325. {
  1326. LIST_HEAD(completions);
  1327. struct lpfc_iocbq *iocb, *next_iocb;
  1328. IOCB_t *cmd = NULL;
  1329. int errcnt;
  1330. errcnt = 0;
  1331. /* Error everything on txq and txcmplq
  1332. * First do the txq.
  1333. */
  1334. spin_lock_irq(phba->host->host_lock);
  1335. list_splice_init(&pring->txq, &completions);
  1336. pring->txq_cnt = 0;
  1337. /* Next issue ABTS for everything on the txcmplq */
  1338. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1339. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1340. spin_unlock_irq(phba->host->host_lock);
  1341. while (!list_empty(&completions)) {
  1342. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1343. cmd = &iocb->iocb;
  1344. list_del(&iocb->list);
  1345. if (iocb->iocb_cmpl) {
  1346. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1347. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1348. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1349. } else
  1350. lpfc_sli_release_iocbq(phba, iocb);
  1351. }
  1352. return errcnt;
  1353. }
  1354. int
  1355. lpfc_sli_brdready(struct lpfc_hba * phba, uint32_t mask)
  1356. {
  1357. uint32_t status;
  1358. int i = 0;
  1359. int retval = 0;
  1360. /* Read the HBA Host Status Register */
  1361. status = readl(phba->HSregaddr);
  1362. /*
  1363. * Check status register every 100ms for 5 retries, then every
  1364. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1365. * every 2.5 sec for 4.
  1366. * Break our of the loop if errors occurred during init.
  1367. */
  1368. while (((status & mask) != mask) &&
  1369. !(status & HS_FFERM) &&
  1370. i++ < 20) {
  1371. if (i <= 5)
  1372. msleep(10);
  1373. else if (i <= 10)
  1374. msleep(500);
  1375. else
  1376. msleep(2500);
  1377. if (i == 15) {
  1378. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1379. lpfc_sli_brdrestart(phba);
  1380. }
  1381. /* Read the HBA Host Status Register */
  1382. status = readl(phba->HSregaddr);
  1383. }
  1384. /* Check to see if any errors occurred during init */
  1385. if ((status & HS_FFERM) || (i >= 20)) {
  1386. phba->hba_state = LPFC_HBA_ERROR;
  1387. retval = 1;
  1388. }
  1389. return retval;
  1390. }
  1391. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1392. void lpfc_reset_barrier(struct lpfc_hba * phba)
  1393. {
  1394. uint32_t __iomem *resp_buf;
  1395. uint32_t __iomem *mbox_buf;
  1396. volatile uint32_t mbox;
  1397. uint32_t hc_copy;
  1398. int i;
  1399. uint8_t hdrtype;
  1400. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1401. if (hdrtype != 0x80 ||
  1402. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1403. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1404. return;
  1405. /*
  1406. * Tell the other part of the chip to suspend temporarily all
  1407. * its DMA activity.
  1408. */
  1409. resp_buf = phba->MBslimaddr;
  1410. /* Disable the error attention */
  1411. hc_copy = readl(phba->HCregaddr);
  1412. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1413. readl(phba->HCregaddr); /* flush */
  1414. if (readl(phba->HAregaddr) & HA_ERATT) {
  1415. /* Clear Chip error bit */
  1416. writel(HA_ERATT, phba->HAregaddr);
  1417. phba->stopped = 1;
  1418. }
  1419. mbox = 0;
  1420. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1421. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1422. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1423. mbox_buf = phba->MBslimaddr;
  1424. writel(mbox, mbox_buf);
  1425. for (i = 0;
  1426. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1427. mdelay(1);
  1428. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1429. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1430. phba->stopped)
  1431. goto restore_hc;
  1432. else
  1433. goto clear_errat;
  1434. }
  1435. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1436. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1437. mdelay(1);
  1438. clear_errat:
  1439. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1440. mdelay(1);
  1441. if (readl(phba->HAregaddr) & HA_ERATT) {
  1442. writel(HA_ERATT, phba->HAregaddr);
  1443. phba->stopped = 1;
  1444. }
  1445. restore_hc:
  1446. writel(hc_copy, phba->HCregaddr);
  1447. readl(phba->HCregaddr); /* flush */
  1448. }
  1449. int
  1450. lpfc_sli_brdkill(struct lpfc_hba * phba)
  1451. {
  1452. struct lpfc_sli *psli;
  1453. LPFC_MBOXQ_t *pmb;
  1454. uint32_t status;
  1455. uint32_t ha_copy;
  1456. int retval;
  1457. int i = 0;
  1458. psli = &phba->sli;
  1459. /* Kill HBA */
  1460. lpfc_printf_log(phba,
  1461. KERN_INFO,
  1462. LOG_SLI,
  1463. "%d:0329 Kill HBA Data: x%x x%x\n",
  1464. phba->brd_no,
  1465. phba->hba_state,
  1466. psli->sli_flag);
  1467. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1468. GFP_KERNEL)) == 0)
  1469. return 1;
  1470. /* Disable the error attention */
  1471. spin_lock_irq(phba->host->host_lock);
  1472. status = readl(phba->HCregaddr);
  1473. status &= ~HC_ERINT_ENA;
  1474. writel(status, phba->HCregaddr);
  1475. readl(phba->HCregaddr); /* flush */
  1476. spin_unlock_irq(phba->host->host_lock);
  1477. lpfc_kill_board(phba, pmb);
  1478. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1479. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1480. if (retval != MBX_SUCCESS) {
  1481. if (retval != MBX_BUSY)
  1482. mempool_free(pmb, phba->mbox_mem_pool);
  1483. return 1;
  1484. }
  1485. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1486. mempool_free(pmb, phba->mbox_mem_pool);
  1487. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1488. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1489. * 3 seconds we still set HBA_ERROR state because the status of the
  1490. * board is now undefined.
  1491. */
  1492. ha_copy = readl(phba->HAregaddr);
  1493. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1494. mdelay(100);
  1495. ha_copy = readl(phba->HAregaddr);
  1496. }
  1497. del_timer_sync(&psli->mbox_tmo);
  1498. if (ha_copy & HA_ERATT) {
  1499. writel(HA_ERATT, phba->HAregaddr);
  1500. phba->stopped = 1;
  1501. }
  1502. spin_lock_irq(phba->host->host_lock);
  1503. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1504. spin_unlock_irq(phba->host->host_lock);
  1505. psli->mbox_active = NULL;
  1506. lpfc_hba_down_post(phba);
  1507. phba->hba_state = LPFC_HBA_ERROR;
  1508. return (ha_copy & HA_ERATT ? 0 : 1);
  1509. }
  1510. int
  1511. lpfc_sli_brdreset(struct lpfc_hba * phba)
  1512. {
  1513. struct lpfc_sli *psli;
  1514. struct lpfc_sli_ring *pring;
  1515. uint16_t cfg_value;
  1516. int i;
  1517. psli = &phba->sli;
  1518. /* Reset HBA */
  1519. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1520. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1521. phba->hba_state, psli->sli_flag);
  1522. /* perform board reset */
  1523. phba->fc_eventTag = 0;
  1524. phba->fc_myDID = 0;
  1525. phba->fc_prevDID = 0;
  1526. /* Turn off parity checking and serr during the physical reset */
  1527. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1528. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1529. (cfg_value &
  1530. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1531. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1532. /* Now toggle INITFF bit in the Host Control Register */
  1533. writel(HC_INITFF, phba->HCregaddr);
  1534. mdelay(1);
  1535. readl(phba->HCregaddr); /* flush */
  1536. writel(0, phba->HCregaddr);
  1537. readl(phba->HCregaddr); /* flush */
  1538. /* Restore PCI cmd register */
  1539. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1540. /* Initialize relevant SLI info */
  1541. for (i = 0; i < psli->num_rings; i++) {
  1542. pring = &psli->ring[i];
  1543. pring->flag = 0;
  1544. pring->rspidx = 0;
  1545. pring->next_cmdidx = 0;
  1546. pring->local_getidx = 0;
  1547. pring->cmdidx = 0;
  1548. pring->missbufcnt = 0;
  1549. }
  1550. phba->hba_state = LPFC_WARM_START;
  1551. return 0;
  1552. }
  1553. int
  1554. lpfc_sli_brdrestart(struct lpfc_hba * phba)
  1555. {
  1556. MAILBOX_t *mb;
  1557. struct lpfc_sli *psli;
  1558. uint16_t skip_post;
  1559. volatile uint32_t word0;
  1560. void __iomem *to_slim;
  1561. spin_lock_irq(phba->host->host_lock);
  1562. psli = &phba->sli;
  1563. /* Restart HBA */
  1564. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1565. "%d:0337 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1566. phba->hba_state, psli->sli_flag);
  1567. word0 = 0;
  1568. mb = (MAILBOX_t *) &word0;
  1569. mb->mbxCommand = MBX_RESTART;
  1570. mb->mbxHc = 1;
  1571. lpfc_reset_barrier(phba);
  1572. to_slim = phba->MBslimaddr;
  1573. writel(*(uint32_t *) mb, to_slim);
  1574. readl(to_slim); /* flush */
  1575. /* Only skip post after fc_ffinit is completed */
  1576. if (phba->hba_state) {
  1577. skip_post = 1;
  1578. word0 = 1; /* This is really setting up word1 */
  1579. } else {
  1580. skip_post = 0;
  1581. word0 = 0; /* This is really setting up word1 */
  1582. }
  1583. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1584. writel(*(uint32_t *) mb, to_slim);
  1585. readl(to_slim); /* flush */
  1586. lpfc_sli_brdreset(phba);
  1587. phba->stopped = 0;
  1588. phba->hba_state = LPFC_INIT_START;
  1589. spin_unlock_irq(phba->host->host_lock);
  1590. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1591. psli->stats_start = get_seconds();
  1592. if (skip_post)
  1593. mdelay(100);
  1594. else
  1595. mdelay(2000);
  1596. lpfc_hba_down_post(phba);
  1597. return 0;
  1598. }
  1599. static int
  1600. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1601. {
  1602. uint32_t status, i = 0;
  1603. /* Read the HBA Host Status Register */
  1604. status = readl(phba->HSregaddr);
  1605. /* Check status register to see what current state is */
  1606. i = 0;
  1607. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1608. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1609. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1610. * 4.
  1611. */
  1612. if (i++ >= 20) {
  1613. /* Adapter failed to init, timeout, status reg
  1614. <status> */
  1615. lpfc_printf_log(phba,
  1616. KERN_ERR,
  1617. LOG_INIT,
  1618. "%d:0436 Adapter failed to init, "
  1619. "timeout, status reg x%x\n",
  1620. phba->brd_no,
  1621. status);
  1622. phba->hba_state = LPFC_HBA_ERROR;
  1623. return -ETIMEDOUT;
  1624. }
  1625. /* Check to see if any errors occurred during init */
  1626. if (status & HS_FFERM) {
  1627. /* ERROR: During chipset initialization */
  1628. /* Adapter failed to init, chipset, status reg
  1629. <status> */
  1630. lpfc_printf_log(phba,
  1631. KERN_ERR,
  1632. LOG_INIT,
  1633. "%d:0437 Adapter failed to init, "
  1634. "chipset, status reg x%x\n",
  1635. phba->brd_no,
  1636. status);
  1637. phba->hba_state = LPFC_HBA_ERROR;
  1638. return -EIO;
  1639. }
  1640. if (i <= 5) {
  1641. msleep(10);
  1642. } else if (i <= 10) {
  1643. msleep(500);
  1644. } else {
  1645. msleep(2500);
  1646. }
  1647. if (i == 15) {
  1648. phba->hba_state = LPFC_STATE_UNKNOWN; /* Do post */
  1649. lpfc_sli_brdrestart(phba);
  1650. }
  1651. /* Read the HBA Host Status Register */
  1652. status = readl(phba->HSregaddr);
  1653. }
  1654. /* Check to see if any errors occurred during init */
  1655. if (status & HS_FFERM) {
  1656. /* ERROR: During chipset initialization */
  1657. /* Adapter failed to init, chipset, status reg <status> */
  1658. lpfc_printf_log(phba,
  1659. KERN_ERR,
  1660. LOG_INIT,
  1661. "%d:0438 Adapter failed to init, chipset, "
  1662. "status reg x%x\n",
  1663. phba->brd_no,
  1664. status);
  1665. phba->hba_state = LPFC_HBA_ERROR;
  1666. return -EIO;
  1667. }
  1668. /* Clear all interrupt enable conditions */
  1669. writel(0, phba->HCregaddr);
  1670. readl(phba->HCregaddr); /* flush */
  1671. /* setup host attn register */
  1672. writel(0xffffffff, phba->HAregaddr);
  1673. readl(phba->HAregaddr); /* flush */
  1674. return 0;
  1675. }
  1676. int
  1677. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1678. {
  1679. LPFC_MBOXQ_t *pmb;
  1680. uint32_t resetcount = 0, rc = 0, done = 0;
  1681. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1682. if (!pmb) {
  1683. phba->hba_state = LPFC_HBA_ERROR;
  1684. return -ENOMEM;
  1685. }
  1686. while (resetcount < 2 && !done) {
  1687. spin_lock_irq(phba->host->host_lock);
  1688. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1689. spin_unlock_irq(phba->host->host_lock);
  1690. phba->hba_state = LPFC_STATE_UNKNOWN;
  1691. lpfc_sli_brdrestart(phba);
  1692. msleep(2500);
  1693. rc = lpfc_sli_chipset_init(phba);
  1694. if (rc)
  1695. break;
  1696. spin_lock_irq(phba->host->host_lock);
  1697. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1698. spin_unlock_irq(phba->host->host_lock);
  1699. resetcount++;
  1700. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1701. * means the call was successful. Any other nonzero value is a failure,
  1702. * but if ERESTART is returned, the driver may reset the HBA and try
  1703. * again.
  1704. */
  1705. rc = lpfc_config_port_prep(phba);
  1706. if (rc == -ERESTART) {
  1707. phba->hba_state = 0;
  1708. continue;
  1709. } else if (rc) {
  1710. break;
  1711. }
  1712. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1713. lpfc_config_port(phba, pmb);
  1714. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1715. if (rc == MBX_SUCCESS)
  1716. done = 1;
  1717. else {
  1718. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1719. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1720. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1721. phba->brd_no, pmb->mb.mbxCommand,
  1722. pmb->mb.mbxStatus, 0);
  1723. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1724. }
  1725. }
  1726. if (!done)
  1727. goto lpfc_sli_hba_setup_error;
  1728. rc = lpfc_sli_ring_map(phba, pmb);
  1729. if (rc)
  1730. goto lpfc_sli_hba_setup_error;
  1731. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1732. rc = lpfc_config_port_post(phba);
  1733. if (rc)
  1734. goto lpfc_sli_hba_setup_error;
  1735. goto lpfc_sli_hba_setup_exit;
  1736. lpfc_sli_hba_setup_error:
  1737. phba->hba_state = LPFC_HBA_ERROR;
  1738. lpfc_sli_hba_setup_exit:
  1739. mempool_free(pmb, phba->mbox_mem_pool);
  1740. return rc;
  1741. }
  1742. /*! lpfc_mbox_timeout
  1743. *
  1744. * \pre
  1745. * \post
  1746. * \param hba Pointer to per struct lpfc_hba structure
  1747. * \param l1 Pointer to the driver's mailbox queue.
  1748. * \return
  1749. * void
  1750. *
  1751. * \b Description:
  1752. *
  1753. * This routine handles mailbox timeout events at timer interrupt context.
  1754. */
  1755. void
  1756. lpfc_mbox_timeout(unsigned long ptr)
  1757. {
  1758. struct lpfc_hba *phba;
  1759. unsigned long iflag;
  1760. phba = (struct lpfc_hba *)ptr;
  1761. spin_lock_irqsave(phba->host->host_lock, iflag);
  1762. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1763. phba->work_hba_events |= WORKER_MBOX_TMO;
  1764. if (phba->work_wait)
  1765. wake_up(phba->work_wait);
  1766. }
  1767. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1768. }
  1769. void
  1770. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1771. {
  1772. LPFC_MBOXQ_t *pmbox;
  1773. MAILBOX_t *mb;
  1774. struct lpfc_sli *psli = &phba->sli;
  1775. struct lpfc_sli_ring *pring;
  1776. spin_lock_irq(phba->host->host_lock);
  1777. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1778. spin_unlock_irq(phba->host->host_lock);
  1779. return;
  1780. }
  1781. pmbox = phba->sli.mbox_active;
  1782. mb = &pmbox->mb;
  1783. /* Mbox cmd <mbxCommand> timeout */
  1784. lpfc_printf_log(phba,
  1785. KERN_ERR,
  1786. LOG_MBOX | LOG_SLI,
  1787. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1788. phba->brd_no,
  1789. mb->mbxCommand,
  1790. phba->hba_state,
  1791. phba->sli.sli_flag,
  1792. phba->sli.mbox_active);
  1793. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  1794. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  1795. * it to fail all oustanding SCSI IO.
  1796. */
  1797. phba->hba_state = LPFC_STATE_UNKNOWN;
  1798. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1799. phba->fc_flag |= FC_ESTABLISH_LINK;
  1800. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1801. spin_unlock_irq(phba->host->host_lock);
  1802. pring = &psli->ring[psli->fcp_ring];
  1803. lpfc_sli_abort_iocb_ring(phba, pring);
  1804. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  1805. "%d:0316 Resetting board due to mailbox timeout\n",
  1806. phba->brd_no);
  1807. /*
  1808. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  1809. * on oustanding mailbox commands.
  1810. */
  1811. lpfc_offline_prep(phba);
  1812. lpfc_offline(phba);
  1813. lpfc_sli_brdrestart(phba);
  1814. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  1815. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  1816. lpfc_unblock_mgmt_io(phba);
  1817. return;
  1818. }
  1819. int
  1820. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1821. {
  1822. MAILBOX_t *mb;
  1823. struct lpfc_sli *psli;
  1824. uint32_t status, evtctr;
  1825. uint32_t ha_copy;
  1826. int i;
  1827. unsigned long drvr_flag = 0;
  1828. volatile uint32_t word0, ldata;
  1829. void __iomem *to_slim;
  1830. /* If the PCI channel is in offline state, do not post mbox. */
  1831. if (unlikely(pci_channel_offline(phba->pcidev)))
  1832. return MBX_NOT_FINISHED;
  1833. psli = &phba->sli;
  1834. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1835. mb = &pmbox->mb;
  1836. status = MBX_SUCCESS;
  1837. if (phba->hba_state == LPFC_HBA_ERROR) {
  1838. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1839. /* Mbox command <mbxCommand> cannot issue */
  1840. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1841. return (MBX_NOT_FINISHED);
  1842. }
  1843. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  1844. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  1845. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1846. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1847. return (MBX_NOT_FINISHED);
  1848. }
  1849. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1850. /* Polling for a mbox command when another one is already active
  1851. * is not allowed in SLI. Also, the driver must have established
  1852. * SLI2 mode to queue and process multiple mbox commands.
  1853. */
  1854. if (flag & MBX_POLL) {
  1855. spin_unlock_irqrestore(phba->host->host_lock,
  1856. drvr_flag);
  1857. /* Mbox command <mbxCommand> cannot issue */
  1858. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1859. return (MBX_NOT_FINISHED);
  1860. }
  1861. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1862. spin_unlock_irqrestore(phba->host->host_lock,
  1863. drvr_flag);
  1864. /* Mbox command <mbxCommand> cannot issue */
  1865. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1866. return (MBX_NOT_FINISHED);
  1867. }
  1868. /* Handle STOP IOCB processing flag. This is only meaningful
  1869. * if we are not polling for mbox completion.
  1870. */
  1871. if (flag & MBX_STOP_IOCB) {
  1872. flag &= ~MBX_STOP_IOCB;
  1873. /* Now flag each ring */
  1874. for (i = 0; i < psli->num_rings; i++) {
  1875. /* If the ring is active, flag it */
  1876. if (psli->ring[i].cmdringaddr) {
  1877. psli->ring[i].flag |=
  1878. LPFC_STOP_IOCB_MBX;
  1879. }
  1880. }
  1881. }
  1882. /* Another mailbox command is still being processed, queue this
  1883. * command to be processed later.
  1884. */
  1885. lpfc_mbox_put(phba, pmbox);
  1886. /* Mbox cmd issue - BUSY */
  1887. lpfc_printf_log(phba,
  1888. KERN_INFO,
  1889. LOG_MBOX | LOG_SLI,
  1890. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1891. phba->brd_no,
  1892. mb->mbxCommand,
  1893. phba->hba_state,
  1894. psli->sli_flag,
  1895. flag);
  1896. psli->slistat.mbox_busy++;
  1897. spin_unlock_irqrestore(phba->host->host_lock,
  1898. drvr_flag);
  1899. return (MBX_BUSY);
  1900. }
  1901. /* Handle STOP IOCB processing flag. This is only meaningful
  1902. * if we are not polling for mbox completion.
  1903. */
  1904. if (flag & MBX_STOP_IOCB) {
  1905. flag &= ~MBX_STOP_IOCB;
  1906. if (flag == MBX_NOWAIT) {
  1907. /* Now flag each ring */
  1908. for (i = 0; i < psli->num_rings; i++) {
  1909. /* If the ring is active, flag it */
  1910. if (psli->ring[i].cmdringaddr) {
  1911. psli->ring[i].flag |=
  1912. LPFC_STOP_IOCB_MBX;
  1913. }
  1914. }
  1915. }
  1916. }
  1917. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1918. /* If we are not polling, we MUST be in SLI2 mode */
  1919. if (flag != MBX_POLL) {
  1920. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  1921. (mb->mbxCommand != MBX_KILL_BOARD)) {
  1922. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1923. spin_unlock_irqrestore(phba->host->host_lock,
  1924. drvr_flag);
  1925. /* Mbox command <mbxCommand> cannot issue */
  1926. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1927. return (MBX_NOT_FINISHED);
  1928. }
  1929. /* timeout active mbox command */
  1930. mod_timer(&psli->mbox_tmo, (jiffies +
  1931. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  1932. }
  1933. /* Mailbox cmd <cmd> issue */
  1934. lpfc_printf_log(phba,
  1935. KERN_INFO,
  1936. LOG_MBOX | LOG_SLI,
  1937. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1938. phba->brd_no,
  1939. mb->mbxCommand,
  1940. phba->hba_state,
  1941. psli->sli_flag,
  1942. flag);
  1943. psli->slistat.mbox_cmd++;
  1944. evtctr = psli->slistat.mbox_event;
  1945. /* next set own bit for the adapter and copy over command word */
  1946. mb->mbxOwner = OWN_CHIP;
  1947. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1948. /* First copy command data to host SLIM area */
  1949. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1950. } else {
  1951. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1952. /* copy command data into host mbox for cmpl */
  1953. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1954. MAILBOX_CMD_SIZE);
  1955. }
  1956. /* First copy mbox command data to HBA SLIM, skip past first
  1957. word */
  1958. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1959. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1960. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1961. /* Next copy over first word, with mbxOwner set */
  1962. ldata = *((volatile uint32_t *)mb);
  1963. to_slim = phba->MBslimaddr;
  1964. writel(ldata, to_slim);
  1965. readl(to_slim); /* flush */
  1966. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1967. /* switch over to host mailbox */
  1968. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1969. }
  1970. }
  1971. wmb();
  1972. /* interrupt board to doit right away */
  1973. writel(CA_MBATT, phba->CAregaddr);
  1974. readl(phba->CAregaddr); /* flush */
  1975. switch (flag) {
  1976. case MBX_NOWAIT:
  1977. /* Don't wait for it to finish, just return */
  1978. psli->mbox_active = pmbox;
  1979. break;
  1980. case MBX_POLL:
  1981. psli->mbox_active = NULL;
  1982. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1983. /* First read mbox status word */
  1984. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1985. word0 = le32_to_cpu(word0);
  1986. } else {
  1987. /* First read mbox status word */
  1988. word0 = readl(phba->MBslimaddr);
  1989. }
  1990. /* Read the HBA Host Attention Register */
  1991. ha_copy = readl(phba->HAregaddr);
  1992. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  1993. i *= 1000; /* Convert to ms */
  1994. /* Wait for command to complete */
  1995. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  1996. (!(ha_copy & HA_MBATT) &&
  1997. (phba->hba_state > LPFC_WARM_START))) {
  1998. if (i-- <= 0) {
  1999. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2000. spin_unlock_irqrestore(phba->host->host_lock,
  2001. drvr_flag);
  2002. return (MBX_NOT_FINISHED);
  2003. }
  2004. /* Check if we took a mbox interrupt while we were
  2005. polling */
  2006. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2007. && (evtctr != psli->slistat.mbox_event))
  2008. break;
  2009. spin_unlock_irqrestore(phba->host->host_lock,
  2010. drvr_flag);
  2011. msleep(1);
  2012. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  2013. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2014. /* First copy command data */
  2015. word0 = *((volatile uint32_t *)
  2016. &phba->slim2p->mbx);
  2017. word0 = le32_to_cpu(word0);
  2018. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2019. MAILBOX_t *slimmb;
  2020. volatile uint32_t slimword0;
  2021. /* Check real SLIM for any errors */
  2022. slimword0 = readl(phba->MBslimaddr);
  2023. slimmb = (MAILBOX_t *) & slimword0;
  2024. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2025. && slimmb->mbxStatus) {
  2026. psli->sli_flag &=
  2027. ~LPFC_SLI2_ACTIVE;
  2028. word0 = slimword0;
  2029. }
  2030. }
  2031. } else {
  2032. /* First copy command data */
  2033. word0 = readl(phba->MBslimaddr);
  2034. }
  2035. /* Read the HBA Host Attention Register */
  2036. ha_copy = readl(phba->HAregaddr);
  2037. }
  2038. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2039. /* copy results back to user */
  2040. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2041. MAILBOX_CMD_SIZE);
  2042. } else {
  2043. /* First copy command data */
  2044. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2045. MAILBOX_CMD_SIZE);
  2046. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2047. pmbox->context2) {
  2048. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2049. phba->MBslimaddr + DMP_RSP_OFFSET,
  2050. mb->un.varDmp.word_cnt);
  2051. }
  2052. }
  2053. writel(HA_MBATT, phba->HAregaddr);
  2054. readl(phba->HAregaddr); /* flush */
  2055. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2056. status = mb->mbxStatus;
  2057. }
  2058. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  2059. return (status);
  2060. }
  2061. static int
  2062. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2063. struct lpfc_iocbq * piocb)
  2064. {
  2065. /* Insert the caller's iocb in the txq tail for later processing. */
  2066. list_add_tail(&piocb->list, &pring->txq);
  2067. pring->txq_cnt++;
  2068. return (0);
  2069. }
  2070. static struct lpfc_iocbq *
  2071. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2072. struct lpfc_iocbq ** piocb)
  2073. {
  2074. struct lpfc_iocbq * nextiocb;
  2075. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2076. if (!nextiocb) {
  2077. nextiocb = *piocb;
  2078. *piocb = NULL;
  2079. }
  2080. return nextiocb;
  2081. }
  2082. int
  2083. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2084. struct lpfc_iocbq *piocb, uint32_t flag)
  2085. {
  2086. struct lpfc_iocbq *nextiocb;
  2087. IOCB_t *iocb;
  2088. /* If the PCI channel is in offline state, do not post iocbs. */
  2089. if (unlikely(pci_channel_offline(phba->pcidev)))
  2090. return IOCB_ERROR;
  2091. /*
  2092. * We should never get an IOCB if we are in a < LINK_DOWN state
  2093. */
  2094. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2095. return IOCB_ERROR;
  2096. /*
  2097. * Check to see if we are blocking IOCB processing because of a
  2098. * outstanding mbox command.
  2099. */
  2100. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2101. goto iocb_busy;
  2102. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  2103. /*
  2104. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  2105. * can be issued if the link is not up.
  2106. */
  2107. switch (piocb->iocb.ulpCommand) {
  2108. case CMD_QUE_RING_BUF_CN:
  2109. case CMD_QUE_RING_BUF64_CN:
  2110. /*
  2111. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2112. * completion, iocb_cmpl MUST be 0.
  2113. */
  2114. if (piocb->iocb_cmpl)
  2115. piocb->iocb_cmpl = NULL;
  2116. /*FALLTHROUGH*/
  2117. case CMD_CREATE_XRI_CR:
  2118. break;
  2119. default:
  2120. goto iocb_busy;
  2121. }
  2122. /*
  2123. * For FCP commands, we must be in a state where we can process link
  2124. * attention events.
  2125. */
  2126. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2127. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  2128. goto iocb_busy;
  2129. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2130. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2131. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2132. if (iocb)
  2133. lpfc_sli_update_ring(phba, pring);
  2134. else
  2135. lpfc_sli_update_full_ring(phba, pring);
  2136. if (!piocb)
  2137. return IOCB_SUCCESS;
  2138. goto out_busy;
  2139. iocb_busy:
  2140. pring->stats.iocb_cmd_delay++;
  2141. out_busy:
  2142. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2143. lpfc_sli_ringtx_put(phba, pring, piocb);
  2144. return IOCB_SUCCESS;
  2145. }
  2146. return IOCB_BUSY;
  2147. }
  2148. static int
  2149. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2150. {
  2151. struct lpfc_sli *psli;
  2152. struct lpfc_sli_ring *pring;
  2153. psli = &phba->sli;
  2154. /* Adjust cmd/rsp ring iocb entries more evenly */
  2155. /* Take some away from the FCP ring */
  2156. pring = &psli->ring[psli->fcp_ring];
  2157. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2158. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2159. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2160. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2161. /* and give them to the extra ring */
  2162. pring = &psli->ring[psli->extra_ring];
  2163. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2164. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2165. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2166. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2167. /* Setup default profile for this ring */
  2168. pring->iotag_max = 4096;
  2169. pring->num_mask = 1;
  2170. pring->prt[0].profile = 0; /* Mask 0 */
  2171. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2172. pring->prt[0].type = phba->cfg_multi_ring_type;
  2173. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2174. return 0;
  2175. }
  2176. int
  2177. lpfc_sli_setup(struct lpfc_hba *phba)
  2178. {
  2179. int i, totiocb = 0;
  2180. struct lpfc_sli *psli = &phba->sli;
  2181. struct lpfc_sli_ring *pring;
  2182. psli->num_rings = MAX_CONFIGURED_RINGS;
  2183. psli->sli_flag = 0;
  2184. psli->fcp_ring = LPFC_FCP_RING;
  2185. psli->next_ring = LPFC_FCP_NEXT_RING;
  2186. psli->extra_ring = LPFC_EXTRA_RING;
  2187. psli->iocbq_lookup = NULL;
  2188. psli->iocbq_lookup_len = 0;
  2189. psli->last_iotag = 0;
  2190. for (i = 0; i < psli->num_rings; i++) {
  2191. pring = &psli->ring[i];
  2192. switch (i) {
  2193. case LPFC_FCP_RING: /* ring 0 - FCP */
  2194. /* numCiocb and numRiocb are used in config_port */
  2195. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2196. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2197. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2198. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2199. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2200. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2201. pring->iotag_ctr = 0;
  2202. pring->iotag_max =
  2203. (phba->cfg_hba_queue_depth * 2);
  2204. pring->fast_iotag = pring->iotag_max;
  2205. pring->num_mask = 0;
  2206. break;
  2207. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2208. /* numCiocb and numRiocb are used in config_port */
  2209. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2210. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2211. pring->num_mask = 0;
  2212. break;
  2213. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2214. /* numCiocb and numRiocb are used in config_port */
  2215. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2216. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2217. pring->fast_iotag = 0;
  2218. pring->iotag_ctr = 0;
  2219. pring->iotag_max = 4096;
  2220. pring->num_mask = 4;
  2221. pring->prt[0].profile = 0; /* Mask 0 */
  2222. pring->prt[0].rctl = FC_ELS_REQ;
  2223. pring->prt[0].type = FC_ELS_DATA;
  2224. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2225. lpfc_els_unsol_event;
  2226. pring->prt[1].profile = 0; /* Mask 1 */
  2227. pring->prt[1].rctl = FC_ELS_RSP;
  2228. pring->prt[1].type = FC_ELS_DATA;
  2229. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2230. lpfc_els_unsol_event;
  2231. pring->prt[2].profile = 0; /* Mask 2 */
  2232. /* NameServer Inquiry */
  2233. pring->prt[2].rctl = FC_UNSOL_CTL;
  2234. /* NameServer */
  2235. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2236. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2237. lpfc_ct_unsol_event;
  2238. pring->prt[3].profile = 0; /* Mask 3 */
  2239. /* NameServer response */
  2240. pring->prt[3].rctl = FC_SOL_CTL;
  2241. /* NameServer */
  2242. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2243. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2244. lpfc_ct_unsol_event;
  2245. break;
  2246. }
  2247. totiocb += (pring->numCiocb + pring->numRiocb);
  2248. }
  2249. if (totiocb > MAX_SLI2_IOCB) {
  2250. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2251. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2252. "%d:0462 Too many cmd / rsp ring entries in "
  2253. "SLI2 SLIM Data: x%x x%x\n",
  2254. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  2255. }
  2256. if (phba->cfg_multi_ring_support == 2)
  2257. lpfc_extra_ring_setup(phba);
  2258. return 0;
  2259. }
  2260. int
  2261. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  2262. {
  2263. struct lpfc_sli *psli;
  2264. struct lpfc_sli_ring *pring;
  2265. int i;
  2266. psli = &phba->sli;
  2267. spin_lock_irq(phba->host->host_lock);
  2268. INIT_LIST_HEAD(&psli->mboxq);
  2269. /* Initialize list headers for txq and txcmplq as double linked lists */
  2270. for (i = 0; i < psli->num_rings; i++) {
  2271. pring = &psli->ring[i];
  2272. pring->ringno = i;
  2273. pring->next_cmdidx = 0;
  2274. pring->local_getidx = 0;
  2275. pring->cmdidx = 0;
  2276. INIT_LIST_HEAD(&pring->txq);
  2277. INIT_LIST_HEAD(&pring->txcmplq);
  2278. INIT_LIST_HEAD(&pring->iocb_continueq);
  2279. INIT_LIST_HEAD(&pring->postbufq);
  2280. }
  2281. spin_unlock_irq(phba->host->host_lock);
  2282. return (1);
  2283. }
  2284. int
  2285. lpfc_sli_hba_down(struct lpfc_hba * phba)
  2286. {
  2287. LIST_HEAD(completions);
  2288. struct lpfc_sli *psli;
  2289. struct lpfc_sli_ring *pring;
  2290. LPFC_MBOXQ_t *pmb;
  2291. struct lpfc_iocbq *iocb;
  2292. IOCB_t *cmd = NULL;
  2293. int i;
  2294. unsigned long flags = 0;
  2295. psli = &phba->sli;
  2296. lpfc_hba_down_prep(phba);
  2297. spin_lock_irqsave(phba->host->host_lock, flags);
  2298. for (i = 0; i < psli->num_rings; i++) {
  2299. pring = &psli->ring[i];
  2300. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2301. /*
  2302. * Error everything on the txq since these iocbs have not been
  2303. * given to the FW yet.
  2304. */
  2305. list_splice_init(&pring->txq, &completions);
  2306. pring->txq_cnt = 0;
  2307. }
  2308. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2309. while (!list_empty(&completions)) {
  2310. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  2311. cmd = &iocb->iocb;
  2312. list_del(&iocb->list);
  2313. if (iocb->iocb_cmpl) {
  2314. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2315. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2316. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2317. } else
  2318. lpfc_sli_release_iocbq(phba, iocb);
  2319. }
  2320. /* Return any active mbox cmds */
  2321. del_timer_sync(&psli->mbox_tmo);
  2322. spin_lock_irqsave(phba->host->host_lock, flags);
  2323. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2324. if (psli->mbox_active) {
  2325. pmb = psli->mbox_active;
  2326. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2327. if (pmb->mbox_cmpl) {
  2328. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2329. pmb->mbox_cmpl(phba,pmb);
  2330. spin_lock_irqsave(phba->host->host_lock, flags);
  2331. }
  2332. }
  2333. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2334. psli->mbox_active = NULL;
  2335. /* Return any pending mbox cmds */
  2336. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2337. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2338. if (pmb->mbox_cmpl) {
  2339. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2340. pmb->mbox_cmpl(phba,pmb);
  2341. spin_lock_irqsave(phba->host->host_lock, flags);
  2342. }
  2343. }
  2344. INIT_LIST_HEAD(&psli->mboxq);
  2345. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2346. return 1;
  2347. }
  2348. void
  2349. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2350. {
  2351. uint32_t *src = srcp;
  2352. uint32_t *dest = destp;
  2353. uint32_t ldata;
  2354. int i;
  2355. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2356. ldata = *src;
  2357. ldata = le32_to_cpu(ldata);
  2358. *dest = ldata;
  2359. src++;
  2360. dest++;
  2361. }
  2362. }
  2363. int
  2364. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2365. struct lpfc_dmabuf * mp)
  2366. {
  2367. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2368. later */
  2369. list_add_tail(&mp->list, &pring->postbufq);
  2370. pring->postbufq_cnt++;
  2371. return 0;
  2372. }
  2373. struct lpfc_dmabuf *
  2374. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2375. dma_addr_t phys)
  2376. {
  2377. struct lpfc_dmabuf *mp, *next_mp;
  2378. struct list_head *slp = &pring->postbufq;
  2379. /* Search postbufq, from the begining, looking for a match on phys */
  2380. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2381. if (mp->phys == phys) {
  2382. list_del_init(&mp->list);
  2383. pring->postbufq_cnt--;
  2384. return mp;
  2385. }
  2386. }
  2387. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2388. "%d:0410 Cannot find virtual addr for mapped buf on "
  2389. "ring %d Data x%llx x%p x%p x%x\n",
  2390. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2391. slp->next, slp->prev, pring->postbufq_cnt);
  2392. return NULL;
  2393. }
  2394. static void
  2395. lpfc_sli_abort_els_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2396. struct lpfc_iocbq * rspiocb)
  2397. {
  2398. spin_lock_irq(phba->host->host_lock);
  2399. lpfc_sli_release_iocbq(phba, cmdiocb);
  2400. spin_unlock_irq(phba->host->host_lock);
  2401. return;
  2402. }
  2403. int
  2404. lpfc_sli_issue_abort_iotag(struct lpfc_hba * phba,
  2405. struct lpfc_sli_ring * pring,
  2406. struct lpfc_iocbq * cmdiocb)
  2407. {
  2408. struct lpfc_iocbq *abtsiocbp;
  2409. IOCB_t *icmd = NULL;
  2410. IOCB_t *iabt = NULL;
  2411. int retval = IOCB_ERROR;
  2412. /* There are certain command types we don't want
  2413. * to abort.
  2414. */
  2415. icmd = &cmdiocb->iocb;
  2416. if ((icmd->ulpCommand == CMD_ABORT_XRI_CN) ||
  2417. (icmd->ulpCommand == CMD_CLOSE_XRI_CN))
  2418. return 0;
  2419. /* If we're unloading, interrupts are disabled so we
  2420. * need to cleanup the iocb here.
  2421. */
  2422. if (phba->fc_flag & FC_UNLOADING)
  2423. goto abort_iotag_exit;
  2424. /* issue ABTS for this IOCB based on iotag */
  2425. abtsiocbp = lpfc_sli_get_iocbq(phba);
  2426. if (abtsiocbp == NULL)
  2427. return 0;
  2428. /* This signals the response to set the correct status
  2429. * before calling the completion handler.
  2430. */
  2431. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  2432. iabt = &abtsiocbp->iocb;
  2433. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  2434. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  2435. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  2436. iabt->ulpLe = 1;
  2437. iabt->ulpClass = icmd->ulpClass;
  2438. if (phba->hba_state >= LPFC_LINK_UP)
  2439. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  2440. else
  2441. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  2442. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  2443. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2444. "%d:0339 Abort xri x%x, original iotag x%x, abort "
  2445. "cmd iotag x%x\n",
  2446. phba->brd_no, iabt->un.acxri.abortContextTag,
  2447. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  2448. retval = lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  2449. abort_iotag_exit:
  2450. /* If we could not issue an abort dequeue the iocb and handle
  2451. * the completion here.
  2452. */
  2453. if (retval == IOCB_ERROR) {
  2454. list_del(&cmdiocb->list);
  2455. pring->txcmplq_cnt--;
  2456. if (cmdiocb->iocb_cmpl) {
  2457. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2458. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  2459. spin_unlock_irq(phba->host->host_lock);
  2460. (cmdiocb->iocb_cmpl) (phba, cmdiocb, cmdiocb);
  2461. spin_lock_irq(phba->host->host_lock);
  2462. } else
  2463. lpfc_sli_release_iocbq(phba, cmdiocb);
  2464. }
  2465. return 1;
  2466. }
  2467. static int
  2468. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  2469. uint64_t lun_id, uint32_t ctx,
  2470. lpfc_ctx_cmd ctx_cmd)
  2471. {
  2472. struct lpfc_scsi_buf *lpfc_cmd;
  2473. struct scsi_cmnd *cmnd;
  2474. int rc = 1;
  2475. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  2476. return rc;
  2477. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  2478. cmnd = lpfc_cmd->pCmd;
  2479. if (cmnd == NULL)
  2480. return rc;
  2481. switch (ctx_cmd) {
  2482. case LPFC_CTX_LUN:
  2483. if ((cmnd->device->id == tgt_id) &&
  2484. (cmnd->device->lun == lun_id))
  2485. rc = 0;
  2486. break;
  2487. case LPFC_CTX_TGT:
  2488. if (cmnd->device->id == tgt_id)
  2489. rc = 0;
  2490. break;
  2491. case LPFC_CTX_CTX:
  2492. if (iocbq->iocb.ulpContext == ctx)
  2493. rc = 0;
  2494. break;
  2495. case LPFC_CTX_HOST:
  2496. rc = 0;
  2497. break;
  2498. default:
  2499. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2500. __FUNCTION__, ctx_cmd);
  2501. break;
  2502. }
  2503. return rc;
  2504. }
  2505. int
  2506. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2507. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2508. {
  2509. struct lpfc_iocbq *iocbq;
  2510. int sum, i;
  2511. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  2512. iocbq = phba->sli.iocbq_lookup[i];
  2513. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2514. 0, ctx_cmd) == 0)
  2515. sum++;
  2516. }
  2517. return sum;
  2518. }
  2519. void
  2520. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2521. struct lpfc_iocbq * rspiocb)
  2522. {
  2523. unsigned long iflags;
  2524. spin_lock_irqsave(phba->host->host_lock, iflags);
  2525. lpfc_sli_release_iocbq(phba, cmdiocb);
  2526. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2527. return;
  2528. }
  2529. int
  2530. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2531. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2532. lpfc_ctx_cmd abort_cmd)
  2533. {
  2534. struct lpfc_iocbq *iocbq;
  2535. struct lpfc_iocbq *abtsiocb;
  2536. IOCB_t *cmd = NULL;
  2537. int errcnt = 0, ret_val = 0;
  2538. int i;
  2539. for (i = 1; i <= phba->sli.last_iotag; i++) {
  2540. iocbq = phba->sli.iocbq_lookup[i];
  2541. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  2542. 0, abort_cmd) != 0)
  2543. continue;
  2544. /* issue ABTS for this IOCB based on iotag */
  2545. abtsiocb = lpfc_sli_get_iocbq(phba);
  2546. if (abtsiocb == NULL) {
  2547. errcnt++;
  2548. continue;
  2549. }
  2550. cmd = &iocbq->iocb;
  2551. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2552. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2553. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2554. abtsiocb->iocb.ulpLe = 1;
  2555. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2556. if (phba->hba_state >= LPFC_LINK_UP)
  2557. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2558. else
  2559. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2560. /* Setup callback routine and issue the command. */
  2561. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  2562. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2563. if (ret_val == IOCB_ERROR) {
  2564. lpfc_sli_release_iocbq(phba, abtsiocb);
  2565. errcnt++;
  2566. continue;
  2567. }
  2568. }
  2569. return errcnt;
  2570. }
  2571. static void
  2572. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  2573. struct lpfc_iocbq *cmdiocbq,
  2574. struct lpfc_iocbq *rspiocbq)
  2575. {
  2576. wait_queue_head_t *pdone_q;
  2577. unsigned long iflags;
  2578. spin_lock_irqsave(phba->host->host_lock, iflags);
  2579. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  2580. if (cmdiocbq->context2 && rspiocbq)
  2581. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  2582. &rspiocbq->iocb, sizeof(IOCB_t));
  2583. pdone_q = cmdiocbq->context_un.wait_queue;
  2584. spin_unlock_irqrestore(phba->host->host_lock, iflags);
  2585. if (pdone_q)
  2586. wake_up(pdone_q);
  2587. return;
  2588. }
  2589. /*
  2590. * Issue the caller's iocb and wait for its completion, but no longer than the
  2591. * caller's timeout. Note that iocb_flags is cleared before the
  2592. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  2593. * definition this is a wait function.
  2594. */
  2595. int
  2596. lpfc_sli_issue_iocb_wait(struct lpfc_hba * phba,
  2597. struct lpfc_sli_ring * pring,
  2598. struct lpfc_iocbq * piocb,
  2599. struct lpfc_iocbq * prspiocbq,
  2600. uint32_t timeout)
  2601. {
  2602. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  2603. long timeleft, timeout_req = 0;
  2604. int retval = IOCB_SUCCESS;
  2605. uint32_t creg_val;
  2606. /*
  2607. * If the caller has provided a response iocbq buffer, then context2
  2608. * is NULL or its an error.
  2609. */
  2610. if (prspiocbq) {
  2611. if (piocb->context2)
  2612. return IOCB_ERROR;
  2613. piocb->context2 = prspiocbq;
  2614. }
  2615. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  2616. piocb->context_un.wait_queue = &done_q;
  2617. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  2618. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2619. creg_val = readl(phba->HCregaddr);
  2620. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  2621. writel(creg_val, phba->HCregaddr);
  2622. readl(phba->HCregaddr); /* flush */
  2623. }
  2624. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  2625. if (retval == IOCB_SUCCESS) {
  2626. timeout_req = timeout * HZ;
  2627. spin_unlock_irq(phba->host->host_lock);
  2628. timeleft = wait_event_timeout(done_q,
  2629. piocb->iocb_flag & LPFC_IO_WAKE,
  2630. timeout_req);
  2631. spin_lock_irq(phba->host->host_lock);
  2632. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  2633. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2634. "%d:0331 IOCB wake signaled\n",
  2635. phba->brd_no);
  2636. } else if (timeleft == 0) {
  2637. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2638. "%d:0338 IOCB wait timeout error - no "
  2639. "wake response Data x%x\n",
  2640. phba->brd_no, timeout);
  2641. retval = IOCB_TIMEDOUT;
  2642. } else {
  2643. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  2644. "%d:0330 IOCB wake NOT set, "
  2645. "Data x%x x%lx\n", phba->brd_no,
  2646. timeout, (timeleft / jiffies));
  2647. retval = IOCB_TIMEDOUT;
  2648. }
  2649. } else {
  2650. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  2651. "%d:0332 IOCB wait issue failed, Data x%x\n",
  2652. phba->brd_no, retval);
  2653. retval = IOCB_ERROR;
  2654. }
  2655. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  2656. creg_val = readl(phba->HCregaddr);
  2657. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  2658. writel(creg_val, phba->HCregaddr);
  2659. readl(phba->HCregaddr); /* flush */
  2660. }
  2661. if (prspiocbq)
  2662. piocb->context2 = NULL;
  2663. piocb->context_un.wait_queue = NULL;
  2664. piocb->iocb_cmpl = NULL;
  2665. return retval;
  2666. }
  2667. int
  2668. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2669. uint32_t timeout)
  2670. {
  2671. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  2672. int retval;
  2673. /* The caller must leave context1 empty. */
  2674. if (pmboxq->context1 != 0) {
  2675. return (MBX_NOT_FINISHED);
  2676. }
  2677. /* setup wake call as IOCB callback */
  2678. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2679. /* setup context field to pass wait_queue pointer to wake function */
  2680. pmboxq->context1 = &done_q;
  2681. /* now issue the command */
  2682. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2683. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2684. wait_event_interruptible_timeout(done_q,
  2685. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  2686. timeout * HZ);
  2687. pmboxq->context1 = NULL;
  2688. /*
  2689. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  2690. * else do not free the resources.
  2691. */
  2692. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  2693. retval = MBX_SUCCESS;
  2694. else
  2695. retval = MBX_TIMEOUT;
  2696. }
  2697. return retval;
  2698. }
  2699. int
  2700. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  2701. {
  2702. int i = 0;
  2703. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !phba->stopped) {
  2704. if (i++ > LPFC_MBOX_TMO * 1000)
  2705. return 1;
  2706. if (lpfc_sli_handle_mb_event(phba) == 0)
  2707. i = 0;
  2708. msleep(1);
  2709. }
  2710. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  2711. }
  2712. irqreturn_t
  2713. lpfc_intr_handler(int irq, void *dev_id)
  2714. {
  2715. struct lpfc_hba *phba;
  2716. uint32_t ha_copy;
  2717. uint32_t work_ha_copy;
  2718. unsigned long status;
  2719. int i;
  2720. uint32_t control;
  2721. /*
  2722. * Get the driver's phba structure from the dev_id and
  2723. * assume the HBA is not interrupting.
  2724. */
  2725. phba = (struct lpfc_hba *) dev_id;
  2726. if (unlikely(!phba))
  2727. return IRQ_NONE;
  2728. /* If the pci channel is offline, ignore all the interrupts. */
  2729. if (unlikely(pci_channel_offline(phba->pcidev)))
  2730. return IRQ_NONE;
  2731. phba->sli.slistat.sli_intr++;
  2732. /*
  2733. * Call the HBA to see if it is interrupting. If not, don't claim
  2734. * the interrupt
  2735. */
  2736. /* Ignore all interrupts during initialization. */
  2737. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2738. return IRQ_NONE;
  2739. /*
  2740. * Read host attention register to determine interrupt source
  2741. * Clear Attention Sources, except Error Attention (to
  2742. * preserve status) and Link Attention
  2743. */
  2744. spin_lock(phba->host->host_lock);
  2745. ha_copy = readl(phba->HAregaddr);
  2746. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2747. readl(phba->HAregaddr); /* flush */
  2748. spin_unlock(phba->host->host_lock);
  2749. if (unlikely(!ha_copy))
  2750. return IRQ_NONE;
  2751. work_ha_copy = ha_copy & phba->work_ha_mask;
  2752. if (unlikely(work_ha_copy)) {
  2753. if (work_ha_copy & HA_LATT) {
  2754. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2755. /*
  2756. * Turn off Link Attention interrupts
  2757. * until CLEAR_LA done
  2758. */
  2759. spin_lock(phba->host->host_lock);
  2760. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2761. control = readl(phba->HCregaddr);
  2762. control &= ~HC_LAINT_ENA;
  2763. writel(control, phba->HCregaddr);
  2764. readl(phba->HCregaddr); /* flush */
  2765. spin_unlock(phba->host->host_lock);
  2766. }
  2767. else
  2768. work_ha_copy &= ~HA_LATT;
  2769. }
  2770. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2771. for (i = 0; i < phba->sli.num_rings; i++) {
  2772. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2773. /*
  2774. * Turn off Slow Rings interrupts
  2775. */
  2776. spin_lock(phba->host->host_lock);
  2777. control = readl(phba->HCregaddr);
  2778. control &= ~(HC_R0INT_ENA << i);
  2779. writel(control, phba->HCregaddr);
  2780. readl(phba->HCregaddr); /* flush */
  2781. spin_unlock(phba->host->host_lock);
  2782. }
  2783. }
  2784. }
  2785. if (work_ha_copy & HA_ERATT) {
  2786. phba->hba_state = LPFC_HBA_ERROR;
  2787. /*
  2788. * There was a link/board error. Read the
  2789. * status register to retrieve the error event
  2790. * and process it.
  2791. */
  2792. phba->sli.slistat.err_attn_event++;
  2793. /* Save status info */
  2794. phba->work_hs = readl(phba->HSregaddr);
  2795. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2796. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2797. /* Clear Chip error bit */
  2798. writel(HA_ERATT, phba->HAregaddr);
  2799. readl(phba->HAregaddr); /* flush */
  2800. phba->stopped = 1;
  2801. }
  2802. spin_lock(phba->host->host_lock);
  2803. phba->work_ha |= work_ha_copy;
  2804. if (phba->work_wait)
  2805. wake_up(phba->work_wait);
  2806. spin_unlock(phba->host->host_lock);
  2807. }
  2808. ha_copy &= ~(phba->work_ha_mask);
  2809. /*
  2810. * Process all events on FCP ring. Take the optimized path for
  2811. * FCP IO. Any other IO is slow path and is handled by
  2812. * the worker thread.
  2813. */
  2814. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2815. status >>= (4*LPFC_FCP_RING);
  2816. if (status & HA_RXATT)
  2817. lpfc_sli_handle_fast_ring_event(phba,
  2818. &phba->sli.ring[LPFC_FCP_RING],
  2819. status);
  2820. if (phba->cfg_multi_ring_support == 2) {
  2821. /*
  2822. * Process all events on extra ring. Take the optimized path
  2823. * for extra ring IO. Any other IO is slow path and is handled
  2824. * by the worker thread.
  2825. */
  2826. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  2827. status >>= (4*LPFC_EXTRA_RING);
  2828. if (status & HA_RXATT) {
  2829. lpfc_sli_handle_fast_ring_event(phba,
  2830. &phba->sli.ring[LPFC_EXTRA_RING],
  2831. status);
  2832. }
  2833. }
  2834. return IRQ_HANDLED;
  2835. } /* lpfc_intr_handler */