eeh.h 11 KB

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  1. /*
  2. * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
  3. * Copyright 2001-2012 IBM Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #ifndef _POWERPC_EEH_H
  20. #define _POWERPC_EEH_H
  21. #ifdef __KERNEL__
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/string.h>
  25. struct pci_dev;
  26. struct pci_bus;
  27. struct device_node;
  28. #ifdef CONFIG_EEH
  29. /*
  30. * The struct is used to trace PE related EEH functionality.
  31. * In theory, there will have one instance of the struct to
  32. * be created against particular PE. In nature, PEs corelate
  33. * to each other. the struct has to reflect that hierarchy in
  34. * order to easily pick up those affected PEs when one particular
  35. * PE has EEH errors.
  36. *
  37. * Also, one particular PE might be composed of PCI device, PCI
  38. * bus and its subordinate components. The struct also need ship
  39. * the information. Further more, one particular PE is only meaingful
  40. * in the corresponding PHB. Therefore, the root PEs should be created
  41. * against existing PHBs in on-to-one fashion.
  42. */
  43. #define EEH_PE_PHB 1 /* PHB PE */
  44. #define EEH_PE_DEVICE 2 /* Device PE */
  45. #define EEH_PE_BUS 3 /* Bus PE */
  46. #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
  47. #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
  48. struct eeh_pe {
  49. int type; /* PE type: PHB/Bus/Device */
  50. int state; /* PE EEH dependent mode */
  51. int config_addr; /* Traditional PCI address */
  52. int addr; /* PE configuration address */
  53. struct pci_controller *phb; /* Associated PHB */
  54. int check_count; /* Times of ignored error */
  55. int freeze_count; /* Times of froze up */
  56. int false_positives; /* Times of reported #ff's */
  57. struct eeh_pe *parent; /* Parent PE */
  58. struct list_head child_list; /* Link PE to the child list */
  59. struct list_head edevs; /* Link list of EEH devices */
  60. struct list_head child; /* Child PEs */
  61. };
  62. #define eeh_pe_for_each_dev(pe, edev) \
  63. list_for_each_entry(edev, &pe->edevs, list)
  64. /*
  65. * The struct is used to trace EEH state for the associated
  66. * PCI device node or PCI device. In future, it might
  67. * represent PE as well so that the EEH device to form
  68. * another tree except the currently existing tree of PCI
  69. * buses and PCI devices
  70. */
  71. #define EEH_MODE_SUPPORTED (1<<0) /* EEH supported on the device */
  72. #define EEH_MODE_NOCHECK (1<<1) /* EEH check should be skipped */
  73. #define EEH_MODE_ISOLATED (1<<2) /* The device has been isolated */
  74. #define EEH_MODE_RECOVERING (1<<3) /* Recovering the device */
  75. #define EEH_MODE_IRQ_DISABLED (1<<4) /* Interrupt disabled */
  76. struct eeh_dev {
  77. int mode; /* EEH mode */
  78. int class_code; /* Class code of the device */
  79. int config_addr; /* Config address */
  80. int pe_config_addr; /* PE config address */
  81. int check_count; /* Times of ignored error */
  82. int freeze_count; /* Times of froze up */
  83. int false_positives; /* Times of reported #ff's */
  84. u32 config_space[16]; /* Saved PCI config space */
  85. struct eeh_pe *pe; /* Associated PE */
  86. struct list_head list; /* Form link list in the PE */
  87. struct pci_controller *phb; /* Associated PHB */
  88. struct device_node *dn; /* Associated device node */
  89. struct pci_dev *pdev; /* Associated PCI device */
  90. };
  91. static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev)
  92. {
  93. return edev->dn;
  94. }
  95. static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev)
  96. {
  97. return edev->pdev;
  98. }
  99. /*
  100. * The struct is used to trace the registered EEH operation
  101. * callback functions. Actually, those operation callback
  102. * functions are heavily platform dependent. That means the
  103. * platform should register its own EEH operation callback
  104. * functions before any EEH further operations.
  105. */
  106. #define EEH_OPT_DISABLE 0 /* EEH disable */
  107. #define EEH_OPT_ENABLE 1 /* EEH enable */
  108. #define EEH_OPT_THAW_MMIO 2 /* MMIO enable */
  109. #define EEH_OPT_THAW_DMA 3 /* DMA enable */
  110. #define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */
  111. #define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */
  112. #define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */
  113. #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */
  114. #define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */
  115. #define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */
  116. #define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */
  117. #define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */
  118. #define EEH_RESET_HOT 1 /* Hot reset */
  119. #define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */
  120. #define EEH_LOG_TEMP 1 /* EEH temporary error log */
  121. #define EEH_LOG_PERM 2 /* EEH permanent error log */
  122. struct eeh_ops {
  123. char *name;
  124. int (*init)(void);
  125. int (*set_option)(struct device_node *dn, int option);
  126. int (*get_pe_addr)(struct device_node *dn);
  127. int (*get_state)(struct device_node *dn, int *state);
  128. int (*reset)(struct device_node *dn, int option);
  129. int (*wait_state)(struct device_node *dn, int max_wait);
  130. int (*get_log)(struct device_node *dn, int severity, char *drv_log, unsigned long len);
  131. int (*configure_bridge)(struct device_node *dn);
  132. int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
  133. int (*write_config)(struct device_node *dn, int where, int size, u32 val);
  134. };
  135. extern struct eeh_ops *eeh_ops;
  136. extern int eeh_subsystem_enabled;
  137. extern struct mutex eeh_mutex;
  138. static inline void eeh_lock(void)
  139. {
  140. mutex_lock(&eeh_mutex);
  141. }
  142. static inline void eeh_unlock(void)
  143. {
  144. mutex_unlock(&eeh_mutex);
  145. }
  146. /*
  147. * Max number of EEH freezes allowed before we consider the device
  148. * to be permanently disabled.
  149. */
  150. #define EEH_MAX_ALLOWED_FREEZES 5
  151. typedef void *(*eeh_traverse_func)(void *data, void *flag);
  152. int __devinit eeh_phb_pe_create(struct pci_controller *phb);
  153. int eeh_add_to_parent_pe(struct eeh_dev *edev);
  154. int eeh_rmv_from_parent_pe(struct eeh_dev *edev);
  155. void * __devinit eeh_dev_init(struct device_node *dn, void *data);
  156. void __devinit eeh_dev_phb_init_dynamic(struct pci_controller *phb);
  157. int __init eeh_ops_register(struct eeh_ops *ops);
  158. int __exit eeh_ops_unregister(const char *name);
  159. unsigned long eeh_check_failure(const volatile void __iomem *token,
  160. unsigned long val);
  161. int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev);
  162. void __init pci_addr_cache_build(void);
  163. void eeh_add_device_tree_early(struct device_node *);
  164. void eeh_add_device_tree_late(struct pci_bus *);
  165. void eeh_remove_bus_device(struct pci_dev *);
  166. /**
  167. * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
  168. *
  169. * If this macro yields TRUE, the caller relays to eeh_check_failure()
  170. * which does further tests out of line.
  171. */
  172. #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled)
  173. /*
  174. * Reads from a device which has been isolated by EEH will return
  175. * all 1s. This macro gives an all-1s value of the given size (in
  176. * bytes: 1, 2, or 4) for comparing with the result of a read.
  177. */
  178. #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
  179. #else /* !CONFIG_EEH */
  180. static inline void *eeh_dev_init(struct device_node *dn, void *data)
  181. {
  182. return NULL;
  183. }
  184. static inline void eeh_dev_phb_init_dynamic(struct pci_controller *phb) { }
  185. static inline unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
  186. {
  187. return val;
  188. }
  189. static inline int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
  190. {
  191. return 0;
  192. }
  193. static inline void pci_addr_cache_build(void) { }
  194. static inline void eeh_add_device_tree_early(struct device_node *dn) { }
  195. static inline void eeh_add_device_tree_late(struct pci_bus *bus) { }
  196. static inline void eeh_remove_bus_device(struct pci_dev *dev) { }
  197. static inline void eeh_lock(void) { }
  198. static inline void eeh_unlock(void) { }
  199. #define EEH_POSSIBLE_ERROR(val, type) (0)
  200. #define EEH_IO_ERROR_VALUE(size) (-1UL)
  201. #endif /* CONFIG_EEH */
  202. #ifdef CONFIG_PPC64
  203. /*
  204. * MMIO read/write operations with EEH support.
  205. */
  206. static inline u8 eeh_readb(const volatile void __iomem *addr)
  207. {
  208. u8 val = in_8(addr);
  209. if (EEH_POSSIBLE_ERROR(val, u8))
  210. return eeh_check_failure(addr, val);
  211. return val;
  212. }
  213. static inline u16 eeh_readw(const volatile void __iomem *addr)
  214. {
  215. u16 val = in_le16(addr);
  216. if (EEH_POSSIBLE_ERROR(val, u16))
  217. return eeh_check_failure(addr, val);
  218. return val;
  219. }
  220. static inline u32 eeh_readl(const volatile void __iomem *addr)
  221. {
  222. u32 val = in_le32(addr);
  223. if (EEH_POSSIBLE_ERROR(val, u32))
  224. return eeh_check_failure(addr, val);
  225. return val;
  226. }
  227. static inline u64 eeh_readq(const volatile void __iomem *addr)
  228. {
  229. u64 val = in_le64(addr);
  230. if (EEH_POSSIBLE_ERROR(val, u64))
  231. return eeh_check_failure(addr, val);
  232. return val;
  233. }
  234. static inline u16 eeh_readw_be(const volatile void __iomem *addr)
  235. {
  236. u16 val = in_be16(addr);
  237. if (EEH_POSSIBLE_ERROR(val, u16))
  238. return eeh_check_failure(addr, val);
  239. return val;
  240. }
  241. static inline u32 eeh_readl_be(const volatile void __iomem *addr)
  242. {
  243. u32 val = in_be32(addr);
  244. if (EEH_POSSIBLE_ERROR(val, u32))
  245. return eeh_check_failure(addr, val);
  246. return val;
  247. }
  248. static inline u64 eeh_readq_be(const volatile void __iomem *addr)
  249. {
  250. u64 val = in_be64(addr);
  251. if (EEH_POSSIBLE_ERROR(val, u64))
  252. return eeh_check_failure(addr, val);
  253. return val;
  254. }
  255. static inline void eeh_memcpy_fromio(void *dest, const
  256. volatile void __iomem *src,
  257. unsigned long n)
  258. {
  259. _memcpy_fromio(dest, src, n);
  260. /* Look for ffff's here at dest[n]. Assume that at least 4 bytes
  261. * were copied. Check all four bytes.
  262. */
  263. if (n >= 4 && EEH_POSSIBLE_ERROR(*((u32 *)(dest + n - 4)), u32))
  264. eeh_check_failure(src, *((u32 *)(dest + n - 4)));
  265. }
  266. /* in-string eeh macros */
  267. static inline void eeh_readsb(const volatile void __iomem *addr, void * buf,
  268. int ns)
  269. {
  270. _insb(addr, buf, ns);
  271. if (EEH_POSSIBLE_ERROR((*(((u8*)buf)+ns-1)), u8))
  272. eeh_check_failure(addr, *(u8*)buf);
  273. }
  274. static inline void eeh_readsw(const volatile void __iomem *addr, void * buf,
  275. int ns)
  276. {
  277. _insw(addr, buf, ns);
  278. if (EEH_POSSIBLE_ERROR((*(((u16*)buf)+ns-1)), u16))
  279. eeh_check_failure(addr, *(u16*)buf);
  280. }
  281. static inline void eeh_readsl(const volatile void __iomem *addr, void * buf,
  282. int nl)
  283. {
  284. _insl(addr, buf, nl);
  285. if (EEH_POSSIBLE_ERROR((*(((u32*)buf)+nl-1)), u32))
  286. eeh_check_failure(addr, *(u32*)buf);
  287. }
  288. #endif /* CONFIG_PPC64 */
  289. #endif /* __KERNEL__ */
  290. #endif /* _POWERPC_EEH_H */