mmu.c 58 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "mmu.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. #ifndef MMU_DEBUG
  60. #define ASSERT(x) do { } while (0)
  61. #else
  62. #define ASSERT(x) \
  63. if (!(x)) { \
  64. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  65. __FILE__, __LINE__, #x); \
  66. }
  67. #endif
  68. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  69. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  70. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  71. #define PT64_LEVEL_BITS 9
  72. #define PT64_LEVEL_SHIFT(level) \
  73. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  74. #define PT64_LEVEL_MASK(level) \
  75. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  76. #define PT64_INDEX(address, level)\
  77. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  78. #define PT32_LEVEL_BITS 10
  79. #define PT32_LEVEL_SHIFT(level) \
  80. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  81. #define PT32_LEVEL_MASK(level) \
  82. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  83. #define PT32_INDEX(address, level)\
  84. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  85. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  86. #define PT64_DIR_BASE_ADDR_MASK \
  87. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  88. #define PT32_BASE_ADDR_MASK PAGE_MASK
  89. #define PT32_DIR_BASE_ADDR_MASK \
  90. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  91. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  92. | PT64_NX_MASK)
  93. #define PFERR_PRESENT_MASK (1U << 0)
  94. #define PFERR_WRITE_MASK (1U << 1)
  95. #define PFERR_USER_MASK (1U << 2)
  96. #define PFERR_FETCH_MASK (1U << 4)
  97. #define PT_DIRECTORY_LEVEL 2
  98. #define PT_PAGE_TABLE_LEVEL 1
  99. #define RMAP_EXT 4
  100. #define ACC_EXEC_MASK 1
  101. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  102. #define ACC_USER_MASK PT_USER_MASK
  103. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  104. struct kvm_pv_mmu_op_buffer {
  105. void *ptr;
  106. unsigned len;
  107. unsigned processed;
  108. char buf[512] __aligned(sizeof(long));
  109. };
  110. struct kvm_rmap_desc {
  111. u64 *shadow_ptes[RMAP_EXT];
  112. struct kvm_rmap_desc *more;
  113. };
  114. static struct kmem_cache *pte_chain_cache;
  115. static struct kmem_cache *rmap_desc_cache;
  116. static struct kmem_cache *mmu_page_header_cache;
  117. static u64 __read_mostly shadow_trap_nonpresent_pte;
  118. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  119. static u64 __read_mostly shadow_base_present_pte;
  120. static u64 __read_mostly shadow_nx_mask;
  121. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  122. static u64 __read_mostly shadow_user_mask;
  123. static u64 __read_mostly shadow_accessed_mask;
  124. static u64 __read_mostly shadow_dirty_mask;
  125. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  126. {
  127. shadow_trap_nonpresent_pte = trap_pte;
  128. shadow_notrap_nonpresent_pte = notrap_pte;
  129. }
  130. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  131. void kvm_mmu_set_base_ptes(u64 base_pte)
  132. {
  133. shadow_base_present_pte = base_pte;
  134. }
  135. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  136. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  137. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  138. {
  139. shadow_user_mask = user_mask;
  140. shadow_accessed_mask = accessed_mask;
  141. shadow_dirty_mask = dirty_mask;
  142. shadow_nx_mask = nx_mask;
  143. shadow_x_mask = x_mask;
  144. }
  145. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  146. static int is_write_protection(struct kvm_vcpu *vcpu)
  147. {
  148. return vcpu->arch.cr0 & X86_CR0_WP;
  149. }
  150. static int is_cpuid_PSE36(void)
  151. {
  152. return 1;
  153. }
  154. static int is_nx(struct kvm_vcpu *vcpu)
  155. {
  156. return vcpu->arch.shadow_efer & EFER_NX;
  157. }
  158. static int is_present_pte(unsigned long pte)
  159. {
  160. return pte & PT_PRESENT_MASK;
  161. }
  162. static int is_shadow_present_pte(u64 pte)
  163. {
  164. return pte != shadow_trap_nonpresent_pte
  165. && pte != shadow_notrap_nonpresent_pte;
  166. }
  167. static int is_large_pte(u64 pte)
  168. {
  169. return pte & PT_PAGE_SIZE_MASK;
  170. }
  171. static int is_writeble_pte(unsigned long pte)
  172. {
  173. return pte & PT_WRITABLE_MASK;
  174. }
  175. static int is_dirty_pte(unsigned long pte)
  176. {
  177. return pte & shadow_dirty_mask;
  178. }
  179. static int is_rmap_pte(u64 pte)
  180. {
  181. return is_shadow_present_pte(pte);
  182. }
  183. static pfn_t spte_to_pfn(u64 pte)
  184. {
  185. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  186. }
  187. static gfn_t pse36_gfn_delta(u32 gpte)
  188. {
  189. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  190. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  191. }
  192. static void set_shadow_pte(u64 *sptep, u64 spte)
  193. {
  194. #ifdef CONFIG_X86_64
  195. set_64bit((unsigned long *)sptep, spte);
  196. #else
  197. set_64bit((unsigned long long *)sptep, spte);
  198. #endif
  199. }
  200. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  201. struct kmem_cache *base_cache, int min)
  202. {
  203. void *obj;
  204. if (cache->nobjs >= min)
  205. return 0;
  206. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  207. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  208. if (!obj)
  209. return -ENOMEM;
  210. cache->objects[cache->nobjs++] = obj;
  211. }
  212. return 0;
  213. }
  214. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  215. {
  216. while (mc->nobjs)
  217. kfree(mc->objects[--mc->nobjs]);
  218. }
  219. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  220. int min)
  221. {
  222. struct page *page;
  223. if (cache->nobjs >= min)
  224. return 0;
  225. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  226. page = alloc_page(GFP_KERNEL);
  227. if (!page)
  228. return -ENOMEM;
  229. set_page_private(page, 0);
  230. cache->objects[cache->nobjs++] = page_address(page);
  231. }
  232. return 0;
  233. }
  234. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  235. {
  236. while (mc->nobjs)
  237. free_page((unsigned long)mc->objects[--mc->nobjs]);
  238. }
  239. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  240. {
  241. int r;
  242. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  243. pte_chain_cache, 4);
  244. if (r)
  245. goto out;
  246. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  247. rmap_desc_cache, 1);
  248. if (r)
  249. goto out;
  250. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  251. if (r)
  252. goto out;
  253. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  254. mmu_page_header_cache, 4);
  255. out:
  256. return r;
  257. }
  258. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  259. {
  260. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  261. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  262. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  263. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  264. }
  265. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  266. size_t size)
  267. {
  268. void *p;
  269. BUG_ON(!mc->nobjs);
  270. p = mc->objects[--mc->nobjs];
  271. memset(p, 0, size);
  272. return p;
  273. }
  274. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  275. {
  276. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  277. sizeof(struct kvm_pte_chain));
  278. }
  279. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  280. {
  281. kfree(pc);
  282. }
  283. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  284. {
  285. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  286. sizeof(struct kvm_rmap_desc));
  287. }
  288. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  289. {
  290. kfree(rd);
  291. }
  292. /*
  293. * Return the pointer to the largepage write count for a given
  294. * gfn, handling slots that are not large page aligned.
  295. */
  296. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  297. {
  298. unsigned long idx;
  299. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  300. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  301. return &slot->lpage_info[idx].write_count;
  302. }
  303. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  304. {
  305. int *write_count;
  306. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  307. *write_count += 1;
  308. }
  309. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  310. {
  311. int *write_count;
  312. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  313. *write_count -= 1;
  314. WARN_ON(*write_count < 0);
  315. }
  316. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  317. {
  318. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  319. int *largepage_idx;
  320. if (slot) {
  321. largepage_idx = slot_largepage_idx(gfn, slot);
  322. return *largepage_idx;
  323. }
  324. return 1;
  325. }
  326. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  327. {
  328. struct vm_area_struct *vma;
  329. unsigned long addr;
  330. addr = gfn_to_hva(kvm, gfn);
  331. if (kvm_is_error_hva(addr))
  332. return 0;
  333. vma = find_vma(current->mm, addr);
  334. if (vma && is_vm_hugetlb_page(vma))
  335. return 1;
  336. return 0;
  337. }
  338. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  339. {
  340. struct kvm_memory_slot *slot;
  341. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  342. return 0;
  343. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  344. return 0;
  345. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  346. if (slot && slot->dirty_bitmap)
  347. return 0;
  348. return 1;
  349. }
  350. /*
  351. * Take gfn and return the reverse mapping to it.
  352. * Note: gfn must be unaliased before this function get called
  353. */
  354. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  355. {
  356. struct kvm_memory_slot *slot;
  357. unsigned long idx;
  358. slot = gfn_to_memslot(kvm, gfn);
  359. if (!lpage)
  360. return &slot->rmap[gfn - slot->base_gfn];
  361. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  362. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  363. return &slot->lpage_info[idx].rmap_pde;
  364. }
  365. /*
  366. * Reverse mapping data structures:
  367. *
  368. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  369. * that points to page_address(page).
  370. *
  371. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  372. * containing more mappings.
  373. */
  374. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  375. {
  376. struct kvm_mmu_page *sp;
  377. struct kvm_rmap_desc *desc;
  378. unsigned long *rmapp;
  379. int i;
  380. if (!is_rmap_pte(*spte))
  381. return;
  382. gfn = unalias_gfn(vcpu->kvm, gfn);
  383. sp = page_header(__pa(spte));
  384. sp->gfns[spte - sp->spt] = gfn;
  385. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  386. if (!*rmapp) {
  387. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  388. *rmapp = (unsigned long)spte;
  389. } else if (!(*rmapp & 1)) {
  390. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  391. desc = mmu_alloc_rmap_desc(vcpu);
  392. desc->shadow_ptes[0] = (u64 *)*rmapp;
  393. desc->shadow_ptes[1] = spte;
  394. *rmapp = (unsigned long)desc | 1;
  395. } else {
  396. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  397. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  398. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  399. desc = desc->more;
  400. if (desc->shadow_ptes[RMAP_EXT-1]) {
  401. desc->more = mmu_alloc_rmap_desc(vcpu);
  402. desc = desc->more;
  403. }
  404. for (i = 0; desc->shadow_ptes[i]; ++i)
  405. ;
  406. desc->shadow_ptes[i] = spte;
  407. }
  408. }
  409. static void rmap_desc_remove_entry(unsigned long *rmapp,
  410. struct kvm_rmap_desc *desc,
  411. int i,
  412. struct kvm_rmap_desc *prev_desc)
  413. {
  414. int j;
  415. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  416. ;
  417. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  418. desc->shadow_ptes[j] = NULL;
  419. if (j != 0)
  420. return;
  421. if (!prev_desc && !desc->more)
  422. *rmapp = (unsigned long)desc->shadow_ptes[0];
  423. else
  424. if (prev_desc)
  425. prev_desc->more = desc->more;
  426. else
  427. *rmapp = (unsigned long)desc->more | 1;
  428. mmu_free_rmap_desc(desc);
  429. }
  430. static void rmap_remove(struct kvm *kvm, u64 *spte)
  431. {
  432. struct kvm_rmap_desc *desc;
  433. struct kvm_rmap_desc *prev_desc;
  434. struct kvm_mmu_page *sp;
  435. pfn_t pfn;
  436. unsigned long *rmapp;
  437. int i;
  438. if (!is_rmap_pte(*spte))
  439. return;
  440. sp = page_header(__pa(spte));
  441. pfn = spte_to_pfn(*spte);
  442. if (*spte & shadow_accessed_mask)
  443. kvm_set_pfn_accessed(pfn);
  444. if (is_writeble_pte(*spte))
  445. kvm_release_pfn_dirty(pfn);
  446. else
  447. kvm_release_pfn_clean(pfn);
  448. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  449. if (!*rmapp) {
  450. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  451. BUG();
  452. } else if (!(*rmapp & 1)) {
  453. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  454. if ((u64 *)*rmapp != spte) {
  455. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  456. spte, *spte);
  457. BUG();
  458. }
  459. *rmapp = 0;
  460. } else {
  461. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  462. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  463. prev_desc = NULL;
  464. while (desc) {
  465. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  466. if (desc->shadow_ptes[i] == spte) {
  467. rmap_desc_remove_entry(rmapp,
  468. desc, i,
  469. prev_desc);
  470. return;
  471. }
  472. prev_desc = desc;
  473. desc = desc->more;
  474. }
  475. BUG();
  476. }
  477. }
  478. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  479. {
  480. struct kvm_rmap_desc *desc;
  481. struct kvm_rmap_desc *prev_desc;
  482. u64 *prev_spte;
  483. int i;
  484. if (!*rmapp)
  485. return NULL;
  486. else if (!(*rmapp & 1)) {
  487. if (!spte)
  488. return (u64 *)*rmapp;
  489. return NULL;
  490. }
  491. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  492. prev_desc = NULL;
  493. prev_spte = NULL;
  494. while (desc) {
  495. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  496. if (prev_spte == spte)
  497. return desc->shadow_ptes[i];
  498. prev_spte = desc->shadow_ptes[i];
  499. }
  500. desc = desc->more;
  501. }
  502. return NULL;
  503. }
  504. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  505. {
  506. unsigned long *rmapp;
  507. u64 *spte;
  508. int write_protected = 0;
  509. gfn = unalias_gfn(kvm, gfn);
  510. rmapp = gfn_to_rmap(kvm, gfn, 0);
  511. spte = rmap_next(kvm, rmapp, NULL);
  512. while (spte) {
  513. BUG_ON(!spte);
  514. BUG_ON(!(*spte & PT_PRESENT_MASK));
  515. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  516. if (is_writeble_pte(*spte)) {
  517. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  518. write_protected = 1;
  519. }
  520. spte = rmap_next(kvm, rmapp, spte);
  521. }
  522. if (write_protected) {
  523. pfn_t pfn;
  524. spte = rmap_next(kvm, rmapp, NULL);
  525. pfn = spte_to_pfn(*spte);
  526. kvm_set_pfn_dirty(pfn);
  527. }
  528. /* check for huge page mappings */
  529. rmapp = gfn_to_rmap(kvm, gfn, 1);
  530. spte = rmap_next(kvm, rmapp, NULL);
  531. while (spte) {
  532. BUG_ON(!spte);
  533. BUG_ON(!(*spte & PT_PRESENT_MASK));
  534. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  535. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  536. if (is_writeble_pte(*spte)) {
  537. rmap_remove(kvm, spte);
  538. --kvm->stat.lpages;
  539. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  540. spte = NULL;
  541. write_protected = 1;
  542. }
  543. spte = rmap_next(kvm, rmapp, spte);
  544. }
  545. if (write_protected)
  546. kvm_flush_remote_tlbs(kvm);
  547. account_shadowed(kvm, gfn);
  548. }
  549. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  550. {
  551. u64 *spte;
  552. int need_tlb_flush = 0;
  553. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  554. BUG_ON(!(*spte & PT_PRESENT_MASK));
  555. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  556. rmap_remove(kvm, spte);
  557. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  558. need_tlb_flush = 1;
  559. }
  560. return need_tlb_flush;
  561. }
  562. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  563. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  564. {
  565. int i;
  566. int retval = 0;
  567. /*
  568. * If mmap_sem isn't taken, we can look the memslots with only
  569. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  570. */
  571. for (i = 0; i < kvm->nmemslots; i++) {
  572. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  573. unsigned long start = memslot->userspace_addr;
  574. unsigned long end;
  575. /* mmu_lock protects userspace_addr */
  576. if (!start)
  577. continue;
  578. end = start + (memslot->npages << PAGE_SHIFT);
  579. if (hva >= start && hva < end) {
  580. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  581. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  582. retval |= handler(kvm,
  583. &memslot->lpage_info[
  584. gfn_offset /
  585. KVM_PAGES_PER_HPAGE].rmap_pde);
  586. }
  587. }
  588. return retval;
  589. }
  590. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  591. {
  592. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  593. }
  594. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  595. {
  596. u64 *spte;
  597. int young = 0;
  598. spte = rmap_next(kvm, rmapp, NULL);
  599. while (spte) {
  600. int _young;
  601. u64 _spte = *spte;
  602. BUG_ON(!(_spte & PT_PRESENT_MASK));
  603. _young = _spte & PT_ACCESSED_MASK;
  604. if (_young) {
  605. young = 1;
  606. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  607. }
  608. spte = rmap_next(kvm, rmapp, spte);
  609. }
  610. return young;
  611. }
  612. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  613. {
  614. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  615. }
  616. #ifdef MMU_DEBUG
  617. static int is_empty_shadow_page(u64 *spt)
  618. {
  619. u64 *pos;
  620. u64 *end;
  621. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  622. if (is_shadow_present_pte(*pos)) {
  623. printk(KERN_ERR "%s: %p %llx\n", __func__,
  624. pos, *pos);
  625. return 0;
  626. }
  627. return 1;
  628. }
  629. #endif
  630. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  631. {
  632. ASSERT(is_empty_shadow_page(sp->spt));
  633. list_del(&sp->link);
  634. __free_page(virt_to_page(sp->spt));
  635. __free_page(virt_to_page(sp->gfns));
  636. kfree(sp);
  637. ++kvm->arch.n_free_mmu_pages;
  638. }
  639. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  640. {
  641. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  642. }
  643. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  644. u64 *parent_pte)
  645. {
  646. struct kvm_mmu_page *sp;
  647. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  648. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  649. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  650. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  651. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  652. ASSERT(is_empty_shadow_page(sp->spt));
  653. sp->slot_bitmap = 0;
  654. sp->multimapped = 0;
  655. sp->parent_pte = parent_pte;
  656. --vcpu->kvm->arch.n_free_mmu_pages;
  657. return sp;
  658. }
  659. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  660. struct kvm_mmu_page *sp, u64 *parent_pte)
  661. {
  662. struct kvm_pte_chain *pte_chain;
  663. struct hlist_node *node;
  664. int i;
  665. if (!parent_pte)
  666. return;
  667. if (!sp->multimapped) {
  668. u64 *old = sp->parent_pte;
  669. if (!old) {
  670. sp->parent_pte = parent_pte;
  671. return;
  672. }
  673. sp->multimapped = 1;
  674. pte_chain = mmu_alloc_pte_chain(vcpu);
  675. INIT_HLIST_HEAD(&sp->parent_ptes);
  676. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  677. pte_chain->parent_ptes[0] = old;
  678. }
  679. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  680. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  681. continue;
  682. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  683. if (!pte_chain->parent_ptes[i]) {
  684. pte_chain->parent_ptes[i] = parent_pte;
  685. return;
  686. }
  687. }
  688. pte_chain = mmu_alloc_pte_chain(vcpu);
  689. BUG_ON(!pte_chain);
  690. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  691. pte_chain->parent_ptes[0] = parent_pte;
  692. }
  693. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  694. u64 *parent_pte)
  695. {
  696. struct kvm_pte_chain *pte_chain;
  697. struct hlist_node *node;
  698. int i;
  699. if (!sp->multimapped) {
  700. BUG_ON(sp->parent_pte != parent_pte);
  701. sp->parent_pte = NULL;
  702. return;
  703. }
  704. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  705. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  706. if (!pte_chain->parent_ptes[i])
  707. break;
  708. if (pte_chain->parent_ptes[i] != parent_pte)
  709. continue;
  710. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  711. && pte_chain->parent_ptes[i + 1]) {
  712. pte_chain->parent_ptes[i]
  713. = pte_chain->parent_ptes[i + 1];
  714. ++i;
  715. }
  716. pte_chain->parent_ptes[i] = NULL;
  717. if (i == 0) {
  718. hlist_del(&pte_chain->link);
  719. mmu_free_pte_chain(pte_chain);
  720. if (hlist_empty(&sp->parent_ptes)) {
  721. sp->multimapped = 0;
  722. sp->parent_pte = NULL;
  723. }
  724. }
  725. return;
  726. }
  727. BUG();
  728. }
  729. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  730. struct kvm_mmu_page *sp)
  731. {
  732. int i;
  733. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  734. sp->spt[i] = shadow_trap_nonpresent_pte;
  735. }
  736. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  737. {
  738. unsigned index;
  739. struct hlist_head *bucket;
  740. struct kvm_mmu_page *sp;
  741. struct hlist_node *node;
  742. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  743. index = kvm_page_table_hashfn(gfn);
  744. bucket = &kvm->arch.mmu_page_hash[index];
  745. hlist_for_each_entry(sp, node, bucket, hash_link)
  746. if (sp->gfn == gfn && !sp->role.metaphysical
  747. && !sp->role.invalid) {
  748. pgprintk("%s: found role %x\n",
  749. __func__, sp->role.word);
  750. return sp;
  751. }
  752. return NULL;
  753. }
  754. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  755. gfn_t gfn,
  756. gva_t gaddr,
  757. unsigned level,
  758. int metaphysical,
  759. unsigned access,
  760. u64 *parent_pte)
  761. {
  762. union kvm_mmu_page_role role;
  763. unsigned index;
  764. unsigned quadrant;
  765. struct hlist_head *bucket;
  766. struct kvm_mmu_page *sp;
  767. struct hlist_node *node;
  768. role.word = 0;
  769. role.glevels = vcpu->arch.mmu.root_level;
  770. role.level = level;
  771. role.metaphysical = metaphysical;
  772. role.access = access;
  773. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  774. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  775. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  776. role.quadrant = quadrant;
  777. }
  778. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  779. gfn, role.word);
  780. index = kvm_page_table_hashfn(gfn);
  781. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  782. hlist_for_each_entry(sp, node, bucket, hash_link)
  783. if (sp->gfn == gfn && sp->role.word == role.word) {
  784. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  785. pgprintk("%s: found\n", __func__);
  786. return sp;
  787. }
  788. ++vcpu->kvm->stat.mmu_cache_miss;
  789. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  790. if (!sp)
  791. return sp;
  792. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  793. sp->gfn = gfn;
  794. sp->role = role;
  795. hlist_add_head(&sp->hash_link, bucket);
  796. if (!metaphysical)
  797. rmap_write_protect(vcpu->kvm, gfn);
  798. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  799. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  800. else
  801. nonpaging_prefetch_page(vcpu, sp);
  802. return sp;
  803. }
  804. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  805. struct kvm_mmu_page *sp)
  806. {
  807. unsigned i;
  808. u64 *pt;
  809. u64 ent;
  810. pt = sp->spt;
  811. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  812. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  813. if (is_shadow_present_pte(pt[i]))
  814. rmap_remove(kvm, &pt[i]);
  815. pt[i] = shadow_trap_nonpresent_pte;
  816. }
  817. kvm_flush_remote_tlbs(kvm);
  818. return;
  819. }
  820. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  821. ent = pt[i];
  822. if (is_shadow_present_pte(ent)) {
  823. if (!is_large_pte(ent)) {
  824. ent &= PT64_BASE_ADDR_MASK;
  825. mmu_page_remove_parent_pte(page_header(ent),
  826. &pt[i]);
  827. } else {
  828. --kvm->stat.lpages;
  829. rmap_remove(kvm, &pt[i]);
  830. }
  831. }
  832. pt[i] = shadow_trap_nonpresent_pte;
  833. }
  834. kvm_flush_remote_tlbs(kvm);
  835. }
  836. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  837. {
  838. mmu_page_remove_parent_pte(sp, parent_pte);
  839. }
  840. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  841. {
  842. int i;
  843. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  844. if (kvm->vcpus[i])
  845. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  846. }
  847. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  848. {
  849. u64 *parent_pte;
  850. ++kvm->stat.mmu_shadow_zapped;
  851. while (sp->multimapped || sp->parent_pte) {
  852. if (!sp->multimapped)
  853. parent_pte = sp->parent_pte;
  854. else {
  855. struct kvm_pte_chain *chain;
  856. chain = container_of(sp->parent_ptes.first,
  857. struct kvm_pte_chain, link);
  858. parent_pte = chain->parent_ptes[0];
  859. }
  860. BUG_ON(!parent_pte);
  861. kvm_mmu_put_page(sp, parent_pte);
  862. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  863. }
  864. kvm_mmu_page_unlink_children(kvm, sp);
  865. if (!sp->root_count) {
  866. if (!sp->role.metaphysical && !sp->role.invalid)
  867. unaccount_shadowed(kvm, sp->gfn);
  868. hlist_del(&sp->hash_link);
  869. kvm_mmu_free_page(kvm, sp);
  870. } else {
  871. int invalid = sp->role.invalid;
  872. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  873. sp->role.invalid = 1;
  874. kvm_reload_remote_mmus(kvm);
  875. if (!sp->role.metaphysical && !invalid)
  876. unaccount_shadowed(kvm, sp->gfn);
  877. }
  878. kvm_mmu_reset_last_pte_updated(kvm);
  879. }
  880. /*
  881. * Changing the number of mmu pages allocated to the vm
  882. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  883. */
  884. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  885. {
  886. /*
  887. * If we set the number of mmu pages to be smaller be than the
  888. * number of actived pages , we must to free some mmu pages before we
  889. * change the value
  890. */
  891. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  892. kvm_nr_mmu_pages) {
  893. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  894. - kvm->arch.n_free_mmu_pages;
  895. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  896. struct kvm_mmu_page *page;
  897. page = container_of(kvm->arch.active_mmu_pages.prev,
  898. struct kvm_mmu_page, link);
  899. kvm_mmu_zap_page(kvm, page);
  900. n_used_mmu_pages--;
  901. }
  902. kvm->arch.n_free_mmu_pages = 0;
  903. }
  904. else
  905. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  906. - kvm->arch.n_alloc_mmu_pages;
  907. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  908. }
  909. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  910. {
  911. unsigned index;
  912. struct hlist_head *bucket;
  913. struct kvm_mmu_page *sp;
  914. struct hlist_node *node, *n;
  915. int r;
  916. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  917. r = 0;
  918. index = kvm_page_table_hashfn(gfn);
  919. bucket = &kvm->arch.mmu_page_hash[index];
  920. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  921. if (sp->gfn == gfn && !sp->role.metaphysical) {
  922. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  923. sp->role.word);
  924. kvm_mmu_zap_page(kvm, sp);
  925. r = 1;
  926. }
  927. return r;
  928. }
  929. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  930. {
  931. struct kvm_mmu_page *sp;
  932. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  933. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  934. kvm_mmu_zap_page(kvm, sp);
  935. }
  936. }
  937. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  938. {
  939. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  940. struct kvm_mmu_page *sp = page_header(__pa(pte));
  941. __set_bit(slot, &sp->slot_bitmap);
  942. }
  943. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  944. {
  945. struct page *page;
  946. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  947. if (gpa == UNMAPPED_GVA)
  948. return NULL;
  949. down_read(&current->mm->mmap_sem);
  950. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  951. up_read(&current->mm->mmap_sem);
  952. return page;
  953. }
  954. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  955. unsigned pt_access, unsigned pte_access,
  956. int user_fault, int write_fault, int dirty,
  957. int *ptwrite, int largepage, gfn_t gfn,
  958. pfn_t pfn, bool speculative)
  959. {
  960. u64 spte;
  961. int was_rmapped = 0;
  962. int was_writeble = is_writeble_pte(*shadow_pte);
  963. pgprintk("%s: spte %llx access %x write_fault %d"
  964. " user_fault %d gfn %lx\n",
  965. __func__, *shadow_pte, pt_access,
  966. write_fault, user_fault, gfn);
  967. if (is_rmap_pte(*shadow_pte)) {
  968. /*
  969. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  970. * the parent of the now unreachable PTE.
  971. */
  972. if (largepage && !is_large_pte(*shadow_pte)) {
  973. struct kvm_mmu_page *child;
  974. u64 pte = *shadow_pte;
  975. child = page_header(pte & PT64_BASE_ADDR_MASK);
  976. mmu_page_remove_parent_pte(child, shadow_pte);
  977. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  978. pgprintk("hfn old %lx new %lx\n",
  979. spte_to_pfn(*shadow_pte), pfn);
  980. rmap_remove(vcpu->kvm, shadow_pte);
  981. } else {
  982. if (largepage)
  983. was_rmapped = is_large_pte(*shadow_pte);
  984. else
  985. was_rmapped = 1;
  986. }
  987. }
  988. /*
  989. * We don't set the accessed bit, since we sometimes want to see
  990. * whether the guest actually used the pte (in order to detect
  991. * demand paging).
  992. */
  993. spte = shadow_base_present_pte | shadow_dirty_mask;
  994. if (!speculative)
  995. pte_access |= PT_ACCESSED_MASK;
  996. if (!dirty)
  997. pte_access &= ~ACC_WRITE_MASK;
  998. if (pte_access & ACC_EXEC_MASK)
  999. spte |= shadow_x_mask;
  1000. else
  1001. spte |= shadow_nx_mask;
  1002. if (pte_access & ACC_USER_MASK)
  1003. spte |= shadow_user_mask;
  1004. if (largepage)
  1005. spte |= PT_PAGE_SIZE_MASK;
  1006. spte |= (u64)pfn << PAGE_SHIFT;
  1007. if ((pte_access & ACC_WRITE_MASK)
  1008. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1009. struct kvm_mmu_page *shadow;
  1010. spte |= PT_WRITABLE_MASK;
  1011. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1012. if (shadow ||
  1013. (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
  1014. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1015. __func__, gfn);
  1016. pte_access &= ~ACC_WRITE_MASK;
  1017. if (is_writeble_pte(spte)) {
  1018. spte &= ~PT_WRITABLE_MASK;
  1019. kvm_x86_ops->tlb_flush(vcpu);
  1020. }
  1021. if (write_fault)
  1022. *ptwrite = 1;
  1023. }
  1024. }
  1025. if (pte_access & ACC_WRITE_MASK)
  1026. mark_page_dirty(vcpu->kvm, gfn);
  1027. pgprintk("%s: setting spte %llx\n", __func__, spte);
  1028. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1029. (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
  1030. (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
  1031. set_shadow_pte(shadow_pte, spte);
  1032. if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
  1033. && (spte & PT_PRESENT_MASK))
  1034. ++vcpu->kvm->stat.lpages;
  1035. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1036. if (!was_rmapped) {
  1037. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1038. if (!is_rmap_pte(*shadow_pte))
  1039. kvm_release_pfn_clean(pfn);
  1040. } else {
  1041. if (was_writeble)
  1042. kvm_release_pfn_dirty(pfn);
  1043. else
  1044. kvm_release_pfn_clean(pfn);
  1045. }
  1046. if (speculative) {
  1047. vcpu->arch.last_pte_updated = shadow_pte;
  1048. vcpu->arch.last_pte_gfn = gfn;
  1049. }
  1050. }
  1051. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1052. {
  1053. }
  1054. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1055. int largepage, gfn_t gfn, pfn_t pfn,
  1056. int level)
  1057. {
  1058. hpa_t table_addr = vcpu->arch.mmu.root_hpa;
  1059. int pt_write = 0;
  1060. for (; ; level--) {
  1061. u32 index = PT64_INDEX(v, level);
  1062. u64 *table;
  1063. ASSERT(VALID_PAGE(table_addr));
  1064. table = __va(table_addr);
  1065. if (level == 1) {
  1066. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  1067. 0, write, 1, &pt_write, 0, gfn, pfn, false);
  1068. return pt_write;
  1069. }
  1070. if (largepage && level == 2) {
  1071. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  1072. 0, write, 1, &pt_write, 1, gfn, pfn, false);
  1073. return pt_write;
  1074. }
  1075. if (table[index] == shadow_trap_nonpresent_pte) {
  1076. struct kvm_mmu_page *new_table;
  1077. gfn_t pseudo_gfn;
  1078. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  1079. >> PAGE_SHIFT;
  1080. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  1081. v, level - 1,
  1082. 1, ACC_ALL, &table[index]);
  1083. if (!new_table) {
  1084. pgprintk("nonpaging_map: ENOMEM\n");
  1085. kvm_release_pfn_clean(pfn);
  1086. return -ENOMEM;
  1087. }
  1088. set_shadow_pte(&table[index],
  1089. __pa(new_table->spt)
  1090. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1091. | shadow_user_mask | shadow_x_mask);
  1092. }
  1093. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  1094. }
  1095. }
  1096. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1097. {
  1098. int r;
  1099. int largepage = 0;
  1100. pfn_t pfn;
  1101. unsigned long mmu_seq;
  1102. down_read(&current->mm->mmap_sem);
  1103. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1104. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1105. largepage = 1;
  1106. }
  1107. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1108. /* implicit mb(), we'll read before PT lock is unlocked */
  1109. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1110. up_read(&current->mm->mmap_sem);
  1111. /* mmio */
  1112. if (is_error_pfn(pfn)) {
  1113. kvm_release_pfn_clean(pfn);
  1114. return 1;
  1115. }
  1116. spin_lock(&vcpu->kvm->mmu_lock);
  1117. if (mmu_notifier_retry(vcpu, mmu_seq))
  1118. goto out_unlock;
  1119. kvm_mmu_free_some_pages(vcpu);
  1120. r = __direct_map(vcpu, v, write, largepage, gfn, pfn,
  1121. PT32E_ROOT_LEVEL);
  1122. spin_unlock(&vcpu->kvm->mmu_lock);
  1123. return r;
  1124. out_unlock:
  1125. spin_unlock(&vcpu->kvm->mmu_lock);
  1126. kvm_release_pfn_clean(pfn);
  1127. return 0;
  1128. }
  1129. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1130. {
  1131. int i;
  1132. struct kvm_mmu_page *sp;
  1133. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1134. return;
  1135. spin_lock(&vcpu->kvm->mmu_lock);
  1136. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1137. hpa_t root = vcpu->arch.mmu.root_hpa;
  1138. sp = page_header(root);
  1139. --sp->root_count;
  1140. if (!sp->root_count && sp->role.invalid)
  1141. kvm_mmu_zap_page(vcpu->kvm, sp);
  1142. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1143. spin_unlock(&vcpu->kvm->mmu_lock);
  1144. return;
  1145. }
  1146. for (i = 0; i < 4; ++i) {
  1147. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1148. if (root) {
  1149. root &= PT64_BASE_ADDR_MASK;
  1150. sp = page_header(root);
  1151. --sp->root_count;
  1152. if (!sp->root_count && sp->role.invalid)
  1153. kvm_mmu_zap_page(vcpu->kvm, sp);
  1154. }
  1155. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1156. }
  1157. spin_unlock(&vcpu->kvm->mmu_lock);
  1158. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1159. }
  1160. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1161. {
  1162. int i;
  1163. gfn_t root_gfn;
  1164. struct kvm_mmu_page *sp;
  1165. int metaphysical = 0;
  1166. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1167. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1168. hpa_t root = vcpu->arch.mmu.root_hpa;
  1169. ASSERT(!VALID_PAGE(root));
  1170. if (tdp_enabled)
  1171. metaphysical = 1;
  1172. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1173. PT64_ROOT_LEVEL, metaphysical,
  1174. ACC_ALL, NULL);
  1175. root = __pa(sp->spt);
  1176. ++sp->root_count;
  1177. vcpu->arch.mmu.root_hpa = root;
  1178. return;
  1179. }
  1180. metaphysical = !is_paging(vcpu);
  1181. if (tdp_enabled)
  1182. metaphysical = 1;
  1183. for (i = 0; i < 4; ++i) {
  1184. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1185. ASSERT(!VALID_PAGE(root));
  1186. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1187. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1188. vcpu->arch.mmu.pae_root[i] = 0;
  1189. continue;
  1190. }
  1191. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1192. } else if (vcpu->arch.mmu.root_level == 0)
  1193. root_gfn = 0;
  1194. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1195. PT32_ROOT_LEVEL, metaphysical,
  1196. ACC_ALL, NULL);
  1197. root = __pa(sp->spt);
  1198. ++sp->root_count;
  1199. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1200. }
  1201. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1202. }
  1203. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1204. {
  1205. return vaddr;
  1206. }
  1207. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1208. u32 error_code)
  1209. {
  1210. gfn_t gfn;
  1211. int r;
  1212. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1213. r = mmu_topup_memory_caches(vcpu);
  1214. if (r)
  1215. return r;
  1216. ASSERT(vcpu);
  1217. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1218. gfn = gva >> PAGE_SHIFT;
  1219. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1220. error_code & PFERR_WRITE_MASK, gfn);
  1221. }
  1222. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1223. u32 error_code)
  1224. {
  1225. pfn_t pfn;
  1226. int r;
  1227. int largepage = 0;
  1228. gfn_t gfn = gpa >> PAGE_SHIFT;
  1229. unsigned long mmu_seq;
  1230. ASSERT(vcpu);
  1231. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1232. r = mmu_topup_memory_caches(vcpu);
  1233. if (r)
  1234. return r;
  1235. down_read(&current->mm->mmap_sem);
  1236. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1237. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1238. largepage = 1;
  1239. }
  1240. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1241. /* implicit mb(), we'll read before PT lock is unlocked */
  1242. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1243. up_read(&current->mm->mmap_sem);
  1244. if (is_error_pfn(pfn)) {
  1245. kvm_release_pfn_clean(pfn);
  1246. return 1;
  1247. }
  1248. spin_lock(&vcpu->kvm->mmu_lock);
  1249. if (mmu_notifier_retry(vcpu, mmu_seq))
  1250. goto out_unlock;
  1251. kvm_mmu_free_some_pages(vcpu);
  1252. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1253. largepage, gfn, pfn, kvm_x86_ops->get_tdp_level());
  1254. spin_unlock(&vcpu->kvm->mmu_lock);
  1255. return r;
  1256. out_unlock:
  1257. spin_unlock(&vcpu->kvm->mmu_lock);
  1258. kvm_release_pfn_clean(pfn);
  1259. return 0;
  1260. }
  1261. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1262. {
  1263. mmu_free_roots(vcpu);
  1264. }
  1265. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1266. {
  1267. struct kvm_mmu *context = &vcpu->arch.mmu;
  1268. context->new_cr3 = nonpaging_new_cr3;
  1269. context->page_fault = nonpaging_page_fault;
  1270. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1271. context->free = nonpaging_free;
  1272. context->prefetch_page = nonpaging_prefetch_page;
  1273. context->root_level = 0;
  1274. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1275. context->root_hpa = INVALID_PAGE;
  1276. return 0;
  1277. }
  1278. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1279. {
  1280. ++vcpu->stat.tlb_flush;
  1281. kvm_x86_ops->tlb_flush(vcpu);
  1282. }
  1283. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1284. {
  1285. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1286. mmu_free_roots(vcpu);
  1287. }
  1288. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1289. u64 addr,
  1290. u32 err_code)
  1291. {
  1292. kvm_inject_page_fault(vcpu, addr, err_code);
  1293. }
  1294. static void paging_free(struct kvm_vcpu *vcpu)
  1295. {
  1296. nonpaging_free(vcpu);
  1297. }
  1298. #define PTTYPE 64
  1299. #include "paging_tmpl.h"
  1300. #undef PTTYPE
  1301. #define PTTYPE 32
  1302. #include "paging_tmpl.h"
  1303. #undef PTTYPE
  1304. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1305. {
  1306. struct kvm_mmu *context = &vcpu->arch.mmu;
  1307. ASSERT(is_pae(vcpu));
  1308. context->new_cr3 = paging_new_cr3;
  1309. context->page_fault = paging64_page_fault;
  1310. context->gva_to_gpa = paging64_gva_to_gpa;
  1311. context->prefetch_page = paging64_prefetch_page;
  1312. context->free = paging_free;
  1313. context->root_level = level;
  1314. context->shadow_root_level = level;
  1315. context->root_hpa = INVALID_PAGE;
  1316. return 0;
  1317. }
  1318. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1319. {
  1320. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1321. }
  1322. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1323. {
  1324. struct kvm_mmu *context = &vcpu->arch.mmu;
  1325. context->new_cr3 = paging_new_cr3;
  1326. context->page_fault = paging32_page_fault;
  1327. context->gva_to_gpa = paging32_gva_to_gpa;
  1328. context->free = paging_free;
  1329. context->prefetch_page = paging32_prefetch_page;
  1330. context->root_level = PT32_ROOT_LEVEL;
  1331. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1332. context->root_hpa = INVALID_PAGE;
  1333. return 0;
  1334. }
  1335. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1336. {
  1337. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1338. }
  1339. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1340. {
  1341. struct kvm_mmu *context = &vcpu->arch.mmu;
  1342. context->new_cr3 = nonpaging_new_cr3;
  1343. context->page_fault = tdp_page_fault;
  1344. context->free = nonpaging_free;
  1345. context->prefetch_page = nonpaging_prefetch_page;
  1346. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1347. context->root_hpa = INVALID_PAGE;
  1348. if (!is_paging(vcpu)) {
  1349. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1350. context->root_level = 0;
  1351. } else if (is_long_mode(vcpu)) {
  1352. context->gva_to_gpa = paging64_gva_to_gpa;
  1353. context->root_level = PT64_ROOT_LEVEL;
  1354. } else if (is_pae(vcpu)) {
  1355. context->gva_to_gpa = paging64_gva_to_gpa;
  1356. context->root_level = PT32E_ROOT_LEVEL;
  1357. } else {
  1358. context->gva_to_gpa = paging32_gva_to_gpa;
  1359. context->root_level = PT32_ROOT_LEVEL;
  1360. }
  1361. return 0;
  1362. }
  1363. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1364. {
  1365. ASSERT(vcpu);
  1366. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1367. if (!is_paging(vcpu))
  1368. return nonpaging_init_context(vcpu);
  1369. else if (is_long_mode(vcpu))
  1370. return paging64_init_context(vcpu);
  1371. else if (is_pae(vcpu))
  1372. return paging32E_init_context(vcpu);
  1373. else
  1374. return paging32_init_context(vcpu);
  1375. }
  1376. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1377. {
  1378. vcpu->arch.update_pte.pfn = bad_pfn;
  1379. if (tdp_enabled)
  1380. return init_kvm_tdp_mmu(vcpu);
  1381. else
  1382. return init_kvm_softmmu(vcpu);
  1383. }
  1384. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1385. {
  1386. ASSERT(vcpu);
  1387. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1388. vcpu->arch.mmu.free(vcpu);
  1389. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1390. }
  1391. }
  1392. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1393. {
  1394. destroy_kvm_mmu(vcpu);
  1395. return init_kvm_mmu(vcpu);
  1396. }
  1397. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1398. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1399. {
  1400. int r;
  1401. r = mmu_topup_memory_caches(vcpu);
  1402. if (r)
  1403. goto out;
  1404. spin_lock(&vcpu->kvm->mmu_lock);
  1405. kvm_mmu_free_some_pages(vcpu);
  1406. mmu_alloc_roots(vcpu);
  1407. spin_unlock(&vcpu->kvm->mmu_lock);
  1408. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1409. kvm_mmu_flush_tlb(vcpu);
  1410. out:
  1411. return r;
  1412. }
  1413. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1414. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1415. {
  1416. mmu_free_roots(vcpu);
  1417. }
  1418. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1419. struct kvm_mmu_page *sp,
  1420. u64 *spte)
  1421. {
  1422. u64 pte;
  1423. struct kvm_mmu_page *child;
  1424. pte = *spte;
  1425. if (is_shadow_present_pte(pte)) {
  1426. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1427. is_large_pte(pte))
  1428. rmap_remove(vcpu->kvm, spte);
  1429. else {
  1430. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1431. mmu_page_remove_parent_pte(child, spte);
  1432. }
  1433. }
  1434. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1435. if (is_large_pte(pte))
  1436. --vcpu->kvm->stat.lpages;
  1437. }
  1438. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1439. struct kvm_mmu_page *sp,
  1440. u64 *spte,
  1441. const void *new)
  1442. {
  1443. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  1444. if (!vcpu->arch.update_pte.largepage ||
  1445. sp->role.glevels == PT32_ROOT_LEVEL) {
  1446. ++vcpu->kvm->stat.mmu_pde_zapped;
  1447. return;
  1448. }
  1449. }
  1450. ++vcpu->kvm->stat.mmu_pte_updated;
  1451. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1452. paging32_update_pte(vcpu, sp, spte, new);
  1453. else
  1454. paging64_update_pte(vcpu, sp, spte, new);
  1455. }
  1456. static bool need_remote_flush(u64 old, u64 new)
  1457. {
  1458. if (!is_shadow_present_pte(old))
  1459. return false;
  1460. if (!is_shadow_present_pte(new))
  1461. return true;
  1462. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1463. return true;
  1464. old ^= PT64_NX_MASK;
  1465. new ^= PT64_NX_MASK;
  1466. return (old & ~new & PT64_PERM_MASK) != 0;
  1467. }
  1468. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1469. {
  1470. if (need_remote_flush(old, new))
  1471. kvm_flush_remote_tlbs(vcpu->kvm);
  1472. else
  1473. kvm_mmu_flush_tlb(vcpu);
  1474. }
  1475. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1476. {
  1477. u64 *spte = vcpu->arch.last_pte_updated;
  1478. return !!(spte && (*spte & shadow_accessed_mask));
  1479. }
  1480. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1481. const u8 *new, int bytes)
  1482. {
  1483. gfn_t gfn;
  1484. int r;
  1485. u64 gpte = 0;
  1486. pfn_t pfn;
  1487. vcpu->arch.update_pte.largepage = 0;
  1488. if (bytes != 4 && bytes != 8)
  1489. return;
  1490. /*
  1491. * Assume that the pte write on a page table of the same type
  1492. * as the current vcpu paging mode. This is nearly always true
  1493. * (might be false while changing modes). Note it is verified later
  1494. * by update_pte().
  1495. */
  1496. if (is_pae(vcpu)) {
  1497. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  1498. if ((bytes == 4) && (gpa % 4 == 0)) {
  1499. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  1500. if (r)
  1501. return;
  1502. memcpy((void *)&gpte + (gpa % 8), new, 4);
  1503. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  1504. memcpy((void *)&gpte, new, 8);
  1505. }
  1506. } else {
  1507. if ((bytes == 4) && (gpa % 4 == 0))
  1508. memcpy((void *)&gpte, new, 4);
  1509. }
  1510. if (!is_present_pte(gpte))
  1511. return;
  1512. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1513. down_read(&current->mm->mmap_sem);
  1514. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  1515. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1516. vcpu->arch.update_pte.largepage = 1;
  1517. }
  1518. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1519. /* implicit mb(), we'll read before PT lock is unlocked */
  1520. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1521. up_read(&current->mm->mmap_sem);
  1522. if (is_error_pfn(pfn)) {
  1523. kvm_release_pfn_clean(pfn);
  1524. return;
  1525. }
  1526. vcpu->arch.update_pte.gfn = gfn;
  1527. vcpu->arch.update_pte.pfn = pfn;
  1528. }
  1529. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  1530. {
  1531. u64 *spte = vcpu->arch.last_pte_updated;
  1532. if (spte
  1533. && vcpu->arch.last_pte_gfn == gfn
  1534. && shadow_accessed_mask
  1535. && !(*spte & shadow_accessed_mask)
  1536. && is_shadow_present_pte(*spte))
  1537. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  1538. }
  1539. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1540. const u8 *new, int bytes)
  1541. {
  1542. gfn_t gfn = gpa >> PAGE_SHIFT;
  1543. struct kvm_mmu_page *sp;
  1544. struct hlist_node *node, *n;
  1545. struct hlist_head *bucket;
  1546. unsigned index;
  1547. u64 entry, gentry;
  1548. u64 *spte;
  1549. unsigned offset = offset_in_page(gpa);
  1550. unsigned pte_size;
  1551. unsigned page_offset;
  1552. unsigned misaligned;
  1553. unsigned quadrant;
  1554. int level;
  1555. int flooded = 0;
  1556. int npte;
  1557. int r;
  1558. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  1559. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  1560. spin_lock(&vcpu->kvm->mmu_lock);
  1561. kvm_mmu_access_page(vcpu, gfn);
  1562. kvm_mmu_free_some_pages(vcpu);
  1563. ++vcpu->kvm->stat.mmu_pte_write;
  1564. kvm_mmu_audit(vcpu, "pre pte write");
  1565. if (gfn == vcpu->arch.last_pt_write_gfn
  1566. && !last_updated_pte_accessed(vcpu)) {
  1567. ++vcpu->arch.last_pt_write_count;
  1568. if (vcpu->arch.last_pt_write_count >= 3)
  1569. flooded = 1;
  1570. } else {
  1571. vcpu->arch.last_pt_write_gfn = gfn;
  1572. vcpu->arch.last_pt_write_count = 1;
  1573. vcpu->arch.last_pte_updated = NULL;
  1574. }
  1575. index = kvm_page_table_hashfn(gfn);
  1576. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1577. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1578. if (sp->gfn != gfn || sp->role.metaphysical)
  1579. continue;
  1580. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1581. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1582. misaligned |= bytes < 4;
  1583. if (misaligned || flooded) {
  1584. /*
  1585. * Misaligned accesses are too much trouble to fix
  1586. * up; also, they usually indicate a page is not used
  1587. * as a page table.
  1588. *
  1589. * If we're seeing too many writes to a page,
  1590. * it may no longer be a page table, or we may be
  1591. * forking, in which case it is better to unmap the
  1592. * page.
  1593. */
  1594. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1595. gpa, bytes, sp->role.word);
  1596. kvm_mmu_zap_page(vcpu->kvm, sp);
  1597. ++vcpu->kvm->stat.mmu_flooded;
  1598. continue;
  1599. }
  1600. page_offset = offset;
  1601. level = sp->role.level;
  1602. npte = 1;
  1603. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1604. page_offset <<= 1; /* 32->64 */
  1605. /*
  1606. * A 32-bit pde maps 4MB while the shadow pdes map
  1607. * only 2MB. So we need to double the offset again
  1608. * and zap two pdes instead of one.
  1609. */
  1610. if (level == PT32_ROOT_LEVEL) {
  1611. page_offset &= ~7; /* kill rounding error */
  1612. page_offset <<= 1;
  1613. npte = 2;
  1614. }
  1615. quadrant = page_offset >> PAGE_SHIFT;
  1616. page_offset &= ~PAGE_MASK;
  1617. if (quadrant != sp->role.quadrant)
  1618. continue;
  1619. }
  1620. spte = &sp->spt[page_offset / sizeof(*spte)];
  1621. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  1622. gentry = 0;
  1623. r = kvm_read_guest_atomic(vcpu->kvm,
  1624. gpa & ~(u64)(pte_size - 1),
  1625. &gentry, pte_size);
  1626. new = (const void *)&gentry;
  1627. if (r < 0)
  1628. new = NULL;
  1629. }
  1630. while (npte--) {
  1631. entry = *spte;
  1632. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1633. if (new)
  1634. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  1635. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1636. ++spte;
  1637. }
  1638. }
  1639. kvm_mmu_audit(vcpu, "post pte write");
  1640. spin_unlock(&vcpu->kvm->mmu_lock);
  1641. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  1642. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  1643. vcpu->arch.update_pte.pfn = bad_pfn;
  1644. }
  1645. }
  1646. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1647. {
  1648. gpa_t gpa;
  1649. int r;
  1650. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1651. spin_lock(&vcpu->kvm->mmu_lock);
  1652. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1653. spin_unlock(&vcpu->kvm->mmu_lock);
  1654. return r;
  1655. }
  1656. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  1657. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1658. {
  1659. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  1660. struct kvm_mmu_page *sp;
  1661. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  1662. struct kvm_mmu_page, link);
  1663. kvm_mmu_zap_page(vcpu->kvm, sp);
  1664. ++vcpu->kvm->stat.mmu_recycled;
  1665. }
  1666. }
  1667. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1668. {
  1669. int r;
  1670. enum emulation_result er;
  1671. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  1672. if (r < 0)
  1673. goto out;
  1674. if (!r) {
  1675. r = 1;
  1676. goto out;
  1677. }
  1678. r = mmu_topup_memory_caches(vcpu);
  1679. if (r)
  1680. goto out;
  1681. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1682. switch (er) {
  1683. case EMULATE_DONE:
  1684. return 1;
  1685. case EMULATE_DO_MMIO:
  1686. ++vcpu->stat.mmio_exits;
  1687. return 0;
  1688. case EMULATE_FAIL:
  1689. kvm_report_emulation_failure(vcpu, "pagetable");
  1690. return 1;
  1691. default:
  1692. BUG();
  1693. }
  1694. out:
  1695. return r;
  1696. }
  1697. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1698. void kvm_enable_tdp(void)
  1699. {
  1700. tdp_enabled = true;
  1701. }
  1702. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  1703. void kvm_disable_tdp(void)
  1704. {
  1705. tdp_enabled = false;
  1706. }
  1707. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  1708. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1709. {
  1710. struct kvm_mmu_page *sp;
  1711. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  1712. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  1713. struct kvm_mmu_page, link);
  1714. kvm_mmu_zap_page(vcpu->kvm, sp);
  1715. cond_resched();
  1716. }
  1717. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  1718. }
  1719. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1720. {
  1721. struct page *page;
  1722. int i;
  1723. ASSERT(vcpu);
  1724. if (vcpu->kvm->arch.n_requested_mmu_pages)
  1725. vcpu->kvm->arch.n_free_mmu_pages =
  1726. vcpu->kvm->arch.n_requested_mmu_pages;
  1727. else
  1728. vcpu->kvm->arch.n_free_mmu_pages =
  1729. vcpu->kvm->arch.n_alloc_mmu_pages;
  1730. /*
  1731. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1732. * Therefore we need to allocate shadow page tables in the first
  1733. * 4GB of memory, which happens to fit the DMA32 zone.
  1734. */
  1735. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1736. if (!page)
  1737. goto error_1;
  1738. vcpu->arch.mmu.pae_root = page_address(page);
  1739. for (i = 0; i < 4; ++i)
  1740. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1741. return 0;
  1742. error_1:
  1743. free_mmu_pages(vcpu);
  1744. return -ENOMEM;
  1745. }
  1746. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1747. {
  1748. ASSERT(vcpu);
  1749. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1750. return alloc_mmu_pages(vcpu);
  1751. }
  1752. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1753. {
  1754. ASSERT(vcpu);
  1755. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1756. return init_kvm_mmu(vcpu);
  1757. }
  1758. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1759. {
  1760. ASSERT(vcpu);
  1761. destroy_kvm_mmu(vcpu);
  1762. free_mmu_pages(vcpu);
  1763. mmu_free_memory_caches(vcpu);
  1764. }
  1765. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1766. {
  1767. struct kvm_mmu_page *sp;
  1768. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  1769. int i;
  1770. u64 *pt;
  1771. if (!test_bit(slot, &sp->slot_bitmap))
  1772. continue;
  1773. pt = sp->spt;
  1774. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1775. /* avoid RMW */
  1776. if (pt[i] & PT_WRITABLE_MASK)
  1777. pt[i] &= ~PT_WRITABLE_MASK;
  1778. }
  1779. }
  1780. void kvm_mmu_zap_all(struct kvm *kvm)
  1781. {
  1782. struct kvm_mmu_page *sp, *node;
  1783. spin_lock(&kvm->mmu_lock);
  1784. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  1785. kvm_mmu_zap_page(kvm, sp);
  1786. spin_unlock(&kvm->mmu_lock);
  1787. kvm_flush_remote_tlbs(kvm);
  1788. }
  1789. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  1790. {
  1791. struct kvm_mmu_page *page;
  1792. page = container_of(kvm->arch.active_mmu_pages.prev,
  1793. struct kvm_mmu_page, link);
  1794. kvm_mmu_zap_page(kvm, page);
  1795. }
  1796. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  1797. {
  1798. struct kvm *kvm;
  1799. struct kvm *kvm_freed = NULL;
  1800. int cache_count = 0;
  1801. spin_lock(&kvm_lock);
  1802. list_for_each_entry(kvm, &vm_list, vm_list) {
  1803. int npages;
  1804. if (!down_read_trylock(&kvm->slots_lock))
  1805. continue;
  1806. spin_lock(&kvm->mmu_lock);
  1807. npages = kvm->arch.n_alloc_mmu_pages -
  1808. kvm->arch.n_free_mmu_pages;
  1809. cache_count += npages;
  1810. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  1811. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  1812. cache_count--;
  1813. kvm_freed = kvm;
  1814. }
  1815. nr_to_scan--;
  1816. spin_unlock(&kvm->mmu_lock);
  1817. up_read(&kvm->slots_lock);
  1818. }
  1819. if (kvm_freed)
  1820. list_move_tail(&kvm_freed->vm_list, &vm_list);
  1821. spin_unlock(&kvm_lock);
  1822. return cache_count;
  1823. }
  1824. static struct shrinker mmu_shrinker = {
  1825. .shrink = mmu_shrink,
  1826. .seeks = DEFAULT_SEEKS * 10,
  1827. };
  1828. static void mmu_destroy_caches(void)
  1829. {
  1830. if (pte_chain_cache)
  1831. kmem_cache_destroy(pte_chain_cache);
  1832. if (rmap_desc_cache)
  1833. kmem_cache_destroy(rmap_desc_cache);
  1834. if (mmu_page_header_cache)
  1835. kmem_cache_destroy(mmu_page_header_cache);
  1836. }
  1837. void kvm_mmu_module_exit(void)
  1838. {
  1839. mmu_destroy_caches();
  1840. unregister_shrinker(&mmu_shrinker);
  1841. }
  1842. int kvm_mmu_module_init(void)
  1843. {
  1844. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1845. sizeof(struct kvm_pte_chain),
  1846. 0, 0, NULL);
  1847. if (!pte_chain_cache)
  1848. goto nomem;
  1849. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1850. sizeof(struct kvm_rmap_desc),
  1851. 0, 0, NULL);
  1852. if (!rmap_desc_cache)
  1853. goto nomem;
  1854. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1855. sizeof(struct kvm_mmu_page),
  1856. 0, 0, NULL);
  1857. if (!mmu_page_header_cache)
  1858. goto nomem;
  1859. register_shrinker(&mmu_shrinker);
  1860. return 0;
  1861. nomem:
  1862. mmu_destroy_caches();
  1863. return -ENOMEM;
  1864. }
  1865. /*
  1866. * Caculate mmu pages needed for kvm.
  1867. */
  1868. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1869. {
  1870. int i;
  1871. unsigned int nr_mmu_pages;
  1872. unsigned int nr_pages = 0;
  1873. for (i = 0; i < kvm->nmemslots; i++)
  1874. nr_pages += kvm->memslots[i].npages;
  1875. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1876. nr_mmu_pages = max(nr_mmu_pages,
  1877. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1878. return nr_mmu_pages;
  1879. }
  1880. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1881. unsigned len)
  1882. {
  1883. if (len > buffer->len)
  1884. return NULL;
  1885. return buffer->ptr;
  1886. }
  1887. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1888. unsigned len)
  1889. {
  1890. void *ret;
  1891. ret = pv_mmu_peek_buffer(buffer, len);
  1892. if (!ret)
  1893. return ret;
  1894. buffer->ptr += len;
  1895. buffer->len -= len;
  1896. buffer->processed += len;
  1897. return ret;
  1898. }
  1899. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  1900. gpa_t addr, gpa_t value)
  1901. {
  1902. int bytes = 8;
  1903. int r;
  1904. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  1905. bytes = 4;
  1906. r = mmu_topup_memory_caches(vcpu);
  1907. if (r)
  1908. return r;
  1909. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  1910. return -EFAULT;
  1911. return 1;
  1912. }
  1913. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1914. {
  1915. kvm_x86_ops->tlb_flush(vcpu);
  1916. return 1;
  1917. }
  1918. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  1919. {
  1920. spin_lock(&vcpu->kvm->mmu_lock);
  1921. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  1922. spin_unlock(&vcpu->kvm->mmu_lock);
  1923. return 1;
  1924. }
  1925. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  1926. struct kvm_pv_mmu_op_buffer *buffer)
  1927. {
  1928. struct kvm_mmu_op_header *header;
  1929. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  1930. if (!header)
  1931. return 0;
  1932. switch (header->op) {
  1933. case KVM_MMU_OP_WRITE_PTE: {
  1934. struct kvm_mmu_op_write_pte *wpte;
  1935. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  1936. if (!wpte)
  1937. return 0;
  1938. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  1939. wpte->pte_val);
  1940. }
  1941. case KVM_MMU_OP_FLUSH_TLB: {
  1942. struct kvm_mmu_op_flush_tlb *ftlb;
  1943. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  1944. if (!ftlb)
  1945. return 0;
  1946. return kvm_pv_mmu_flush_tlb(vcpu);
  1947. }
  1948. case KVM_MMU_OP_RELEASE_PT: {
  1949. struct kvm_mmu_op_release_pt *rpt;
  1950. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  1951. if (!rpt)
  1952. return 0;
  1953. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  1954. }
  1955. default: return 0;
  1956. }
  1957. }
  1958. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  1959. gpa_t addr, unsigned long *ret)
  1960. {
  1961. int r;
  1962. struct kvm_pv_mmu_op_buffer buffer;
  1963. buffer.ptr = buffer.buf;
  1964. buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
  1965. buffer.processed = 0;
  1966. r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
  1967. if (r)
  1968. goto out;
  1969. while (buffer.len) {
  1970. r = kvm_pv_mmu_op_one(vcpu, &buffer);
  1971. if (r < 0)
  1972. goto out;
  1973. if (r == 0)
  1974. break;
  1975. }
  1976. r = 1;
  1977. out:
  1978. *ret = buffer.processed;
  1979. return r;
  1980. }
  1981. #ifdef AUDIT
  1982. static const char *audit_msg;
  1983. static gva_t canonicalize(gva_t gva)
  1984. {
  1985. #ifdef CONFIG_X86_64
  1986. gva = (long long)(gva << 16) >> 16;
  1987. #endif
  1988. return gva;
  1989. }
  1990. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1991. gva_t va, int level)
  1992. {
  1993. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1994. int i;
  1995. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1996. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1997. u64 ent = pt[i];
  1998. if (ent == shadow_trap_nonpresent_pte)
  1999. continue;
  2000. va = canonicalize(va);
  2001. if (level > 1) {
  2002. if (ent == shadow_notrap_nonpresent_pte)
  2003. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2004. " in nonleaf level: levels %d gva %lx"
  2005. " level %d pte %llx\n", audit_msg,
  2006. vcpu->arch.mmu.root_level, va, level, ent);
  2007. audit_mappings_page(vcpu, ent, va, level - 1);
  2008. } else {
  2009. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2010. hpa_t hpa = (hpa_t)gpa_to_pfn(vcpu, gpa) << PAGE_SHIFT;
  2011. if (is_shadow_present_pte(ent)
  2012. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2013. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2014. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2015. audit_msg, vcpu->arch.mmu.root_level,
  2016. va, gpa, hpa, ent,
  2017. is_shadow_present_pte(ent));
  2018. else if (ent == shadow_notrap_nonpresent_pte
  2019. && !is_error_hpa(hpa))
  2020. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2021. " valid guest gva %lx\n", audit_msg, va);
  2022. kvm_release_pfn_clean(pfn);
  2023. }
  2024. }
  2025. }
  2026. static void audit_mappings(struct kvm_vcpu *vcpu)
  2027. {
  2028. unsigned i;
  2029. if (vcpu->arch.mmu.root_level == 4)
  2030. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2031. else
  2032. for (i = 0; i < 4; ++i)
  2033. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2034. audit_mappings_page(vcpu,
  2035. vcpu->arch.mmu.pae_root[i],
  2036. i << 30,
  2037. 2);
  2038. }
  2039. static int count_rmaps(struct kvm_vcpu *vcpu)
  2040. {
  2041. int nmaps = 0;
  2042. int i, j, k;
  2043. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2044. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2045. struct kvm_rmap_desc *d;
  2046. for (j = 0; j < m->npages; ++j) {
  2047. unsigned long *rmapp = &m->rmap[j];
  2048. if (!*rmapp)
  2049. continue;
  2050. if (!(*rmapp & 1)) {
  2051. ++nmaps;
  2052. continue;
  2053. }
  2054. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2055. while (d) {
  2056. for (k = 0; k < RMAP_EXT; ++k)
  2057. if (d->shadow_ptes[k])
  2058. ++nmaps;
  2059. else
  2060. break;
  2061. d = d->more;
  2062. }
  2063. }
  2064. }
  2065. return nmaps;
  2066. }
  2067. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2068. {
  2069. int nmaps = 0;
  2070. struct kvm_mmu_page *sp;
  2071. int i;
  2072. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2073. u64 *pt = sp->spt;
  2074. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2075. continue;
  2076. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2077. u64 ent = pt[i];
  2078. if (!(ent & PT_PRESENT_MASK))
  2079. continue;
  2080. if (!(ent & PT_WRITABLE_MASK))
  2081. continue;
  2082. ++nmaps;
  2083. }
  2084. }
  2085. return nmaps;
  2086. }
  2087. static void audit_rmap(struct kvm_vcpu *vcpu)
  2088. {
  2089. int n_rmap = count_rmaps(vcpu);
  2090. int n_actual = count_writable_mappings(vcpu);
  2091. if (n_rmap != n_actual)
  2092. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2093. __func__, audit_msg, n_rmap, n_actual);
  2094. }
  2095. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2096. {
  2097. struct kvm_mmu_page *sp;
  2098. struct kvm_memory_slot *slot;
  2099. unsigned long *rmapp;
  2100. gfn_t gfn;
  2101. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2102. if (sp->role.metaphysical)
  2103. continue;
  2104. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  2105. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2106. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2107. if (*rmapp)
  2108. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2109. " mappings: gfn %lx role %x\n",
  2110. __func__, audit_msg, sp->gfn,
  2111. sp->role.word);
  2112. }
  2113. }
  2114. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2115. {
  2116. int olddbg = dbg;
  2117. dbg = 0;
  2118. audit_msg = msg;
  2119. audit_rmap(vcpu);
  2120. audit_write_protection(vcpu);
  2121. audit_mappings(vcpu);
  2122. dbg = olddbg;
  2123. }
  2124. #endif