setup.c 7.9 KB

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  1. /*
  2. * linux/arch/mips/txx9/generic/setup.c
  3. *
  4. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  5. * and RBTX49xx patch from CELF patch archive.
  6. *
  7. * 2003-2005 (c) MontaVista Software, Inc.
  8. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file "COPYING" in the main directory of this archive
  12. * for more details.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/string.h>
  19. #include <linux/module.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/gpio.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/serial_core.h>
  25. #include <asm/bootinfo.h>
  26. #include <asm/time.h>
  27. #include <asm/reboot.h>
  28. #include <asm/txx9/generic.h>
  29. #include <asm/txx9/pci.h>
  30. #ifdef CONFIG_CPU_TX49XX
  31. #include <asm/txx9/tx4938.h>
  32. #endif
  33. /* EBUSC settings of TX4927, etc. */
  34. struct resource txx9_ce_res[8];
  35. static char txx9_ce_res_name[8][4]; /* "CEn" */
  36. /* pcode, internal register */
  37. unsigned int txx9_pcode;
  38. char txx9_pcode_str[8];
  39. static struct resource txx9_reg_res = {
  40. .name = txx9_pcode_str,
  41. .flags = IORESOURCE_MEM,
  42. };
  43. void __init
  44. txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
  45. {
  46. int i;
  47. for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
  48. sprintf(txx9_ce_res_name[i], "CE%d", i);
  49. txx9_ce_res[i].flags = IORESOURCE_MEM;
  50. txx9_ce_res[i].name = txx9_ce_res_name[i];
  51. }
  52. sprintf(txx9_pcode_str, "TX%x", pcode);
  53. if (base) {
  54. txx9_reg_res.start = base & 0xfffffffffULL;
  55. txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
  56. request_resource(&iomem_resource, &txx9_reg_res);
  57. }
  58. }
  59. /* clocks */
  60. unsigned int txx9_master_clock;
  61. unsigned int txx9_cpu_clock;
  62. unsigned int txx9_gbus_clock;
  63. int txx9_ccfg_toeon __initdata = 1;
  64. /* Minimum CLK support */
  65. struct clk *clk_get(struct device *dev, const char *id)
  66. {
  67. if (!strcmp(id, "spi-baseclk"))
  68. return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
  69. if (!strcmp(id, "imbus_clk"))
  70. return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
  71. return ERR_PTR(-ENOENT);
  72. }
  73. EXPORT_SYMBOL(clk_get);
  74. int clk_enable(struct clk *clk)
  75. {
  76. return 0;
  77. }
  78. EXPORT_SYMBOL(clk_enable);
  79. void clk_disable(struct clk *clk)
  80. {
  81. }
  82. EXPORT_SYMBOL(clk_disable);
  83. unsigned long clk_get_rate(struct clk *clk)
  84. {
  85. return (unsigned long)clk;
  86. }
  87. EXPORT_SYMBOL(clk_get_rate);
  88. void clk_put(struct clk *clk)
  89. {
  90. }
  91. EXPORT_SYMBOL(clk_put);
  92. /* GPIO support */
  93. #ifdef CONFIG_GENERIC_GPIO
  94. int gpio_to_irq(unsigned gpio)
  95. {
  96. return -EINVAL;
  97. }
  98. EXPORT_SYMBOL(gpio_to_irq);
  99. int irq_to_gpio(unsigned irq)
  100. {
  101. return -EINVAL;
  102. }
  103. EXPORT_SYMBOL(irq_to_gpio);
  104. #endif
  105. extern struct txx9_board_vec jmr3927_vec;
  106. extern struct txx9_board_vec rbtx4927_vec;
  107. extern struct txx9_board_vec rbtx4937_vec;
  108. extern struct txx9_board_vec rbtx4938_vec;
  109. struct txx9_board_vec *txx9_board_vec __initdata;
  110. static char txx9_system_type[32];
  111. void __init prom_init_cmdline(void)
  112. {
  113. int argc = (int)fw_arg0;
  114. char **argv = (char **)fw_arg1;
  115. int i; /* Always ignore the "-c" at argv[0] */
  116. #ifdef CONFIG_64BIT
  117. char *fixed_argv[32];
  118. for (i = 0; i < argc; i++)
  119. fixed_argv[i] = (char *)(long)(*((__s32 *)argv + i));
  120. argv = fixed_argv;
  121. #endif
  122. /* ignore all built-in args if any f/w args given */
  123. if (argc > 1)
  124. *arcs_cmdline = '\0';
  125. for (i = 1; i < argc; i++) {
  126. if (i != 1)
  127. strcat(arcs_cmdline, " ");
  128. strcat(arcs_cmdline, argv[i]);
  129. }
  130. }
  131. void __init prom_init(void)
  132. {
  133. #ifdef CONFIG_CPU_TX39XX
  134. txx9_board_vec = &jmr3927_vec;
  135. #endif
  136. #ifdef CONFIG_CPU_TX49XX
  137. switch (TX4938_REV_PCODE()) {
  138. #ifdef CONFIG_TOSHIBA_RBTX4927
  139. case 0x4927:
  140. txx9_board_vec = &rbtx4927_vec;
  141. break;
  142. case 0x4937:
  143. txx9_board_vec = &rbtx4937_vec;
  144. break;
  145. #endif
  146. #ifdef CONFIG_TOSHIBA_RBTX4938
  147. case 0x4938:
  148. txx9_board_vec = &rbtx4938_vec;
  149. break;
  150. #endif
  151. }
  152. #endif
  153. strcpy(txx9_system_type, txx9_board_vec->system);
  154. txx9_board_vec->prom_init();
  155. }
  156. void __init prom_free_prom_memory(void)
  157. {
  158. }
  159. const char *get_system_type(void)
  160. {
  161. return txx9_system_type;
  162. }
  163. char * __init prom_getcmdline(void)
  164. {
  165. return &(arcs_cmdline[0]);
  166. }
  167. static void __noreturn txx9_machine_halt(void)
  168. {
  169. local_irq_disable();
  170. clear_c0_status(ST0_IM);
  171. while (1) {
  172. if (cpu_wait) {
  173. (*cpu_wait)();
  174. if (cpu_has_counter) {
  175. /*
  176. * Clear counter interrupt while it
  177. * breaks WAIT instruction even if
  178. * masked.
  179. */
  180. write_c0_compare(0);
  181. }
  182. }
  183. }
  184. }
  185. /* Watchdog support */
  186. void __init txx9_wdt_init(unsigned long base)
  187. {
  188. struct resource res = {
  189. .start = base,
  190. .end = base + 0x100 - 1,
  191. .flags = IORESOURCE_MEM,
  192. };
  193. platform_device_register_simple("txx9wdt", -1, &res, 1);
  194. }
  195. /* SPI support */
  196. void __init txx9_spi_init(int busid, unsigned long base, int irq)
  197. {
  198. struct resource res[] = {
  199. {
  200. .start = base,
  201. .end = base + 0x20 - 1,
  202. .flags = IORESOURCE_MEM,
  203. }, {
  204. .start = irq,
  205. .flags = IORESOURCE_IRQ,
  206. },
  207. };
  208. platform_device_register_simple("spi_txx9", busid,
  209. res, ARRAY_SIZE(res));
  210. }
  211. void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
  212. {
  213. struct platform_device *pdev =
  214. platform_device_alloc("tc35815-mac", id);
  215. if (!pdev ||
  216. platform_device_add_data(pdev, ethaddr, 6) ||
  217. platform_device_add(pdev))
  218. platform_device_put(pdev);
  219. }
  220. void __init txx9_sio_init(unsigned long baseaddr, int irq,
  221. unsigned int line, unsigned int sclk, int nocts)
  222. {
  223. #ifdef CONFIG_SERIAL_TXX9
  224. struct uart_port req;
  225. memset(&req, 0, sizeof(req));
  226. req.line = line;
  227. req.iotype = UPIO_MEM;
  228. req.membase = ioremap(baseaddr, 0x24);
  229. req.mapbase = baseaddr;
  230. req.irq = irq;
  231. if (!nocts)
  232. req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
  233. if (sclk) {
  234. req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
  235. req.uartclk = sclk;
  236. } else
  237. req.uartclk = TXX9_IMCLK;
  238. early_serial_txx9_setup(&req);
  239. #endif /* CONFIG_SERIAL_TXX9 */
  240. }
  241. #ifdef CONFIG_EARLY_PRINTK
  242. static void __init null_prom_putchar(char c)
  243. {
  244. }
  245. void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
  246. void __init prom_putchar(char c)
  247. {
  248. txx9_prom_putchar(c);
  249. }
  250. static void __iomem *early_txx9_sio_port;
  251. static void __init early_txx9_sio_putchar(char c)
  252. {
  253. #define TXX9_SICISR 0x0c
  254. #define TXX9_SITFIFO 0x1c
  255. #define TXX9_SICISR_TXALS 0x00000002
  256. while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
  257. TXX9_SICISR_TXALS))
  258. ;
  259. __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
  260. }
  261. void __init txx9_sio_putchar_init(unsigned long baseaddr)
  262. {
  263. early_txx9_sio_port = ioremap(baseaddr, 0x24);
  264. txx9_prom_putchar = early_txx9_sio_putchar;
  265. }
  266. #endif /* CONFIG_EARLY_PRINTK */
  267. /* wrappers */
  268. void __init plat_mem_setup(void)
  269. {
  270. ioport_resource.start = 0;
  271. ioport_resource.end = ~0UL; /* no limit */
  272. iomem_resource.start = 0;
  273. iomem_resource.end = ~0UL; /* no limit */
  274. /* fallback restart/halt routines */
  275. _machine_restart = (void (*)(char *))txx9_machine_halt;
  276. _machine_halt = txx9_machine_halt;
  277. pm_power_off = txx9_machine_halt;
  278. #ifdef CONFIG_PCI
  279. pcibios_plat_setup = txx9_pcibios_setup;
  280. #endif
  281. txx9_board_vec->mem_setup();
  282. }
  283. void __init arch_init_irq(void)
  284. {
  285. txx9_board_vec->irq_setup();
  286. }
  287. void __init plat_time_init(void)
  288. {
  289. #ifdef CONFIG_CPU_TX49XX
  290. mips_hpt_frequency = txx9_cpu_clock / 2;
  291. #endif
  292. txx9_board_vec->time_init();
  293. }
  294. static int __init _txx9_arch_init(void)
  295. {
  296. if (txx9_board_vec->arch_init)
  297. txx9_board_vec->arch_init();
  298. return 0;
  299. }
  300. arch_initcall(_txx9_arch_init);
  301. static int __init _txx9_device_init(void)
  302. {
  303. if (txx9_board_vec->device_init)
  304. txx9_board_vec->device_init();
  305. return 0;
  306. }
  307. device_initcall(_txx9_device_init);
  308. int (*txx9_irq_dispatch)(int pending);
  309. asmlinkage void plat_irq_dispatch(void)
  310. {
  311. int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  312. int irq = txx9_irq_dispatch(pending);
  313. if (likely(irq >= 0))
  314. do_IRQ(irq);
  315. else
  316. spurious_interrupt();
  317. }
  318. /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
  319. #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
  320. static unsigned long __swizzle_addr_none(unsigned long port)
  321. {
  322. return port;
  323. }
  324. unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
  325. EXPORT_SYMBOL(__swizzle_addr_b);
  326. #endif