gpio.c 5.7 KB

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  1. /*
  2. * Miscellaneous functions for IDT EB434 board
  3. *
  4. * Copyright 2004 IDT Inc. (rischelp@idt.com)
  5. * Copyright 2006 Phil Sutter <n0-1@freewrt.org>
  6. * Copyright 2007 Florian Fainelli <florian@openwrt.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. *
  13. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  14. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  15. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  16. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  17. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  19. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  21. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23. *
  24. * You should have received a copy of the GNU General Public License along
  25. * with this program; if not, write to the Free Software Foundation, Inc.,
  26. * 675 Mass Ave, Cambridge, MA 02139, USA.
  27. */
  28. #include <linux/kernel.h>
  29. #include <linux/gpio.h>
  30. #include <linux/init.h>
  31. #include <linux/types.h>
  32. #include <linux/pci.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/io.h>
  35. #include <linux/platform_device.h>
  36. #include <asm/addrspace.h>
  37. #include <asm/mach-rc32434/rb.h>
  38. struct rb532_gpio_reg __iomem *rb532_gpio_reg0;
  39. EXPORT_SYMBOL(rb532_gpio_reg0);
  40. struct mpmc_device dev3;
  41. static struct resource rb532_gpio_reg0_res[] = {
  42. {
  43. .name = "gpio_reg0",
  44. .start = (u32)(IDT434_REG_BASE + GPIOBASE),
  45. .end = (u32)(IDT434_REG_BASE + GPIOBASE + sizeof(struct rb532_gpio_reg)),
  46. .flags = IORESOURCE_MEM,
  47. }
  48. };
  49. static struct resource rb532_dev3_ctl_res[] = {
  50. {
  51. .name = "dev3_ctl",
  52. .start = (u32)(IDT434_REG_BASE + DEV3BASE),
  53. .end = (u32)(IDT434_REG_BASE + DEV3BASE + sizeof(struct dev_reg)),
  54. .flags = IORESOURCE_MEM,
  55. }
  56. };
  57. void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
  58. {
  59. unsigned long flags;
  60. unsigned data;
  61. unsigned i = 0;
  62. spin_lock_irqsave(&dev3.lock, flags);
  63. data = *(volatile unsigned *) (IDT434_REG_BASE + reg_offs);
  64. for (i = 0; i != len; ++i) {
  65. if (val & (1 << i))
  66. data |= (1 << (i + bit));
  67. else
  68. data &= ~(1 << (i + bit));
  69. }
  70. writel(data, (IDT434_REG_BASE + reg_offs));
  71. spin_unlock_irqrestore(&dev3.lock, flags);
  72. }
  73. EXPORT_SYMBOL(set_434_reg);
  74. unsigned get_434_reg(unsigned reg_offs)
  75. {
  76. return readl(IDT434_REG_BASE + reg_offs);
  77. }
  78. EXPORT_SYMBOL(get_434_reg);
  79. void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
  80. {
  81. unsigned long flags;
  82. spin_lock_irqsave(&dev3.lock, flags);
  83. dev3.state = (dev3.state | or_mask) & ~nand_mask;
  84. writel(dev3.state, &dev3.base);
  85. spin_unlock_irqrestore(&dev3.lock, flags);
  86. }
  87. EXPORT_SYMBOL(set_latch_u5);
  88. unsigned char get_latch_u5(void)
  89. {
  90. return dev3.state;
  91. }
  92. EXPORT_SYMBOL(get_latch_u5);
  93. int rb532_gpio_get_value(unsigned gpio)
  94. {
  95. return readl(&rb532_gpio_reg0->gpiod) & (1 << gpio);
  96. }
  97. EXPORT_SYMBOL(rb532_gpio_get_value);
  98. void rb532_gpio_set_value(unsigned gpio, int value)
  99. {
  100. unsigned tmp;
  101. tmp = readl(&rb532_gpio_reg0->gpiod) & ~(1 << gpio);
  102. if (value)
  103. tmp |= 1 << gpio;
  104. writel(tmp, (void *)&rb532_gpio_reg0->gpiod);
  105. }
  106. EXPORT_SYMBOL(rb532_gpio_set_value);
  107. int rb532_gpio_direction_input(unsigned gpio)
  108. {
  109. writel(readl(&rb532_gpio_reg0->gpiocfg) & ~(1 << gpio),
  110. (void *)&rb532_gpio_reg0->gpiocfg);
  111. return 0;
  112. }
  113. EXPORT_SYMBOL(rb532_gpio_direction_input);
  114. int rb532_gpio_direction_output(unsigned gpio, int value)
  115. {
  116. gpio_set_value(gpio, value);
  117. writel(readl(&rb532_gpio_reg0->gpiocfg) | (1 << gpio),
  118. (void *)&rb532_gpio_reg0->gpiocfg);
  119. return 0;
  120. }
  121. EXPORT_SYMBOL(rb532_gpio_direction_output);
  122. void rb532_gpio_set_int_level(unsigned gpio, int value)
  123. {
  124. unsigned tmp;
  125. tmp = readl(&rb532_gpio_reg0->gpioilevel) & ~(1 << gpio);
  126. if (value)
  127. tmp |= 1 << gpio;
  128. writel(tmp, (void *)&rb532_gpio_reg0->gpioilevel);
  129. }
  130. EXPORT_SYMBOL(rb532_gpio_set_int_level);
  131. int rb532_gpio_get_int_level(unsigned gpio)
  132. {
  133. return readl(&rb532_gpio_reg0->gpioilevel) & (1 << gpio);
  134. }
  135. EXPORT_SYMBOL(rb532_gpio_get_int_level);
  136. void rb532_gpio_set_int_status(unsigned gpio, int value)
  137. {
  138. unsigned tmp;
  139. tmp = readl(&rb532_gpio_reg0->gpioistat);
  140. if (value)
  141. tmp |= 1 << gpio;
  142. writel(tmp, (void *)&rb532_gpio_reg0->gpioistat);
  143. }
  144. EXPORT_SYMBOL(rb532_gpio_set_int_status);
  145. int rb532_gpio_get_int_status(unsigned gpio)
  146. {
  147. return readl(&rb532_gpio_reg0->gpioistat) & (1 << gpio);
  148. }
  149. EXPORT_SYMBOL(rb532_gpio_get_int_status);
  150. void rb532_gpio_set_func(unsigned gpio, int value)
  151. {
  152. unsigned tmp;
  153. tmp = readl(&rb532_gpio_reg0->gpiofunc);
  154. if (value)
  155. tmp |= 1 << gpio;
  156. writel(tmp, (void *)&rb532_gpio_reg0->gpiofunc);
  157. }
  158. EXPORT_SYMBOL(rb532_gpio_set_func);
  159. int rb532_gpio_get_func(unsigned gpio)
  160. {
  161. return readl(&rb532_gpio_reg0->gpiofunc) & (1 << gpio);
  162. }
  163. EXPORT_SYMBOL(rb532_gpio_get_func);
  164. int __init rb532_gpio_init(void)
  165. {
  166. rb532_gpio_reg0 = ioremap_nocache(rb532_gpio_reg0_res[0].start,
  167. rb532_gpio_reg0_res[0].end -
  168. rb532_gpio_reg0_res[0].start);
  169. if (!rb532_gpio_reg0) {
  170. printk(KERN_ERR "rb532: cannot remap GPIO register 0\n");
  171. return -ENXIO;
  172. }
  173. dev3.base = ioremap_nocache(rb532_dev3_ctl_res[0].start,
  174. rb532_dev3_ctl_res[0].end -
  175. rb532_dev3_ctl_res[0].start);
  176. if (!dev3.base) {
  177. printk(KERN_ERR "rb532: cannot remap device controller 3\n");
  178. return -ENXIO;
  179. }
  180. return 0;
  181. }
  182. arch_initcall(rb532_gpio_init);