tifm_ms.c 16 KB

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  1. /*
  2. * TI FlashMedia driver
  3. *
  4. * Copyright (C) 2007 Alex Dubov <oakad@yahoo.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Special thanks to Carlos Corbacho for providing various MemoryStick cards
  11. * that made this driver possible.
  12. *
  13. */
  14. #include <linux/tifm.h>
  15. #include <linux/memstick.h>
  16. #include <linux/highmem.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/log2.h>
  19. #include <asm/io.h>
  20. #define DRIVER_NAME "tifm_ms"
  21. static int no_dma;
  22. module_param(no_dma, bool, 0644);
  23. /*
  24. * Some control bits of TIFM appear to conform to Sony's reference design,
  25. * so I'm just assuming they all are.
  26. */
  27. #define TIFM_MS_STAT_DRQ 0x04000
  28. #define TIFM_MS_STAT_MSINT 0x02000
  29. #define TIFM_MS_STAT_RDY 0x01000
  30. #define TIFM_MS_STAT_CRC 0x00200
  31. #define TIFM_MS_STAT_TOE 0x00100
  32. #define TIFM_MS_STAT_EMP 0x00020
  33. #define TIFM_MS_STAT_FUL 0x00010
  34. #define TIFM_MS_STAT_CED 0x00008
  35. #define TIFM_MS_STAT_ERR 0x00004
  36. #define TIFM_MS_STAT_BRQ 0x00002
  37. #define TIFM_MS_STAT_CNK 0x00001
  38. #define TIFM_MS_SYS_DMA 0x10000
  39. #define TIFM_MS_SYS_RESET 0x08000
  40. #define TIFM_MS_SYS_SRAC 0x04000
  41. #define TIFM_MS_SYS_INTEN 0x02000
  42. #define TIFM_MS_SYS_NOCRC 0x01000
  43. #define TIFM_MS_SYS_INTCLR 0x00800
  44. #define TIFM_MS_SYS_MSIEN 0x00400
  45. #define TIFM_MS_SYS_FCLR 0x00200
  46. #define TIFM_MS_SYS_FDIR 0x00100
  47. #define TIFM_MS_SYS_DAM 0x00080
  48. #define TIFM_MS_SYS_DRM 0x00040
  49. #define TIFM_MS_SYS_DRQSL 0x00020
  50. #define TIFM_MS_SYS_REI 0x00010
  51. #define TIFM_MS_SYS_REO 0x00008
  52. #define TIFM_MS_SYS_BSY_MASK 0x00007
  53. #define TIFM_MS_SYS_FIFO (TIFM_MS_SYS_INTEN | TIFM_MS_SYS_MSIEN \
  54. | TIFM_MS_SYS_FCLR | TIFM_MS_SYS_BSY_MASK)
  55. /* Hardware flags */
  56. enum {
  57. CMD_READY = 0x01,
  58. FIFO_READY = 0x02,
  59. CARD_INT = 0x04
  60. };
  61. struct tifm_ms {
  62. struct tifm_dev *dev;
  63. struct timer_list timer;
  64. struct memstick_request *req;
  65. unsigned int mode_mask;
  66. unsigned int block_pos;
  67. unsigned long timeout_jiffies;
  68. unsigned char eject:1,
  69. use_dma:1;
  70. unsigned char cmd_flags;
  71. unsigned char io_pos;
  72. unsigned int io_word;
  73. };
  74. static unsigned int tifm_ms_read_data(struct tifm_ms *host,
  75. unsigned char *buf, unsigned int length)
  76. {
  77. struct tifm_dev *sock = host->dev;
  78. unsigned int off = 0;
  79. while (host->io_pos && length) {
  80. buf[off++] = host->io_word & 0xff;
  81. host->io_word >>= 8;
  82. length--;
  83. host->io_pos--;
  84. }
  85. if (!length)
  86. return off;
  87. while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  88. if (length < 4)
  89. break;
  90. *(unsigned int *)(buf + off) = __raw_readl(sock->addr
  91. + SOCK_MS_DATA);
  92. length -= 4;
  93. off += 4;
  94. }
  95. if (length
  96. && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  97. host->io_word = readl(sock->addr + SOCK_MS_DATA);
  98. for (host->io_pos = 4; host->io_pos; --host->io_pos) {
  99. buf[off++] = host->io_word & 0xff;
  100. host->io_word >>= 8;
  101. length--;
  102. if (!length)
  103. break;
  104. }
  105. }
  106. return off;
  107. }
  108. static unsigned int tifm_ms_write_data(struct tifm_ms *host,
  109. unsigned char *buf, unsigned int length)
  110. {
  111. struct tifm_dev *sock = host->dev;
  112. unsigned int off = 0;
  113. if (host->io_pos) {
  114. while (host->io_pos < 4 && length) {
  115. host->io_word |= buf[off++] << (host->io_pos * 8);
  116. host->io_pos++;
  117. length--;
  118. }
  119. }
  120. if (host->io_pos == 4
  121. && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  122. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  123. sock->addr + SOCK_MS_SYSTEM);
  124. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  125. host->io_pos = 0;
  126. host->io_word = 0;
  127. } else if (host->io_pos) {
  128. return off;
  129. }
  130. if (!length)
  131. return off;
  132. while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  133. if (length < 4)
  134. break;
  135. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  136. sock->addr + SOCK_MS_SYSTEM);
  137. __raw_writel(*(unsigned int *)(buf + off),
  138. sock->addr + SOCK_MS_DATA);
  139. length -= 4;
  140. off += 4;
  141. }
  142. switch (length) {
  143. case 3:
  144. host->io_word |= buf[off + 2] << 16;
  145. host->io_pos++;
  146. case 2:
  147. host->io_word |= buf[off + 1] << 8;
  148. host->io_pos++;
  149. case 1:
  150. host->io_word |= buf[off];
  151. host->io_pos++;
  152. }
  153. off += host->io_pos;
  154. return off;
  155. }
  156. static unsigned int tifm_ms_transfer_data(struct tifm_ms *host)
  157. {
  158. struct tifm_dev *sock = host->dev;
  159. unsigned int length;
  160. unsigned int off;
  161. unsigned int t_size, p_off, p_cnt;
  162. unsigned char *buf;
  163. struct page *pg;
  164. unsigned long flags = 0;
  165. if (host->req->long_data) {
  166. length = host->req->sg.length - host->block_pos;
  167. off = host->req->sg.offset + host->block_pos;
  168. } else {
  169. length = host->req->data_len - host->block_pos;
  170. off = 0;
  171. }
  172. dev_dbg(&sock->dev, "fifo data transfer, %d, %d\n", length,
  173. host->block_pos);
  174. while (length) {
  175. if (host->req->long_data) {
  176. pg = nth_page(sg_page(&host->req->sg),
  177. off >> PAGE_SHIFT);
  178. p_off = offset_in_page(off);
  179. p_cnt = PAGE_SIZE - p_off;
  180. p_cnt = min(p_cnt, length);
  181. local_irq_save(flags);
  182. buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off;
  183. } else {
  184. buf = host->req->data + host->block_pos;
  185. p_cnt = host->req->data_len - host->block_pos;
  186. }
  187. t_size = host->req->data_dir == WRITE
  188. ? tifm_ms_write_data(host, buf, p_cnt)
  189. : tifm_ms_read_data(host, buf, p_cnt);
  190. if (host->req->long_data) {
  191. kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ);
  192. local_irq_restore(flags);
  193. }
  194. if (!t_size)
  195. break;
  196. host->block_pos += t_size;
  197. length -= t_size;
  198. off += t_size;
  199. }
  200. dev_dbg(&sock->dev, "fifo data transfer, %d remaining\n", length);
  201. if (!length && (host->req->data_dir == WRITE)) {
  202. if (host->io_pos) {
  203. writel(TIFM_MS_SYS_FDIR
  204. | readl(sock->addr + SOCK_MS_SYSTEM),
  205. sock->addr + SOCK_MS_SYSTEM);
  206. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  207. }
  208. writel(TIFM_MS_SYS_FDIR
  209. | readl(sock->addr + SOCK_MS_SYSTEM),
  210. sock->addr + SOCK_MS_SYSTEM);
  211. writel(0, sock->addr + SOCK_MS_DATA);
  212. } else {
  213. readl(sock->addr + SOCK_MS_DATA);
  214. }
  215. return length;
  216. }
  217. static int tifm_ms_issue_cmd(struct tifm_ms *host)
  218. {
  219. struct tifm_dev *sock = host->dev;
  220. unsigned char *data;
  221. unsigned int data_len, cmd, sys_param;
  222. host->cmd_flags = 0;
  223. host->block_pos = 0;
  224. host->io_pos = 0;
  225. host->io_word = 0;
  226. host->cmd_flags = 0;
  227. data = host->req->data;
  228. host->use_dma = !no_dma;
  229. if (host->req->long_data) {
  230. data_len = host->req->sg.length;
  231. if (!is_power_of_2(data_len))
  232. host->use_dma = 0;
  233. } else {
  234. data_len = host->req->data_len;
  235. host->use_dma = 0;
  236. }
  237. writel(TIFM_FIFO_INT_SETALL,
  238. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  239. writel(TIFM_FIFO_ENABLE,
  240. sock->addr + SOCK_FIFO_CONTROL);
  241. if (host->use_dma) {
  242. if (1 != tifm_map_sg(sock, &host->req->sg, 1,
  243. host->req->data_dir == READ
  244. ? PCI_DMA_FROMDEVICE
  245. : PCI_DMA_TODEVICE)) {
  246. host->req->error = -ENOMEM;
  247. return host->req->error;
  248. }
  249. data_len = sg_dma_len(&host->req->sg);
  250. writel(ilog2(data_len) - 2,
  251. sock->addr + SOCK_FIFO_PAGE_SIZE);
  252. writel(TIFM_FIFO_INTMASK,
  253. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  254. sys_param = TIFM_DMA_EN | (1 << 8);
  255. if (host->req->data_dir == WRITE)
  256. sys_param |= TIFM_DMA_TX;
  257. writel(TIFM_FIFO_INTMASK,
  258. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  259. writel(sg_dma_address(&host->req->sg),
  260. sock->addr + SOCK_DMA_ADDRESS);
  261. writel(sys_param, sock->addr + SOCK_DMA_CONTROL);
  262. } else {
  263. writel(host->mode_mask | TIFM_MS_SYS_FIFO,
  264. sock->addr + SOCK_MS_SYSTEM);
  265. writel(TIFM_FIFO_MORE,
  266. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  267. }
  268. mod_timer(&host->timer, jiffies + host->timeout_jiffies);
  269. writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
  270. sock->addr + SOCK_CONTROL);
  271. host->req->error = 0;
  272. sys_param = readl(sock->addr + SOCK_MS_SYSTEM);
  273. sys_param |= TIFM_MS_SYS_INTCLR;
  274. if (host->use_dma)
  275. sys_param |= TIFM_MS_SYS_DMA;
  276. else
  277. sys_param &= ~TIFM_MS_SYS_DMA;
  278. writel(sys_param, sock->addr + SOCK_MS_SYSTEM);
  279. cmd = (host->req->tpc & 0xf) << 12;
  280. cmd |= data_len;
  281. writel(cmd, sock->addr + SOCK_MS_COMMAND);
  282. dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, sys_param);
  283. return 0;
  284. }
  285. static void tifm_ms_complete_cmd(struct tifm_ms *host)
  286. {
  287. struct tifm_dev *sock = host->dev;
  288. struct memstick_host *msh = tifm_get_drvdata(sock);
  289. int rc;
  290. del_timer(&host->timer);
  291. if (host->use_dma)
  292. tifm_unmap_sg(sock, &host->req->sg, 1,
  293. host->req->data_dir == READ
  294. ? PCI_DMA_FROMDEVICE
  295. : PCI_DMA_TODEVICE);
  296. writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
  297. sock->addr + SOCK_CONTROL);
  298. dev_dbg(&sock->dev, "TPC complete\n");
  299. do {
  300. rc = memstick_next_req(msh, &host->req);
  301. } while (!rc && tifm_ms_issue_cmd(host));
  302. }
  303. static int tifm_ms_check_status(struct tifm_ms *host)
  304. {
  305. if (!host->req->error) {
  306. if (!(host->cmd_flags & CMD_READY))
  307. return 1;
  308. if (!(host->cmd_flags & FIFO_READY))
  309. return 1;
  310. if (host->req->need_card_int
  311. && !(host->cmd_flags & CARD_INT))
  312. return 1;
  313. }
  314. return 0;
  315. }
  316. /* Called from interrupt handler */
  317. static void tifm_ms_data_event(struct tifm_dev *sock)
  318. {
  319. struct tifm_ms *host;
  320. unsigned int fifo_status = 0, host_status = 0;
  321. int rc = 1;
  322. spin_lock(&sock->lock);
  323. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  324. fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
  325. host_status = readl(sock->addr + SOCK_MS_STATUS);
  326. dev_dbg(&sock->dev,
  327. "data event: fifo_status %x, host_status %x, flags %x\n",
  328. fifo_status, host_status, host->cmd_flags);
  329. if (host->req) {
  330. if (host->use_dma && (fifo_status & 1)) {
  331. host->cmd_flags |= FIFO_READY;
  332. rc = tifm_ms_check_status(host);
  333. }
  334. if (!host->use_dma && (fifo_status & TIFM_FIFO_MORE)) {
  335. if (!tifm_ms_transfer_data(host)) {
  336. host->cmd_flags |= FIFO_READY;
  337. rc = tifm_ms_check_status(host);
  338. }
  339. }
  340. }
  341. writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
  342. if (!rc)
  343. tifm_ms_complete_cmd(host);
  344. spin_unlock(&sock->lock);
  345. }
  346. /* Called from interrupt handler */
  347. static void tifm_ms_card_event(struct tifm_dev *sock)
  348. {
  349. struct tifm_ms *host;
  350. unsigned int host_status = 0;
  351. int rc = 1;
  352. spin_lock(&sock->lock);
  353. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  354. host_status = readl(sock->addr + SOCK_MS_STATUS);
  355. dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
  356. host_status, host->cmd_flags);
  357. if (host->req) {
  358. if (host_status & TIFM_MS_STAT_TOE)
  359. host->req->error = -ETIME;
  360. else if (host_status & TIFM_MS_STAT_CRC)
  361. host->req->error = -EILSEQ;
  362. if (host->req->error) {
  363. writel(TIFM_FIFO_INT_SETALL,
  364. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  365. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  366. }
  367. if (host_status & TIFM_MS_STAT_RDY)
  368. host->cmd_flags |= CMD_READY;
  369. if (host_status & TIFM_MS_STAT_MSINT)
  370. host->cmd_flags |= CARD_INT;
  371. rc = tifm_ms_check_status(host);
  372. }
  373. writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
  374. sock->addr + SOCK_MS_SYSTEM);
  375. if (!rc)
  376. tifm_ms_complete_cmd(host);
  377. spin_unlock(&sock->lock);
  378. return;
  379. }
  380. static void tifm_ms_request(struct memstick_host *msh)
  381. {
  382. struct tifm_ms *host = memstick_priv(msh);
  383. struct tifm_dev *sock = host->dev;
  384. unsigned long flags;
  385. int rc;
  386. spin_lock_irqsave(&sock->lock, flags);
  387. if (host->req) {
  388. printk(KERN_ERR "%s : unfinished request detected\n",
  389. sock->dev.bus_id);
  390. spin_unlock_irqrestore(&sock->lock, flags);
  391. tifm_eject(host->dev);
  392. return;
  393. }
  394. if (host->eject) {
  395. do {
  396. rc = memstick_next_req(msh, &host->req);
  397. if (!rc)
  398. host->req->error = -ETIME;
  399. } while (!rc);
  400. spin_unlock_irqrestore(&sock->lock, flags);
  401. return;
  402. }
  403. do {
  404. rc = memstick_next_req(msh, &host->req);
  405. } while (!rc && tifm_ms_issue_cmd(host));
  406. spin_unlock_irqrestore(&sock->lock, flags);
  407. return;
  408. }
  409. static void tifm_ms_set_param(struct memstick_host *msh,
  410. enum memstick_param param,
  411. int value)
  412. {
  413. struct tifm_ms *host = memstick_priv(msh);
  414. struct tifm_dev *sock = host->dev;
  415. unsigned long flags;
  416. spin_lock_irqsave(&sock->lock, flags);
  417. switch (param) {
  418. case MEMSTICK_POWER:
  419. /* also affected by media detection mechanism */
  420. if (value == MEMSTICK_POWER_ON) {
  421. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  422. writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM);
  423. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  424. sock->addr + SOCK_MS_SYSTEM);
  425. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  426. } else if (value == MEMSTICK_POWER_OFF) {
  427. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  428. sock->addr + SOCK_MS_SYSTEM);
  429. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  430. }
  431. break;
  432. case MEMSTICK_INTERFACE:
  433. if (value == MEMSTICK_SERIAL) {
  434. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  435. writel((~TIFM_CTRL_FAST_CLK)
  436. & readl(sock->addr + SOCK_CONTROL),
  437. sock->addr + SOCK_CONTROL);
  438. } else if (value == MEMSTICK_PAR4) {
  439. host->mode_mask = 0;
  440. writel(TIFM_CTRL_FAST_CLK
  441. | readl(sock->addr + SOCK_CONTROL),
  442. sock->addr + SOCK_CONTROL);
  443. }
  444. break;
  445. };
  446. spin_unlock_irqrestore(&sock->lock, flags);
  447. }
  448. static void tifm_ms_abort(unsigned long data)
  449. {
  450. struct tifm_ms *host = (struct tifm_ms *)data;
  451. dev_dbg(&host->dev->dev, "status %x\n",
  452. readl(host->dev->addr + SOCK_MS_STATUS));
  453. printk(KERN_ERR
  454. "%s : card failed to respond for a long period of time "
  455. "(%x, %x)\n",
  456. host->dev->dev.bus_id, host->req ? host->req->tpc : 0,
  457. host->cmd_flags);
  458. tifm_eject(host->dev);
  459. }
  460. static int tifm_ms_probe(struct tifm_dev *sock)
  461. {
  462. struct memstick_host *msh;
  463. struct tifm_ms *host;
  464. int rc = -EIO;
  465. if (!(TIFM_SOCK_STATE_OCCUPIED
  466. & readl(sock->addr + SOCK_PRESENT_STATE))) {
  467. printk(KERN_WARNING "%s : card gone, unexpectedly\n",
  468. sock->dev.bus_id);
  469. return rc;
  470. }
  471. msh = memstick_alloc_host(sizeof(struct tifm_ms), &sock->dev);
  472. if (!msh)
  473. return -ENOMEM;
  474. host = memstick_priv(msh);
  475. tifm_set_drvdata(sock, msh);
  476. host->dev = sock;
  477. host->timeout_jiffies = msecs_to_jiffies(1000);
  478. setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host);
  479. msh->request = tifm_ms_request;
  480. msh->set_param = tifm_ms_set_param;
  481. sock->card_event = tifm_ms_card_event;
  482. sock->data_event = tifm_ms_data_event;
  483. if (tifm_has_ms_pif(sock))
  484. msh->caps |= MEMSTICK_CAP_PAR4;
  485. rc = memstick_add_host(msh);
  486. if (!rc)
  487. return 0;
  488. memstick_free_host(msh);
  489. return rc;
  490. }
  491. static void tifm_ms_remove(struct tifm_dev *sock)
  492. {
  493. struct memstick_host *msh = tifm_get_drvdata(sock);
  494. struct tifm_ms *host = memstick_priv(msh);
  495. int rc = 0;
  496. unsigned long flags;
  497. spin_lock_irqsave(&sock->lock, flags);
  498. host->eject = 1;
  499. if (host->req) {
  500. del_timer(&host->timer);
  501. writel(TIFM_FIFO_INT_SETALL,
  502. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  503. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  504. if (host->use_dma)
  505. tifm_unmap_sg(sock, &host->req->sg, 1,
  506. host->req->data_dir == READ
  507. ? PCI_DMA_TODEVICE
  508. : PCI_DMA_FROMDEVICE);
  509. host->req->error = -ETIME;
  510. do {
  511. rc = memstick_next_req(msh, &host->req);
  512. if (!rc)
  513. host->req->error = -ETIME;
  514. } while (!rc);
  515. }
  516. spin_unlock_irqrestore(&sock->lock, flags);
  517. memstick_remove_host(msh);
  518. memstick_free_host(msh);
  519. }
  520. #ifdef CONFIG_PM
  521. static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state)
  522. {
  523. struct memstick_host *msh = tifm_get_drvdata(sock);
  524. memstick_suspend_host(msh);
  525. return 0;
  526. }
  527. static int tifm_ms_resume(struct tifm_dev *sock)
  528. {
  529. struct memstick_host *msh = tifm_get_drvdata(sock);
  530. memstick_resume_host(msh);
  531. return 0;
  532. }
  533. #else
  534. #define tifm_ms_suspend NULL
  535. #define tifm_ms_resume NULL
  536. #endif /* CONFIG_PM */
  537. static struct tifm_device_id tifm_ms_id_tbl[] = {
  538. { TIFM_TYPE_MS }, { 0 }
  539. };
  540. static struct tifm_driver tifm_ms_driver = {
  541. .driver = {
  542. .name = DRIVER_NAME,
  543. .owner = THIS_MODULE
  544. },
  545. .id_table = tifm_ms_id_tbl,
  546. .probe = tifm_ms_probe,
  547. .remove = tifm_ms_remove,
  548. .suspend = tifm_ms_suspend,
  549. .resume = tifm_ms_resume
  550. };
  551. static int __init tifm_ms_init(void)
  552. {
  553. return tifm_register_driver(&tifm_ms_driver);
  554. }
  555. static void __exit tifm_ms_exit(void)
  556. {
  557. tifm_unregister_driver(&tifm_ms_driver);
  558. }
  559. MODULE_AUTHOR("Alex Dubov");
  560. MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver");
  561. MODULE_LICENSE("GPL");
  562. MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl);
  563. module_init(tifm_ms_init);
  564. module_exit(tifm_ms_exit);