trx.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include "../wifi.h"
  30. #include "../pci.h"
  31. #include "../base.h"
  32. #include "reg.h"
  33. #include "def.h"
  34. #include "phy.h"
  35. #include "fw.h"
  36. #include "trx.h"
  37. #include "led.h"
  38. static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
  39. {
  40. __le16 fc = rtl_get_fc(skb);
  41. if (unlikely(ieee80211_is_beacon(fc)))
  42. return QSLT_BEACON;
  43. if (ieee80211_is_mgmt(fc))
  44. return QSLT_MGNT;
  45. if (ieee80211_is_nullfunc(fc))
  46. return QSLT_HIGH;
  47. return skb->priority;
  48. }
  49. static int _rtl92se_rate_mapping(bool isht, u8 desc_rate, bool first_ampdu)
  50. {
  51. int rate_idx = 0;
  52. if (first_ampdu) {
  53. if (false == isht) {
  54. switch (desc_rate) {
  55. case DESC92S_RATE1M:
  56. rate_idx = 0;
  57. break;
  58. case DESC92S_RATE2M:
  59. rate_idx = 1;
  60. break;
  61. case DESC92S_RATE5_5M:
  62. rate_idx = 2;
  63. break;
  64. case DESC92S_RATE11M:
  65. rate_idx = 3;
  66. break;
  67. case DESC92S_RATE6M:
  68. rate_idx = 4;
  69. break;
  70. case DESC92S_RATE9M:
  71. rate_idx = 5;
  72. break;
  73. case DESC92S_RATE12M:
  74. rate_idx = 6;
  75. break;
  76. case DESC92S_RATE18M:
  77. rate_idx = 7;
  78. break;
  79. case DESC92S_RATE24M:
  80. rate_idx = 8;
  81. break;
  82. case DESC92S_RATE36M:
  83. rate_idx = 9;
  84. break;
  85. case DESC92S_RATE48M:
  86. rate_idx = 10;
  87. break;
  88. case DESC92S_RATE54M:
  89. rate_idx = 11;
  90. break;
  91. default:
  92. rate_idx = 0;
  93. break;
  94. }
  95. } else {
  96. rate_idx = 11;
  97. }
  98. return rate_idx;
  99. }
  100. switch (desc_rate) {
  101. case DESC92S_RATE1M:
  102. rate_idx = 0;
  103. break;
  104. case DESC92S_RATE2M:
  105. rate_idx = 1;
  106. break;
  107. case DESC92S_RATE5_5M:
  108. rate_idx = 2;
  109. break;
  110. case DESC92S_RATE11M:
  111. rate_idx = 3;
  112. break;
  113. case DESC92S_RATE6M:
  114. rate_idx = 4;
  115. break;
  116. case DESC92S_RATE9M:
  117. rate_idx = 5;
  118. break;
  119. case DESC92S_RATE12M:
  120. rate_idx = 6;
  121. break;
  122. case DESC92S_RATE18M:
  123. rate_idx = 7;
  124. break;
  125. case DESC92S_RATE24M:
  126. rate_idx = 8;
  127. break;
  128. case DESC92S_RATE36M:
  129. rate_idx = 9;
  130. break;
  131. case DESC92S_RATE48M:
  132. rate_idx = 10;
  133. break;
  134. case DESC92S_RATE54M:
  135. rate_idx = 11;
  136. break;
  137. default:
  138. rate_idx = 11;
  139. break;
  140. }
  141. return rate_idx;
  142. }
  143. static u8 _rtl92s_query_rxpwrpercentage(char antpower)
  144. {
  145. if ((antpower <= -100) || (antpower >= 20))
  146. return 0;
  147. else if (antpower >= 0)
  148. return 100;
  149. else
  150. return 100 + antpower;
  151. }
  152. static u8 _rtl92s_evm_db_to_percentage(char value)
  153. {
  154. char ret_val;
  155. ret_val = value;
  156. if (ret_val >= 0)
  157. ret_val = 0;
  158. if (ret_val <= -33)
  159. ret_val = -33;
  160. ret_val = 0 - ret_val;
  161. ret_val *= 3;
  162. if (ret_val == 99)
  163. ret_val = 100;
  164. return ret_val;
  165. }
  166. static long _rtl92se_translate_todbm(struct ieee80211_hw *hw,
  167. u8 signal_strength_index)
  168. {
  169. long signal_power;
  170. signal_power = (long)((signal_strength_index + 1) >> 1);
  171. signal_power -= 95;
  172. return signal_power;
  173. }
  174. static long _rtl92se_signal_scale_mapping(struct ieee80211_hw *hw,
  175. long currsig)
  176. {
  177. long retsig = 0;
  178. /* Step 1. Scale mapping. */
  179. if (currsig > 47)
  180. retsig = 100;
  181. else if (currsig > 14 && currsig <= 47)
  182. retsig = 100 - ((47 - currsig) * 3) / 2;
  183. else if (currsig > 2 && currsig <= 14)
  184. retsig = 48 - ((14 - currsig) * 15) / 7;
  185. else if (currsig >= 0)
  186. retsig = currsig * 9 + 1;
  187. return retsig;
  188. }
  189. static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
  190. struct rtl_stats *pstats, u8 *pdesc,
  191. struct rx_fwinfo *p_drvinfo,
  192. bool packet_match_bssid,
  193. bool packet_toself,
  194. bool packet_beacon)
  195. {
  196. struct rtl_priv *rtlpriv = rtl_priv(hw);
  197. struct phy_sts_cck_8192s_t *cck_buf;
  198. s8 rx_pwr_all = 0, rx_pwr[4];
  199. u8 rf_rx_num = 0, evm, pwdb_all;
  200. u8 i, max_spatial_stream;
  201. u32 rssi, total_rssi = 0;
  202. bool in_powersavemode = false;
  203. bool is_cck_rate;
  204. is_cck_rate = RX_HAL_IS_CCK_RATE(pdesc);
  205. pstats->packet_matchbssid = packet_match_bssid;
  206. pstats->packet_toself = packet_toself;
  207. pstats->is_cck = is_cck_rate;
  208. pstats->packet_beacon = packet_beacon;
  209. pstats->is_cck = is_cck_rate;
  210. pstats->rx_mimo_signalquality[0] = -1;
  211. pstats->rx_mimo_signalquality[1] = -1;
  212. if (is_cck_rate) {
  213. u8 report, cck_highpwr;
  214. cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
  215. if (!in_powersavemode)
  216. cck_highpwr = (u8) rtl_get_bbreg(hw,
  217. RFPGA0_XA_HSSIPARAMETER2,
  218. 0x200);
  219. else
  220. cck_highpwr = false;
  221. if (!cck_highpwr) {
  222. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  223. report = cck_buf->cck_agc_rpt & 0xc0;
  224. report = report >> 6;
  225. switch (report) {
  226. case 0x3:
  227. rx_pwr_all = -40 - (cck_agc_rpt & 0x3e);
  228. break;
  229. case 0x2:
  230. rx_pwr_all = -20 - (cck_agc_rpt & 0x3e);
  231. break;
  232. case 0x1:
  233. rx_pwr_all = -2 - (cck_agc_rpt & 0x3e);
  234. break;
  235. case 0x0:
  236. rx_pwr_all = 14 - (cck_agc_rpt & 0x3e);
  237. break;
  238. }
  239. } else {
  240. u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
  241. report = p_drvinfo->cfosho[0] & 0x60;
  242. report = report >> 5;
  243. switch (report) {
  244. case 0x3:
  245. rx_pwr_all = -40 - ((cck_agc_rpt & 0x1f) << 1);
  246. break;
  247. case 0x2:
  248. rx_pwr_all = -20 - ((cck_agc_rpt & 0x1f) << 1);
  249. break;
  250. case 0x1:
  251. rx_pwr_all = -2 - ((cck_agc_rpt & 0x1f) << 1);
  252. break;
  253. case 0x0:
  254. rx_pwr_all = 14 - ((cck_agc_rpt & 0x1f) << 1);
  255. break;
  256. }
  257. }
  258. pwdb_all = _rtl92s_query_rxpwrpercentage(rx_pwr_all);
  259. /* CCK gain is smaller than OFDM/MCS gain, */
  260. /* so we add gain diff by experiences, the val is 6 */
  261. pwdb_all += 6;
  262. if (pwdb_all > 100)
  263. pwdb_all = 100;
  264. /* modify the offset to make the same gain index with OFDM. */
  265. if (pwdb_all > 34 && pwdb_all <= 42)
  266. pwdb_all -= 2;
  267. else if (pwdb_all > 26 && pwdb_all <= 34)
  268. pwdb_all -= 6;
  269. else if (pwdb_all > 14 && pwdb_all <= 26)
  270. pwdb_all -= 8;
  271. else if (pwdb_all > 4 && pwdb_all <= 14)
  272. pwdb_all -= 4;
  273. pstats->rx_pwdb_all = pwdb_all;
  274. pstats->recvsignalpower = rx_pwr_all;
  275. if (packet_match_bssid) {
  276. u8 sq;
  277. if (pstats->rx_pwdb_all > 40) {
  278. sq = 100;
  279. } else {
  280. sq = cck_buf->sq_rpt;
  281. if (sq > 64)
  282. sq = 0;
  283. else if (sq < 20)
  284. sq = 100;
  285. else
  286. sq = ((64 - sq) * 100) / 44;
  287. }
  288. pstats->signalquality = sq;
  289. pstats->rx_mimo_signalquality[0] = sq;
  290. pstats->rx_mimo_signalquality[1] = -1;
  291. }
  292. } else {
  293. rtlpriv->dm.rfpath_rxenable[0] =
  294. rtlpriv->dm.rfpath_rxenable[1] = true;
  295. for (i = RF90_PATH_A; i < RF90_PATH_MAX; i++) {
  296. if (rtlpriv->dm.rfpath_rxenable[i])
  297. rf_rx_num++;
  298. rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
  299. 0x3f) * 2) - 110;
  300. rssi = _rtl92s_query_rxpwrpercentage(rx_pwr[i]);
  301. total_rssi += rssi;
  302. rtlpriv->stats.rx_snr_db[i] =
  303. (long)(p_drvinfo->rxsnr[i] / 2);
  304. if (packet_match_bssid)
  305. pstats->rx_mimo_signalstrength[i] = (u8) rssi;
  306. }
  307. rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
  308. pwdb_all = _rtl92s_query_rxpwrpercentage(rx_pwr_all);
  309. pstats->rx_pwdb_all = pwdb_all;
  310. pstats->rxpower = rx_pwr_all;
  311. pstats->recvsignalpower = rx_pwr_all;
  312. if (GET_RX_STATUS_DESC_RX_HT(pdesc) &&
  313. GET_RX_STATUS_DESC_RX_MCS(pdesc) >= DESC92S_RATEMCS8 &&
  314. GET_RX_STATUS_DESC_RX_MCS(pdesc) <= DESC92S_RATEMCS15)
  315. max_spatial_stream = 2;
  316. else
  317. max_spatial_stream = 1;
  318. for (i = 0; i < max_spatial_stream; i++) {
  319. evm = _rtl92s_evm_db_to_percentage(p_drvinfo->rxevm[i]);
  320. if (packet_match_bssid) {
  321. if (i == 0)
  322. pstats->signalquality = (u8)(evm &
  323. 0xff);
  324. pstats->rx_mimo_signalquality[i] =
  325. (u8) (evm & 0xff);
  326. }
  327. }
  328. }
  329. if (is_cck_rate)
  330. pstats->signalstrength = (u8)(_rtl92se_signal_scale_mapping(hw,
  331. pwdb_all));
  332. else if (rf_rx_num != 0)
  333. pstats->signalstrength = (u8) (_rtl92se_signal_scale_mapping(hw,
  334. total_rssi /= rf_rx_num));
  335. }
  336. static void _rtl92se_process_ui_rssi(struct ieee80211_hw *hw,
  337. struct rtl_stats *pstats)
  338. {
  339. struct rtl_priv *rtlpriv = rtl_priv(hw);
  340. struct rtl_phy *rtlphy = &(rtlpriv->phy);
  341. u8 rfpath;
  342. u32 last_rssi, tmpval;
  343. if (pstats->packet_toself || pstats->packet_beacon) {
  344. rtlpriv->stats.rssi_calculate_cnt++;
  345. if (rtlpriv->stats.ui_rssi.total_num++ >=
  346. PHY_RSSI_SLID_WIN_MAX) {
  347. rtlpriv->stats.ui_rssi.total_num =
  348. PHY_RSSI_SLID_WIN_MAX;
  349. last_rssi = rtlpriv->stats.ui_rssi.elements[
  350. rtlpriv->stats.ui_rssi.index];
  351. rtlpriv->stats.ui_rssi.total_val -= last_rssi;
  352. }
  353. rtlpriv->stats.ui_rssi.total_val += pstats->signalstrength;
  354. rtlpriv->stats.ui_rssi.elements[rtlpriv->stats.ui_rssi.index++]
  355. = pstats->signalstrength;
  356. if (rtlpriv->stats.ui_rssi.index >= PHY_RSSI_SLID_WIN_MAX)
  357. rtlpriv->stats.ui_rssi.index = 0;
  358. tmpval = rtlpriv->stats.ui_rssi.total_val /
  359. rtlpriv->stats.ui_rssi.total_num;
  360. rtlpriv->stats.signal_strength = _rtl92se_translate_todbm(hw,
  361. (u8) tmpval);
  362. pstats->rssi = rtlpriv->stats.signal_strength;
  363. }
  364. if (!pstats->is_cck && pstats->packet_toself) {
  365. for (rfpath = RF90_PATH_A; rfpath < rtlphy->num_total_rfpath;
  366. rfpath++) {
  367. if (rtlpriv->stats.rx_rssi_percentage[rfpath] == 0) {
  368. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  369. pstats->rx_mimo_signalstrength[rfpath];
  370. }
  371. if (pstats->rx_mimo_signalstrength[rfpath] >
  372. rtlpriv->stats.rx_rssi_percentage[rfpath]) {
  373. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  374. ((rtlpriv->stats.rx_rssi_percentage[rfpath]
  375. * (RX_SMOOTH_FACTOR - 1)) +
  376. (pstats->rx_mimo_signalstrength[rfpath])) /
  377. (RX_SMOOTH_FACTOR);
  378. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  379. rtlpriv->stats.rx_rssi_percentage[rfpath]
  380. + 1;
  381. } else {
  382. rtlpriv->stats.rx_rssi_percentage[rfpath] =
  383. ((rtlpriv->stats.rx_rssi_percentage[rfpath]
  384. * (RX_SMOOTH_FACTOR - 1)) +
  385. (pstats->rx_mimo_signalstrength[rfpath])) /
  386. (RX_SMOOTH_FACTOR);
  387. }
  388. }
  389. }
  390. }
  391. static void _rtl92se_update_rxsignalstatistics(struct ieee80211_hw *hw,
  392. struct rtl_stats *pstats)
  393. {
  394. struct rtl_priv *rtlpriv = rtl_priv(hw);
  395. int weighting = 0;
  396. if (rtlpriv->stats.recv_signal_power == 0)
  397. rtlpriv->stats.recv_signal_power = pstats->recvsignalpower;
  398. if (pstats->recvsignalpower > rtlpriv->stats.recv_signal_power)
  399. weighting = 5;
  400. else if (pstats->recvsignalpower < rtlpriv->stats.recv_signal_power)
  401. weighting = (-5);
  402. rtlpriv->stats.recv_signal_power = (rtlpriv->stats.recv_signal_power * 5
  403. + pstats->recvsignalpower +
  404. weighting) / 6;
  405. }
  406. static void _rtl92se_process_pwdb(struct ieee80211_hw *hw,
  407. struct rtl_stats *pstats)
  408. {
  409. struct rtl_priv *rtlpriv = rtl_priv(hw);
  410. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  411. long undec_sm_pwdb = 0;
  412. if (mac->opmode == NL80211_IFTYPE_ADHOC) {
  413. return;
  414. } else {
  415. undec_sm_pwdb =
  416. rtlpriv->dm.undecorated_smoothed_pwdb;
  417. }
  418. if (pstats->packet_toself || pstats->packet_beacon) {
  419. if (undec_sm_pwdb < 0)
  420. undec_sm_pwdb = pstats->rx_pwdb_all;
  421. if (pstats->rx_pwdb_all > (u32) undec_sm_pwdb) {
  422. undec_sm_pwdb =
  423. (((undec_sm_pwdb) *
  424. (RX_SMOOTH_FACTOR - 1)) +
  425. (pstats->rx_pwdb_all)) / (RX_SMOOTH_FACTOR);
  426. undec_sm_pwdb = undec_sm_pwdb + 1;
  427. } else {
  428. undec_sm_pwdb = (((undec_sm_pwdb) *
  429. (RX_SMOOTH_FACTOR - 1)) + (pstats->rx_pwdb_all)) /
  430. (RX_SMOOTH_FACTOR);
  431. }
  432. rtlpriv->dm.undecorated_smoothed_pwdb = undec_sm_pwdb;
  433. _rtl92se_update_rxsignalstatistics(hw, pstats);
  434. }
  435. }
  436. static void rtl_92s_process_streams(struct ieee80211_hw *hw,
  437. struct rtl_stats *pstats)
  438. {
  439. struct rtl_priv *rtlpriv = rtl_priv(hw);
  440. u32 stream;
  441. for (stream = 0; stream < 2; stream++) {
  442. if (pstats->rx_mimo_signalquality[stream] != -1) {
  443. if (rtlpriv->stats.rx_evm_percentage[stream] == 0) {
  444. rtlpriv->stats.rx_evm_percentage[stream] =
  445. pstats->rx_mimo_signalquality[stream];
  446. }
  447. rtlpriv->stats.rx_evm_percentage[stream] =
  448. ((rtlpriv->stats.rx_evm_percentage[stream] *
  449. (RX_SMOOTH_FACTOR - 1)) +
  450. (pstats->rx_mimo_signalquality[stream] *
  451. 1)) / (RX_SMOOTH_FACTOR);
  452. }
  453. }
  454. }
  455. static void _rtl92se_process_ui_link_quality(struct ieee80211_hw *hw,
  456. struct rtl_stats *pstats)
  457. {
  458. struct rtl_priv *rtlpriv = rtl_priv(hw);
  459. u32 last_evm = 0, tmpval;
  460. if (pstats->signalquality != 0) {
  461. if (pstats->packet_toself || pstats->packet_beacon) {
  462. if (rtlpriv->stats.ui_link_quality.total_num++ >=
  463. PHY_LINKQUALITY_SLID_WIN_MAX) {
  464. rtlpriv->stats.ui_link_quality.total_num =
  465. PHY_LINKQUALITY_SLID_WIN_MAX;
  466. last_evm =
  467. rtlpriv->stats.ui_link_quality.elements[
  468. rtlpriv->stats.ui_link_quality.index];
  469. rtlpriv->stats.ui_link_quality.total_val -=
  470. last_evm;
  471. }
  472. rtlpriv->stats.ui_link_quality.total_val +=
  473. pstats->signalquality;
  474. rtlpriv->stats.ui_link_quality.elements[
  475. rtlpriv->stats.ui_link_quality.index++] =
  476. pstats->signalquality;
  477. if (rtlpriv->stats.ui_link_quality.index >=
  478. PHY_LINKQUALITY_SLID_WIN_MAX)
  479. rtlpriv->stats.ui_link_quality.index = 0;
  480. tmpval = rtlpriv->stats.ui_link_quality.total_val /
  481. rtlpriv->stats.ui_link_quality.total_num;
  482. rtlpriv->stats.signal_quality = tmpval;
  483. rtlpriv->stats.last_sigstrength_inpercent = tmpval;
  484. rtl_92s_process_streams(hw, pstats);
  485. }
  486. }
  487. }
  488. static void _rtl92se_process_phyinfo(struct ieee80211_hw *hw,
  489. u8 *buffer,
  490. struct rtl_stats *pcurrent_stats)
  491. {
  492. if (!pcurrent_stats->packet_matchbssid &&
  493. !pcurrent_stats->packet_beacon)
  494. return;
  495. _rtl92se_process_ui_rssi(hw, pcurrent_stats);
  496. _rtl92se_process_pwdb(hw, pcurrent_stats);
  497. _rtl92se_process_ui_link_quality(hw, pcurrent_stats);
  498. }
  499. static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
  500. struct sk_buff *skb, struct rtl_stats *pstats,
  501. u8 *pdesc, struct rx_fwinfo *p_drvinfo)
  502. {
  503. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  504. struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
  505. struct ieee80211_hdr *hdr;
  506. u8 *tmp_buf;
  507. u8 *praddr;
  508. u8 *psaddr;
  509. __le16 fc;
  510. u16 type, cfc;
  511. bool packet_matchbssid, packet_toself, packet_beacon;
  512. tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
  513. hdr = (struct ieee80211_hdr *)tmp_buf;
  514. fc = hdr->frame_control;
  515. cfc = le16_to_cpu(fc);
  516. type = WLAN_FC_GET_TYPE(fc);
  517. praddr = hdr->addr1;
  518. psaddr = hdr->addr2;
  519. packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
  520. (!compare_ether_addr(mac->bssid, (cfc & IEEE80211_FCTL_TODS) ?
  521. hdr->addr1 : (cfc & IEEE80211_FCTL_FROMDS) ?
  522. hdr->addr2 : hdr->addr3)) && (!pstats->hwerror) &&
  523. (!pstats->crc) && (!pstats->icv));
  524. packet_toself = packet_matchbssid &&
  525. (!compare_ether_addr(praddr, rtlefuse->dev_addr));
  526. if (ieee80211_is_beacon(fc))
  527. packet_beacon = true;
  528. _rtl92se_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
  529. packet_matchbssid, packet_toself, packet_beacon);
  530. _rtl92se_process_phyinfo(hw, tmp_buf, pstats);
  531. }
  532. bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
  533. struct ieee80211_rx_status *rx_status, u8 *pdesc,
  534. struct sk_buff *skb)
  535. {
  536. struct rx_fwinfo *p_drvinfo;
  537. u32 phystatus = (u32)GET_RX_STATUS_DESC_PHY_STATUS(pdesc);
  538. stats->length = (u16)GET_RX_STATUS_DESC_PKT_LEN(pdesc);
  539. stats->rx_drvinfo_size = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE(pdesc) * 8;
  540. stats->rx_bufshift = (u8)(GET_RX_STATUS_DESC_SHIFT(pdesc) & 0x03);
  541. stats->icv = (u16)GET_RX_STATUS_DESC_ICV(pdesc);
  542. stats->crc = (u16)GET_RX_STATUS_DESC_CRC32(pdesc);
  543. stats->hwerror = (u16)(stats->crc | stats->icv);
  544. stats->decrypted = !GET_RX_STATUS_DESC_SWDEC(pdesc);
  545. stats->rate = (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc);
  546. stats->shortpreamble = (u16)GET_RX_STATUS_DESC_SPLCP(pdesc);
  547. stats->isampdu = (bool)(GET_RX_STATUS_DESC_PAGGR(pdesc) == 1);
  548. stats->timestamp_low = GET_RX_STATUS_DESC_TSFL(pdesc);
  549. stats->rx_is40Mhzpacket = (bool)GET_RX_STATUS_DESC_BW(pdesc);
  550. if (stats->hwerror)
  551. return false;
  552. rx_status->freq = hw->conf.channel->center_freq;
  553. rx_status->band = hw->conf.channel->band;
  554. if (GET_RX_STATUS_DESC_CRC32(pdesc))
  555. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  556. if (!GET_RX_STATUS_DESC_SWDEC(pdesc))
  557. rx_status->flag |= RX_FLAG_DECRYPTED;
  558. if (GET_RX_STATUS_DESC_BW(pdesc))
  559. rx_status->flag |= RX_FLAG_40MHZ;
  560. if (GET_RX_STATUS_DESC_RX_HT(pdesc))
  561. rx_status->flag |= RX_FLAG_HT;
  562. rx_status->flag |= RX_FLAG_MACTIME_MPDU;
  563. if (stats->decrypted)
  564. rx_status->flag |= RX_FLAG_DECRYPTED;
  565. rx_status->rate_idx = _rtl92se_rate_mapping((bool)
  566. GET_RX_STATUS_DESC_RX_HT(pdesc),
  567. (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc),
  568. (bool)GET_RX_STATUS_DESC_PAGGR(pdesc));
  569. rx_status->mactime = GET_RX_STATUS_DESC_TSFL(pdesc);
  570. if (phystatus == true) {
  571. p_drvinfo = (struct rx_fwinfo *)(skb->data +
  572. stats->rx_bufshift);
  573. _rtl92se_translate_rx_signal_stuff(hw, skb, stats, pdesc,
  574. p_drvinfo);
  575. }
  576. /*rx_status->qual = stats->signal; */
  577. rx_status->signal = stats->rssi + 10;
  578. /*rx_status->noise = -stats->noise; */
  579. return true;
  580. }
  581. void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
  582. struct ieee80211_hdr *hdr, u8 *pdesc_tx,
  583. struct ieee80211_tx_info *info, struct sk_buff *skb,
  584. u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
  585. {
  586. struct rtl_priv *rtlpriv = rtl_priv(hw);
  587. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  588. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  589. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  590. struct ieee80211_sta *sta = info->control.sta;
  591. u8 *pdesc = (u8 *) pdesc_tx;
  592. u16 seq_number;
  593. __le16 fc = hdr->frame_control;
  594. u8 reserved_macid = 0;
  595. u8 fw_qsel = _rtl92se_map_hwqueue_to_fwqueue(skb, hw_queue);
  596. bool firstseg = (!(hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG)));
  597. bool lastseg = (!(hdr->frame_control &
  598. cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)));
  599. dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  600. PCI_DMA_TODEVICE);
  601. u8 bw_40 = 0;
  602. if (mac->opmode == NL80211_IFTYPE_STATION) {
  603. bw_40 = mac->bw_40;
  604. } else if (mac->opmode == NL80211_IFTYPE_AP ||
  605. mac->opmode == NL80211_IFTYPE_ADHOC) {
  606. if (sta)
  607. bw_40 = sta->ht_cap.cap &
  608. IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  609. }
  610. seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
  611. rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
  612. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE_RTL8192S);
  613. if (firstseg) {
  614. if (rtlpriv->dm.useramask) {
  615. /* set txdesc macId */
  616. if (ptcb_desc->mac_id < 32) {
  617. SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
  618. reserved_macid |= ptcb_desc->mac_id;
  619. }
  620. }
  621. SET_TX_DESC_RSVD_MACID(pdesc, reserved_macid);
  622. SET_TX_DESC_TXHT(pdesc, ((ptcb_desc->hw_rate >=
  623. DESC92S_RATEMCS0) ? 1 : 0));
  624. if (rtlhal->version == VERSION_8192S_ACUT) {
  625. if (ptcb_desc->hw_rate == DESC92S_RATE1M ||
  626. ptcb_desc->hw_rate == DESC92S_RATE2M ||
  627. ptcb_desc->hw_rate == DESC92S_RATE5_5M ||
  628. ptcb_desc->hw_rate == DESC92S_RATE11M) {
  629. ptcb_desc->hw_rate = DESC92S_RATE12M;
  630. }
  631. }
  632. SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
  633. if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
  634. SET_TX_DESC_TX_SHORT(pdesc, 0);
  635. /* Aggregation related */
  636. if (info->flags & IEEE80211_TX_CTL_AMPDU)
  637. SET_TX_DESC_AGG_ENABLE(pdesc, 1);
  638. /* For AMPDU, we must insert SSN into TX_DESC */
  639. SET_TX_DESC_SEQ(pdesc, seq_number);
  640. /* Protection mode related */
  641. /* For 92S, if RTS/CTS are set, HW will execute RTS. */
  642. /* We choose only one protection mode to execute */
  643. SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
  644. !ptcb_desc->cts_enable) ? 1 : 0));
  645. SET_TX_DESC_CTS_ENABLE(pdesc, ((ptcb_desc->cts_enable) ?
  646. 1 : 0));
  647. SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
  648. SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
  649. SET_TX_DESC_RTS_BANDWIDTH(pdesc, 0);
  650. SET_TX_DESC_RTS_SUB_CARRIER(pdesc, ptcb_desc->rts_sc);
  651. SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <=
  652. DESC92S_RATE54M) ?
  653. (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
  654. : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
  655. /* Set Bandwidth and sub-channel settings. */
  656. if (bw_40) {
  657. if (ptcb_desc->packet_bw) {
  658. SET_TX_DESC_TX_BANDWIDTH(pdesc, 1);
  659. /* use duplicated mode */
  660. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  661. } else {
  662. SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
  663. SET_TX_DESC_TX_SUB_CARRIER(pdesc,
  664. mac->cur_40_prime_sc);
  665. }
  666. } else {
  667. SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
  668. SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
  669. }
  670. /* 3 Fill necessary field in First Descriptor */
  671. /*DWORD 0*/
  672. SET_TX_DESC_LINIP(pdesc, 0);
  673. SET_TX_DESC_OFFSET(pdesc, 32);
  674. SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
  675. /*DWORD 1*/
  676. SET_TX_DESC_RA_BRSR_ID(pdesc, ptcb_desc->ratr_index);
  677. /* Fill security related */
  678. if (info->control.hw_key) {
  679. struct ieee80211_key_conf *keyconf;
  680. keyconf = info->control.hw_key;
  681. switch (keyconf->cipher) {
  682. case WLAN_CIPHER_SUITE_WEP40:
  683. case WLAN_CIPHER_SUITE_WEP104:
  684. SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
  685. break;
  686. case WLAN_CIPHER_SUITE_TKIP:
  687. SET_TX_DESC_SEC_TYPE(pdesc, 0x2);
  688. break;
  689. case WLAN_CIPHER_SUITE_CCMP:
  690. SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
  691. break;
  692. default:
  693. SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
  694. break;
  695. }
  696. }
  697. /* Set Packet ID */
  698. SET_TX_DESC_PACKET_ID(pdesc, 0);
  699. /* We will assign magement queue to BK. */
  700. SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
  701. /* Alwasy enable all rate fallback range */
  702. SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
  703. /* Fix: I don't kown why hw use 6.5M to tx when set it */
  704. SET_TX_DESC_USER_RATE(pdesc,
  705. ptcb_desc->use_driver_rate ? 1 : 0);
  706. /* Set NON_QOS bit. */
  707. if (!ieee80211_is_data_qos(fc))
  708. SET_TX_DESC_NON_QOS(pdesc, 1);
  709. }
  710. /* Fill fields that are required to be initialized
  711. * in all of the descriptors */
  712. /*DWORD 0 */
  713. SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
  714. SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
  715. /* DWORD 7 */
  716. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
  717. /* DOWRD 8 */
  718. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
  719. RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, ("\n"));
  720. }
  721. void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
  722. bool firstseg, bool lastseg, struct sk_buff *skb)
  723. {
  724. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  725. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  726. struct rtl_tcb_desc *tcb_desc = (struct rtl_tcb_desc *)(skb->cb);
  727. dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
  728. PCI_DMA_TODEVICE);
  729. /* Clear all status */
  730. CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_CMDDESC_SIZE_RTL8192S);
  731. /* This bit indicate this packet is used for FW download. */
  732. if (tcb_desc->cmd_or_init == DESC_PACKET_TYPE_INIT) {
  733. /* For firmware downlaod we only need to set LINIP */
  734. SET_TX_DESC_LINIP(pdesc, tcb_desc->last_inipkt);
  735. /* 92SE must set as 1 for firmware download HW DMA error */
  736. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  737. SET_TX_DESC_LAST_SEG(pdesc, 1);
  738. /* 92SE need not to set TX packet size when firmware download */
  739. SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
  740. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  741. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
  742. SET_TX_DESC_OWN(pdesc, 1);
  743. } else { /* H2C Command Desc format (Host TXCMD) */
  744. /* 92SE must set as 1 for firmware download HW DMA error */
  745. SET_TX_DESC_FIRST_SEG(pdesc, 1);
  746. SET_TX_DESC_LAST_SEG(pdesc, 1);
  747. SET_TX_DESC_OFFSET(pdesc, 0x20);
  748. /* Buffer size + command header */
  749. SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
  750. /* Fixed queue of H2C command */
  751. SET_TX_DESC_QUEUE_SEL(pdesc, 0x13);
  752. SET_BITS_TO_LE_4BYTE(skb->data, 24, 7, rtlhal->h2c_txcmd_seq);
  753. SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
  754. SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, cpu_to_le32(mapping));
  755. SET_TX_DESC_OWN(pdesc, 1);
  756. }
  757. }
  758. void rtl92se_set_desc(u8 *pdesc, bool istx, u8 desc_name, u8 *val)
  759. {
  760. if (istx == true) {
  761. switch (desc_name) {
  762. case HW_DESC_OWN:
  763. SET_TX_DESC_OWN(pdesc, 1);
  764. break;
  765. case HW_DESC_TX_NEXTDESC_ADDR:
  766. SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
  767. break;
  768. default:
  769. RT_ASSERT(false, ("ERR txdesc :%d not process\n",
  770. desc_name));
  771. break;
  772. }
  773. } else {
  774. switch (desc_name) {
  775. case HW_DESC_RXOWN:
  776. SET_RX_STATUS_DESC_OWN(pdesc, 1);
  777. break;
  778. case HW_DESC_RXBUFF_ADDR:
  779. SET_RX_STATUS__DESC_BUFF_ADDR(pdesc, *(u32 *) val);
  780. break;
  781. case HW_DESC_RXPKT_LEN:
  782. SET_RX_STATUS_DESC_PKT_LEN(pdesc, *(u32 *) val);
  783. break;
  784. case HW_DESC_RXERO:
  785. SET_RX_STATUS_DESC_EOR(pdesc, 1);
  786. break;
  787. default:
  788. RT_ASSERT(false, ("ERR rxdesc :%d not process\n",
  789. desc_name));
  790. break;
  791. }
  792. }
  793. }
  794. u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
  795. {
  796. u32 ret = 0;
  797. if (istx == true) {
  798. switch (desc_name) {
  799. case HW_DESC_OWN:
  800. ret = GET_TX_DESC_OWN(desc);
  801. break;
  802. case HW_DESC_TXBUFF_ADDR:
  803. ret = GET_TX_DESC_TX_BUFFER_ADDRESS(desc);
  804. break;
  805. default:
  806. RT_ASSERT(false, ("ERR txdesc :%d not process\n",
  807. desc_name));
  808. break;
  809. }
  810. } else {
  811. switch (desc_name) {
  812. case HW_DESC_OWN:
  813. ret = GET_RX_STATUS_DESC_OWN(desc);
  814. break;
  815. case HW_DESC_RXPKT_LEN:
  816. ret = GET_RX_STATUS_DESC_PKT_LEN(desc);
  817. break;
  818. default:
  819. RT_ASSERT(false, ("ERR rxdesc :%d not process\n",
  820. desc_name));
  821. break;
  822. }
  823. }
  824. return ret;
  825. }
  826. void rtl92se_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
  827. {
  828. struct rtl_priv *rtlpriv = rtl_priv(hw);
  829. rtl_write_word(rtlpriv, TP_POLL, BIT(0) << (hw_queue));
  830. }