mwl8k.c 138 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <linux/slab.h>
  22. #include <net/mac80211.h>
  23. #include <linux/moduleparam.h>
  24. #include <linux/firmware.h>
  25. #include <linux/workqueue.h>
  26. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  27. #define MWL8K_NAME KBUILD_MODNAME
  28. #define MWL8K_VERSION "0.12"
  29. /* Module parameters */
  30. static unsigned ap_mode_default;
  31. module_param(ap_mode_default, bool, 0);
  32. MODULE_PARM_DESC(ap_mode_default,
  33. "Set to 1 to make ap mode the default instead of sta mode");
  34. /* Register definitions */
  35. #define MWL8K_HIU_GEN_PTR 0x00000c10
  36. #define MWL8K_MODE_STA 0x0000005a
  37. #define MWL8K_MODE_AP 0x000000a5
  38. #define MWL8K_HIU_INT_CODE 0x00000c14
  39. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  40. #define MWL8K_FWAP_READY 0xf1f2f4a5
  41. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  42. #define MWL8K_HIU_SCRATCH 0x00000c40
  43. /* Host->device communications */
  44. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  45. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  46. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  47. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  49. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  50. #define MWL8K_H2A_INT_RESET (1 << 15)
  51. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  52. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  53. /* Device->host communications */
  54. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  55. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  56. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  57. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  59. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  60. #define MWL8K_A2H_INT_BA_WATCHDOG (1 << 14)
  61. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  62. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  63. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  64. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  65. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  66. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  67. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  68. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  69. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  70. /* HW micro second timer register
  71. * located at offset 0xA600. This
  72. * will be used to timestamp tx
  73. * packets.
  74. */
  75. #define MWL8K_HW_TIMER_REGISTER 0x0000a600
  76. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  77. MWL8K_A2H_INT_CHNL_SWITCHED | \
  78. MWL8K_A2H_INT_QUEUE_EMPTY | \
  79. MWL8K_A2H_INT_RADAR_DETECT | \
  80. MWL8K_A2H_INT_RADIO_ON | \
  81. MWL8K_A2H_INT_RADIO_OFF | \
  82. MWL8K_A2H_INT_MAC_EVENT | \
  83. MWL8K_A2H_INT_OPC_DONE | \
  84. MWL8K_A2H_INT_RX_READY | \
  85. MWL8K_A2H_INT_TX_DONE | \
  86. MWL8K_A2H_INT_BA_WATCHDOG)
  87. #define MWL8K_RX_QUEUES 1
  88. #define MWL8K_TX_WMM_QUEUES 4
  89. #define MWL8K_MAX_AMPDU_QUEUES 8
  90. #define MWL8K_MAX_TX_QUEUES (MWL8K_TX_WMM_QUEUES + MWL8K_MAX_AMPDU_QUEUES)
  91. #define mwl8k_tx_queues(priv) (MWL8K_TX_WMM_QUEUES + (priv)->num_ampdu_queues)
  92. struct rxd_ops {
  93. int rxd_size;
  94. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  95. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  96. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  97. __le16 *qos, s8 *noise);
  98. };
  99. struct mwl8k_device_info {
  100. char *part_name;
  101. char *helper_image;
  102. char *fw_image_sta;
  103. char *fw_image_ap;
  104. struct rxd_ops *ap_rxd_ops;
  105. u32 fw_api_ap;
  106. };
  107. struct mwl8k_rx_queue {
  108. int rxd_count;
  109. /* hw receives here */
  110. int head;
  111. /* refill descs here */
  112. int tail;
  113. void *rxd;
  114. dma_addr_t rxd_dma;
  115. struct {
  116. struct sk_buff *skb;
  117. DEFINE_DMA_UNMAP_ADDR(dma);
  118. } *buf;
  119. };
  120. struct mwl8k_tx_queue {
  121. /* hw transmits here */
  122. int head;
  123. /* sw appends here */
  124. int tail;
  125. unsigned int len;
  126. struct mwl8k_tx_desc *txd;
  127. dma_addr_t txd_dma;
  128. struct sk_buff **skb;
  129. };
  130. enum {
  131. AMPDU_NO_STREAM,
  132. AMPDU_STREAM_NEW,
  133. AMPDU_STREAM_IN_PROGRESS,
  134. AMPDU_STREAM_ACTIVE,
  135. };
  136. struct mwl8k_ampdu_stream {
  137. struct ieee80211_sta *sta;
  138. u8 tid;
  139. u8 state;
  140. u8 idx;
  141. u8 txq_idx; /* index of this stream in priv->txq */
  142. };
  143. struct mwl8k_priv {
  144. struct ieee80211_hw *hw;
  145. struct pci_dev *pdev;
  146. int irq;
  147. struct mwl8k_device_info *device_info;
  148. void __iomem *sram;
  149. void __iomem *regs;
  150. /* firmware */
  151. const struct firmware *fw_helper;
  152. const struct firmware *fw_ucode;
  153. /* hardware/firmware parameters */
  154. bool ap_fw;
  155. struct rxd_ops *rxd_ops;
  156. struct ieee80211_supported_band band_24;
  157. struct ieee80211_channel channels_24[14];
  158. struct ieee80211_rate rates_24[14];
  159. struct ieee80211_supported_band band_50;
  160. struct ieee80211_channel channels_50[4];
  161. struct ieee80211_rate rates_50[9];
  162. u32 ap_macids_supported;
  163. u32 sta_macids_supported;
  164. /* Ampdu stream information */
  165. u8 num_ampdu_queues;
  166. spinlock_t stream_lock;
  167. struct mwl8k_ampdu_stream ampdu[MWL8K_MAX_AMPDU_QUEUES];
  168. struct work_struct watchdog_ba_handle;
  169. /* firmware access */
  170. struct mutex fw_mutex;
  171. struct task_struct *fw_mutex_owner;
  172. int fw_mutex_depth;
  173. struct completion *hostcmd_wait;
  174. /* lock held over TX and TX reap */
  175. spinlock_t tx_lock;
  176. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  177. struct completion *tx_wait;
  178. /* List of interfaces. */
  179. u32 macids_used;
  180. struct list_head vif_list;
  181. /* power management status cookie from firmware */
  182. u32 *cookie;
  183. dma_addr_t cookie_dma;
  184. u16 num_mcaddrs;
  185. u8 hw_rev;
  186. u32 fw_rev;
  187. /*
  188. * Running count of TX packets in flight, to avoid
  189. * iterating over the transmit rings each time.
  190. */
  191. int pending_tx_pkts;
  192. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  193. struct mwl8k_tx_queue txq[MWL8K_MAX_TX_QUEUES];
  194. u32 txq_offset[MWL8K_MAX_TX_QUEUES];
  195. bool radio_on;
  196. bool radio_short_preamble;
  197. bool sniffer_enabled;
  198. bool wmm_enabled;
  199. /* XXX need to convert this to handle multiple interfaces */
  200. bool capture_beacon;
  201. u8 capture_bssid[ETH_ALEN];
  202. struct sk_buff *beacon_skb;
  203. /*
  204. * This FJ worker has to be global as it is scheduled from the
  205. * RX handler. At this point we don't know which interface it
  206. * belongs to until the list of bssids waiting to complete join
  207. * is checked.
  208. */
  209. struct work_struct finalize_join_worker;
  210. /* Tasklet to perform TX reclaim. */
  211. struct tasklet_struct poll_tx_task;
  212. /* Tasklet to perform RX. */
  213. struct tasklet_struct poll_rx_task;
  214. /* Most recently reported noise in dBm */
  215. s8 noise;
  216. /*
  217. * preserve the queue configurations so they can be restored if/when
  218. * the firmware image is swapped.
  219. */
  220. struct ieee80211_tx_queue_params wmm_params[MWL8K_TX_WMM_QUEUES];
  221. /* async firmware loading state */
  222. unsigned fw_state;
  223. char *fw_pref;
  224. char *fw_alt;
  225. struct completion firmware_loading_complete;
  226. };
  227. #define MAX_WEP_KEY_LEN 13
  228. #define NUM_WEP_KEYS 4
  229. /* Per interface specific private data */
  230. struct mwl8k_vif {
  231. struct list_head list;
  232. struct ieee80211_vif *vif;
  233. /* Firmware macid for this vif. */
  234. int macid;
  235. /* Non AMPDU sequence number assigned by driver. */
  236. u16 seqno;
  237. /* Saved WEP keys */
  238. struct {
  239. u8 enabled;
  240. u8 key[sizeof(struct ieee80211_key_conf) + MAX_WEP_KEY_LEN];
  241. } wep_key_conf[NUM_WEP_KEYS];
  242. /* BSSID */
  243. u8 bssid[ETH_ALEN];
  244. /* A flag to indicate is HW crypto is enabled for this bssid */
  245. bool is_hw_crypto_enabled;
  246. };
  247. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  248. #define IEEE80211_KEY_CONF(_u8) ((struct ieee80211_key_conf *)(_u8))
  249. struct tx_traffic_info {
  250. u32 start_time;
  251. u32 pkts;
  252. };
  253. #define MWL8K_MAX_TID 8
  254. struct mwl8k_sta {
  255. /* Index into station database. Returned by UPDATE_STADB. */
  256. u8 peer_id;
  257. u8 is_ampdu_allowed;
  258. struct tx_traffic_info tx_stats[MWL8K_MAX_TID];
  259. };
  260. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  261. static const struct ieee80211_channel mwl8k_channels_24[] = {
  262. { .center_freq = 2412, .hw_value = 1, },
  263. { .center_freq = 2417, .hw_value = 2, },
  264. { .center_freq = 2422, .hw_value = 3, },
  265. { .center_freq = 2427, .hw_value = 4, },
  266. { .center_freq = 2432, .hw_value = 5, },
  267. { .center_freq = 2437, .hw_value = 6, },
  268. { .center_freq = 2442, .hw_value = 7, },
  269. { .center_freq = 2447, .hw_value = 8, },
  270. { .center_freq = 2452, .hw_value = 9, },
  271. { .center_freq = 2457, .hw_value = 10, },
  272. { .center_freq = 2462, .hw_value = 11, },
  273. { .center_freq = 2467, .hw_value = 12, },
  274. { .center_freq = 2472, .hw_value = 13, },
  275. { .center_freq = 2484, .hw_value = 14, },
  276. };
  277. static const struct ieee80211_rate mwl8k_rates_24[] = {
  278. { .bitrate = 10, .hw_value = 2, },
  279. { .bitrate = 20, .hw_value = 4, },
  280. { .bitrate = 55, .hw_value = 11, },
  281. { .bitrate = 110, .hw_value = 22, },
  282. { .bitrate = 220, .hw_value = 44, },
  283. { .bitrate = 60, .hw_value = 12, },
  284. { .bitrate = 90, .hw_value = 18, },
  285. { .bitrate = 120, .hw_value = 24, },
  286. { .bitrate = 180, .hw_value = 36, },
  287. { .bitrate = 240, .hw_value = 48, },
  288. { .bitrate = 360, .hw_value = 72, },
  289. { .bitrate = 480, .hw_value = 96, },
  290. { .bitrate = 540, .hw_value = 108, },
  291. { .bitrate = 720, .hw_value = 144, },
  292. };
  293. static const struct ieee80211_channel mwl8k_channels_50[] = {
  294. { .center_freq = 5180, .hw_value = 36, },
  295. { .center_freq = 5200, .hw_value = 40, },
  296. { .center_freq = 5220, .hw_value = 44, },
  297. { .center_freq = 5240, .hw_value = 48, },
  298. };
  299. static const struct ieee80211_rate mwl8k_rates_50[] = {
  300. { .bitrate = 60, .hw_value = 12, },
  301. { .bitrate = 90, .hw_value = 18, },
  302. { .bitrate = 120, .hw_value = 24, },
  303. { .bitrate = 180, .hw_value = 36, },
  304. { .bitrate = 240, .hw_value = 48, },
  305. { .bitrate = 360, .hw_value = 72, },
  306. { .bitrate = 480, .hw_value = 96, },
  307. { .bitrate = 540, .hw_value = 108, },
  308. { .bitrate = 720, .hw_value = 144, },
  309. };
  310. /* Set or get info from Firmware */
  311. #define MWL8K_CMD_GET 0x0000
  312. #define MWL8K_CMD_SET 0x0001
  313. #define MWL8K_CMD_SET_LIST 0x0002
  314. /* Firmware command codes */
  315. #define MWL8K_CMD_CODE_DNLD 0x0001
  316. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  317. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  318. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  319. #define MWL8K_CMD_GET_STAT 0x0014
  320. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  321. #define MWL8K_CMD_RF_TX_POWER 0x001e
  322. #define MWL8K_CMD_TX_POWER 0x001f
  323. #define MWL8K_CMD_RF_ANTENNA 0x0020
  324. #define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
  325. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  326. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  327. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  328. #define MWL8K_CMD_SET_AID 0x010d
  329. #define MWL8K_CMD_SET_RATE 0x0110
  330. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  331. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  332. #define MWL8K_CMD_SET_SLOT 0x0114
  333. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  334. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  335. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  336. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  337. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  338. #define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
  339. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  340. #define MWL8K_CMD_GET_WATCHDOG_BITMAP 0x0205
  341. #define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
  342. #define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
  343. #define MWL8K_CMD_UPDATE_ENCRYPTION 0x1122 /* per-vif */
  344. #define MWL8K_CMD_UPDATE_STADB 0x1123
  345. #define MWL8K_CMD_BASTREAM 0x1125
  346. static const char *mwl8k_cmd_name(__le16 cmd, char *buf, int bufsize)
  347. {
  348. u16 command = le16_to_cpu(cmd);
  349. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  350. snprintf(buf, bufsize, "%s", #x);\
  351. return buf;\
  352. } while (0)
  353. switch (command & ~0x8000) {
  354. MWL8K_CMDNAME(CODE_DNLD);
  355. MWL8K_CMDNAME(GET_HW_SPEC);
  356. MWL8K_CMDNAME(SET_HW_SPEC);
  357. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  358. MWL8K_CMDNAME(GET_STAT);
  359. MWL8K_CMDNAME(RADIO_CONTROL);
  360. MWL8K_CMDNAME(RF_TX_POWER);
  361. MWL8K_CMDNAME(TX_POWER);
  362. MWL8K_CMDNAME(RF_ANTENNA);
  363. MWL8K_CMDNAME(SET_BEACON);
  364. MWL8K_CMDNAME(SET_PRE_SCAN);
  365. MWL8K_CMDNAME(SET_POST_SCAN);
  366. MWL8K_CMDNAME(SET_RF_CHANNEL);
  367. MWL8K_CMDNAME(SET_AID);
  368. MWL8K_CMDNAME(SET_RATE);
  369. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  370. MWL8K_CMDNAME(RTS_THRESHOLD);
  371. MWL8K_CMDNAME(SET_SLOT);
  372. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  373. MWL8K_CMDNAME(SET_WMM_MODE);
  374. MWL8K_CMDNAME(MIMO_CONFIG);
  375. MWL8K_CMDNAME(USE_FIXED_RATE);
  376. MWL8K_CMDNAME(ENABLE_SNIFFER);
  377. MWL8K_CMDNAME(SET_MAC_ADDR);
  378. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  379. MWL8K_CMDNAME(BSS_START);
  380. MWL8K_CMDNAME(SET_NEW_STN);
  381. MWL8K_CMDNAME(UPDATE_ENCRYPTION);
  382. MWL8K_CMDNAME(UPDATE_STADB);
  383. MWL8K_CMDNAME(BASTREAM);
  384. MWL8K_CMDNAME(GET_WATCHDOG_BITMAP);
  385. default:
  386. snprintf(buf, bufsize, "0x%x", cmd);
  387. }
  388. #undef MWL8K_CMDNAME
  389. return buf;
  390. }
  391. /* Hardware and firmware reset */
  392. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  393. {
  394. iowrite32(MWL8K_H2A_INT_RESET,
  395. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  396. iowrite32(MWL8K_H2A_INT_RESET,
  397. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  398. msleep(20);
  399. }
  400. /* Release fw image */
  401. static void mwl8k_release_fw(const struct firmware **fw)
  402. {
  403. if (*fw == NULL)
  404. return;
  405. release_firmware(*fw);
  406. *fw = NULL;
  407. }
  408. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  409. {
  410. mwl8k_release_fw(&priv->fw_ucode);
  411. mwl8k_release_fw(&priv->fw_helper);
  412. }
  413. /* states for asynchronous f/w loading */
  414. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context);
  415. enum {
  416. FW_STATE_INIT = 0,
  417. FW_STATE_LOADING_PREF,
  418. FW_STATE_LOADING_ALT,
  419. FW_STATE_ERROR,
  420. };
  421. /* Request fw image */
  422. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  423. const char *fname, const struct firmware **fw,
  424. bool nowait)
  425. {
  426. /* release current image */
  427. if (*fw != NULL)
  428. mwl8k_release_fw(fw);
  429. if (nowait)
  430. return request_firmware_nowait(THIS_MODULE, 1, fname,
  431. &priv->pdev->dev, GFP_KERNEL,
  432. priv, mwl8k_fw_state_machine);
  433. else
  434. return request_firmware(fw, fname, &priv->pdev->dev);
  435. }
  436. static int mwl8k_request_firmware(struct mwl8k_priv *priv, char *fw_image,
  437. bool nowait)
  438. {
  439. struct mwl8k_device_info *di = priv->device_info;
  440. int rc;
  441. if (di->helper_image != NULL) {
  442. if (nowait)
  443. rc = mwl8k_request_fw(priv, di->helper_image,
  444. &priv->fw_helper, true);
  445. else
  446. rc = mwl8k_request_fw(priv, di->helper_image,
  447. &priv->fw_helper, false);
  448. if (rc)
  449. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  450. pci_name(priv->pdev), di->helper_image);
  451. if (rc || nowait)
  452. return rc;
  453. }
  454. if (nowait) {
  455. /*
  456. * if we get here, no helper image is needed. Skip the
  457. * FW_STATE_INIT state.
  458. */
  459. priv->fw_state = FW_STATE_LOADING_PREF;
  460. rc = mwl8k_request_fw(priv, fw_image,
  461. &priv->fw_ucode,
  462. true);
  463. } else
  464. rc = mwl8k_request_fw(priv, fw_image,
  465. &priv->fw_ucode, false);
  466. if (rc) {
  467. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  468. pci_name(priv->pdev), fw_image);
  469. mwl8k_release_fw(&priv->fw_helper);
  470. return rc;
  471. }
  472. return 0;
  473. }
  474. struct mwl8k_cmd_pkt {
  475. __le16 code;
  476. __le16 length;
  477. __u8 seq_num;
  478. __u8 macid;
  479. __le16 result;
  480. char payload[0];
  481. } __packed;
  482. /*
  483. * Firmware loading.
  484. */
  485. static int
  486. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  487. {
  488. void __iomem *regs = priv->regs;
  489. dma_addr_t dma_addr;
  490. int loops;
  491. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  492. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  493. return -ENOMEM;
  494. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  495. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  496. iowrite32(MWL8K_H2A_INT_DOORBELL,
  497. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  498. iowrite32(MWL8K_H2A_INT_DUMMY,
  499. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  500. loops = 1000;
  501. do {
  502. u32 int_code;
  503. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  504. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  505. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  506. break;
  507. }
  508. cond_resched();
  509. udelay(1);
  510. } while (--loops);
  511. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  512. return loops ? 0 : -ETIMEDOUT;
  513. }
  514. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  515. const u8 *data, size_t length)
  516. {
  517. struct mwl8k_cmd_pkt *cmd;
  518. int done;
  519. int rc = 0;
  520. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  521. if (cmd == NULL)
  522. return -ENOMEM;
  523. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  524. cmd->seq_num = 0;
  525. cmd->macid = 0;
  526. cmd->result = 0;
  527. done = 0;
  528. while (length) {
  529. int block_size = length > 256 ? 256 : length;
  530. memcpy(cmd->payload, data + done, block_size);
  531. cmd->length = cpu_to_le16(block_size);
  532. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  533. sizeof(*cmd) + block_size);
  534. if (rc)
  535. break;
  536. done += block_size;
  537. length -= block_size;
  538. }
  539. if (!rc) {
  540. cmd->length = 0;
  541. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  542. }
  543. kfree(cmd);
  544. return rc;
  545. }
  546. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  547. const u8 *data, size_t length)
  548. {
  549. unsigned char *buffer;
  550. int may_continue, rc = 0;
  551. u32 done, prev_block_size;
  552. buffer = kmalloc(1024, GFP_KERNEL);
  553. if (buffer == NULL)
  554. return -ENOMEM;
  555. done = 0;
  556. prev_block_size = 0;
  557. may_continue = 1000;
  558. while (may_continue > 0) {
  559. u32 block_size;
  560. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  561. if (block_size & 1) {
  562. block_size &= ~1;
  563. may_continue--;
  564. } else {
  565. done += prev_block_size;
  566. length -= prev_block_size;
  567. }
  568. if (block_size > 1024 || block_size > length) {
  569. rc = -EOVERFLOW;
  570. break;
  571. }
  572. if (length == 0) {
  573. rc = 0;
  574. break;
  575. }
  576. if (block_size == 0) {
  577. rc = -EPROTO;
  578. may_continue--;
  579. udelay(1);
  580. continue;
  581. }
  582. prev_block_size = block_size;
  583. memcpy(buffer, data + done, block_size);
  584. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  585. if (rc)
  586. break;
  587. }
  588. if (!rc && length != 0)
  589. rc = -EREMOTEIO;
  590. kfree(buffer);
  591. return rc;
  592. }
  593. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  594. {
  595. struct mwl8k_priv *priv = hw->priv;
  596. const struct firmware *fw = priv->fw_ucode;
  597. int rc;
  598. int loops;
  599. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  600. const struct firmware *helper = priv->fw_helper;
  601. if (helper == NULL) {
  602. printk(KERN_ERR "%s: helper image needed but none "
  603. "given\n", pci_name(priv->pdev));
  604. return -EINVAL;
  605. }
  606. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  607. if (rc) {
  608. printk(KERN_ERR "%s: unable to load firmware "
  609. "helper image\n", pci_name(priv->pdev));
  610. return rc;
  611. }
  612. msleep(20);
  613. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  614. } else {
  615. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  616. }
  617. if (rc) {
  618. printk(KERN_ERR "%s: unable to load firmware image\n",
  619. pci_name(priv->pdev));
  620. return rc;
  621. }
  622. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  623. loops = 500000;
  624. do {
  625. u32 ready_code;
  626. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  627. if (ready_code == MWL8K_FWAP_READY) {
  628. priv->ap_fw = 1;
  629. break;
  630. } else if (ready_code == MWL8K_FWSTA_READY) {
  631. priv->ap_fw = 0;
  632. break;
  633. }
  634. cond_resched();
  635. udelay(1);
  636. } while (--loops);
  637. return loops ? 0 : -ETIMEDOUT;
  638. }
  639. /* DMA header used by firmware and hardware. */
  640. struct mwl8k_dma_data {
  641. __le16 fwlen;
  642. struct ieee80211_hdr wh;
  643. char data[0];
  644. } __packed;
  645. /* Routines to add/remove DMA header from skb. */
  646. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  647. {
  648. struct mwl8k_dma_data *tr;
  649. int hdrlen;
  650. tr = (struct mwl8k_dma_data *)skb->data;
  651. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  652. if (hdrlen != sizeof(tr->wh)) {
  653. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  654. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  655. *((__le16 *)(tr->data - 2)) = qos;
  656. } else {
  657. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  658. }
  659. }
  660. if (hdrlen != sizeof(*tr))
  661. skb_pull(skb, sizeof(*tr) - hdrlen);
  662. }
  663. #define REDUCED_TX_HEADROOM 8
  664. static void
  665. mwl8k_add_dma_header(struct mwl8k_priv *priv, struct sk_buff *skb,
  666. int head_pad, int tail_pad)
  667. {
  668. struct ieee80211_hdr *wh;
  669. int hdrlen;
  670. int reqd_hdrlen;
  671. struct mwl8k_dma_data *tr;
  672. /*
  673. * Add a firmware DMA header; the firmware requires that we
  674. * present a 2-byte payload length followed by a 4-address
  675. * header (without QoS field), followed (optionally) by any
  676. * WEP/ExtIV header (but only filled in for CCMP).
  677. */
  678. wh = (struct ieee80211_hdr *)skb->data;
  679. hdrlen = ieee80211_hdrlen(wh->frame_control);
  680. /*
  681. * Check if skb_resize is required because of
  682. * tx_headroom adjustment.
  683. */
  684. if (priv->ap_fw && (hdrlen < (sizeof(struct ieee80211_cts)
  685. + REDUCED_TX_HEADROOM))) {
  686. if (pskb_expand_head(skb, REDUCED_TX_HEADROOM, 0, GFP_ATOMIC)) {
  687. wiphy_err(priv->hw->wiphy,
  688. "Failed to reallocate TX buffer\n");
  689. return;
  690. }
  691. skb->truesize += REDUCED_TX_HEADROOM;
  692. }
  693. reqd_hdrlen = sizeof(*tr) + head_pad;
  694. if (hdrlen != reqd_hdrlen)
  695. skb_push(skb, reqd_hdrlen - hdrlen);
  696. if (ieee80211_is_data_qos(wh->frame_control))
  697. hdrlen -= IEEE80211_QOS_CTL_LEN;
  698. tr = (struct mwl8k_dma_data *)skb->data;
  699. if (wh != &tr->wh)
  700. memmove(&tr->wh, wh, hdrlen);
  701. if (hdrlen != sizeof(tr->wh))
  702. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  703. /*
  704. * Firmware length is the length of the fully formed "802.11
  705. * payload". That is, everything except for the 802.11 header.
  706. * This includes all crypto material including the MIC.
  707. */
  708. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr) + tail_pad);
  709. }
  710. static void mwl8k_encapsulate_tx_frame(struct mwl8k_priv *priv,
  711. struct sk_buff *skb)
  712. {
  713. struct ieee80211_hdr *wh;
  714. struct ieee80211_tx_info *tx_info;
  715. struct ieee80211_key_conf *key_conf;
  716. int data_pad;
  717. int head_pad = 0;
  718. wh = (struct ieee80211_hdr *)skb->data;
  719. tx_info = IEEE80211_SKB_CB(skb);
  720. key_conf = NULL;
  721. if (ieee80211_is_data(wh->frame_control))
  722. key_conf = tx_info->control.hw_key;
  723. /*
  724. * Make sure the packet header is in the DMA header format (4-address
  725. * without QoS), and add head & tail padding when HW crypto is enabled.
  726. *
  727. * We have the following trailer padding requirements:
  728. * - WEP: 4 trailer bytes (ICV)
  729. * - TKIP: 12 trailer bytes (8 MIC + 4 ICV)
  730. * - CCMP: 8 trailer bytes (MIC)
  731. */
  732. data_pad = 0;
  733. if (key_conf != NULL) {
  734. head_pad = key_conf->iv_len;
  735. switch (key_conf->cipher) {
  736. case WLAN_CIPHER_SUITE_WEP40:
  737. case WLAN_CIPHER_SUITE_WEP104:
  738. data_pad = 4;
  739. break;
  740. case WLAN_CIPHER_SUITE_TKIP:
  741. data_pad = 12;
  742. break;
  743. case WLAN_CIPHER_SUITE_CCMP:
  744. data_pad = 8;
  745. break;
  746. }
  747. }
  748. mwl8k_add_dma_header(priv, skb, head_pad, data_pad);
  749. }
  750. /*
  751. * Packet reception for 88w8366 AP firmware.
  752. */
  753. struct mwl8k_rxd_8366_ap {
  754. __le16 pkt_len;
  755. __u8 sq2;
  756. __u8 rate;
  757. __le32 pkt_phys_addr;
  758. __le32 next_rxd_phys_addr;
  759. __le16 qos_control;
  760. __le16 htsig2;
  761. __le32 hw_rssi_info;
  762. __le32 hw_noise_floor_info;
  763. __u8 noise_floor;
  764. __u8 pad0[3];
  765. __u8 rssi;
  766. __u8 rx_status;
  767. __u8 channel;
  768. __u8 rx_ctrl;
  769. } __packed;
  770. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  771. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  772. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  773. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  774. /* 8366 AP rx_status bits */
  775. #define MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK 0x80
  776. #define MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR 0xFF
  777. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR 0x02
  778. #define MWL8K_8366_AP_RXSTAT_WEP_DECRYPT_ICV_ERR 0x04
  779. #define MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_ICV_ERR 0x08
  780. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  781. {
  782. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  783. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  784. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  785. }
  786. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  787. {
  788. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  789. rxd->pkt_len = cpu_to_le16(len);
  790. rxd->pkt_phys_addr = cpu_to_le32(addr);
  791. wmb();
  792. rxd->rx_ctrl = 0;
  793. }
  794. static int
  795. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  796. __le16 *qos, s8 *noise)
  797. {
  798. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  799. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  800. return -1;
  801. rmb();
  802. memset(status, 0, sizeof(*status));
  803. status->signal = -rxd->rssi;
  804. *noise = -rxd->noise_floor;
  805. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  806. status->flag |= RX_FLAG_HT;
  807. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  808. status->flag |= RX_FLAG_40MHZ;
  809. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  810. } else {
  811. int i;
  812. for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
  813. if (mwl8k_rates_24[i].hw_value == rxd->rate) {
  814. status->rate_idx = i;
  815. break;
  816. }
  817. }
  818. }
  819. if (rxd->channel > 14) {
  820. status->band = IEEE80211_BAND_5GHZ;
  821. if (!(status->flag & RX_FLAG_HT))
  822. status->rate_idx -= 5;
  823. } else {
  824. status->band = IEEE80211_BAND_2GHZ;
  825. }
  826. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  827. status->band);
  828. *qos = rxd->qos_control;
  829. if ((rxd->rx_status != MWL8K_8366_AP_RXSTAT_GENERAL_DECRYPT_ERR) &&
  830. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_DECRYPT_ERR_MASK) &&
  831. (rxd->rx_status & MWL8K_8366_AP_RXSTAT_TKIP_DECRYPT_MIC_ERR))
  832. status->flag |= RX_FLAG_MMIC_ERROR;
  833. return le16_to_cpu(rxd->pkt_len);
  834. }
  835. static struct rxd_ops rxd_8366_ap_ops = {
  836. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  837. .rxd_init = mwl8k_rxd_8366_ap_init,
  838. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  839. .rxd_process = mwl8k_rxd_8366_ap_process,
  840. };
  841. /*
  842. * Packet reception for STA firmware.
  843. */
  844. struct mwl8k_rxd_sta {
  845. __le16 pkt_len;
  846. __u8 link_quality;
  847. __u8 noise_level;
  848. __le32 pkt_phys_addr;
  849. __le32 next_rxd_phys_addr;
  850. __le16 qos_control;
  851. __le16 rate_info;
  852. __le32 pad0[4];
  853. __u8 rssi;
  854. __u8 channel;
  855. __le16 pad1;
  856. __u8 rx_ctrl;
  857. __u8 rx_status;
  858. __u8 pad2[2];
  859. } __packed;
  860. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  861. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  862. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  863. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  864. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  865. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  866. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  867. #define MWL8K_STA_RX_CTRL_DECRYPT_ERROR 0x04
  868. /* ICV=0 or MIC=1 */
  869. #define MWL8K_STA_RX_CTRL_DEC_ERR_TYPE 0x08
  870. /* Key is uploaded only in failure case */
  871. #define MWL8K_STA_RX_CTRL_KEY_INDEX 0x30
  872. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  873. {
  874. struct mwl8k_rxd_sta *rxd = _rxd;
  875. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  876. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  877. }
  878. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  879. {
  880. struct mwl8k_rxd_sta *rxd = _rxd;
  881. rxd->pkt_len = cpu_to_le16(len);
  882. rxd->pkt_phys_addr = cpu_to_le32(addr);
  883. wmb();
  884. rxd->rx_ctrl = 0;
  885. }
  886. static int
  887. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  888. __le16 *qos, s8 *noise)
  889. {
  890. struct mwl8k_rxd_sta *rxd = _rxd;
  891. u16 rate_info;
  892. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  893. return -1;
  894. rmb();
  895. rate_info = le16_to_cpu(rxd->rate_info);
  896. memset(status, 0, sizeof(*status));
  897. status->signal = -rxd->rssi;
  898. *noise = -rxd->noise_level;
  899. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  900. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  901. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  902. status->flag |= RX_FLAG_SHORTPRE;
  903. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  904. status->flag |= RX_FLAG_40MHZ;
  905. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  906. status->flag |= RX_FLAG_SHORT_GI;
  907. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  908. status->flag |= RX_FLAG_HT;
  909. if (rxd->channel > 14) {
  910. status->band = IEEE80211_BAND_5GHZ;
  911. if (!(status->flag & RX_FLAG_HT))
  912. status->rate_idx -= 5;
  913. } else {
  914. status->band = IEEE80211_BAND_2GHZ;
  915. }
  916. status->freq = ieee80211_channel_to_frequency(rxd->channel,
  917. status->band);
  918. *qos = rxd->qos_control;
  919. if ((rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DECRYPT_ERROR) &&
  920. (rxd->rx_ctrl & MWL8K_STA_RX_CTRL_DEC_ERR_TYPE))
  921. status->flag |= RX_FLAG_MMIC_ERROR;
  922. return le16_to_cpu(rxd->pkt_len);
  923. }
  924. static struct rxd_ops rxd_sta_ops = {
  925. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  926. .rxd_init = mwl8k_rxd_sta_init,
  927. .rxd_refill = mwl8k_rxd_sta_refill,
  928. .rxd_process = mwl8k_rxd_sta_process,
  929. };
  930. #define MWL8K_RX_DESCS 256
  931. #define MWL8K_RX_MAXSZ 3800
  932. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  933. {
  934. struct mwl8k_priv *priv = hw->priv;
  935. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  936. int size;
  937. int i;
  938. rxq->rxd_count = 0;
  939. rxq->head = 0;
  940. rxq->tail = 0;
  941. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  942. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  943. if (rxq->rxd == NULL) {
  944. wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n");
  945. return -ENOMEM;
  946. }
  947. memset(rxq->rxd, 0, size);
  948. rxq->buf = kcalloc(MWL8K_RX_DESCS, sizeof(*rxq->buf), GFP_KERNEL);
  949. if (rxq->buf == NULL) {
  950. wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n");
  951. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  952. return -ENOMEM;
  953. }
  954. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  955. int desc_size;
  956. void *rxd;
  957. int nexti;
  958. dma_addr_t next_dma_addr;
  959. desc_size = priv->rxd_ops->rxd_size;
  960. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  961. nexti = i + 1;
  962. if (nexti == MWL8K_RX_DESCS)
  963. nexti = 0;
  964. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  965. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  966. }
  967. return 0;
  968. }
  969. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  970. {
  971. struct mwl8k_priv *priv = hw->priv;
  972. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  973. int refilled;
  974. refilled = 0;
  975. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  976. struct sk_buff *skb;
  977. dma_addr_t addr;
  978. int rx;
  979. void *rxd;
  980. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  981. if (skb == NULL)
  982. break;
  983. addr = pci_map_single(priv->pdev, skb->data,
  984. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  985. rxq->rxd_count++;
  986. rx = rxq->tail++;
  987. if (rxq->tail == MWL8K_RX_DESCS)
  988. rxq->tail = 0;
  989. rxq->buf[rx].skb = skb;
  990. dma_unmap_addr_set(&rxq->buf[rx], dma, addr);
  991. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  992. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  993. refilled++;
  994. }
  995. return refilled;
  996. }
  997. /* Must be called only when the card's reception is completely halted */
  998. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  999. {
  1000. struct mwl8k_priv *priv = hw->priv;
  1001. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1002. int i;
  1003. if (rxq->rxd == NULL)
  1004. return;
  1005. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  1006. if (rxq->buf[i].skb != NULL) {
  1007. pci_unmap_single(priv->pdev,
  1008. dma_unmap_addr(&rxq->buf[i], dma),
  1009. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1010. dma_unmap_addr_set(&rxq->buf[i], dma, 0);
  1011. kfree_skb(rxq->buf[i].skb);
  1012. rxq->buf[i].skb = NULL;
  1013. }
  1014. }
  1015. kfree(rxq->buf);
  1016. rxq->buf = NULL;
  1017. pci_free_consistent(priv->pdev,
  1018. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  1019. rxq->rxd, rxq->rxd_dma);
  1020. rxq->rxd = NULL;
  1021. }
  1022. /*
  1023. * Scan a list of BSSIDs to process for finalize join.
  1024. * Allows for extension to process multiple BSSIDs.
  1025. */
  1026. static inline int
  1027. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  1028. {
  1029. return priv->capture_beacon &&
  1030. ieee80211_is_beacon(wh->frame_control) &&
  1031. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  1032. }
  1033. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  1034. struct sk_buff *skb)
  1035. {
  1036. struct mwl8k_priv *priv = hw->priv;
  1037. priv->capture_beacon = false;
  1038. memset(priv->capture_bssid, 0, ETH_ALEN);
  1039. /*
  1040. * Use GFP_ATOMIC as rxq_process is called from
  1041. * the primary interrupt handler, memory allocation call
  1042. * must not sleep.
  1043. */
  1044. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  1045. if (priv->beacon_skb != NULL)
  1046. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  1047. }
  1048. static inline struct mwl8k_vif *mwl8k_find_vif_bss(struct list_head *vif_list,
  1049. u8 *bssid)
  1050. {
  1051. struct mwl8k_vif *mwl8k_vif;
  1052. list_for_each_entry(mwl8k_vif,
  1053. vif_list, list) {
  1054. if (memcmp(bssid, mwl8k_vif->bssid,
  1055. ETH_ALEN) == 0)
  1056. return mwl8k_vif;
  1057. }
  1058. return NULL;
  1059. }
  1060. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  1061. {
  1062. struct mwl8k_priv *priv = hw->priv;
  1063. struct mwl8k_vif *mwl8k_vif = NULL;
  1064. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  1065. int processed;
  1066. processed = 0;
  1067. while (rxq->rxd_count && limit--) {
  1068. struct sk_buff *skb;
  1069. void *rxd;
  1070. int pkt_len;
  1071. struct ieee80211_rx_status status;
  1072. struct ieee80211_hdr *wh;
  1073. __le16 qos;
  1074. skb = rxq->buf[rxq->head].skb;
  1075. if (skb == NULL)
  1076. break;
  1077. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  1078. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos,
  1079. &priv->noise);
  1080. if (pkt_len < 0)
  1081. break;
  1082. rxq->buf[rxq->head].skb = NULL;
  1083. pci_unmap_single(priv->pdev,
  1084. dma_unmap_addr(&rxq->buf[rxq->head], dma),
  1085. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  1086. dma_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  1087. rxq->head++;
  1088. if (rxq->head == MWL8K_RX_DESCS)
  1089. rxq->head = 0;
  1090. rxq->rxd_count--;
  1091. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1092. /*
  1093. * Check for a pending join operation. Save a
  1094. * copy of the beacon and schedule a tasklet to
  1095. * send a FINALIZE_JOIN command to the firmware.
  1096. */
  1097. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  1098. mwl8k_save_beacon(hw, skb);
  1099. if (ieee80211_has_protected(wh->frame_control)) {
  1100. /* Check if hw crypto has been enabled for
  1101. * this bss. If yes, set the status flags
  1102. * accordingly
  1103. */
  1104. mwl8k_vif = mwl8k_find_vif_bss(&priv->vif_list,
  1105. wh->addr1);
  1106. if (mwl8k_vif != NULL &&
  1107. mwl8k_vif->is_hw_crypto_enabled == true) {
  1108. /*
  1109. * When MMIC ERROR is encountered
  1110. * by the firmware, payload is
  1111. * dropped and only 32 bytes of
  1112. * mwl8k Firmware header is sent
  1113. * to the host.
  1114. *
  1115. * We need to add four bytes of
  1116. * key information. In it
  1117. * MAC80211 expects keyidx set to
  1118. * 0 for triggering Counter
  1119. * Measure of MMIC failure.
  1120. */
  1121. if (status.flag & RX_FLAG_MMIC_ERROR) {
  1122. struct mwl8k_dma_data *tr;
  1123. tr = (struct mwl8k_dma_data *)skb->data;
  1124. memset((void *)&(tr->data), 0, 4);
  1125. pkt_len += 4;
  1126. }
  1127. if (!ieee80211_is_auth(wh->frame_control))
  1128. status.flag |= RX_FLAG_IV_STRIPPED |
  1129. RX_FLAG_DECRYPTED |
  1130. RX_FLAG_MMIC_STRIPPED;
  1131. }
  1132. }
  1133. skb_put(skb, pkt_len);
  1134. mwl8k_remove_dma_header(skb, qos);
  1135. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  1136. ieee80211_rx_irqsafe(hw, skb);
  1137. processed++;
  1138. }
  1139. return processed;
  1140. }
  1141. /*
  1142. * Packet transmission.
  1143. */
  1144. #define MWL8K_TXD_STATUS_OK 0x00000001
  1145. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  1146. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  1147. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  1148. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  1149. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  1150. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  1151. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  1152. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  1153. #define MWL8K_QOS_EOSP 0x0010
  1154. struct mwl8k_tx_desc {
  1155. __le32 status;
  1156. __u8 data_rate;
  1157. __u8 tx_priority;
  1158. __le16 qos_control;
  1159. __le32 pkt_phys_addr;
  1160. __le16 pkt_len;
  1161. __u8 dest_MAC_addr[ETH_ALEN];
  1162. __le32 next_txd_phys_addr;
  1163. __le32 timestamp;
  1164. __le16 rate_info;
  1165. __u8 peer_id;
  1166. __u8 tx_frag_cnt;
  1167. } __packed;
  1168. #define MWL8K_TX_DESCS 128
  1169. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  1170. {
  1171. struct mwl8k_priv *priv = hw->priv;
  1172. struct mwl8k_tx_queue *txq = priv->txq + index;
  1173. int size;
  1174. int i;
  1175. txq->len = 0;
  1176. txq->head = 0;
  1177. txq->tail = 0;
  1178. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  1179. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  1180. if (txq->txd == NULL) {
  1181. wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n");
  1182. return -ENOMEM;
  1183. }
  1184. memset(txq->txd, 0, size);
  1185. txq->skb = kcalloc(MWL8K_TX_DESCS, sizeof(*txq->skb), GFP_KERNEL);
  1186. if (txq->skb == NULL) {
  1187. wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n");
  1188. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  1189. return -ENOMEM;
  1190. }
  1191. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  1192. struct mwl8k_tx_desc *tx_desc;
  1193. int nexti;
  1194. tx_desc = txq->txd + i;
  1195. nexti = (i + 1) % MWL8K_TX_DESCS;
  1196. tx_desc->status = 0;
  1197. tx_desc->next_txd_phys_addr =
  1198. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  1199. }
  1200. return 0;
  1201. }
  1202. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  1203. {
  1204. iowrite32(MWL8K_H2A_INT_PPA_READY,
  1205. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1206. iowrite32(MWL8K_H2A_INT_DUMMY,
  1207. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1208. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  1209. }
  1210. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  1211. {
  1212. struct mwl8k_priv *priv = hw->priv;
  1213. int i;
  1214. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  1215. struct mwl8k_tx_queue *txq = priv->txq + i;
  1216. int fw_owned = 0;
  1217. int drv_owned = 0;
  1218. int unused = 0;
  1219. int desc;
  1220. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  1221. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  1222. u32 status;
  1223. status = le32_to_cpu(tx_desc->status);
  1224. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  1225. fw_owned++;
  1226. else
  1227. drv_owned++;
  1228. if (tx_desc->pkt_len == 0)
  1229. unused++;
  1230. }
  1231. wiphy_err(hw->wiphy,
  1232. "txq[%d] len=%d head=%d tail=%d "
  1233. "fw_owned=%d drv_owned=%d unused=%d\n",
  1234. i,
  1235. txq->len, txq->head, txq->tail,
  1236. fw_owned, drv_owned, unused);
  1237. }
  1238. }
  1239. /*
  1240. * Must be called with priv->fw_mutex held and tx queues stopped.
  1241. */
  1242. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  1243. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  1244. {
  1245. struct mwl8k_priv *priv = hw->priv;
  1246. DECLARE_COMPLETION_ONSTACK(tx_wait);
  1247. int retry;
  1248. int rc;
  1249. might_sleep();
  1250. /*
  1251. * The TX queues are stopped at this point, so this test
  1252. * doesn't need to take ->tx_lock.
  1253. */
  1254. if (!priv->pending_tx_pkts)
  1255. return 0;
  1256. retry = 0;
  1257. rc = 0;
  1258. spin_lock_bh(&priv->tx_lock);
  1259. priv->tx_wait = &tx_wait;
  1260. while (!rc) {
  1261. int oldcount;
  1262. unsigned long timeout;
  1263. oldcount = priv->pending_tx_pkts;
  1264. spin_unlock_bh(&priv->tx_lock);
  1265. timeout = wait_for_completion_timeout(&tx_wait,
  1266. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  1267. spin_lock_bh(&priv->tx_lock);
  1268. if (timeout) {
  1269. WARN_ON(priv->pending_tx_pkts);
  1270. if (retry)
  1271. wiphy_notice(hw->wiphy, "tx rings drained\n");
  1272. break;
  1273. }
  1274. if (priv->pending_tx_pkts < oldcount) {
  1275. wiphy_notice(hw->wiphy,
  1276. "waiting for tx rings to drain (%d -> %d pkts)\n",
  1277. oldcount, priv->pending_tx_pkts);
  1278. retry = 1;
  1279. continue;
  1280. }
  1281. priv->tx_wait = NULL;
  1282. wiphy_err(hw->wiphy, "tx rings stuck for %d ms\n",
  1283. MWL8K_TX_WAIT_TIMEOUT_MS);
  1284. mwl8k_dump_tx_rings(hw);
  1285. rc = -ETIMEDOUT;
  1286. }
  1287. spin_unlock_bh(&priv->tx_lock);
  1288. return rc;
  1289. }
  1290. #define MWL8K_TXD_SUCCESS(status) \
  1291. ((status) & (MWL8K_TXD_STATUS_OK | \
  1292. MWL8K_TXD_STATUS_OK_RETRY | \
  1293. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1294. static int mwl8k_tid_queue_mapping(u8 tid)
  1295. {
  1296. BUG_ON(tid > 7);
  1297. switch (tid) {
  1298. case 0:
  1299. case 3:
  1300. return IEEE80211_AC_BE;
  1301. break;
  1302. case 1:
  1303. case 2:
  1304. return IEEE80211_AC_BK;
  1305. break;
  1306. case 4:
  1307. case 5:
  1308. return IEEE80211_AC_VI;
  1309. break;
  1310. case 6:
  1311. case 7:
  1312. return IEEE80211_AC_VO;
  1313. break;
  1314. default:
  1315. return -1;
  1316. break;
  1317. }
  1318. }
  1319. /* The firmware will fill in the rate information
  1320. * for each packet that gets queued in the hardware
  1321. * and these macros will interpret that info.
  1322. */
  1323. #define RI_FORMAT(a) (a & 0x0001)
  1324. #define RI_RATE_ID_MCS(a) ((a & 0x01f8) >> 3)
  1325. static int
  1326. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1327. {
  1328. struct mwl8k_priv *priv = hw->priv;
  1329. struct mwl8k_tx_queue *txq = priv->txq + index;
  1330. int processed;
  1331. processed = 0;
  1332. while (txq->len > 0 && limit--) {
  1333. int tx;
  1334. struct mwl8k_tx_desc *tx_desc;
  1335. unsigned long addr;
  1336. int size;
  1337. struct sk_buff *skb;
  1338. struct ieee80211_tx_info *info;
  1339. u32 status;
  1340. struct ieee80211_sta *sta;
  1341. struct mwl8k_sta *sta_info = NULL;
  1342. u16 rate_info;
  1343. struct ieee80211_hdr *wh;
  1344. tx = txq->head;
  1345. tx_desc = txq->txd + tx;
  1346. status = le32_to_cpu(tx_desc->status);
  1347. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1348. if (!force)
  1349. break;
  1350. tx_desc->status &=
  1351. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1352. }
  1353. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1354. BUG_ON(txq->len == 0);
  1355. txq->len--;
  1356. priv->pending_tx_pkts--;
  1357. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1358. size = le16_to_cpu(tx_desc->pkt_len);
  1359. skb = txq->skb[tx];
  1360. txq->skb[tx] = NULL;
  1361. BUG_ON(skb == NULL);
  1362. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1363. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1364. wh = (struct ieee80211_hdr *) skb->data;
  1365. /* Mark descriptor as unused */
  1366. tx_desc->pkt_phys_addr = 0;
  1367. tx_desc->pkt_len = 0;
  1368. info = IEEE80211_SKB_CB(skb);
  1369. if (ieee80211_is_data(wh->frame_control)) {
  1370. sta = info->control.sta;
  1371. if (sta) {
  1372. sta_info = MWL8K_STA(sta);
  1373. BUG_ON(sta_info == NULL);
  1374. rate_info = le16_to_cpu(tx_desc->rate_info);
  1375. /* If rate is < 6.5 Mpbs for an ht station
  1376. * do not form an ampdu. If the station is a
  1377. * legacy station (format = 0), do not form an
  1378. * ampdu
  1379. */
  1380. if (RI_RATE_ID_MCS(rate_info) < 1 ||
  1381. RI_FORMAT(rate_info) == 0) {
  1382. sta_info->is_ampdu_allowed = false;
  1383. } else {
  1384. sta_info->is_ampdu_allowed = true;
  1385. }
  1386. }
  1387. }
  1388. ieee80211_tx_info_clear_status(info);
  1389. /* Rate control is happening in the firmware.
  1390. * Ensure no tx rate is being reported.
  1391. */
  1392. info->status.rates[0].idx = -1;
  1393. info->status.rates[0].count = 1;
  1394. if (MWL8K_TXD_SUCCESS(status))
  1395. info->flags |= IEEE80211_TX_STAT_ACK;
  1396. ieee80211_tx_status_irqsafe(hw, skb);
  1397. processed++;
  1398. }
  1399. return processed;
  1400. }
  1401. /* must be called only when the card's transmit is completely halted */
  1402. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1403. {
  1404. struct mwl8k_priv *priv = hw->priv;
  1405. struct mwl8k_tx_queue *txq = priv->txq + index;
  1406. if (txq->txd == NULL)
  1407. return;
  1408. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1409. kfree(txq->skb);
  1410. txq->skb = NULL;
  1411. pci_free_consistent(priv->pdev,
  1412. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1413. txq->txd, txq->txd_dma);
  1414. txq->txd = NULL;
  1415. }
  1416. /* caller must hold priv->stream_lock when calling the stream functions */
  1417. static struct mwl8k_ampdu_stream *
  1418. mwl8k_add_stream(struct ieee80211_hw *hw, struct ieee80211_sta *sta, u8 tid)
  1419. {
  1420. struct mwl8k_ampdu_stream *stream;
  1421. struct mwl8k_priv *priv = hw->priv;
  1422. int i;
  1423. for (i = 0; i < priv->num_ampdu_queues; i++) {
  1424. stream = &priv->ampdu[i];
  1425. if (stream->state == AMPDU_NO_STREAM) {
  1426. stream->sta = sta;
  1427. stream->state = AMPDU_STREAM_NEW;
  1428. stream->tid = tid;
  1429. stream->idx = i;
  1430. stream->txq_idx = MWL8K_TX_WMM_QUEUES + i;
  1431. wiphy_debug(hw->wiphy, "Added a new stream for %pM %d",
  1432. sta->addr, tid);
  1433. return stream;
  1434. }
  1435. }
  1436. return NULL;
  1437. }
  1438. static int
  1439. mwl8k_start_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1440. {
  1441. int ret;
  1442. /* if the stream has already been started, don't start it again */
  1443. if (stream->state != AMPDU_STREAM_NEW)
  1444. return 0;
  1445. ret = ieee80211_start_tx_ba_session(stream->sta, stream->tid, 0);
  1446. if (ret)
  1447. wiphy_debug(hw->wiphy, "Failed to start stream for %pM %d: "
  1448. "%d\n", stream->sta->addr, stream->tid, ret);
  1449. else
  1450. wiphy_debug(hw->wiphy, "Started stream for %pM %d\n",
  1451. stream->sta->addr, stream->tid);
  1452. return ret;
  1453. }
  1454. static void
  1455. mwl8k_remove_stream(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  1456. {
  1457. wiphy_debug(hw->wiphy, "Remove stream for %pM %d\n", stream->sta->addr,
  1458. stream->tid);
  1459. memset(stream, 0, sizeof(*stream));
  1460. }
  1461. static struct mwl8k_ampdu_stream *
  1462. mwl8k_lookup_stream(struct ieee80211_hw *hw, u8 *addr, u8 tid)
  1463. {
  1464. struct mwl8k_priv *priv = hw->priv;
  1465. int i;
  1466. for (i = 0 ; i < priv->num_ampdu_queues; i++) {
  1467. struct mwl8k_ampdu_stream *stream;
  1468. stream = &priv->ampdu[i];
  1469. if (stream->state == AMPDU_NO_STREAM)
  1470. continue;
  1471. if (!memcmp(stream->sta->addr, addr, ETH_ALEN) &&
  1472. stream->tid == tid)
  1473. return stream;
  1474. }
  1475. return NULL;
  1476. }
  1477. #define MWL8K_AMPDU_PACKET_THRESHOLD 64
  1478. static inline bool mwl8k_ampdu_allowed(struct ieee80211_sta *sta, u8 tid)
  1479. {
  1480. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1481. struct tx_traffic_info *tx_stats;
  1482. BUG_ON(tid >= MWL8K_MAX_TID);
  1483. tx_stats = &sta_info->tx_stats[tid];
  1484. return sta_info->is_ampdu_allowed &&
  1485. tx_stats->pkts > MWL8K_AMPDU_PACKET_THRESHOLD;
  1486. }
  1487. static inline void mwl8k_tx_count_packet(struct ieee80211_sta *sta, u8 tid)
  1488. {
  1489. struct mwl8k_sta *sta_info = MWL8K_STA(sta);
  1490. struct tx_traffic_info *tx_stats;
  1491. BUG_ON(tid >= MWL8K_MAX_TID);
  1492. tx_stats = &sta_info->tx_stats[tid];
  1493. if (tx_stats->start_time == 0)
  1494. tx_stats->start_time = jiffies;
  1495. /* reset the packet count after each second elapses. If the number of
  1496. * packets ever exceeds the ampdu_min_traffic threshold, we will allow
  1497. * an ampdu stream to be started.
  1498. */
  1499. if (jiffies - tx_stats->start_time > HZ) {
  1500. tx_stats->pkts = 0;
  1501. tx_stats->start_time = 0;
  1502. } else
  1503. tx_stats->pkts++;
  1504. }
  1505. static void
  1506. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1507. {
  1508. struct mwl8k_priv *priv = hw->priv;
  1509. struct ieee80211_tx_info *tx_info;
  1510. struct mwl8k_vif *mwl8k_vif;
  1511. struct ieee80211_sta *sta;
  1512. struct ieee80211_hdr *wh;
  1513. struct mwl8k_tx_queue *txq;
  1514. struct mwl8k_tx_desc *tx;
  1515. dma_addr_t dma;
  1516. u32 txstatus;
  1517. u8 txdatarate;
  1518. u16 qos;
  1519. int txpriority;
  1520. u8 tid = 0;
  1521. struct mwl8k_ampdu_stream *stream = NULL;
  1522. bool start_ba_session = false;
  1523. bool mgmtframe = false;
  1524. struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
  1525. wh = (struct ieee80211_hdr *)skb->data;
  1526. if (ieee80211_is_data_qos(wh->frame_control))
  1527. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1528. else
  1529. qos = 0;
  1530. if (ieee80211_is_mgmt(wh->frame_control))
  1531. mgmtframe = true;
  1532. if (priv->ap_fw)
  1533. mwl8k_encapsulate_tx_frame(priv, skb);
  1534. else
  1535. mwl8k_add_dma_header(priv, skb, 0, 0);
  1536. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1537. tx_info = IEEE80211_SKB_CB(skb);
  1538. sta = tx_info->control.sta;
  1539. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1540. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1541. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1542. wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
  1543. mwl8k_vif->seqno += 0x10;
  1544. }
  1545. /* Setup firmware control bit fields for each frame type. */
  1546. txstatus = 0;
  1547. txdatarate = 0;
  1548. if (ieee80211_is_mgmt(wh->frame_control) ||
  1549. ieee80211_is_ctl(wh->frame_control)) {
  1550. txdatarate = 0;
  1551. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1552. } else if (ieee80211_is_data(wh->frame_control)) {
  1553. txdatarate = 1;
  1554. if (is_multicast_ether_addr(wh->addr1))
  1555. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1556. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1557. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1558. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1559. else
  1560. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1561. }
  1562. /* Queue ADDBA request in the respective data queue. While setting up
  1563. * the ampdu stream, mac80211 queues further packets for that
  1564. * particular ra/tid pair. However, packets piled up in the hardware
  1565. * for that ra/tid pair will still go out. ADDBA request and the
  1566. * related data packets going out from different queues asynchronously
  1567. * will cause a shift in the receiver window which might result in
  1568. * ampdu packets getting dropped at the receiver after the stream has
  1569. * been setup.
  1570. */
  1571. if (unlikely(ieee80211_is_action(wh->frame_control) &&
  1572. mgmt->u.action.category == WLAN_CATEGORY_BACK &&
  1573. mgmt->u.action.u.addba_req.action_code == WLAN_ACTION_ADDBA_REQ &&
  1574. priv->ap_fw)) {
  1575. u16 capab = le16_to_cpu(mgmt->u.action.u.addba_req.capab);
  1576. tid = (capab & IEEE80211_ADDBA_PARAM_TID_MASK) >> 2;
  1577. index = mwl8k_tid_queue_mapping(tid);
  1578. }
  1579. txpriority = index;
  1580. if (ieee80211_is_data_qos(wh->frame_control) &&
  1581. skb->protocol != cpu_to_be16(ETH_P_PAE) &&
  1582. sta->ht_cap.ht_supported && priv->ap_fw) {
  1583. tid = qos & 0xf;
  1584. mwl8k_tx_count_packet(sta, tid);
  1585. spin_lock(&priv->stream_lock);
  1586. stream = mwl8k_lookup_stream(hw, sta->addr, tid);
  1587. if (stream != NULL) {
  1588. if (stream->state == AMPDU_STREAM_ACTIVE) {
  1589. txpriority = stream->txq_idx;
  1590. index = stream->txq_idx;
  1591. } else if (stream->state == AMPDU_STREAM_NEW) {
  1592. /* We get here if the driver sends us packets
  1593. * after we've initiated a stream, but before
  1594. * our ampdu_action routine has been called
  1595. * with IEEE80211_AMPDU_TX_START to get the SSN
  1596. * for the ADDBA request. So this packet can
  1597. * go out with no risk of sequence number
  1598. * mismatch. No special handling is required.
  1599. */
  1600. } else {
  1601. /* Drop packets that would go out after the
  1602. * ADDBA request was sent but before the ADDBA
  1603. * response is received. If we don't do this,
  1604. * the recipient would probably receive it
  1605. * after the ADDBA request with SSN 0. This
  1606. * will cause the recipient's BA receive window
  1607. * to shift, which would cause the subsequent
  1608. * packets in the BA stream to be discarded.
  1609. * mac80211 queues our packets for us in this
  1610. * case, so this is really just a safety check.
  1611. */
  1612. wiphy_warn(hw->wiphy,
  1613. "Cannot send packet while ADDBA "
  1614. "dialog is underway.\n");
  1615. spin_unlock(&priv->stream_lock);
  1616. dev_kfree_skb(skb);
  1617. return;
  1618. }
  1619. } else {
  1620. /* Defer calling mwl8k_start_stream so that the current
  1621. * skb can go out before the ADDBA request. This
  1622. * prevents sequence number mismatch at the recepient
  1623. * as described above.
  1624. */
  1625. if (mwl8k_ampdu_allowed(sta, tid)) {
  1626. stream = mwl8k_add_stream(hw, sta, tid);
  1627. if (stream != NULL)
  1628. start_ba_session = true;
  1629. }
  1630. }
  1631. spin_unlock(&priv->stream_lock);
  1632. }
  1633. dma = pci_map_single(priv->pdev, skb->data,
  1634. skb->len, PCI_DMA_TODEVICE);
  1635. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1636. wiphy_debug(hw->wiphy,
  1637. "failed to dma map skb, dropping TX frame.\n");
  1638. if (start_ba_session) {
  1639. spin_lock(&priv->stream_lock);
  1640. mwl8k_remove_stream(hw, stream);
  1641. spin_unlock(&priv->stream_lock);
  1642. }
  1643. dev_kfree_skb(skb);
  1644. return;
  1645. }
  1646. spin_lock_bh(&priv->tx_lock);
  1647. txq = priv->txq + index;
  1648. /* Mgmt frames that go out frequently are probe
  1649. * responses. Other mgmt frames got out relatively
  1650. * infrequently. Hence reserve 2 buffers so that
  1651. * other mgmt frames do not get dropped due to an
  1652. * already queued probe response in one of the
  1653. * reserved buffers.
  1654. */
  1655. if (txq->len >= MWL8K_TX_DESCS - 2) {
  1656. if (mgmtframe == false ||
  1657. txq->len == MWL8K_TX_DESCS) {
  1658. if (start_ba_session) {
  1659. spin_lock(&priv->stream_lock);
  1660. mwl8k_remove_stream(hw, stream);
  1661. spin_unlock(&priv->stream_lock);
  1662. }
  1663. spin_unlock_bh(&priv->tx_lock);
  1664. dev_kfree_skb(skb);
  1665. return;
  1666. }
  1667. }
  1668. BUG_ON(txq->skb[txq->tail] != NULL);
  1669. txq->skb[txq->tail] = skb;
  1670. tx = txq->txd + txq->tail;
  1671. tx->data_rate = txdatarate;
  1672. tx->tx_priority = txpriority;
  1673. tx->qos_control = cpu_to_le16(qos);
  1674. tx->pkt_phys_addr = cpu_to_le32(dma);
  1675. tx->pkt_len = cpu_to_le16(skb->len);
  1676. tx->rate_info = 0;
  1677. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1678. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1679. else
  1680. tx->peer_id = 0;
  1681. if (priv->ap_fw)
  1682. tx->timestamp = cpu_to_le32(ioread32(priv->regs +
  1683. MWL8K_HW_TIMER_REGISTER));
  1684. wmb();
  1685. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1686. txq->len++;
  1687. priv->pending_tx_pkts++;
  1688. txq->tail++;
  1689. if (txq->tail == MWL8K_TX_DESCS)
  1690. txq->tail = 0;
  1691. mwl8k_tx_start(priv);
  1692. spin_unlock_bh(&priv->tx_lock);
  1693. /* Initiate the ampdu session here */
  1694. if (start_ba_session) {
  1695. spin_lock(&priv->stream_lock);
  1696. if (mwl8k_start_stream(hw, stream))
  1697. mwl8k_remove_stream(hw, stream);
  1698. spin_unlock(&priv->stream_lock);
  1699. }
  1700. }
  1701. /*
  1702. * Firmware access.
  1703. *
  1704. * We have the following requirements for issuing firmware commands:
  1705. * - Some commands require that the packet transmit path is idle when
  1706. * the command is issued. (For simplicity, we'll just quiesce the
  1707. * transmit path for every command.)
  1708. * - There are certain sequences of commands that need to be issued to
  1709. * the hardware sequentially, with no other intervening commands.
  1710. *
  1711. * This leads to an implementation of a "firmware lock" as a mutex that
  1712. * can be taken recursively, and which is taken by both the low-level
  1713. * command submission function (mwl8k_post_cmd) as well as any users of
  1714. * that function that require issuing of an atomic sequence of commands,
  1715. * and quiesces the transmit path whenever it's taken.
  1716. */
  1717. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1718. {
  1719. struct mwl8k_priv *priv = hw->priv;
  1720. if (priv->fw_mutex_owner != current) {
  1721. int rc;
  1722. mutex_lock(&priv->fw_mutex);
  1723. ieee80211_stop_queues(hw);
  1724. rc = mwl8k_tx_wait_empty(hw);
  1725. if (rc) {
  1726. ieee80211_wake_queues(hw);
  1727. mutex_unlock(&priv->fw_mutex);
  1728. return rc;
  1729. }
  1730. priv->fw_mutex_owner = current;
  1731. }
  1732. priv->fw_mutex_depth++;
  1733. return 0;
  1734. }
  1735. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1736. {
  1737. struct mwl8k_priv *priv = hw->priv;
  1738. if (!--priv->fw_mutex_depth) {
  1739. ieee80211_wake_queues(hw);
  1740. priv->fw_mutex_owner = NULL;
  1741. mutex_unlock(&priv->fw_mutex);
  1742. }
  1743. }
  1744. /*
  1745. * Command processing.
  1746. */
  1747. /* Timeout firmware commands after 10s */
  1748. #define MWL8K_CMD_TIMEOUT_MS 10000
  1749. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1750. {
  1751. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1752. struct mwl8k_priv *priv = hw->priv;
  1753. void __iomem *regs = priv->regs;
  1754. dma_addr_t dma_addr;
  1755. unsigned int dma_size;
  1756. int rc;
  1757. unsigned long timeout = 0;
  1758. u8 buf[32];
  1759. cmd->result = (__force __le16) 0xffff;
  1760. dma_size = le16_to_cpu(cmd->length);
  1761. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1762. PCI_DMA_BIDIRECTIONAL);
  1763. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1764. return -ENOMEM;
  1765. rc = mwl8k_fw_lock(hw);
  1766. if (rc) {
  1767. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1768. PCI_DMA_BIDIRECTIONAL);
  1769. return rc;
  1770. }
  1771. priv->hostcmd_wait = &cmd_wait;
  1772. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1773. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1774. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1775. iowrite32(MWL8K_H2A_INT_DUMMY,
  1776. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1777. timeout = wait_for_completion_timeout(&cmd_wait,
  1778. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1779. priv->hostcmd_wait = NULL;
  1780. mwl8k_fw_unlock(hw);
  1781. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1782. PCI_DMA_BIDIRECTIONAL);
  1783. if (!timeout) {
  1784. wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n",
  1785. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1786. MWL8K_CMD_TIMEOUT_MS);
  1787. rc = -ETIMEDOUT;
  1788. } else {
  1789. int ms;
  1790. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1791. rc = cmd->result ? -EINVAL : 0;
  1792. if (rc)
  1793. wiphy_err(hw->wiphy, "Command %s error 0x%x\n",
  1794. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1795. le16_to_cpu(cmd->result));
  1796. else if (ms > 2000)
  1797. wiphy_notice(hw->wiphy, "Command %s took %d ms\n",
  1798. mwl8k_cmd_name(cmd->code,
  1799. buf, sizeof(buf)),
  1800. ms);
  1801. }
  1802. return rc;
  1803. }
  1804. static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
  1805. struct ieee80211_vif *vif,
  1806. struct mwl8k_cmd_pkt *cmd)
  1807. {
  1808. if (vif != NULL)
  1809. cmd->macid = MWL8K_VIF(vif)->macid;
  1810. return mwl8k_post_cmd(hw, cmd);
  1811. }
  1812. /*
  1813. * Setup code shared between STA and AP firmware images.
  1814. */
  1815. static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
  1816. {
  1817. struct mwl8k_priv *priv = hw->priv;
  1818. BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
  1819. memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
  1820. BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
  1821. memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
  1822. priv->band_24.band = IEEE80211_BAND_2GHZ;
  1823. priv->band_24.channels = priv->channels_24;
  1824. priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
  1825. priv->band_24.bitrates = priv->rates_24;
  1826. priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
  1827. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
  1828. }
  1829. static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
  1830. {
  1831. struct mwl8k_priv *priv = hw->priv;
  1832. BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
  1833. memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
  1834. BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
  1835. memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
  1836. priv->band_50.band = IEEE80211_BAND_5GHZ;
  1837. priv->band_50.channels = priv->channels_50;
  1838. priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
  1839. priv->band_50.bitrates = priv->rates_50;
  1840. priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
  1841. hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
  1842. }
  1843. /*
  1844. * CMD_GET_HW_SPEC (STA version).
  1845. */
  1846. struct mwl8k_cmd_get_hw_spec_sta {
  1847. struct mwl8k_cmd_pkt header;
  1848. __u8 hw_rev;
  1849. __u8 host_interface;
  1850. __le16 num_mcaddrs;
  1851. __u8 perm_addr[ETH_ALEN];
  1852. __le16 region_code;
  1853. __le32 fw_rev;
  1854. __le32 ps_cookie;
  1855. __le32 caps;
  1856. __u8 mcs_bitmap[16];
  1857. __le32 rx_queue_ptr;
  1858. __le32 num_tx_queues;
  1859. __le32 tx_queue_ptrs[MWL8K_TX_WMM_QUEUES];
  1860. __le32 caps2;
  1861. __le32 num_tx_desc_per_queue;
  1862. __le32 total_rxd;
  1863. } __packed;
  1864. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1865. #define MWL8K_CAP_GREENFIELD 0x08000000
  1866. #define MWL8K_CAP_AMPDU 0x04000000
  1867. #define MWL8K_CAP_RX_STBC 0x01000000
  1868. #define MWL8K_CAP_TX_STBC 0x00800000
  1869. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1870. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1871. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1872. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1873. #define MWL8K_CAP_DELAY_BA 0x00003000
  1874. #define MWL8K_CAP_MIMO 0x00000200
  1875. #define MWL8K_CAP_40MHZ 0x00000100
  1876. #define MWL8K_CAP_BAND_MASK 0x00000007
  1877. #define MWL8K_CAP_5GHZ 0x00000004
  1878. #define MWL8K_CAP_2GHZ4 0x00000001
  1879. static void
  1880. mwl8k_set_ht_caps(struct ieee80211_hw *hw,
  1881. struct ieee80211_supported_band *band, u32 cap)
  1882. {
  1883. int rx_streams;
  1884. int tx_streams;
  1885. band->ht_cap.ht_supported = 1;
  1886. if (cap & MWL8K_CAP_MAX_AMSDU)
  1887. band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1888. if (cap & MWL8K_CAP_GREENFIELD)
  1889. band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1890. if (cap & MWL8K_CAP_AMPDU) {
  1891. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1892. band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1893. band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
  1894. }
  1895. if (cap & MWL8K_CAP_RX_STBC)
  1896. band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1897. if (cap & MWL8K_CAP_TX_STBC)
  1898. band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1899. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1900. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1901. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1902. band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1903. if (cap & MWL8K_CAP_DELAY_BA)
  1904. band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1905. if (cap & MWL8K_CAP_40MHZ)
  1906. band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1907. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1908. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1909. band->ht_cap.mcs.rx_mask[0] = 0xff;
  1910. if (rx_streams >= 2)
  1911. band->ht_cap.mcs.rx_mask[1] = 0xff;
  1912. if (rx_streams >= 3)
  1913. band->ht_cap.mcs.rx_mask[2] = 0xff;
  1914. band->ht_cap.mcs.rx_mask[4] = 0x01;
  1915. band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1916. if (rx_streams != tx_streams) {
  1917. band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1918. band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1919. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1920. }
  1921. }
  1922. static void
  1923. mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
  1924. {
  1925. struct mwl8k_priv *priv = hw->priv;
  1926. if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
  1927. mwl8k_setup_2ghz_band(hw);
  1928. if (caps & MWL8K_CAP_MIMO)
  1929. mwl8k_set_ht_caps(hw, &priv->band_24, caps);
  1930. }
  1931. if (caps & MWL8K_CAP_5GHZ) {
  1932. mwl8k_setup_5ghz_band(hw);
  1933. if (caps & MWL8K_CAP_MIMO)
  1934. mwl8k_set_ht_caps(hw, &priv->band_50, caps);
  1935. }
  1936. }
  1937. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1938. {
  1939. struct mwl8k_priv *priv = hw->priv;
  1940. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1941. int rc;
  1942. int i;
  1943. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1944. if (cmd == NULL)
  1945. return -ENOMEM;
  1946. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1947. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1948. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1949. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1950. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1951. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  1952. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  1953. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1954. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1955. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1956. rc = mwl8k_post_cmd(hw, &cmd->header);
  1957. if (!rc) {
  1958. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1959. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1960. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1961. priv->hw_rev = cmd->hw_rev;
  1962. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  1963. priv->ap_macids_supported = 0x00000000;
  1964. priv->sta_macids_supported = 0x00000001;
  1965. }
  1966. kfree(cmd);
  1967. return rc;
  1968. }
  1969. /*
  1970. * CMD_GET_HW_SPEC (AP version).
  1971. */
  1972. struct mwl8k_cmd_get_hw_spec_ap {
  1973. struct mwl8k_cmd_pkt header;
  1974. __u8 hw_rev;
  1975. __u8 host_interface;
  1976. __le16 num_wcb;
  1977. __le16 num_mcaddrs;
  1978. __u8 perm_addr[ETH_ALEN];
  1979. __le16 region_code;
  1980. __le16 num_antenna;
  1981. __le32 fw_rev;
  1982. __le32 wcbbase0;
  1983. __le32 rxwrptr;
  1984. __le32 rxrdptr;
  1985. __le32 ps_cookie;
  1986. __le32 wcbbase1;
  1987. __le32 wcbbase2;
  1988. __le32 wcbbase3;
  1989. __le32 fw_api_version;
  1990. __le32 caps;
  1991. __le32 num_of_ampdu_queues;
  1992. __le32 wcbbase_ampdu[MWL8K_MAX_AMPDU_QUEUES];
  1993. } __packed;
  1994. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1995. {
  1996. struct mwl8k_priv *priv = hw->priv;
  1997. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1998. int rc, i;
  1999. u32 api_version;
  2000. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2001. if (cmd == NULL)
  2002. return -ENOMEM;
  2003. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  2004. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2005. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  2006. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2007. rc = mwl8k_post_cmd(hw, &cmd->header);
  2008. if (!rc) {
  2009. int off;
  2010. api_version = le32_to_cpu(cmd->fw_api_version);
  2011. if (priv->device_info->fw_api_ap != api_version) {
  2012. printk(KERN_ERR "%s: Unsupported fw API version for %s."
  2013. " Expected %d got %d.\n", MWL8K_NAME,
  2014. priv->device_info->part_name,
  2015. priv->device_info->fw_api_ap,
  2016. api_version);
  2017. rc = -EINVAL;
  2018. goto done;
  2019. }
  2020. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  2021. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  2022. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  2023. priv->hw_rev = cmd->hw_rev;
  2024. mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
  2025. priv->ap_macids_supported = 0x000000ff;
  2026. priv->sta_macids_supported = 0x00000000;
  2027. priv->num_ampdu_queues = le32_to_cpu(cmd->num_of_ampdu_queues);
  2028. if (priv->num_ampdu_queues > MWL8K_MAX_AMPDU_QUEUES) {
  2029. wiphy_warn(hw->wiphy, "fw reported %d ampdu queues"
  2030. " but we only support %d.\n",
  2031. priv->num_ampdu_queues,
  2032. MWL8K_MAX_AMPDU_QUEUES);
  2033. priv->num_ampdu_queues = MWL8K_MAX_AMPDU_QUEUES;
  2034. }
  2035. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  2036. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2037. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  2038. iowrite32(priv->rxq[0].rxd_dma, priv->sram + off);
  2039. priv->txq_offset[0] = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  2040. priv->txq_offset[1] = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  2041. priv->txq_offset[2] = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  2042. priv->txq_offset[3] = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  2043. for (i = 0; i < priv->num_ampdu_queues; i++)
  2044. priv->txq_offset[i + MWL8K_TX_WMM_QUEUES] =
  2045. le32_to_cpu(cmd->wcbbase_ampdu[i]) & 0xffff;
  2046. }
  2047. done:
  2048. kfree(cmd);
  2049. return rc;
  2050. }
  2051. /*
  2052. * CMD_SET_HW_SPEC.
  2053. */
  2054. struct mwl8k_cmd_set_hw_spec {
  2055. struct mwl8k_cmd_pkt header;
  2056. __u8 hw_rev;
  2057. __u8 host_interface;
  2058. __le16 num_mcaddrs;
  2059. __u8 perm_addr[ETH_ALEN];
  2060. __le16 region_code;
  2061. __le32 fw_rev;
  2062. __le32 ps_cookie;
  2063. __le32 caps;
  2064. __le32 rx_queue_ptr;
  2065. __le32 num_tx_queues;
  2066. __le32 tx_queue_ptrs[MWL8K_MAX_TX_QUEUES];
  2067. __le32 flags;
  2068. __le32 num_tx_desc_per_queue;
  2069. __le32 total_rxd;
  2070. } __packed;
  2071. /* If enabled, MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY will cause
  2072. * packets to expire 500 ms after the timestamp in the tx descriptor. That is,
  2073. * the packets that are queued for more than 500ms, will be dropped in the
  2074. * hardware. This helps minimizing the issues caused due to head-of-line
  2075. * blocking where a slow client can hog the bandwidth and affect traffic to a
  2076. * faster client.
  2077. */
  2078. #define MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY 0x00000400
  2079. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  2080. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  2081. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  2082. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  2083. {
  2084. struct mwl8k_priv *priv = hw->priv;
  2085. struct mwl8k_cmd_set_hw_spec *cmd;
  2086. int rc;
  2087. int i;
  2088. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2089. if (cmd == NULL)
  2090. return -ENOMEM;
  2091. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  2092. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2093. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  2094. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  2095. cmd->num_tx_queues = cpu_to_le32(mwl8k_tx_queues(priv));
  2096. /*
  2097. * Mac80211 stack has Q0 as highest priority and Q3 as lowest in
  2098. * that order. Firmware has Q3 as highest priority and Q0 as lowest
  2099. * in that order. Map Q3 of mac80211 to Q0 of firmware so that the
  2100. * priority is interpreted the right way in firmware.
  2101. */
  2102. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  2103. int j = mwl8k_tx_queues(priv) - 1 - i;
  2104. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[j].txd_dma);
  2105. }
  2106. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  2107. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  2108. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON |
  2109. MWL8K_SET_HW_SPEC_FLAG_ENABLE_LIFE_TIME_EXPIRY);
  2110. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  2111. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  2112. rc = mwl8k_post_cmd(hw, &cmd->header);
  2113. kfree(cmd);
  2114. return rc;
  2115. }
  2116. /*
  2117. * CMD_MAC_MULTICAST_ADR.
  2118. */
  2119. struct mwl8k_cmd_mac_multicast_adr {
  2120. struct mwl8k_cmd_pkt header;
  2121. __le16 action;
  2122. __le16 numaddr;
  2123. __u8 addr[0][ETH_ALEN];
  2124. };
  2125. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  2126. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  2127. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  2128. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  2129. static struct mwl8k_cmd_pkt *
  2130. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  2131. struct netdev_hw_addr_list *mc_list)
  2132. {
  2133. struct mwl8k_priv *priv = hw->priv;
  2134. struct mwl8k_cmd_mac_multicast_adr *cmd;
  2135. int size;
  2136. int mc_count = 0;
  2137. if (mc_list)
  2138. mc_count = netdev_hw_addr_list_count(mc_list);
  2139. if (allmulti || mc_count > priv->num_mcaddrs) {
  2140. allmulti = 1;
  2141. mc_count = 0;
  2142. }
  2143. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  2144. cmd = kzalloc(size, GFP_ATOMIC);
  2145. if (cmd == NULL)
  2146. return NULL;
  2147. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  2148. cmd->header.length = cpu_to_le16(size);
  2149. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  2150. MWL8K_ENABLE_RX_BROADCAST);
  2151. if (allmulti) {
  2152. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  2153. } else if (mc_count) {
  2154. struct netdev_hw_addr *ha;
  2155. int i = 0;
  2156. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  2157. cmd->numaddr = cpu_to_le16(mc_count);
  2158. netdev_hw_addr_list_for_each(ha, mc_list) {
  2159. memcpy(cmd->addr[i], ha->addr, ETH_ALEN);
  2160. }
  2161. }
  2162. return &cmd->header;
  2163. }
  2164. /*
  2165. * CMD_GET_STAT.
  2166. */
  2167. struct mwl8k_cmd_get_stat {
  2168. struct mwl8k_cmd_pkt header;
  2169. __le32 stats[64];
  2170. } __packed;
  2171. #define MWL8K_STAT_ACK_FAILURE 9
  2172. #define MWL8K_STAT_RTS_FAILURE 12
  2173. #define MWL8K_STAT_FCS_ERROR 24
  2174. #define MWL8K_STAT_RTS_SUCCESS 11
  2175. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  2176. struct ieee80211_low_level_stats *stats)
  2177. {
  2178. struct mwl8k_cmd_get_stat *cmd;
  2179. int rc;
  2180. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2181. if (cmd == NULL)
  2182. return -ENOMEM;
  2183. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  2184. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2185. rc = mwl8k_post_cmd(hw, &cmd->header);
  2186. if (!rc) {
  2187. stats->dot11ACKFailureCount =
  2188. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  2189. stats->dot11RTSFailureCount =
  2190. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  2191. stats->dot11FCSErrorCount =
  2192. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  2193. stats->dot11RTSSuccessCount =
  2194. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  2195. }
  2196. kfree(cmd);
  2197. return rc;
  2198. }
  2199. /*
  2200. * CMD_RADIO_CONTROL.
  2201. */
  2202. struct mwl8k_cmd_radio_control {
  2203. struct mwl8k_cmd_pkt header;
  2204. __le16 action;
  2205. __le16 control;
  2206. __le16 radio_on;
  2207. } __packed;
  2208. static int
  2209. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  2210. {
  2211. struct mwl8k_priv *priv = hw->priv;
  2212. struct mwl8k_cmd_radio_control *cmd;
  2213. int rc;
  2214. if (enable == priv->radio_on && !force)
  2215. return 0;
  2216. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2217. if (cmd == NULL)
  2218. return -ENOMEM;
  2219. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  2220. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2221. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2222. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  2223. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  2224. rc = mwl8k_post_cmd(hw, &cmd->header);
  2225. kfree(cmd);
  2226. if (!rc)
  2227. priv->radio_on = enable;
  2228. return rc;
  2229. }
  2230. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  2231. {
  2232. return mwl8k_cmd_radio_control(hw, 0, 0);
  2233. }
  2234. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  2235. {
  2236. return mwl8k_cmd_radio_control(hw, 1, 0);
  2237. }
  2238. static int
  2239. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  2240. {
  2241. struct mwl8k_priv *priv = hw->priv;
  2242. priv->radio_short_preamble = short_preamble;
  2243. return mwl8k_cmd_radio_control(hw, 1, 1);
  2244. }
  2245. /*
  2246. * CMD_RF_TX_POWER.
  2247. */
  2248. #define MWL8K_RF_TX_POWER_LEVEL_TOTAL 8
  2249. struct mwl8k_cmd_rf_tx_power {
  2250. struct mwl8k_cmd_pkt header;
  2251. __le16 action;
  2252. __le16 support_level;
  2253. __le16 current_level;
  2254. __le16 reserved;
  2255. __le16 power_level_list[MWL8K_RF_TX_POWER_LEVEL_TOTAL];
  2256. } __packed;
  2257. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  2258. {
  2259. struct mwl8k_cmd_rf_tx_power *cmd;
  2260. int rc;
  2261. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2262. if (cmd == NULL)
  2263. return -ENOMEM;
  2264. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  2265. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2266. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2267. cmd->support_level = cpu_to_le16(dBm);
  2268. rc = mwl8k_post_cmd(hw, &cmd->header);
  2269. kfree(cmd);
  2270. return rc;
  2271. }
  2272. /*
  2273. * CMD_TX_POWER.
  2274. */
  2275. #define MWL8K_TX_POWER_LEVEL_TOTAL 12
  2276. struct mwl8k_cmd_tx_power {
  2277. struct mwl8k_cmd_pkt header;
  2278. __le16 action;
  2279. __le16 band;
  2280. __le16 channel;
  2281. __le16 bw;
  2282. __le16 sub_ch;
  2283. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  2284. } __packed;
  2285. static int mwl8k_cmd_tx_power(struct ieee80211_hw *hw,
  2286. struct ieee80211_conf *conf,
  2287. unsigned short pwr)
  2288. {
  2289. struct ieee80211_channel *channel = conf->channel;
  2290. struct mwl8k_cmd_tx_power *cmd;
  2291. int rc;
  2292. int i;
  2293. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2294. if (cmd == NULL)
  2295. return -ENOMEM;
  2296. cmd->header.code = cpu_to_le16(MWL8K_CMD_TX_POWER);
  2297. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2298. cmd->action = cpu_to_le16(MWL8K_CMD_SET_LIST);
  2299. if (channel->band == IEEE80211_BAND_2GHZ)
  2300. cmd->band = cpu_to_le16(0x1);
  2301. else if (channel->band == IEEE80211_BAND_5GHZ)
  2302. cmd->band = cpu_to_le16(0x4);
  2303. cmd->channel = channel->hw_value;
  2304. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2305. conf->channel_type == NL80211_CHAN_HT20) {
  2306. cmd->bw = cpu_to_le16(0x2);
  2307. } else {
  2308. cmd->bw = cpu_to_le16(0x4);
  2309. if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2310. cmd->sub_ch = cpu_to_le16(0x3);
  2311. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2312. cmd->sub_ch = cpu_to_le16(0x1);
  2313. }
  2314. for (i = 0; i < MWL8K_TX_POWER_LEVEL_TOTAL; i++)
  2315. cmd->power_level_list[i] = cpu_to_le16(pwr);
  2316. rc = mwl8k_post_cmd(hw, &cmd->header);
  2317. kfree(cmd);
  2318. return rc;
  2319. }
  2320. /*
  2321. * CMD_RF_ANTENNA.
  2322. */
  2323. struct mwl8k_cmd_rf_antenna {
  2324. struct mwl8k_cmd_pkt header;
  2325. __le16 antenna;
  2326. __le16 mode;
  2327. } __packed;
  2328. #define MWL8K_RF_ANTENNA_RX 1
  2329. #define MWL8K_RF_ANTENNA_TX 2
  2330. static int
  2331. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  2332. {
  2333. struct mwl8k_cmd_rf_antenna *cmd;
  2334. int rc;
  2335. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2336. if (cmd == NULL)
  2337. return -ENOMEM;
  2338. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  2339. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2340. cmd->antenna = cpu_to_le16(antenna);
  2341. cmd->mode = cpu_to_le16(mask);
  2342. rc = mwl8k_post_cmd(hw, &cmd->header);
  2343. kfree(cmd);
  2344. return rc;
  2345. }
  2346. /*
  2347. * CMD_SET_BEACON.
  2348. */
  2349. struct mwl8k_cmd_set_beacon {
  2350. struct mwl8k_cmd_pkt header;
  2351. __le16 beacon_len;
  2352. __u8 beacon[0];
  2353. };
  2354. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
  2355. struct ieee80211_vif *vif, u8 *beacon, int len)
  2356. {
  2357. struct mwl8k_cmd_set_beacon *cmd;
  2358. int rc;
  2359. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  2360. if (cmd == NULL)
  2361. return -ENOMEM;
  2362. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  2363. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  2364. cmd->beacon_len = cpu_to_le16(len);
  2365. memcpy(cmd->beacon, beacon, len);
  2366. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2367. kfree(cmd);
  2368. return rc;
  2369. }
  2370. /*
  2371. * CMD_SET_PRE_SCAN.
  2372. */
  2373. struct mwl8k_cmd_set_pre_scan {
  2374. struct mwl8k_cmd_pkt header;
  2375. } __packed;
  2376. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  2377. {
  2378. struct mwl8k_cmd_set_pre_scan *cmd;
  2379. int rc;
  2380. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2381. if (cmd == NULL)
  2382. return -ENOMEM;
  2383. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  2384. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2385. rc = mwl8k_post_cmd(hw, &cmd->header);
  2386. kfree(cmd);
  2387. return rc;
  2388. }
  2389. /*
  2390. * CMD_SET_POST_SCAN.
  2391. */
  2392. struct mwl8k_cmd_set_post_scan {
  2393. struct mwl8k_cmd_pkt header;
  2394. __le32 isibss;
  2395. __u8 bssid[ETH_ALEN];
  2396. } __packed;
  2397. static int
  2398. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  2399. {
  2400. struct mwl8k_cmd_set_post_scan *cmd;
  2401. int rc;
  2402. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2403. if (cmd == NULL)
  2404. return -ENOMEM;
  2405. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  2406. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2407. cmd->isibss = 0;
  2408. memcpy(cmd->bssid, mac, ETH_ALEN);
  2409. rc = mwl8k_post_cmd(hw, &cmd->header);
  2410. kfree(cmd);
  2411. return rc;
  2412. }
  2413. /*
  2414. * CMD_SET_RF_CHANNEL.
  2415. */
  2416. struct mwl8k_cmd_set_rf_channel {
  2417. struct mwl8k_cmd_pkt header;
  2418. __le16 action;
  2419. __u8 current_channel;
  2420. __le32 channel_flags;
  2421. } __packed;
  2422. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  2423. struct ieee80211_conf *conf)
  2424. {
  2425. struct ieee80211_channel *channel = conf->channel;
  2426. struct mwl8k_cmd_set_rf_channel *cmd;
  2427. int rc;
  2428. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2429. if (cmd == NULL)
  2430. return -ENOMEM;
  2431. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  2432. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2433. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2434. cmd->current_channel = channel->hw_value;
  2435. if (channel->band == IEEE80211_BAND_2GHZ)
  2436. cmd->channel_flags |= cpu_to_le32(0x00000001);
  2437. else if (channel->band == IEEE80211_BAND_5GHZ)
  2438. cmd->channel_flags |= cpu_to_le32(0x00000004);
  2439. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  2440. conf->channel_type == NL80211_CHAN_HT20)
  2441. cmd->channel_flags |= cpu_to_le32(0x00000080);
  2442. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  2443. cmd->channel_flags |= cpu_to_le32(0x000001900);
  2444. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  2445. cmd->channel_flags |= cpu_to_le32(0x000000900);
  2446. rc = mwl8k_post_cmd(hw, &cmd->header);
  2447. kfree(cmd);
  2448. return rc;
  2449. }
  2450. /*
  2451. * CMD_SET_AID.
  2452. */
  2453. #define MWL8K_FRAME_PROT_DISABLED 0x00
  2454. #define MWL8K_FRAME_PROT_11G 0x07
  2455. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  2456. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  2457. struct mwl8k_cmd_update_set_aid {
  2458. struct mwl8k_cmd_pkt header;
  2459. __le16 aid;
  2460. /* AP's MAC address (BSSID) */
  2461. __u8 bssid[ETH_ALEN];
  2462. __le16 protection_mode;
  2463. __u8 supp_rates[14];
  2464. } __packed;
  2465. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  2466. {
  2467. int i;
  2468. int j;
  2469. /*
  2470. * Clear nonstandard rates 4 and 13.
  2471. */
  2472. mask &= 0x1fef;
  2473. for (i = 0, j = 0; i < 14; i++) {
  2474. if (mask & (1 << i))
  2475. rates[j++] = mwl8k_rates_24[i].hw_value;
  2476. }
  2477. }
  2478. static int
  2479. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  2480. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  2481. {
  2482. struct mwl8k_cmd_update_set_aid *cmd;
  2483. u16 prot_mode;
  2484. int rc;
  2485. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2486. if (cmd == NULL)
  2487. return -ENOMEM;
  2488. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  2489. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2490. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  2491. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  2492. if (vif->bss_conf.use_cts_prot) {
  2493. prot_mode = MWL8K_FRAME_PROT_11G;
  2494. } else {
  2495. switch (vif->bss_conf.ht_operation_mode &
  2496. IEEE80211_HT_OP_MODE_PROTECTION) {
  2497. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  2498. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  2499. break;
  2500. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  2501. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  2502. break;
  2503. default:
  2504. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  2505. break;
  2506. }
  2507. }
  2508. cmd->protection_mode = cpu_to_le16(prot_mode);
  2509. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  2510. rc = mwl8k_post_cmd(hw, &cmd->header);
  2511. kfree(cmd);
  2512. return rc;
  2513. }
  2514. /*
  2515. * CMD_SET_RATE.
  2516. */
  2517. struct mwl8k_cmd_set_rate {
  2518. struct mwl8k_cmd_pkt header;
  2519. __u8 legacy_rates[14];
  2520. /* Bitmap for supported MCS codes. */
  2521. __u8 mcs_set[16];
  2522. __u8 reserved[16];
  2523. } __packed;
  2524. static int
  2525. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2526. u32 legacy_rate_mask, u8 *mcs_rates)
  2527. {
  2528. struct mwl8k_cmd_set_rate *cmd;
  2529. int rc;
  2530. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2531. if (cmd == NULL)
  2532. return -ENOMEM;
  2533. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  2534. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2535. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  2536. memcpy(cmd->mcs_set, mcs_rates, 16);
  2537. rc = mwl8k_post_cmd(hw, &cmd->header);
  2538. kfree(cmd);
  2539. return rc;
  2540. }
  2541. /*
  2542. * CMD_FINALIZE_JOIN.
  2543. */
  2544. #define MWL8K_FJ_BEACON_MAXLEN 128
  2545. struct mwl8k_cmd_finalize_join {
  2546. struct mwl8k_cmd_pkt header;
  2547. __le32 sleep_interval; /* Number of beacon periods to sleep */
  2548. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  2549. } __packed;
  2550. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  2551. int framelen, int dtim)
  2552. {
  2553. struct mwl8k_cmd_finalize_join *cmd;
  2554. struct ieee80211_mgmt *payload = frame;
  2555. int payload_len;
  2556. int rc;
  2557. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2558. if (cmd == NULL)
  2559. return -ENOMEM;
  2560. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  2561. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2562. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  2563. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  2564. if (payload_len < 0)
  2565. payload_len = 0;
  2566. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  2567. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  2568. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  2569. rc = mwl8k_post_cmd(hw, &cmd->header);
  2570. kfree(cmd);
  2571. return rc;
  2572. }
  2573. /*
  2574. * CMD_SET_RTS_THRESHOLD.
  2575. */
  2576. struct mwl8k_cmd_set_rts_threshold {
  2577. struct mwl8k_cmd_pkt header;
  2578. __le16 action;
  2579. __le16 threshold;
  2580. } __packed;
  2581. static int
  2582. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  2583. {
  2584. struct mwl8k_cmd_set_rts_threshold *cmd;
  2585. int rc;
  2586. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2587. if (cmd == NULL)
  2588. return -ENOMEM;
  2589. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  2590. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2591. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2592. cmd->threshold = cpu_to_le16(rts_thresh);
  2593. rc = mwl8k_post_cmd(hw, &cmd->header);
  2594. kfree(cmd);
  2595. return rc;
  2596. }
  2597. /*
  2598. * CMD_SET_SLOT.
  2599. */
  2600. struct mwl8k_cmd_set_slot {
  2601. struct mwl8k_cmd_pkt header;
  2602. __le16 action;
  2603. __u8 short_slot;
  2604. } __packed;
  2605. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  2606. {
  2607. struct mwl8k_cmd_set_slot *cmd;
  2608. int rc;
  2609. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2610. if (cmd == NULL)
  2611. return -ENOMEM;
  2612. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  2613. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2614. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2615. cmd->short_slot = short_slot_time;
  2616. rc = mwl8k_post_cmd(hw, &cmd->header);
  2617. kfree(cmd);
  2618. return rc;
  2619. }
  2620. /*
  2621. * CMD_SET_EDCA_PARAMS.
  2622. */
  2623. struct mwl8k_cmd_set_edca_params {
  2624. struct mwl8k_cmd_pkt header;
  2625. /* See MWL8K_SET_EDCA_XXX below */
  2626. __le16 action;
  2627. /* TX opportunity in units of 32 us */
  2628. __le16 txop;
  2629. union {
  2630. struct {
  2631. /* Log exponent of max contention period: 0...15 */
  2632. __le32 log_cw_max;
  2633. /* Log exponent of min contention period: 0...15 */
  2634. __le32 log_cw_min;
  2635. /* Adaptive interframe spacing in units of 32us */
  2636. __u8 aifs;
  2637. /* TX queue to configure */
  2638. __u8 txq;
  2639. } ap;
  2640. struct {
  2641. /* Log exponent of max contention period: 0...15 */
  2642. __u8 log_cw_max;
  2643. /* Log exponent of min contention period: 0...15 */
  2644. __u8 log_cw_min;
  2645. /* Adaptive interframe spacing in units of 32us */
  2646. __u8 aifs;
  2647. /* TX queue to configure */
  2648. __u8 txq;
  2649. } sta;
  2650. };
  2651. } __packed;
  2652. #define MWL8K_SET_EDCA_CW 0x01
  2653. #define MWL8K_SET_EDCA_TXOP 0x02
  2654. #define MWL8K_SET_EDCA_AIFS 0x04
  2655. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  2656. MWL8K_SET_EDCA_TXOP | \
  2657. MWL8K_SET_EDCA_AIFS)
  2658. static int
  2659. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  2660. __u16 cw_min, __u16 cw_max,
  2661. __u8 aifs, __u16 txop)
  2662. {
  2663. struct mwl8k_priv *priv = hw->priv;
  2664. struct mwl8k_cmd_set_edca_params *cmd;
  2665. int rc;
  2666. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2667. if (cmd == NULL)
  2668. return -ENOMEM;
  2669. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  2670. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2671. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  2672. cmd->txop = cpu_to_le16(txop);
  2673. if (priv->ap_fw) {
  2674. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  2675. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  2676. cmd->ap.aifs = aifs;
  2677. cmd->ap.txq = qnum;
  2678. } else {
  2679. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2680. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2681. cmd->sta.aifs = aifs;
  2682. cmd->sta.txq = qnum;
  2683. }
  2684. rc = mwl8k_post_cmd(hw, &cmd->header);
  2685. kfree(cmd);
  2686. return rc;
  2687. }
  2688. /*
  2689. * CMD_SET_WMM_MODE.
  2690. */
  2691. struct mwl8k_cmd_set_wmm_mode {
  2692. struct mwl8k_cmd_pkt header;
  2693. __le16 action;
  2694. } __packed;
  2695. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2696. {
  2697. struct mwl8k_priv *priv = hw->priv;
  2698. struct mwl8k_cmd_set_wmm_mode *cmd;
  2699. int rc;
  2700. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2701. if (cmd == NULL)
  2702. return -ENOMEM;
  2703. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2704. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2705. cmd->action = cpu_to_le16(!!enable);
  2706. rc = mwl8k_post_cmd(hw, &cmd->header);
  2707. kfree(cmd);
  2708. if (!rc)
  2709. priv->wmm_enabled = enable;
  2710. return rc;
  2711. }
  2712. /*
  2713. * CMD_MIMO_CONFIG.
  2714. */
  2715. struct mwl8k_cmd_mimo_config {
  2716. struct mwl8k_cmd_pkt header;
  2717. __le32 action;
  2718. __u8 rx_antenna_map;
  2719. __u8 tx_antenna_map;
  2720. } __packed;
  2721. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2722. {
  2723. struct mwl8k_cmd_mimo_config *cmd;
  2724. int rc;
  2725. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2726. if (cmd == NULL)
  2727. return -ENOMEM;
  2728. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2729. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2730. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2731. cmd->rx_antenna_map = rx;
  2732. cmd->tx_antenna_map = tx;
  2733. rc = mwl8k_post_cmd(hw, &cmd->header);
  2734. kfree(cmd);
  2735. return rc;
  2736. }
  2737. /*
  2738. * CMD_USE_FIXED_RATE (STA version).
  2739. */
  2740. struct mwl8k_cmd_use_fixed_rate_sta {
  2741. struct mwl8k_cmd_pkt header;
  2742. __le32 action;
  2743. __le32 allow_rate_drop;
  2744. __le32 num_rates;
  2745. struct {
  2746. __le32 is_ht_rate;
  2747. __le32 enable_retry;
  2748. __le32 rate;
  2749. __le32 retry_count;
  2750. } rate_entry[8];
  2751. __le32 rate_type;
  2752. __le32 reserved1;
  2753. __le32 reserved2;
  2754. } __packed;
  2755. #define MWL8K_USE_AUTO_RATE 0x0002
  2756. #define MWL8K_UCAST_RATE 0
  2757. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2758. {
  2759. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2760. int rc;
  2761. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2762. if (cmd == NULL)
  2763. return -ENOMEM;
  2764. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2765. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2766. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2767. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2768. rc = mwl8k_post_cmd(hw, &cmd->header);
  2769. kfree(cmd);
  2770. return rc;
  2771. }
  2772. /*
  2773. * CMD_USE_FIXED_RATE (AP version).
  2774. */
  2775. struct mwl8k_cmd_use_fixed_rate_ap {
  2776. struct mwl8k_cmd_pkt header;
  2777. __le32 action;
  2778. __le32 allow_rate_drop;
  2779. __le32 num_rates;
  2780. struct mwl8k_rate_entry_ap {
  2781. __le32 is_ht_rate;
  2782. __le32 enable_retry;
  2783. __le32 rate;
  2784. __le32 retry_count;
  2785. } rate_entry[4];
  2786. u8 multicast_rate;
  2787. u8 multicast_rate_type;
  2788. u8 management_rate;
  2789. } __packed;
  2790. static int
  2791. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2792. {
  2793. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2794. int rc;
  2795. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2796. if (cmd == NULL)
  2797. return -ENOMEM;
  2798. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2799. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2800. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2801. cmd->multicast_rate = mcast;
  2802. cmd->management_rate = mgmt;
  2803. rc = mwl8k_post_cmd(hw, &cmd->header);
  2804. kfree(cmd);
  2805. return rc;
  2806. }
  2807. /*
  2808. * CMD_ENABLE_SNIFFER.
  2809. */
  2810. struct mwl8k_cmd_enable_sniffer {
  2811. struct mwl8k_cmd_pkt header;
  2812. __le32 action;
  2813. } __packed;
  2814. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2815. {
  2816. struct mwl8k_cmd_enable_sniffer *cmd;
  2817. int rc;
  2818. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2819. if (cmd == NULL)
  2820. return -ENOMEM;
  2821. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2822. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2823. cmd->action = cpu_to_le32(!!enable);
  2824. rc = mwl8k_post_cmd(hw, &cmd->header);
  2825. kfree(cmd);
  2826. return rc;
  2827. }
  2828. /*
  2829. * CMD_SET_MAC_ADDR.
  2830. */
  2831. struct mwl8k_cmd_set_mac_addr {
  2832. struct mwl8k_cmd_pkt header;
  2833. union {
  2834. struct {
  2835. __le16 mac_type;
  2836. __u8 mac_addr[ETH_ALEN];
  2837. } mbss;
  2838. __u8 mac_addr[ETH_ALEN];
  2839. };
  2840. } __packed;
  2841. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2842. #define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
  2843. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2844. #define MWL8K_MAC_TYPE_SECONDARY_AP 3
  2845. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
  2846. struct ieee80211_vif *vif, u8 *mac)
  2847. {
  2848. struct mwl8k_priv *priv = hw->priv;
  2849. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2850. struct mwl8k_cmd_set_mac_addr *cmd;
  2851. int mac_type;
  2852. int rc;
  2853. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2854. if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
  2855. if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
  2856. mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
  2857. else
  2858. mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
  2859. } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
  2860. if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
  2861. mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
  2862. else
  2863. mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
  2864. }
  2865. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2866. if (cmd == NULL)
  2867. return -ENOMEM;
  2868. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2869. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2870. if (priv->ap_fw) {
  2871. cmd->mbss.mac_type = cpu_to_le16(mac_type);
  2872. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2873. } else {
  2874. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2875. }
  2876. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2877. kfree(cmd);
  2878. return rc;
  2879. }
  2880. /*
  2881. * CMD_SET_RATEADAPT_MODE.
  2882. */
  2883. struct mwl8k_cmd_set_rate_adapt_mode {
  2884. struct mwl8k_cmd_pkt header;
  2885. __le16 action;
  2886. __le16 mode;
  2887. } __packed;
  2888. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2889. {
  2890. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2891. int rc;
  2892. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2893. if (cmd == NULL)
  2894. return -ENOMEM;
  2895. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2896. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2897. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2898. cmd->mode = cpu_to_le16(mode);
  2899. rc = mwl8k_post_cmd(hw, &cmd->header);
  2900. kfree(cmd);
  2901. return rc;
  2902. }
  2903. /*
  2904. * CMD_GET_WATCHDOG_BITMAP.
  2905. */
  2906. struct mwl8k_cmd_get_watchdog_bitmap {
  2907. struct mwl8k_cmd_pkt header;
  2908. u8 bitmap;
  2909. } __packed;
  2910. static int mwl8k_cmd_get_watchdog_bitmap(struct ieee80211_hw *hw, u8 *bitmap)
  2911. {
  2912. struct mwl8k_cmd_get_watchdog_bitmap *cmd;
  2913. int rc;
  2914. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2915. if (cmd == NULL)
  2916. return -ENOMEM;
  2917. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_WATCHDOG_BITMAP);
  2918. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2919. rc = mwl8k_post_cmd(hw, &cmd->header);
  2920. if (!rc)
  2921. *bitmap = cmd->bitmap;
  2922. kfree(cmd);
  2923. return rc;
  2924. }
  2925. #define INVALID_BA 0xAA
  2926. static void mwl8k_watchdog_ba_events(struct work_struct *work)
  2927. {
  2928. int rc;
  2929. u8 bitmap = 0, stream_index;
  2930. struct mwl8k_ampdu_stream *streams;
  2931. struct mwl8k_priv *priv =
  2932. container_of(work, struct mwl8k_priv, watchdog_ba_handle);
  2933. rc = mwl8k_cmd_get_watchdog_bitmap(priv->hw, &bitmap);
  2934. if (rc)
  2935. return;
  2936. if (bitmap == INVALID_BA)
  2937. return;
  2938. /* the bitmap is the hw queue number. Map it to the ampdu queue. */
  2939. stream_index = bitmap - MWL8K_TX_WMM_QUEUES;
  2940. BUG_ON(stream_index >= priv->num_ampdu_queues);
  2941. streams = &priv->ampdu[stream_index];
  2942. if (streams->state == AMPDU_STREAM_ACTIVE)
  2943. ieee80211_stop_tx_ba_session(streams->sta, streams->tid);
  2944. return;
  2945. }
  2946. /*
  2947. * CMD_BSS_START.
  2948. */
  2949. struct mwl8k_cmd_bss_start {
  2950. struct mwl8k_cmd_pkt header;
  2951. __le32 enable;
  2952. } __packed;
  2953. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
  2954. struct ieee80211_vif *vif, int enable)
  2955. {
  2956. struct mwl8k_cmd_bss_start *cmd;
  2957. int rc;
  2958. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2959. if (cmd == NULL)
  2960. return -ENOMEM;
  2961. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2962. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2963. cmd->enable = cpu_to_le32(enable);
  2964. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  2965. kfree(cmd);
  2966. return rc;
  2967. }
  2968. /*
  2969. * CMD_BASTREAM.
  2970. */
  2971. /*
  2972. * UPSTREAM is tx direction
  2973. */
  2974. #define BASTREAM_FLAG_DIRECTION_UPSTREAM 0x00
  2975. #define BASTREAM_FLAG_IMMEDIATE_TYPE 0x01
  2976. enum ba_stream_action_type {
  2977. MWL8K_BA_CREATE,
  2978. MWL8K_BA_UPDATE,
  2979. MWL8K_BA_DESTROY,
  2980. MWL8K_BA_FLUSH,
  2981. MWL8K_BA_CHECK,
  2982. };
  2983. struct mwl8k_create_ba_stream {
  2984. __le32 flags;
  2985. __le32 idle_thrs;
  2986. __le32 bar_thrs;
  2987. __le32 window_size;
  2988. u8 peer_mac_addr[6];
  2989. u8 dialog_token;
  2990. u8 tid;
  2991. u8 queue_id;
  2992. u8 param_info;
  2993. __le32 ba_context;
  2994. u8 reset_seq_no_flag;
  2995. __le16 curr_seq_no;
  2996. u8 sta_src_mac_addr[6];
  2997. } __packed;
  2998. struct mwl8k_destroy_ba_stream {
  2999. __le32 flags;
  3000. __le32 ba_context;
  3001. } __packed;
  3002. struct mwl8k_cmd_bastream {
  3003. struct mwl8k_cmd_pkt header;
  3004. __le32 action;
  3005. union {
  3006. struct mwl8k_create_ba_stream create_params;
  3007. struct mwl8k_destroy_ba_stream destroy_params;
  3008. };
  3009. } __packed;
  3010. static int
  3011. mwl8k_check_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream)
  3012. {
  3013. struct mwl8k_cmd_bastream *cmd;
  3014. int rc;
  3015. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3016. if (cmd == NULL)
  3017. return -ENOMEM;
  3018. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3019. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3020. cmd->action = cpu_to_le32(MWL8K_BA_CHECK);
  3021. cmd->create_params.queue_id = stream->idx;
  3022. memcpy(&cmd->create_params.peer_mac_addr[0], stream->sta->addr,
  3023. ETH_ALEN);
  3024. cmd->create_params.tid = stream->tid;
  3025. cmd->create_params.flags =
  3026. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE) |
  3027. cpu_to_le32(BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3028. rc = mwl8k_post_cmd(hw, &cmd->header);
  3029. kfree(cmd);
  3030. return rc;
  3031. }
  3032. static int
  3033. mwl8k_create_ba(struct ieee80211_hw *hw, struct mwl8k_ampdu_stream *stream,
  3034. u8 buf_size)
  3035. {
  3036. struct mwl8k_cmd_bastream *cmd;
  3037. int rc;
  3038. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3039. if (cmd == NULL)
  3040. return -ENOMEM;
  3041. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3042. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3043. cmd->action = cpu_to_le32(MWL8K_BA_CREATE);
  3044. cmd->create_params.bar_thrs = cpu_to_le32((u32)buf_size);
  3045. cmd->create_params.window_size = cpu_to_le32((u32)buf_size);
  3046. cmd->create_params.queue_id = stream->idx;
  3047. memcpy(cmd->create_params.peer_mac_addr, stream->sta->addr, ETH_ALEN);
  3048. cmd->create_params.tid = stream->tid;
  3049. cmd->create_params.curr_seq_no = cpu_to_le16(0);
  3050. cmd->create_params.reset_seq_no_flag = 1;
  3051. cmd->create_params.param_info =
  3052. (stream->sta->ht_cap.ampdu_factor &
  3053. IEEE80211_HT_AMPDU_PARM_FACTOR) |
  3054. ((stream->sta->ht_cap.ampdu_density << 2) &
  3055. IEEE80211_HT_AMPDU_PARM_DENSITY);
  3056. cmd->create_params.flags =
  3057. cpu_to_le32(BASTREAM_FLAG_IMMEDIATE_TYPE |
  3058. BASTREAM_FLAG_DIRECTION_UPSTREAM);
  3059. rc = mwl8k_post_cmd(hw, &cmd->header);
  3060. wiphy_debug(hw->wiphy, "Created a BA stream for %pM : tid %d\n",
  3061. stream->sta->addr, stream->tid);
  3062. kfree(cmd);
  3063. return rc;
  3064. }
  3065. static void mwl8k_destroy_ba(struct ieee80211_hw *hw,
  3066. struct mwl8k_ampdu_stream *stream)
  3067. {
  3068. struct mwl8k_cmd_bastream *cmd;
  3069. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3070. if (cmd == NULL)
  3071. return;
  3072. cmd->header.code = cpu_to_le16(MWL8K_CMD_BASTREAM);
  3073. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3074. cmd->action = cpu_to_le32(MWL8K_BA_DESTROY);
  3075. cmd->destroy_params.ba_context = cpu_to_le32(stream->idx);
  3076. mwl8k_post_cmd(hw, &cmd->header);
  3077. wiphy_debug(hw->wiphy, "Deleted BA stream index %d\n", stream->idx);
  3078. kfree(cmd);
  3079. }
  3080. /*
  3081. * CMD_SET_NEW_STN.
  3082. */
  3083. struct mwl8k_cmd_set_new_stn {
  3084. struct mwl8k_cmd_pkt header;
  3085. __le16 aid;
  3086. __u8 mac_addr[6];
  3087. __le16 stn_id;
  3088. __le16 action;
  3089. __le16 rsvd;
  3090. __le32 legacy_rates;
  3091. __u8 ht_rates[4];
  3092. __le16 cap_info;
  3093. __le16 ht_capabilities_info;
  3094. __u8 mac_ht_param_info;
  3095. __u8 rev;
  3096. __u8 control_channel;
  3097. __u8 add_channel;
  3098. __le16 op_mode;
  3099. __le16 stbc;
  3100. __u8 add_qos_info;
  3101. __u8 is_qos_sta;
  3102. __le32 fw_sta_ptr;
  3103. } __packed;
  3104. #define MWL8K_STA_ACTION_ADD 0
  3105. #define MWL8K_STA_ACTION_REMOVE 2
  3106. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  3107. struct ieee80211_vif *vif,
  3108. struct ieee80211_sta *sta)
  3109. {
  3110. struct mwl8k_cmd_set_new_stn *cmd;
  3111. u32 rates;
  3112. int rc;
  3113. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3114. if (cmd == NULL)
  3115. return -ENOMEM;
  3116. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3117. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3118. cmd->aid = cpu_to_le16(sta->aid);
  3119. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  3120. cmd->stn_id = cpu_to_le16(sta->aid);
  3121. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  3122. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3123. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3124. else
  3125. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3126. cmd->legacy_rates = cpu_to_le32(rates);
  3127. if (sta->ht_cap.ht_supported) {
  3128. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  3129. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  3130. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  3131. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  3132. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  3133. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  3134. ((sta->ht_cap.ampdu_density & 7) << 2);
  3135. cmd->is_qos_sta = 1;
  3136. }
  3137. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3138. kfree(cmd);
  3139. return rc;
  3140. }
  3141. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  3142. struct ieee80211_vif *vif)
  3143. {
  3144. struct mwl8k_cmd_set_new_stn *cmd;
  3145. int rc;
  3146. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3147. if (cmd == NULL)
  3148. return -ENOMEM;
  3149. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3150. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3151. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  3152. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3153. kfree(cmd);
  3154. return rc;
  3155. }
  3156. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  3157. struct ieee80211_vif *vif, u8 *addr)
  3158. {
  3159. struct mwl8k_cmd_set_new_stn *cmd;
  3160. int rc;
  3161. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3162. if (cmd == NULL)
  3163. return -ENOMEM;
  3164. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  3165. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3166. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3167. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  3168. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3169. kfree(cmd);
  3170. return rc;
  3171. }
  3172. /*
  3173. * CMD_UPDATE_ENCRYPTION.
  3174. */
  3175. #define MAX_ENCR_KEY_LENGTH 16
  3176. #define MIC_KEY_LENGTH 8
  3177. struct mwl8k_cmd_update_encryption {
  3178. struct mwl8k_cmd_pkt header;
  3179. __le32 action;
  3180. __le32 reserved;
  3181. __u8 mac_addr[6];
  3182. __u8 encr_type;
  3183. } __packed;
  3184. struct mwl8k_cmd_set_key {
  3185. struct mwl8k_cmd_pkt header;
  3186. __le32 action;
  3187. __le32 reserved;
  3188. __le16 length;
  3189. __le16 key_type_id;
  3190. __le32 key_info;
  3191. __le32 key_id;
  3192. __le16 key_len;
  3193. __u8 key_material[MAX_ENCR_KEY_LENGTH];
  3194. __u8 tkip_tx_mic_key[MIC_KEY_LENGTH];
  3195. __u8 tkip_rx_mic_key[MIC_KEY_LENGTH];
  3196. __le16 tkip_rsc_low;
  3197. __le32 tkip_rsc_high;
  3198. __le16 tkip_tsc_low;
  3199. __le32 tkip_tsc_high;
  3200. __u8 mac_addr[6];
  3201. } __packed;
  3202. enum {
  3203. MWL8K_ENCR_ENABLE,
  3204. MWL8K_ENCR_SET_KEY,
  3205. MWL8K_ENCR_REMOVE_KEY,
  3206. MWL8K_ENCR_SET_GROUP_KEY,
  3207. };
  3208. #define MWL8K_UPDATE_ENCRYPTION_TYPE_WEP 0
  3209. #define MWL8K_UPDATE_ENCRYPTION_TYPE_DISABLE 1
  3210. #define MWL8K_UPDATE_ENCRYPTION_TYPE_TKIP 4
  3211. #define MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED 7
  3212. #define MWL8K_UPDATE_ENCRYPTION_TYPE_AES 8
  3213. enum {
  3214. MWL8K_ALG_WEP,
  3215. MWL8K_ALG_TKIP,
  3216. MWL8K_ALG_CCMP,
  3217. };
  3218. #define MWL8K_KEY_FLAG_TXGROUPKEY 0x00000004
  3219. #define MWL8K_KEY_FLAG_PAIRWISE 0x00000008
  3220. #define MWL8K_KEY_FLAG_TSC_VALID 0x00000040
  3221. #define MWL8K_KEY_FLAG_WEP_TXKEY 0x01000000
  3222. #define MWL8K_KEY_FLAG_MICKEY_VALID 0x02000000
  3223. static int mwl8k_cmd_update_encryption_enable(struct ieee80211_hw *hw,
  3224. struct ieee80211_vif *vif,
  3225. u8 *addr,
  3226. u8 encr_type)
  3227. {
  3228. struct mwl8k_cmd_update_encryption *cmd;
  3229. int rc;
  3230. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3231. if (cmd == NULL)
  3232. return -ENOMEM;
  3233. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3234. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3235. cmd->action = cpu_to_le32(MWL8K_ENCR_ENABLE);
  3236. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3237. cmd->encr_type = encr_type;
  3238. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3239. kfree(cmd);
  3240. return rc;
  3241. }
  3242. static int mwl8k_encryption_set_cmd_info(struct mwl8k_cmd_set_key *cmd,
  3243. u8 *addr,
  3244. struct ieee80211_key_conf *key)
  3245. {
  3246. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_ENCRYPTION);
  3247. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3248. cmd->length = cpu_to_le16(sizeof(*cmd) -
  3249. offsetof(struct mwl8k_cmd_set_key, length));
  3250. cmd->key_id = cpu_to_le32(key->keyidx);
  3251. cmd->key_len = cpu_to_le16(key->keylen);
  3252. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  3253. switch (key->cipher) {
  3254. case WLAN_CIPHER_SUITE_WEP40:
  3255. case WLAN_CIPHER_SUITE_WEP104:
  3256. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_WEP);
  3257. if (key->keyidx == 0)
  3258. cmd->key_info = cpu_to_le32(MWL8K_KEY_FLAG_WEP_TXKEY);
  3259. break;
  3260. case WLAN_CIPHER_SUITE_TKIP:
  3261. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_TKIP);
  3262. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3263. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3264. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3265. cmd->key_info |= cpu_to_le32(MWL8K_KEY_FLAG_MICKEY_VALID
  3266. | MWL8K_KEY_FLAG_TSC_VALID);
  3267. break;
  3268. case WLAN_CIPHER_SUITE_CCMP:
  3269. cmd->key_type_id = cpu_to_le16(MWL8K_ALG_CCMP);
  3270. cmd->key_info = (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3271. ? cpu_to_le32(MWL8K_KEY_FLAG_PAIRWISE)
  3272. : cpu_to_le32(MWL8K_KEY_FLAG_TXGROUPKEY);
  3273. break;
  3274. default:
  3275. return -ENOTSUPP;
  3276. }
  3277. return 0;
  3278. }
  3279. static int mwl8k_cmd_encryption_set_key(struct ieee80211_hw *hw,
  3280. struct ieee80211_vif *vif,
  3281. u8 *addr,
  3282. struct ieee80211_key_conf *key)
  3283. {
  3284. struct mwl8k_cmd_set_key *cmd;
  3285. int rc;
  3286. int keymlen;
  3287. u32 action;
  3288. u8 idx;
  3289. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3290. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3291. if (cmd == NULL)
  3292. return -ENOMEM;
  3293. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3294. if (rc < 0)
  3295. goto done;
  3296. idx = key->keyidx;
  3297. if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE)
  3298. action = MWL8K_ENCR_SET_KEY;
  3299. else
  3300. action = MWL8K_ENCR_SET_GROUP_KEY;
  3301. switch (key->cipher) {
  3302. case WLAN_CIPHER_SUITE_WEP40:
  3303. case WLAN_CIPHER_SUITE_WEP104:
  3304. if (!mwl8k_vif->wep_key_conf[idx].enabled) {
  3305. memcpy(mwl8k_vif->wep_key_conf[idx].key, key,
  3306. sizeof(*key) + key->keylen);
  3307. mwl8k_vif->wep_key_conf[idx].enabled = 1;
  3308. }
  3309. keymlen = key->keylen;
  3310. action = MWL8K_ENCR_SET_KEY;
  3311. break;
  3312. case WLAN_CIPHER_SUITE_TKIP:
  3313. keymlen = MAX_ENCR_KEY_LENGTH + 2 * MIC_KEY_LENGTH;
  3314. break;
  3315. case WLAN_CIPHER_SUITE_CCMP:
  3316. keymlen = key->keylen;
  3317. break;
  3318. default:
  3319. rc = -ENOTSUPP;
  3320. goto done;
  3321. }
  3322. memcpy(cmd->key_material, key->key, keymlen);
  3323. cmd->action = cpu_to_le32(action);
  3324. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3325. done:
  3326. kfree(cmd);
  3327. return rc;
  3328. }
  3329. static int mwl8k_cmd_encryption_remove_key(struct ieee80211_hw *hw,
  3330. struct ieee80211_vif *vif,
  3331. u8 *addr,
  3332. struct ieee80211_key_conf *key)
  3333. {
  3334. struct mwl8k_cmd_set_key *cmd;
  3335. int rc;
  3336. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3337. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3338. if (cmd == NULL)
  3339. return -ENOMEM;
  3340. rc = mwl8k_encryption_set_cmd_info(cmd, addr, key);
  3341. if (rc < 0)
  3342. goto done;
  3343. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  3344. WLAN_CIPHER_SUITE_WEP104)
  3345. mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0;
  3346. cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
  3347. rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
  3348. done:
  3349. kfree(cmd);
  3350. return rc;
  3351. }
  3352. static int mwl8k_set_key(struct ieee80211_hw *hw,
  3353. enum set_key_cmd cmd_param,
  3354. struct ieee80211_vif *vif,
  3355. struct ieee80211_sta *sta,
  3356. struct ieee80211_key_conf *key)
  3357. {
  3358. int rc = 0;
  3359. u8 encr_type;
  3360. u8 *addr;
  3361. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3362. if (vif->type == NL80211_IFTYPE_STATION)
  3363. return -EOPNOTSUPP;
  3364. if (sta == NULL)
  3365. addr = hw->wiphy->perm_addr;
  3366. else
  3367. addr = sta->addr;
  3368. if (cmd_param == SET_KEY) {
  3369. rc = mwl8k_cmd_encryption_set_key(hw, vif, addr, key);
  3370. if (rc)
  3371. goto out;
  3372. if ((key->cipher == WLAN_CIPHER_SUITE_WEP40)
  3373. || (key->cipher == WLAN_CIPHER_SUITE_WEP104))
  3374. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_WEP;
  3375. else
  3376. encr_type = MWL8K_UPDATE_ENCRYPTION_TYPE_MIXED;
  3377. rc = mwl8k_cmd_update_encryption_enable(hw, vif, addr,
  3378. encr_type);
  3379. if (rc)
  3380. goto out;
  3381. mwl8k_vif->is_hw_crypto_enabled = true;
  3382. } else {
  3383. rc = mwl8k_cmd_encryption_remove_key(hw, vif, addr, key);
  3384. if (rc)
  3385. goto out;
  3386. mwl8k_vif->is_hw_crypto_enabled = false;
  3387. }
  3388. out:
  3389. return rc;
  3390. }
  3391. /*
  3392. * CMD_UPDATE_STADB.
  3393. */
  3394. struct ewc_ht_info {
  3395. __le16 control1;
  3396. __le16 control2;
  3397. __le16 control3;
  3398. } __packed;
  3399. struct peer_capability_info {
  3400. /* Peer type - AP vs. STA. */
  3401. __u8 peer_type;
  3402. /* Basic 802.11 capabilities from assoc resp. */
  3403. __le16 basic_caps;
  3404. /* Set if peer supports 802.11n high throughput (HT). */
  3405. __u8 ht_support;
  3406. /* Valid if HT is supported. */
  3407. __le16 ht_caps;
  3408. __u8 extended_ht_caps;
  3409. struct ewc_ht_info ewc_info;
  3410. /* Legacy rate table. Intersection of our rates and peer rates. */
  3411. __u8 legacy_rates[12];
  3412. /* HT rate table. Intersection of our rates and peer rates. */
  3413. __u8 ht_rates[16];
  3414. __u8 pad[16];
  3415. /* If set, interoperability mode, no proprietary extensions. */
  3416. __u8 interop;
  3417. __u8 pad2;
  3418. __u8 station_id;
  3419. __le16 amsdu_enabled;
  3420. } __packed;
  3421. struct mwl8k_cmd_update_stadb {
  3422. struct mwl8k_cmd_pkt header;
  3423. /* See STADB_ACTION_TYPE */
  3424. __le32 action;
  3425. /* Peer MAC address */
  3426. __u8 peer_addr[ETH_ALEN];
  3427. __le32 reserved;
  3428. /* Peer info - valid during add/update. */
  3429. struct peer_capability_info peer_info;
  3430. } __packed;
  3431. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  3432. #define MWL8K_STA_DB_DEL_ENTRY 2
  3433. /* Peer Entry flags - used to define the type of the peer node */
  3434. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  3435. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  3436. struct ieee80211_vif *vif,
  3437. struct ieee80211_sta *sta)
  3438. {
  3439. struct mwl8k_cmd_update_stadb *cmd;
  3440. struct peer_capability_info *p;
  3441. u32 rates;
  3442. int rc;
  3443. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3444. if (cmd == NULL)
  3445. return -ENOMEM;
  3446. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3447. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3448. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  3449. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  3450. p = &cmd->peer_info;
  3451. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  3452. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  3453. p->ht_support = sta->ht_cap.ht_supported;
  3454. p->ht_caps = cpu_to_le16(sta->ht_cap.cap);
  3455. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  3456. ((sta->ht_cap.ampdu_density & 7) << 2);
  3457. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3458. rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
  3459. else
  3460. rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3461. legacy_rate_mask_to_array(p->legacy_rates, rates);
  3462. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  3463. p->interop = 1;
  3464. p->amsdu_enabled = 0;
  3465. rc = mwl8k_post_cmd(hw, &cmd->header);
  3466. kfree(cmd);
  3467. return rc ? rc : p->station_id;
  3468. }
  3469. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  3470. struct ieee80211_vif *vif, u8 *addr)
  3471. {
  3472. struct mwl8k_cmd_update_stadb *cmd;
  3473. int rc;
  3474. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  3475. if (cmd == NULL)
  3476. return -ENOMEM;
  3477. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  3478. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  3479. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  3480. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  3481. rc = mwl8k_post_cmd(hw, &cmd->header);
  3482. kfree(cmd);
  3483. return rc;
  3484. }
  3485. /*
  3486. * Interrupt handling.
  3487. */
  3488. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  3489. {
  3490. struct ieee80211_hw *hw = dev_id;
  3491. struct mwl8k_priv *priv = hw->priv;
  3492. u32 status;
  3493. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3494. if (!status)
  3495. return IRQ_NONE;
  3496. if (status & MWL8K_A2H_INT_TX_DONE) {
  3497. status &= ~MWL8K_A2H_INT_TX_DONE;
  3498. tasklet_schedule(&priv->poll_tx_task);
  3499. }
  3500. if (status & MWL8K_A2H_INT_RX_READY) {
  3501. status &= ~MWL8K_A2H_INT_RX_READY;
  3502. tasklet_schedule(&priv->poll_rx_task);
  3503. }
  3504. if (status & MWL8K_A2H_INT_BA_WATCHDOG) {
  3505. status &= ~MWL8K_A2H_INT_BA_WATCHDOG;
  3506. ieee80211_queue_work(hw, &priv->watchdog_ba_handle);
  3507. }
  3508. if (status)
  3509. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3510. if (status & MWL8K_A2H_INT_OPC_DONE) {
  3511. if (priv->hostcmd_wait != NULL)
  3512. complete(priv->hostcmd_wait);
  3513. }
  3514. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  3515. if (!mutex_is_locked(&priv->fw_mutex) &&
  3516. priv->radio_on && priv->pending_tx_pkts)
  3517. mwl8k_tx_start(priv);
  3518. }
  3519. return IRQ_HANDLED;
  3520. }
  3521. static void mwl8k_tx_poll(unsigned long data)
  3522. {
  3523. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3524. struct mwl8k_priv *priv = hw->priv;
  3525. int limit;
  3526. int i;
  3527. limit = 32;
  3528. spin_lock_bh(&priv->tx_lock);
  3529. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3530. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  3531. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  3532. complete(priv->tx_wait);
  3533. priv->tx_wait = NULL;
  3534. }
  3535. spin_unlock_bh(&priv->tx_lock);
  3536. if (limit) {
  3537. writel(~MWL8K_A2H_INT_TX_DONE,
  3538. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3539. } else {
  3540. tasklet_schedule(&priv->poll_tx_task);
  3541. }
  3542. }
  3543. static void mwl8k_rx_poll(unsigned long data)
  3544. {
  3545. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  3546. struct mwl8k_priv *priv = hw->priv;
  3547. int limit;
  3548. limit = 32;
  3549. limit -= rxq_process(hw, 0, limit);
  3550. limit -= rxq_refill(hw, 0, limit);
  3551. if (limit) {
  3552. writel(~MWL8K_A2H_INT_RX_READY,
  3553. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3554. } else {
  3555. tasklet_schedule(&priv->poll_rx_task);
  3556. }
  3557. }
  3558. /*
  3559. * Core driver operations.
  3560. */
  3561. static void mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  3562. {
  3563. struct mwl8k_priv *priv = hw->priv;
  3564. int index = skb_get_queue_mapping(skb);
  3565. if (!priv->radio_on) {
  3566. wiphy_debug(hw->wiphy,
  3567. "dropped TX frame since radio disabled\n");
  3568. dev_kfree_skb(skb);
  3569. return;
  3570. }
  3571. mwl8k_txq_xmit(hw, index, skb);
  3572. }
  3573. static int mwl8k_start(struct ieee80211_hw *hw)
  3574. {
  3575. struct mwl8k_priv *priv = hw->priv;
  3576. int rc;
  3577. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3578. IRQF_SHARED, MWL8K_NAME, hw);
  3579. if (rc) {
  3580. priv->irq = -1;
  3581. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  3582. return -EIO;
  3583. }
  3584. priv->irq = priv->pdev->irq;
  3585. /* Enable TX reclaim and RX tasklets. */
  3586. tasklet_enable(&priv->poll_tx_task);
  3587. tasklet_enable(&priv->poll_rx_task);
  3588. /* Enable interrupts */
  3589. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3590. iowrite32(MWL8K_A2H_EVENTS,
  3591. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3592. rc = mwl8k_fw_lock(hw);
  3593. if (!rc) {
  3594. rc = mwl8k_cmd_radio_enable(hw);
  3595. if (!priv->ap_fw) {
  3596. if (!rc)
  3597. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  3598. if (!rc)
  3599. rc = mwl8k_cmd_set_pre_scan(hw);
  3600. if (!rc)
  3601. rc = mwl8k_cmd_set_post_scan(hw,
  3602. "\x00\x00\x00\x00\x00\x00");
  3603. }
  3604. if (!rc)
  3605. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  3606. if (!rc)
  3607. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  3608. mwl8k_fw_unlock(hw);
  3609. }
  3610. if (rc) {
  3611. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3612. free_irq(priv->pdev->irq, hw);
  3613. priv->irq = -1;
  3614. tasklet_disable(&priv->poll_tx_task);
  3615. tasklet_disable(&priv->poll_rx_task);
  3616. }
  3617. return rc;
  3618. }
  3619. static void mwl8k_stop(struct ieee80211_hw *hw)
  3620. {
  3621. struct mwl8k_priv *priv = hw->priv;
  3622. int i;
  3623. mwl8k_cmd_radio_disable(hw);
  3624. ieee80211_stop_queues(hw);
  3625. /* Disable interrupts */
  3626. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3627. if (priv->irq != -1) {
  3628. free_irq(priv->pdev->irq, hw);
  3629. priv->irq = -1;
  3630. }
  3631. /* Stop finalize join worker */
  3632. cancel_work_sync(&priv->finalize_join_worker);
  3633. cancel_work_sync(&priv->watchdog_ba_handle);
  3634. if (priv->beacon_skb != NULL)
  3635. dev_kfree_skb(priv->beacon_skb);
  3636. /* Stop TX reclaim and RX tasklets. */
  3637. tasklet_disable(&priv->poll_tx_task);
  3638. tasklet_disable(&priv->poll_rx_task);
  3639. /* Return all skbs to mac80211 */
  3640. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  3641. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3642. }
  3643. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image);
  3644. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  3645. struct ieee80211_vif *vif)
  3646. {
  3647. struct mwl8k_priv *priv = hw->priv;
  3648. struct mwl8k_vif *mwl8k_vif;
  3649. u32 macids_supported;
  3650. int macid, rc;
  3651. struct mwl8k_device_info *di;
  3652. /*
  3653. * Reject interface creation if sniffer mode is active, as
  3654. * STA operation is mutually exclusive with hardware sniffer
  3655. * mode. (Sniffer mode is only used on STA firmware.)
  3656. */
  3657. if (priv->sniffer_enabled) {
  3658. wiphy_info(hw->wiphy,
  3659. "unable to create STA interface because sniffer mode is enabled\n");
  3660. return -EINVAL;
  3661. }
  3662. di = priv->device_info;
  3663. switch (vif->type) {
  3664. case NL80211_IFTYPE_AP:
  3665. if (!priv->ap_fw && di->fw_image_ap) {
  3666. /* we must load the ap fw to meet this request */
  3667. if (!list_empty(&priv->vif_list))
  3668. return -EBUSY;
  3669. rc = mwl8k_reload_firmware(hw, di->fw_image_ap);
  3670. if (rc)
  3671. return rc;
  3672. }
  3673. macids_supported = priv->ap_macids_supported;
  3674. break;
  3675. case NL80211_IFTYPE_STATION:
  3676. if (priv->ap_fw && di->fw_image_sta) {
  3677. /* we must load the sta fw to meet this request */
  3678. if (!list_empty(&priv->vif_list))
  3679. return -EBUSY;
  3680. rc = mwl8k_reload_firmware(hw, di->fw_image_sta);
  3681. if (rc)
  3682. return rc;
  3683. }
  3684. macids_supported = priv->sta_macids_supported;
  3685. break;
  3686. default:
  3687. return -EINVAL;
  3688. }
  3689. macid = ffs(macids_supported & ~priv->macids_used);
  3690. if (!macid--)
  3691. return -EBUSY;
  3692. /* Setup driver private area. */
  3693. mwl8k_vif = MWL8K_VIF(vif);
  3694. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  3695. mwl8k_vif->vif = vif;
  3696. mwl8k_vif->macid = macid;
  3697. mwl8k_vif->seqno = 0;
  3698. memcpy(mwl8k_vif->bssid, vif->addr, ETH_ALEN);
  3699. mwl8k_vif->is_hw_crypto_enabled = false;
  3700. /* Set the mac address. */
  3701. mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
  3702. if (priv->ap_fw)
  3703. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  3704. priv->macids_used |= 1 << mwl8k_vif->macid;
  3705. list_add_tail(&mwl8k_vif->list, &priv->vif_list);
  3706. return 0;
  3707. }
  3708. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  3709. struct ieee80211_vif *vif)
  3710. {
  3711. struct mwl8k_priv *priv = hw->priv;
  3712. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  3713. if (priv->ap_fw)
  3714. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  3715. mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
  3716. priv->macids_used &= ~(1 << mwl8k_vif->macid);
  3717. list_del(&mwl8k_vif->list);
  3718. }
  3719. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  3720. {
  3721. struct ieee80211_conf *conf = &hw->conf;
  3722. struct mwl8k_priv *priv = hw->priv;
  3723. int rc;
  3724. if (conf->flags & IEEE80211_CONF_IDLE) {
  3725. mwl8k_cmd_radio_disable(hw);
  3726. return 0;
  3727. }
  3728. rc = mwl8k_fw_lock(hw);
  3729. if (rc)
  3730. return rc;
  3731. rc = mwl8k_cmd_radio_enable(hw);
  3732. if (rc)
  3733. goto out;
  3734. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  3735. if (rc)
  3736. goto out;
  3737. if (conf->power_level > 18)
  3738. conf->power_level = 18;
  3739. if (priv->ap_fw) {
  3740. if (conf->flags & IEEE80211_CONF_CHANGE_POWER) {
  3741. rc = mwl8k_cmd_tx_power(hw, conf, conf->power_level);
  3742. if (rc)
  3743. goto out;
  3744. }
  3745. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x3);
  3746. if (rc)
  3747. wiphy_warn(hw->wiphy, "failed to set # of RX antennas");
  3748. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  3749. if (rc)
  3750. wiphy_warn(hw->wiphy, "failed to set # of TX antennas");
  3751. } else {
  3752. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  3753. if (rc)
  3754. goto out;
  3755. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  3756. }
  3757. out:
  3758. mwl8k_fw_unlock(hw);
  3759. return rc;
  3760. }
  3761. static void
  3762. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3763. struct ieee80211_bss_conf *info, u32 changed)
  3764. {
  3765. struct mwl8k_priv *priv = hw->priv;
  3766. u32 ap_legacy_rates = 0;
  3767. u8 ap_mcs_rates[16];
  3768. int rc;
  3769. if (mwl8k_fw_lock(hw))
  3770. return;
  3771. /*
  3772. * No need to capture a beacon if we're no longer associated.
  3773. */
  3774. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  3775. priv->capture_beacon = false;
  3776. /*
  3777. * Get the AP's legacy and MCS rates.
  3778. */
  3779. if (vif->bss_conf.assoc) {
  3780. struct ieee80211_sta *ap;
  3781. rcu_read_lock();
  3782. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  3783. if (ap == NULL) {
  3784. rcu_read_unlock();
  3785. goto out;
  3786. }
  3787. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
  3788. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  3789. } else {
  3790. ap_legacy_rates =
  3791. ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
  3792. }
  3793. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  3794. rcu_read_unlock();
  3795. }
  3796. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  3797. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  3798. if (rc)
  3799. goto out;
  3800. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  3801. if (rc)
  3802. goto out;
  3803. }
  3804. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  3805. rc = mwl8k_set_radio_preamble(hw,
  3806. vif->bss_conf.use_short_preamble);
  3807. if (rc)
  3808. goto out;
  3809. }
  3810. if (changed & BSS_CHANGED_ERP_SLOT) {
  3811. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  3812. if (rc)
  3813. goto out;
  3814. }
  3815. if (vif->bss_conf.assoc &&
  3816. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
  3817. BSS_CHANGED_HT))) {
  3818. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  3819. if (rc)
  3820. goto out;
  3821. }
  3822. if (vif->bss_conf.assoc &&
  3823. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  3824. /*
  3825. * Finalize the join. Tell rx handler to process
  3826. * next beacon from our BSSID.
  3827. */
  3828. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  3829. priv->capture_beacon = true;
  3830. }
  3831. out:
  3832. mwl8k_fw_unlock(hw);
  3833. }
  3834. static void
  3835. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3836. struct ieee80211_bss_conf *info, u32 changed)
  3837. {
  3838. int rc;
  3839. if (mwl8k_fw_lock(hw))
  3840. return;
  3841. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  3842. rc = mwl8k_set_radio_preamble(hw,
  3843. vif->bss_conf.use_short_preamble);
  3844. if (rc)
  3845. goto out;
  3846. }
  3847. if (changed & BSS_CHANGED_BASIC_RATES) {
  3848. int idx;
  3849. int rate;
  3850. /*
  3851. * Use lowest supported basic rate for multicasts
  3852. * and management frames (such as probe responses --
  3853. * beacons will always go out at 1 Mb/s).
  3854. */
  3855. idx = ffs(vif->bss_conf.basic_rates);
  3856. if (idx)
  3857. idx--;
  3858. if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
  3859. rate = mwl8k_rates_24[idx].hw_value;
  3860. else
  3861. rate = mwl8k_rates_50[idx].hw_value;
  3862. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  3863. }
  3864. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  3865. struct sk_buff *skb;
  3866. skb = ieee80211_beacon_get(hw, vif);
  3867. if (skb != NULL) {
  3868. mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
  3869. kfree_skb(skb);
  3870. }
  3871. }
  3872. if (changed & BSS_CHANGED_BEACON_ENABLED)
  3873. mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
  3874. out:
  3875. mwl8k_fw_unlock(hw);
  3876. }
  3877. static void
  3878. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  3879. struct ieee80211_bss_conf *info, u32 changed)
  3880. {
  3881. struct mwl8k_priv *priv = hw->priv;
  3882. if (!priv->ap_fw)
  3883. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  3884. else
  3885. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  3886. }
  3887. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  3888. struct netdev_hw_addr_list *mc_list)
  3889. {
  3890. struct mwl8k_cmd_pkt *cmd;
  3891. /*
  3892. * Synthesize and return a command packet that programs the
  3893. * hardware multicast address filter. At this point we don't
  3894. * know whether FIF_ALLMULTI is being requested, but if it is,
  3895. * we'll end up throwing this packet away and creating a new
  3896. * one in mwl8k_configure_filter().
  3897. */
  3898. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_list);
  3899. return (unsigned long)cmd;
  3900. }
  3901. static int
  3902. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  3903. unsigned int changed_flags,
  3904. unsigned int *total_flags)
  3905. {
  3906. struct mwl8k_priv *priv = hw->priv;
  3907. /*
  3908. * Hardware sniffer mode is mutually exclusive with STA
  3909. * operation, so refuse to enable sniffer mode if a STA
  3910. * interface is active.
  3911. */
  3912. if (!list_empty(&priv->vif_list)) {
  3913. if (net_ratelimit())
  3914. wiphy_info(hw->wiphy,
  3915. "not enabling sniffer mode because STA interface is active\n");
  3916. return 0;
  3917. }
  3918. if (!priv->sniffer_enabled) {
  3919. if (mwl8k_cmd_enable_sniffer(hw, 1))
  3920. return 0;
  3921. priv->sniffer_enabled = true;
  3922. }
  3923. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  3924. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  3925. FIF_OTHER_BSS;
  3926. return 1;
  3927. }
  3928. static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
  3929. {
  3930. if (!list_empty(&priv->vif_list))
  3931. return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
  3932. return NULL;
  3933. }
  3934. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  3935. unsigned int changed_flags,
  3936. unsigned int *total_flags,
  3937. u64 multicast)
  3938. {
  3939. struct mwl8k_priv *priv = hw->priv;
  3940. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  3941. /*
  3942. * AP firmware doesn't allow fine-grained control over
  3943. * the receive filter.
  3944. */
  3945. if (priv->ap_fw) {
  3946. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3947. kfree(cmd);
  3948. return;
  3949. }
  3950. /*
  3951. * Enable hardware sniffer mode if FIF_CONTROL or
  3952. * FIF_OTHER_BSS is requested.
  3953. */
  3954. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  3955. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  3956. kfree(cmd);
  3957. return;
  3958. }
  3959. /* Clear unsupported feature flags */
  3960. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  3961. if (mwl8k_fw_lock(hw)) {
  3962. kfree(cmd);
  3963. return;
  3964. }
  3965. if (priv->sniffer_enabled) {
  3966. mwl8k_cmd_enable_sniffer(hw, 0);
  3967. priv->sniffer_enabled = false;
  3968. }
  3969. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  3970. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  3971. /*
  3972. * Disable the BSS filter.
  3973. */
  3974. mwl8k_cmd_set_pre_scan(hw);
  3975. } else {
  3976. struct mwl8k_vif *mwl8k_vif;
  3977. const u8 *bssid;
  3978. /*
  3979. * Enable the BSS filter.
  3980. *
  3981. * If there is an active STA interface, use that
  3982. * interface's BSSID, otherwise use a dummy one
  3983. * (where the OUI part needs to be nonzero for
  3984. * the BSSID to be accepted by POST_SCAN).
  3985. */
  3986. mwl8k_vif = mwl8k_first_vif(priv);
  3987. if (mwl8k_vif != NULL)
  3988. bssid = mwl8k_vif->vif->bss_conf.bssid;
  3989. else
  3990. bssid = "\x01\x00\x00\x00\x00\x00";
  3991. mwl8k_cmd_set_post_scan(hw, bssid);
  3992. }
  3993. }
  3994. /*
  3995. * If FIF_ALLMULTI is being requested, throw away the command
  3996. * packet that ->prepare_multicast() built and replace it with
  3997. * a command packet that enables reception of all multicast
  3998. * packets.
  3999. */
  4000. if (*total_flags & FIF_ALLMULTI) {
  4001. kfree(cmd);
  4002. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, NULL);
  4003. }
  4004. if (cmd != NULL) {
  4005. mwl8k_post_cmd(hw, cmd);
  4006. kfree(cmd);
  4007. }
  4008. mwl8k_fw_unlock(hw);
  4009. }
  4010. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  4011. {
  4012. return mwl8k_cmd_set_rts_threshold(hw, value);
  4013. }
  4014. static int mwl8k_sta_remove(struct ieee80211_hw *hw,
  4015. struct ieee80211_vif *vif,
  4016. struct ieee80211_sta *sta)
  4017. {
  4018. struct mwl8k_priv *priv = hw->priv;
  4019. if (priv->ap_fw)
  4020. return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
  4021. else
  4022. return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
  4023. }
  4024. static int mwl8k_sta_add(struct ieee80211_hw *hw,
  4025. struct ieee80211_vif *vif,
  4026. struct ieee80211_sta *sta)
  4027. {
  4028. struct mwl8k_priv *priv = hw->priv;
  4029. int ret;
  4030. int i;
  4031. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  4032. struct ieee80211_key_conf *key;
  4033. if (!priv->ap_fw) {
  4034. ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
  4035. if (ret >= 0) {
  4036. MWL8K_STA(sta)->peer_id = ret;
  4037. if (sta->ht_cap.ht_supported)
  4038. MWL8K_STA(sta)->is_ampdu_allowed = true;
  4039. ret = 0;
  4040. }
  4041. } else {
  4042. ret = mwl8k_cmd_set_new_stn_add(hw, vif, sta);
  4043. }
  4044. for (i = 0; i < NUM_WEP_KEYS; i++) {
  4045. key = IEEE80211_KEY_CONF(mwl8k_vif->wep_key_conf[i].key);
  4046. if (mwl8k_vif->wep_key_conf[i].enabled)
  4047. mwl8k_set_key(hw, SET_KEY, vif, sta, key);
  4048. }
  4049. return ret;
  4050. }
  4051. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  4052. const struct ieee80211_tx_queue_params *params)
  4053. {
  4054. struct mwl8k_priv *priv = hw->priv;
  4055. int rc;
  4056. rc = mwl8k_fw_lock(hw);
  4057. if (!rc) {
  4058. BUG_ON(queue > MWL8K_TX_WMM_QUEUES - 1);
  4059. memcpy(&priv->wmm_params[queue], params, sizeof(*params));
  4060. if (!priv->wmm_enabled)
  4061. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  4062. if (!rc) {
  4063. int q = MWL8K_TX_WMM_QUEUES - 1 - queue;
  4064. rc = mwl8k_cmd_set_edca_params(hw, q,
  4065. params->cw_min,
  4066. params->cw_max,
  4067. params->aifs,
  4068. params->txop);
  4069. }
  4070. mwl8k_fw_unlock(hw);
  4071. }
  4072. return rc;
  4073. }
  4074. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  4075. struct ieee80211_low_level_stats *stats)
  4076. {
  4077. return mwl8k_cmd_get_stat(hw, stats);
  4078. }
  4079. static int mwl8k_get_survey(struct ieee80211_hw *hw, int idx,
  4080. struct survey_info *survey)
  4081. {
  4082. struct mwl8k_priv *priv = hw->priv;
  4083. struct ieee80211_conf *conf = &hw->conf;
  4084. if (idx != 0)
  4085. return -ENOENT;
  4086. survey->channel = conf->channel;
  4087. survey->filled = SURVEY_INFO_NOISE_DBM;
  4088. survey->noise = priv->noise;
  4089. return 0;
  4090. }
  4091. #define MAX_AMPDU_ATTEMPTS 5
  4092. static int
  4093. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4094. enum ieee80211_ampdu_mlme_action action,
  4095. struct ieee80211_sta *sta, u16 tid, u16 *ssn,
  4096. u8 buf_size)
  4097. {
  4098. int i, rc = 0;
  4099. struct mwl8k_priv *priv = hw->priv;
  4100. struct mwl8k_ampdu_stream *stream;
  4101. u8 *addr = sta->addr;
  4102. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  4103. return -ENOTSUPP;
  4104. spin_lock(&priv->stream_lock);
  4105. stream = mwl8k_lookup_stream(hw, addr, tid);
  4106. switch (action) {
  4107. case IEEE80211_AMPDU_RX_START:
  4108. case IEEE80211_AMPDU_RX_STOP:
  4109. break;
  4110. case IEEE80211_AMPDU_TX_START:
  4111. /* By the time we get here the hw queues may contain outgoing
  4112. * packets for this RA/TID that are not part of this BA
  4113. * session. The hw will assign sequence numbers to these
  4114. * packets as they go out. So if we query the hw for its next
  4115. * sequence number and use that for the SSN here, it may end up
  4116. * being wrong, which will lead to sequence number mismatch at
  4117. * the recipient. To avoid this, we reset the sequence number
  4118. * to O for the first MPDU in this BA stream.
  4119. */
  4120. *ssn = 0;
  4121. if (stream == NULL) {
  4122. /* This means that somebody outside this driver called
  4123. * ieee80211_start_tx_ba_session. This is unexpected
  4124. * because we do our own rate control. Just warn and
  4125. * move on.
  4126. */
  4127. wiphy_warn(hw->wiphy, "Unexpected call to %s. "
  4128. "Proceeding anyway.\n", __func__);
  4129. stream = mwl8k_add_stream(hw, sta, tid);
  4130. }
  4131. if (stream == NULL) {
  4132. wiphy_debug(hw->wiphy, "no free AMPDU streams\n");
  4133. rc = -EBUSY;
  4134. break;
  4135. }
  4136. stream->state = AMPDU_STREAM_IN_PROGRESS;
  4137. /* Release the lock before we do the time consuming stuff */
  4138. spin_unlock(&priv->stream_lock);
  4139. for (i = 0; i < MAX_AMPDU_ATTEMPTS; i++) {
  4140. rc = mwl8k_check_ba(hw, stream);
  4141. if (!rc)
  4142. break;
  4143. /*
  4144. * HW queues take time to be flushed, give them
  4145. * sufficient time
  4146. */
  4147. msleep(1000);
  4148. }
  4149. spin_lock(&priv->stream_lock);
  4150. if (rc) {
  4151. wiphy_err(hw->wiphy, "Stream for tid %d busy after %d"
  4152. " attempts\n", tid, MAX_AMPDU_ATTEMPTS);
  4153. mwl8k_remove_stream(hw, stream);
  4154. rc = -EBUSY;
  4155. break;
  4156. }
  4157. ieee80211_start_tx_ba_cb_irqsafe(vif, addr, tid);
  4158. break;
  4159. case IEEE80211_AMPDU_TX_STOP:
  4160. if (stream == NULL)
  4161. break;
  4162. if (stream->state == AMPDU_STREAM_ACTIVE) {
  4163. spin_unlock(&priv->stream_lock);
  4164. mwl8k_destroy_ba(hw, stream);
  4165. spin_lock(&priv->stream_lock);
  4166. }
  4167. mwl8k_remove_stream(hw, stream);
  4168. ieee80211_stop_tx_ba_cb_irqsafe(vif, addr, tid);
  4169. break;
  4170. case IEEE80211_AMPDU_TX_OPERATIONAL:
  4171. BUG_ON(stream == NULL);
  4172. BUG_ON(stream->state != AMPDU_STREAM_IN_PROGRESS);
  4173. spin_unlock(&priv->stream_lock);
  4174. rc = mwl8k_create_ba(hw, stream, buf_size);
  4175. spin_lock(&priv->stream_lock);
  4176. if (!rc)
  4177. stream->state = AMPDU_STREAM_ACTIVE;
  4178. else {
  4179. spin_unlock(&priv->stream_lock);
  4180. mwl8k_destroy_ba(hw, stream);
  4181. spin_lock(&priv->stream_lock);
  4182. wiphy_debug(hw->wiphy,
  4183. "Failed adding stream for sta %pM tid %d\n",
  4184. addr, tid);
  4185. mwl8k_remove_stream(hw, stream);
  4186. }
  4187. break;
  4188. default:
  4189. rc = -ENOTSUPP;
  4190. }
  4191. spin_unlock(&priv->stream_lock);
  4192. return rc;
  4193. }
  4194. static const struct ieee80211_ops mwl8k_ops = {
  4195. .tx = mwl8k_tx,
  4196. .start = mwl8k_start,
  4197. .stop = mwl8k_stop,
  4198. .add_interface = mwl8k_add_interface,
  4199. .remove_interface = mwl8k_remove_interface,
  4200. .config = mwl8k_config,
  4201. .bss_info_changed = mwl8k_bss_info_changed,
  4202. .prepare_multicast = mwl8k_prepare_multicast,
  4203. .configure_filter = mwl8k_configure_filter,
  4204. .set_key = mwl8k_set_key,
  4205. .set_rts_threshold = mwl8k_set_rts_threshold,
  4206. .sta_add = mwl8k_sta_add,
  4207. .sta_remove = mwl8k_sta_remove,
  4208. .conf_tx = mwl8k_conf_tx,
  4209. .get_stats = mwl8k_get_stats,
  4210. .get_survey = mwl8k_get_survey,
  4211. .ampdu_action = mwl8k_ampdu_action,
  4212. };
  4213. static void mwl8k_finalize_join_worker(struct work_struct *work)
  4214. {
  4215. struct mwl8k_priv *priv =
  4216. container_of(work, struct mwl8k_priv, finalize_join_worker);
  4217. struct sk_buff *skb = priv->beacon_skb;
  4218. struct ieee80211_mgmt *mgmt = (void *)skb->data;
  4219. int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
  4220. const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
  4221. mgmt->u.beacon.variable, len);
  4222. int dtim_period = 1;
  4223. if (tim && tim[1] >= 2)
  4224. dtim_period = tim[3];
  4225. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
  4226. dev_kfree_skb(skb);
  4227. priv->beacon_skb = NULL;
  4228. }
  4229. enum {
  4230. MWL8363 = 0,
  4231. MWL8687,
  4232. MWL8366,
  4233. };
  4234. #define MWL8K_8366_AP_FW_API 2
  4235. #define _MWL8K_8366_AP_FW(api) "mwl8k/fmimage_8366_ap-" #api ".fw"
  4236. #define MWL8K_8366_AP_FW(api) _MWL8K_8366_AP_FW(api)
  4237. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  4238. [MWL8363] = {
  4239. .part_name = "88w8363",
  4240. .helper_image = "mwl8k/helper_8363.fw",
  4241. .fw_image_sta = "mwl8k/fmimage_8363.fw",
  4242. },
  4243. [MWL8687] = {
  4244. .part_name = "88w8687",
  4245. .helper_image = "mwl8k/helper_8687.fw",
  4246. .fw_image_sta = "mwl8k/fmimage_8687.fw",
  4247. },
  4248. [MWL8366] = {
  4249. .part_name = "88w8366",
  4250. .helper_image = "mwl8k/helper_8366.fw",
  4251. .fw_image_sta = "mwl8k/fmimage_8366.fw",
  4252. .fw_image_ap = MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API),
  4253. .fw_api_ap = MWL8K_8366_AP_FW_API,
  4254. .ap_rxd_ops = &rxd_8366_ap_ops,
  4255. },
  4256. };
  4257. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  4258. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  4259. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  4260. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  4261. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  4262. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  4263. MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  4264. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  4265. { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
  4266. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  4267. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  4268. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  4269. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  4270. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  4271. { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
  4272. { },
  4273. };
  4274. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  4275. static int mwl8k_request_alt_fw(struct mwl8k_priv *priv)
  4276. {
  4277. int rc;
  4278. printk(KERN_ERR "%s: Error requesting preferred fw %s.\n"
  4279. "Trying alternative firmware %s\n", pci_name(priv->pdev),
  4280. priv->fw_pref, priv->fw_alt);
  4281. rc = mwl8k_request_fw(priv, priv->fw_alt, &priv->fw_ucode, true);
  4282. if (rc) {
  4283. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4284. pci_name(priv->pdev), priv->fw_alt);
  4285. return rc;
  4286. }
  4287. return 0;
  4288. }
  4289. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv);
  4290. static void mwl8k_fw_state_machine(const struct firmware *fw, void *context)
  4291. {
  4292. struct mwl8k_priv *priv = context;
  4293. struct mwl8k_device_info *di = priv->device_info;
  4294. int rc;
  4295. switch (priv->fw_state) {
  4296. case FW_STATE_INIT:
  4297. if (!fw) {
  4298. printk(KERN_ERR "%s: Error requesting helper fw %s\n",
  4299. pci_name(priv->pdev), di->helper_image);
  4300. goto fail;
  4301. }
  4302. priv->fw_helper = fw;
  4303. rc = mwl8k_request_fw(priv, priv->fw_pref, &priv->fw_ucode,
  4304. true);
  4305. if (rc && priv->fw_alt) {
  4306. rc = mwl8k_request_alt_fw(priv);
  4307. if (rc)
  4308. goto fail;
  4309. priv->fw_state = FW_STATE_LOADING_ALT;
  4310. } else if (rc)
  4311. goto fail;
  4312. else
  4313. priv->fw_state = FW_STATE_LOADING_PREF;
  4314. break;
  4315. case FW_STATE_LOADING_PREF:
  4316. if (!fw) {
  4317. if (priv->fw_alt) {
  4318. rc = mwl8k_request_alt_fw(priv);
  4319. if (rc)
  4320. goto fail;
  4321. priv->fw_state = FW_STATE_LOADING_ALT;
  4322. } else
  4323. goto fail;
  4324. } else {
  4325. priv->fw_ucode = fw;
  4326. rc = mwl8k_firmware_load_success(priv);
  4327. if (rc)
  4328. goto fail;
  4329. else
  4330. complete(&priv->firmware_loading_complete);
  4331. }
  4332. break;
  4333. case FW_STATE_LOADING_ALT:
  4334. if (!fw) {
  4335. printk(KERN_ERR "%s: Error requesting alt fw %s\n",
  4336. pci_name(priv->pdev), di->helper_image);
  4337. goto fail;
  4338. }
  4339. priv->fw_ucode = fw;
  4340. rc = mwl8k_firmware_load_success(priv);
  4341. if (rc)
  4342. goto fail;
  4343. else
  4344. complete(&priv->firmware_loading_complete);
  4345. break;
  4346. default:
  4347. printk(KERN_ERR "%s: Unexpected firmware loading state: %d\n",
  4348. MWL8K_NAME, priv->fw_state);
  4349. BUG_ON(1);
  4350. }
  4351. return;
  4352. fail:
  4353. priv->fw_state = FW_STATE_ERROR;
  4354. complete(&priv->firmware_loading_complete);
  4355. device_release_driver(&priv->pdev->dev);
  4356. mwl8k_release_firmware(priv);
  4357. }
  4358. static int mwl8k_init_firmware(struct ieee80211_hw *hw, char *fw_image,
  4359. bool nowait)
  4360. {
  4361. struct mwl8k_priv *priv = hw->priv;
  4362. int rc;
  4363. /* Reset firmware and hardware */
  4364. mwl8k_hw_reset(priv);
  4365. /* Ask userland hotplug daemon for the device firmware */
  4366. rc = mwl8k_request_firmware(priv, fw_image, nowait);
  4367. if (rc) {
  4368. wiphy_err(hw->wiphy, "Firmware files not found\n");
  4369. return rc;
  4370. }
  4371. if (nowait)
  4372. return rc;
  4373. /* Load firmware into hardware */
  4374. rc = mwl8k_load_firmware(hw);
  4375. if (rc)
  4376. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4377. /* Reclaim memory once firmware is successfully loaded */
  4378. mwl8k_release_firmware(priv);
  4379. return rc;
  4380. }
  4381. static int mwl8k_init_txqs(struct ieee80211_hw *hw)
  4382. {
  4383. struct mwl8k_priv *priv = hw->priv;
  4384. int rc = 0;
  4385. int i;
  4386. for (i = 0; i < mwl8k_tx_queues(priv); i++) {
  4387. rc = mwl8k_txq_init(hw, i);
  4388. if (rc)
  4389. break;
  4390. if (priv->ap_fw)
  4391. iowrite32(priv->txq[i].txd_dma,
  4392. priv->sram + priv->txq_offset[i]);
  4393. }
  4394. return rc;
  4395. }
  4396. /* initialize hw after successfully loading a firmware image */
  4397. static int mwl8k_probe_hw(struct ieee80211_hw *hw)
  4398. {
  4399. struct mwl8k_priv *priv = hw->priv;
  4400. int rc = 0;
  4401. int i;
  4402. if (priv->ap_fw) {
  4403. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  4404. if (priv->rxd_ops == NULL) {
  4405. wiphy_err(hw->wiphy,
  4406. "Driver does not have AP firmware image support for this hardware\n");
  4407. goto err_stop_firmware;
  4408. }
  4409. } else {
  4410. priv->rxd_ops = &rxd_sta_ops;
  4411. }
  4412. priv->sniffer_enabled = false;
  4413. priv->wmm_enabled = false;
  4414. priv->pending_tx_pkts = 0;
  4415. rc = mwl8k_rxq_init(hw, 0);
  4416. if (rc)
  4417. goto err_stop_firmware;
  4418. rxq_refill(hw, 0, INT_MAX);
  4419. /* For the sta firmware, we need to know the dma addresses of tx queues
  4420. * before sending MWL8K_CMD_GET_HW_SPEC. So we must initialize them
  4421. * prior to issuing this command. But for the AP case, we learn the
  4422. * total number of queues from the result CMD_GET_HW_SPEC, so for this
  4423. * case we must initialize the tx queues after.
  4424. */
  4425. priv->num_ampdu_queues = 0;
  4426. if (!priv->ap_fw) {
  4427. rc = mwl8k_init_txqs(hw);
  4428. if (rc)
  4429. goto err_free_queues;
  4430. }
  4431. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  4432. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4433. iowrite32(MWL8K_A2H_INT_TX_DONE|MWL8K_A2H_INT_RX_READY|
  4434. MWL8K_A2H_INT_BA_WATCHDOG,
  4435. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  4436. iowrite32(MWL8K_A2H_INT_OPC_DONE,
  4437. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  4438. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  4439. IRQF_SHARED, MWL8K_NAME, hw);
  4440. if (rc) {
  4441. wiphy_err(hw->wiphy, "failed to register IRQ handler\n");
  4442. goto err_free_queues;
  4443. }
  4444. memset(priv->ampdu, 0, sizeof(priv->ampdu));
  4445. /*
  4446. * Temporarily enable interrupts. Initial firmware host
  4447. * commands use interrupts and avoid polling. Disable
  4448. * interrupts when done.
  4449. */
  4450. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4451. /* Get config data, mac addrs etc */
  4452. if (priv->ap_fw) {
  4453. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  4454. if (!rc)
  4455. rc = mwl8k_init_txqs(hw);
  4456. if (!rc)
  4457. rc = mwl8k_cmd_set_hw_spec(hw);
  4458. } else {
  4459. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  4460. }
  4461. if (rc) {
  4462. wiphy_err(hw->wiphy, "Cannot initialise firmware\n");
  4463. goto err_free_irq;
  4464. }
  4465. /* Turn radio off */
  4466. rc = mwl8k_cmd_radio_disable(hw);
  4467. if (rc) {
  4468. wiphy_err(hw->wiphy, "Cannot disable\n");
  4469. goto err_free_irq;
  4470. }
  4471. /* Clear MAC address */
  4472. rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
  4473. if (rc) {
  4474. wiphy_err(hw->wiphy, "Cannot clear MAC address\n");
  4475. goto err_free_irq;
  4476. }
  4477. /* Disable interrupts */
  4478. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4479. free_irq(priv->pdev->irq, hw);
  4480. wiphy_info(hw->wiphy, "%s v%d, %pm, %s firmware %u.%u.%u.%u\n",
  4481. priv->device_info->part_name,
  4482. priv->hw_rev, hw->wiphy->perm_addr,
  4483. priv->ap_fw ? "AP" : "STA",
  4484. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  4485. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  4486. return 0;
  4487. err_free_irq:
  4488. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  4489. free_irq(priv->pdev->irq, hw);
  4490. err_free_queues:
  4491. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4492. mwl8k_txq_deinit(hw, i);
  4493. mwl8k_rxq_deinit(hw, 0);
  4494. err_stop_firmware:
  4495. mwl8k_hw_reset(priv);
  4496. return rc;
  4497. }
  4498. /*
  4499. * invoke mwl8k_reload_firmware to change the firmware image after the device
  4500. * has already been registered
  4501. */
  4502. static int mwl8k_reload_firmware(struct ieee80211_hw *hw, char *fw_image)
  4503. {
  4504. int i, rc = 0;
  4505. struct mwl8k_priv *priv = hw->priv;
  4506. mwl8k_stop(hw);
  4507. mwl8k_rxq_deinit(hw, 0);
  4508. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4509. mwl8k_txq_deinit(hw, i);
  4510. rc = mwl8k_init_firmware(hw, fw_image, false);
  4511. if (rc)
  4512. goto fail;
  4513. rc = mwl8k_probe_hw(hw);
  4514. if (rc)
  4515. goto fail;
  4516. rc = mwl8k_start(hw);
  4517. if (rc)
  4518. goto fail;
  4519. rc = mwl8k_config(hw, ~0);
  4520. if (rc)
  4521. goto fail;
  4522. for (i = 0; i < MWL8K_TX_WMM_QUEUES; i++) {
  4523. rc = mwl8k_conf_tx(hw, i, &priv->wmm_params[i]);
  4524. if (rc)
  4525. goto fail;
  4526. }
  4527. return rc;
  4528. fail:
  4529. printk(KERN_WARNING "mwl8k: Failed to reload firmware image.\n");
  4530. return rc;
  4531. }
  4532. static int mwl8k_firmware_load_success(struct mwl8k_priv *priv)
  4533. {
  4534. struct ieee80211_hw *hw = priv->hw;
  4535. int i, rc;
  4536. rc = mwl8k_load_firmware(hw);
  4537. mwl8k_release_firmware(priv);
  4538. if (rc) {
  4539. wiphy_err(hw->wiphy, "Cannot start firmware\n");
  4540. return rc;
  4541. }
  4542. /*
  4543. * Extra headroom is the size of the required DMA header
  4544. * minus the size of the smallest 802.11 frame (CTS frame).
  4545. */
  4546. hw->extra_tx_headroom =
  4547. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  4548. hw->extra_tx_headroom -= priv->ap_fw ? REDUCED_TX_HEADROOM : 0;
  4549. hw->channel_change_time = 10;
  4550. hw->queues = MWL8K_TX_WMM_QUEUES;
  4551. /* Set rssi values to dBm */
  4552. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_HAS_RATE_CONTROL;
  4553. hw->vif_data_size = sizeof(struct mwl8k_vif);
  4554. hw->sta_data_size = sizeof(struct mwl8k_sta);
  4555. priv->macids_used = 0;
  4556. INIT_LIST_HEAD(&priv->vif_list);
  4557. /* Set default radio state and preamble */
  4558. priv->radio_on = 0;
  4559. priv->radio_short_preamble = 0;
  4560. /* Finalize join worker */
  4561. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  4562. /* Handle watchdog ba events */
  4563. INIT_WORK(&priv->watchdog_ba_handle, mwl8k_watchdog_ba_events);
  4564. /* TX reclaim and RX tasklets. */
  4565. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  4566. tasklet_disable(&priv->poll_tx_task);
  4567. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  4568. tasklet_disable(&priv->poll_rx_task);
  4569. /* Power management cookie */
  4570. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  4571. if (priv->cookie == NULL)
  4572. return -ENOMEM;
  4573. mutex_init(&priv->fw_mutex);
  4574. priv->fw_mutex_owner = NULL;
  4575. priv->fw_mutex_depth = 0;
  4576. priv->hostcmd_wait = NULL;
  4577. spin_lock_init(&priv->tx_lock);
  4578. spin_lock_init(&priv->stream_lock);
  4579. priv->tx_wait = NULL;
  4580. rc = mwl8k_probe_hw(hw);
  4581. if (rc)
  4582. goto err_free_cookie;
  4583. hw->wiphy->interface_modes = 0;
  4584. if (priv->ap_macids_supported || priv->device_info->fw_image_ap)
  4585. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
  4586. if (priv->sta_macids_supported || priv->device_info->fw_image_sta)
  4587. hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
  4588. rc = ieee80211_register_hw(hw);
  4589. if (rc) {
  4590. wiphy_err(hw->wiphy, "Cannot register device\n");
  4591. goto err_unprobe_hw;
  4592. }
  4593. return 0;
  4594. err_unprobe_hw:
  4595. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4596. mwl8k_txq_deinit(hw, i);
  4597. mwl8k_rxq_deinit(hw, 0);
  4598. err_free_cookie:
  4599. if (priv->cookie != NULL)
  4600. pci_free_consistent(priv->pdev, 4,
  4601. priv->cookie, priv->cookie_dma);
  4602. return rc;
  4603. }
  4604. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  4605. const struct pci_device_id *id)
  4606. {
  4607. static int printed_version;
  4608. struct ieee80211_hw *hw;
  4609. struct mwl8k_priv *priv;
  4610. struct mwl8k_device_info *di;
  4611. int rc;
  4612. if (!printed_version) {
  4613. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  4614. printed_version = 1;
  4615. }
  4616. rc = pci_enable_device(pdev);
  4617. if (rc) {
  4618. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  4619. MWL8K_NAME);
  4620. return rc;
  4621. }
  4622. rc = pci_request_regions(pdev, MWL8K_NAME);
  4623. if (rc) {
  4624. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  4625. MWL8K_NAME);
  4626. goto err_disable_device;
  4627. }
  4628. pci_set_master(pdev);
  4629. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  4630. if (hw == NULL) {
  4631. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  4632. rc = -ENOMEM;
  4633. goto err_free_reg;
  4634. }
  4635. SET_IEEE80211_DEV(hw, &pdev->dev);
  4636. pci_set_drvdata(pdev, hw);
  4637. priv = hw->priv;
  4638. priv->hw = hw;
  4639. priv->pdev = pdev;
  4640. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  4641. priv->sram = pci_iomap(pdev, 0, 0x10000);
  4642. if (priv->sram == NULL) {
  4643. wiphy_err(hw->wiphy, "Cannot map device SRAM\n");
  4644. goto err_iounmap;
  4645. }
  4646. /*
  4647. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  4648. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  4649. */
  4650. priv->regs = pci_iomap(pdev, 1, 0x10000);
  4651. if (priv->regs == NULL) {
  4652. priv->regs = pci_iomap(pdev, 2, 0x10000);
  4653. if (priv->regs == NULL) {
  4654. wiphy_err(hw->wiphy, "Cannot map device registers\n");
  4655. goto err_iounmap;
  4656. }
  4657. }
  4658. /*
  4659. * Choose the initial fw image depending on user input. If a second
  4660. * image is available, make it the alternative image that will be
  4661. * loaded if the first one fails.
  4662. */
  4663. init_completion(&priv->firmware_loading_complete);
  4664. di = priv->device_info;
  4665. if (ap_mode_default && di->fw_image_ap) {
  4666. priv->fw_pref = di->fw_image_ap;
  4667. priv->fw_alt = di->fw_image_sta;
  4668. } else if (!ap_mode_default && di->fw_image_sta) {
  4669. priv->fw_pref = di->fw_image_sta;
  4670. priv->fw_alt = di->fw_image_ap;
  4671. } else if (ap_mode_default && !di->fw_image_ap && di->fw_image_sta) {
  4672. printk(KERN_WARNING "AP fw is unavailable. Using STA fw.");
  4673. priv->fw_pref = di->fw_image_sta;
  4674. } else if (!ap_mode_default && !di->fw_image_sta && di->fw_image_ap) {
  4675. printk(KERN_WARNING "STA fw is unavailable. Using AP fw.");
  4676. priv->fw_pref = di->fw_image_ap;
  4677. }
  4678. rc = mwl8k_init_firmware(hw, priv->fw_pref, true);
  4679. if (rc)
  4680. goto err_stop_firmware;
  4681. return rc;
  4682. err_stop_firmware:
  4683. mwl8k_hw_reset(priv);
  4684. err_iounmap:
  4685. if (priv->regs != NULL)
  4686. pci_iounmap(pdev, priv->regs);
  4687. if (priv->sram != NULL)
  4688. pci_iounmap(pdev, priv->sram);
  4689. pci_set_drvdata(pdev, NULL);
  4690. ieee80211_free_hw(hw);
  4691. err_free_reg:
  4692. pci_release_regions(pdev);
  4693. err_disable_device:
  4694. pci_disable_device(pdev);
  4695. return rc;
  4696. }
  4697. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  4698. {
  4699. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  4700. }
  4701. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  4702. {
  4703. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  4704. struct mwl8k_priv *priv;
  4705. int i;
  4706. if (hw == NULL)
  4707. return;
  4708. priv = hw->priv;
  4709. wait_for_completion(&priv->firmware_loading_complete);
  4710. if (priv->fw_state == FW_STATE_ERROR) {
  4711. mwl8k_hw_reset(priv);
  4712. goto unmap;
  4713. }
  4714. ieee80211_stop_queues(hw);
  4715. ieee80211_unregister_hw(hw);
  4716. /* Remove TX reclaim and RX tasklets. */
  4717. tasklet_kill(&priv->poll_tx_task);
  4718. tasklet_kill(&priv->poll_rx_task);
  4719. /* Stop hardware */
  4720. mwl8k_hw_reset(priv);
  4721. /* Return all skbs to mac80211 */
  4722. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4723. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  4724. for (i = 0; i < mwl8k_tx_queues(priv); i++)
  4725. mwl8k_txq_deinit(hw, i);
  4726. mwl8k_rxq_deinit(hw, 0);
  4727. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  4728. unmap:
  4729. pci_iounmap(pdev, priv->regs);
  4730. pci_iounmap(pdev, priv->sram);
  4731. pci_set_drvdata(pdev, NULL);
  4732. ieee80211_free_hw(hw);
  4733. pci_release_regions(pdev);
  4734. pci_disable_device(pdev);
  4735. }
  4736. static struct pci_driver mwl8k_driver = {
  4737. .name = MWL8K_NAME,
  4738. .id_table = mwl8k_pci_id_table,
  4739. .probe = mwl8k_probe,
  4740. .remove = __devexit_p(mwl8k_remove),
  4741. .shutdown = __devexit_p(mwl8k_shutdown),
  4742. };
  4743. static int __init mwl8k_init(void)
  4744. {
  4745. return pci_register_driver(&mwl8k_driver);
  4746. }
  4747. static void __exit mwl8k_exit(void)
  4748. {
  4749. pci_unregister_driver(&mwl8k_driver);
  4750. }
  4751. module_init(mwl8k_init);
  4752. module_exit(mwl8k_exit);
  4753. MODULE_DESCRIPTION(MWL8K_DESC);
  4754. MODULE_VERSION(MWL8K_VERSION);
  4755. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  4756. MODULE_LICENSE("GPL");