bfa_ioc.c 49 KB

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  1. /*
  2. * Linux network driver for Brocade Converged Network Adapter.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License (GPL) Version 2 as
  6. * published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. /*
  14. * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15. * All rights reserved
  16. * www.brocade.com
  17. */
  18. #include "bfa_ioc.h"
  19. #include "cna.h"
  20. #include "bfi.h"
  21. #include "bfi_ctreg.h"
  22. #include "bfa_defs.h"
  23. /**
  24. * IOC local definitions
  25. */
  26. /**
  27. * Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details.
  28. */
  29. #define bfa_ioc_firmware_lock(__ioc) \
  30. ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
  31. #define bfa_ioc_firmware_unlock(__ioc) \
  32. ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
  33. #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
  34. #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
  35. #define bfa_ioc_notify_fail(__ioc) \
  36. ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
  37. #define bfa_ioc_sync_start(__ioc) \
  38. ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
  39. #define bfa_ioc_sync_join(__ioc) \
  40. ((__ioc)->ioc_hwif->ioc_sync_join(__ioc))
  41. #define bfa_ioc_sync_leave(__ioc) \
  42. ((__ioc)->ioc_hwif->ioc_sync_leave(__ioc))
  43. #define bfa_ioc_sync_ack(__ioc) \
  44. ((__ioc)->ioc_hwif->ioc_sync_ack(__ioc))
  45. #define bfa_ioc_sync_complete(__ioc) \
  46. ((__ioc)->ioc_hwif->ioc_sync_complete(__ioc))
  47. #define bfa_ioc_mbox_cmd_pending(__ioc) \
  48. (!list_empty(&((__ioc)->mbox_mod.cmd_q)) || \
  49. readl((__ioc)->ioc_regs.hfn_mbox_cmd))
  50. static bool bfa_nw_auto_recover = true;
  51. /*
  52. * forward declarations
  53. */
  54. static void bfa_ioc_hw_sem_get(struct bfa_ioc *ioc);
  55. static void bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc);
  56. static void bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force);
  57. static void bfa_ioc_send_enable(struct bfa_ioc *ioc);
  58. static void bfa_ioc_send_disable(struct bfa_ioc *ioc);
  59. static void bfa_ioc_send_getattr(struct bfa_ioc *ioc);
  60. static void bfa_ioc_hb_monitor(struct bfa_ioc *ioc);
  61. static void bfa_ioc_hb_stop(struct bfa_ioc *ioc);
  62. static void bfa_ioc_reset(struct bfa_ioc *ioc, bool force);
  63. static void bfa_ioc_mbox_poll(struct bfa_ioc *ioc);
  64. static void bfa_ioc_mbox_hbfail(struct bfa_ioc *ioc);
  65. static void bfa_ioc_recover(struct bfa_ioc *ioc);
  66. static void bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc);
  67. static void bfa_ioc_disable_comp(struct bfa_ioc *ioc);
  68. static void bfa_ioc_lpu_stop(struct bfa_ioc *ioc);
  69. static void bfa_ioc_fail_notify(struct bfa_ioc *ioc);
  70. static void bfa_ioc_pf_enabled(struct bfa_ioc *ioc);
  71. static void bfa_ioc_pf_disabled(struct bfa_ioc *ioc);
  72. static void bfa_ioc_pf_initfailed(struct bfa_ioc *ioc);
  73. static void bfa_ioc_pf_failed(struct bfa_ioc *ioc);
  74. static void bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc);
  75. static void bfa_ioc_boot(struct bfa_ioc *ioc, u32 boot_type,
  76. u32 boot_param);
  77. static u32 bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr);
  78. static void bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc,
  79. char *serial_num);
  80. static void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc,
  81. char *fw_ver);
  82. static void bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc,
  83. char *chip_rev);
  84. static void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc,
  85. char *optrom_ver);
  86. static void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc,
  87. char *manufacturer);
  88. static void bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model);
  89. static u64 bfa_ioc_get_pwwn(struct bfa_ioc *ioc);
  90. /**
  91. * IOC state machine definitions/declarations
  92. */
  93. enum ioc_event {
  94. IOC_E_RESET = 1, /*!< IOC reset request */
  95. IOC_E_ENABLE = 2, /*!< IOC enable request */
  96. IOC_E_DISABLE = 3, /*!< IOC disable request */
  97. IOC_E_DETACH = 4, /*!< driver detach cleanup */
  98. IOC_E_ENABLED = 5, /*!< f/w enabled */
  99. IOC_E_FWRSP_GETATTR = 6, /*!< IOC get attribute response */
  100. IOC_E_DISABLED = 7, /*!< f/w disabled */
  101. IOC_E_INITFAILED = 8, /*!< failure notice by iocpf sm */
  102. IOC_E_PFAILED = 9, /*!< failure notice by iocpf sm */
  103. IOC_E_HBFAIL = 10, /*!< heartbeat failure */
  104. IOC_E_HWERROR = 11, /*!< hardware error interrupt */
  105. IOC_E_TIMEOUT = 12, /*!< timeout */
  106. };
  107. bfa_fsm_state_decl(bfa_ioc, uninit, struct bfa_ioc, enum ioc_event);
  108. bfa_fsm_state_decl(bfa_ioc, reset, struct bfa_ioc, enum ioc_event);
  109. bfa_fsm_state_decl(bfa_ioc, enabling, struct bfa_ioc, enum ioc_event);
  110. bfa_fsm_state_decl(bfa_ioc, getattr, struct bfa_ioc, enum ioc_event);
  111. bfa_fsm_state_decl(bfa_ioc, op, struct bfa_ioc, enum ioc_event);
  112. bfa_fsm_state_decl(bfa_ioc, fail_retry, struct bfa_ioc, enum ioc_event);
  113. bfa_fsm_state_decl(bfa_ioc, fail, struct bfa_ioc, enum ioc_event);
  114. bfa_fsm_state_decl(bfa_ioc, disabling, struct bfa_ioc, enum ioc_event);
  115. bfa_fsm_state_decl(bfa_ioc, disabled, struct bfa_ioc, enum ioc_event);
  116. static struct bfa_sm_table ioc_sm_table[] = {
  117. {BFA_SM(bfa_ioc_sm_uninit), BFA_IOC_UNINIT},
  118. {BFA_SM(bfa_ioc_sm_reset), BFA_IOC_RESET},
  119. {BFA_SM(bfa_ioc_sm_enabling), BFA_IOC_ENABLING},
  120. {BFA_SM(bfa_ioc_sm_getattr), BFA_IOC_GETATTR},
  121. {BFA_SM(bfa_ioc_sm_op), BFA_IOC_OPERATIONAL},
  122. {BFA_SM(bfa_ioc_sm_fail_retry), BFA_IOC_INITFAIL},
  123. {BFA_SM(bfa_ioc_sm_fail), BFA_IOC_FAIL},
  124. {BFA_SM(bfa_ioc_sm_disabling), BFA_IOC_DISABLING},
  125. {BFA_SM(bfa_ioc_sm_disabled), BFA_IOC_DISABLED},
  126. };
  127. /**
  128. * IOCPF state machine definitions/declarations
  129. */
  130. /*
  131. * Forward declareations for iocpf state machine
  132. */
  133. static void bfa_iocpf_enable(struct bfa_ioc *ioc);
  134. static void bfa_iocpf_disable(struct bfa_ioc *ioc);
  135. static void bfa_iocpf_fail(struct bfa_ioc *ioc);
  136. static void bfa_iocpf_initfail(struct bfa_ioc *ioc);
  137. static void bfa_iocpf_getattrfail(struct bfa_ioc *ioc);
  138. static void bfa_iocpf_stop(struct bfa_ioc *ioc);
  139. /**
  140. * IOCPF state machine events
  141. */
  142. enum iocpf_event {
  143. IOCPF_E_ENABLE = 1, /*!< IOCPF enable request */
  144. IOCPF_E_DISABLE = 2, /*!< IOCPF disable request */
  145. IOCPF_E_STOP = 3, /*!< stop on driver detach */
  146. IOCPF_E_FWREADY = 4, /*!< f/w initialization done */
  147. IOCPF_E_FWRSP_ENABLE = 5, /*!< enable f/w response */
  148. IOCPF_E_FWRSP_DISABLE = 6, /*!< disable f/w response */
  149. IOCPF_E_FAIL = 7, /*!< failure notice by ioc sm */
  150. IOCPF_E_INITFAIL = 8, /*!< init fail notice by ioc sm */
  151. IOCPF_E_GETATTRFAIL = 9, /*!< init fail notice by ioc sm */
  152. IOCPF_E_SEMLOCKED = 10, /*!< h/w semaphore is locked */
  153. IOCPF_E_TIMEOUT = 11, /*!< f/w response timeout */
  154. };
  155. /**
  156. * IOCPF states
  157. */
  158. enum bfa_iocpf_state {
  159. BFA_IOCPF_RESET = 1, /*!< IOC is in reset state */
  160. BFA_IOCPF_SEMWAIT = 2, /*!< Waiting for IOC h/w semaphore */
  161. BFA_IOCPF_HWINIT = 3, /*!< IOC h/w is being initialized */
  162. BFA_IOCPF_READY = 4, /*!< IOCPF is initialized */
  163. BFA_IOCPF_INITFAIL = 5, /*!< IOCPF failed */
  164. BFA_IOCPF_FAIL = 6, /*!< IOCPF failed */
  165. BFA_IOCPF_DISABLING = 7, /*!< IOCPF is being disabled */
  166. BFA_IOCPF_DISABLED = 8, /*!< IOCPF is disabled */
  167. BFA_IOCPF_FWMISMATCH = 9, /*!< IOC f/w different from drivers */
  168. };
  169. bfa_fsm_state_decl(bfa_iocpf, reset, struct bfa_iocpf, enum iocpf_event);
  170. bfa_fsm_state_decl(bfa_iocpf, fwcheck, struct bfa_iocpf, enum iocpf_event);
  171. bfa_fsm_state_decl(bfa_iocpf, mismatch, struct bfa_iocpf, enum iocpf_event);
  172. bfa_fsm_state_decl(bfa_iocpf, semwait, struct bfa_iocpf, enum iocpf_event);
  173. bfa_fsm_state_decl(bfa_iocpf, hwinit, struct bfa_iocpf, enum iocpf_event);
  174. bfa_fsm_state_decl(bfa_iocpf, enabling, struct bfa_iocpf, enum iocpf_event);
  175. bfa_fsm_state_decl(bfa_iocpf, ready, struct bfa_iocpf, enum iocpf_event);
  176. bfa_fsm_state_decl(bfa_iocpf, initfail_sync, struct bfa_iocpf,
  177. enum iocpf_event);
  178. bfa_fsm_state_decl(bfa_iocpf, initfail, struct bfa_iocpf, enum iocpf_event);
  179. bfa_fsm_state_decl(bfa_iocpf, fail_sync, struct bfa_iocpf, enum iocpf_event);
  180. bfa_fsm_state_decl(bfa_iocpf, fail, struct bfa_iocpf, enum iocpf_event);
  181. bfa_fsm_state_decl(bfa_iocpf, disabling, struct bfa_iocpf, enum iocpf_event);
  182. bfa_fsm_state_decl(bfa_iocpf, disabling_sync, struct bfa_iocpf,
  183. enum iocpf_event);
  184. bfa_fsm_state_decl(bfa_iocpf, disabled, struct bfa_iocpf, enum iocpf_event);
  185. static struct bfa_sm_table iocpf_sm_table[] = {
  186. {BFA_SM(bfa_iocpf_sm_reset), BFA_IOCPF_RESET},
  187. {BFA_SM(bfa_iocpf_sm_fwcheck), BFA_IOCPF_FWMISMATCH},
  188. {BFA_SM(bfa_iocpf_sm_mismatch), BFA_IOCPF_FWMISMATCH},
  189. {BFA_SM(bfa_iocpf_sm_semwait), BFA_IOCPF_SEMWAIT},
  190. {BFA_SM(bfa_iocpf_sm_hwinit), BFA_IOCPF_HWINIT},
  191. {BFA_SM(bfa_iocpf_sm_enabling), BFA_IOCPF_HWINIT},
  192. {BFA_SM(bfa_iocpf_sm_ready), BFA_IOCPF_READY},
  193. {BFA_SM(bfa_iocpf_sm_initfail_sync), BFA_IOCPF_INITFAIL},
  194. {BFA_SM(bfa_iocpf_sm_initfail), BFA_IOCPF_INITFAIL},
  195. {BFA_SM(bfa_iocpf_sm_fail_sync), BFA_IOCPF_FAIL},
  196. {BFA_SM(bfa_iocpf_sm_fail), BFA_IOCPF_FAIL},
  197. {BFA_SM(bfa_iocpf_sm_disabling), BFA_IOCPF_DISABLING},
  198. {BFA_SM(bfa_iocpf_sm_disabling_sync), BFA_IOCPF_DISABLING},
  199. {BFA_SM(bfa_iocpf_sm_disabled), BFA_IOCPF_DISABLED},
  200. };
  201. /**
  202. * IOC State Machine
  203. */
  204. /**
  205. * Beginning state. IOC uninit state.
  206. */
  207. static void
  208. bfa_ioc_sm_uninit_entry(struct bfa_ioc *ioc)
  209. {
  210. }
  211. /**
  212. * IOC is in uninit state.
  213. */
  214. static void
  215. bfa_ioc_sm_uninit(struct bfa_ioc *ioc, enum ioc_event event)
  216. {
  217. switch (event) {
  218. case IOC_E_RESET:
  219. bfa_fsm_set_state(ioc, bfa_ioc_sm_reset);
  220. break;
  221. default:
  222. bfa_sm_fault(ioc, event);
  223. }
  224. }
  225. /**
  226. * Reset entry actions -- initialize state machine
  227. */
  228. static void
  229. bfa_ioc_sm_reset_entry(struct bfa_ioc *ioc)
  230. {
  231. bfa_fsm_set_state(&ioc->iocpf, bfa_iocpf_sm_reset);
  232. }
  233. /**
  234. * IOC is in reset state.
  235. */
  236. static void
  237. bfa_ioc_sm_reset(struct bfa_ioc *ioc, enum ioc_event event)
  238. {
  239. switch (event) {
  240. case IOC_E_ENABLE:
  241. bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
  242. break;
  243. case IOC_E_DISABLE:
  244. bfa_ioc_disable_comp(ioc);
  245. break;
  246. case IOC_E_DETACH:
  247. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  248. break;
  249. default:
  250. bfa_sm_fault(ioc, event);
  251. }
  252. }
  253. static void
  254. bfa_ioc_sm_enabling_entry(struct bfa_ioc *ioc)
  255. {
  256. bfa_iocpf_enable(ioc);
  257. }
  258. /**
  259. * Host IOC function is being enabled, awaiting response from firmware.
  260. * Semaphore is acquired.
  261. */
  262. static void
  263. bfa_ioc_sm_enabling(struct bfa_ioc *ioc, enum ioc_event event)
  264. {
  265. switch (event) {
  266. case IOC_E_ENABLED:
  267. bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
  268. break;
  269. case IOC_E_PFAILED:
  270. /* !!! fall through !!! */
  271. case IOC_E_HWERROR:
  272. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  273. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
  274. if (event != IOC_E_PFAILED)
  275. bfa_iocpf_initfail(ioc);
  276. break;
  277. case IOC_E_DISABLE:
  278. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  279. break;
  280. case IOC_E_DETACH:
  281. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  282. bfa_iocpf_stop(ioc);
  283. break;
  284. case IOC_E_ENABLE:
  285. break;
  286. default:
  287. bfa_sm_fault(ioc, event);
  288. }
  289. }
  290. /**
  291. * Semaphore should be acquired for version check.
  292. */
  293. static void
  294. bfa_ioc_sm_getattr_entry(struct bfa_ioc *ioc)
  295. {
  296. mod_timer(&ioc->ioc_timer, jiffies +
  297. msecs_to_jiffies(BFA_IOC_TOV));
  298. bfa_ioc_send_getattr(ioc);
  299. }
  300. /**
  301. * IOC configuration in progress. Timer is active.
  302. */
  303. static void
  304. bfa_ioc_sm_getattr(struct bfa_ioc *ioc, enum ioc_event event)
  305. {
  306. switch (event) {
  307. case IOC_E_FWRSP_GETATTR:
  308. del_timer(&ioc->ioc_timer);
  309. bfa_ioc_check_attr_wwns(ioc);
  310. bfa_fsm_set_state(ioc, bfa_ioc_sm_op);
  311. break;
  312. case IOC_E_PFAILED:
  313. case IOC_E_HWERROR:
  314. del_timer(&ioc->ioc_timer);
  315. /* fall through */
  316. case IOC_E_TIMEOUT:
  317. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  318. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
  319. if (event != IOC_E_PFAILED)
  320. bfa_iocpf_getattrfail(ioc);
  321. break;
  322. case IOC_E_DISABLE:
  323. del_timer(&ioc->ioc_timer);
  324. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  325. break;
  326. case IOC_E_ENABLE:
  327. break;
  328. default:
  329. bfa_sm_fault(ioc, event);
  330. }
  331. }
  332. static void
  333. bfa_ioc_sm_op_entry(struct bfa_ioc *ioc)
  334. {
  335. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_OK);
  336. bfa_ioc_hb_monitor(ioc);
  337. }
  338. static void
  339. bfa_ioc_sm_op(struct bfa_ioc *ioc, enum ioc_event event)
  340. {
  341. switch (event) {
  342. case IOC_E_ENABLE:
  343. break;
  344. case IOC_E_DISABLE:
  345. bfa_ioc_hb_stop(ioc);
  346. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  347. break;
  348. case IOC_E_PFAILED:
  349. case IOC_E_HWERROR:
  350. bfa_ioc_hb_stop(ioc);
  351. /* !!! fall through !!! */
  352. case IOC_E_HBFAIL:
  353. bfa_ioc_fail_notify(ioc);
  354. if (ioc->iocpf.auto_recover)
  355. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail_retry);
  356. else
  357. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
  358. if (event != IOC_E_PFAILED)
  359. bfa_iocpf_fail(ioc);
  360. break;
  361. default:
  362. bfa_sm_fault(ioc, event);
  363. }
  364. }
  365. static void
  366. bfa_ioc_sm_disabling_entry(struct bfa_ioc *ioc)
  367. {
  368. bfa_iocpf_disable(ioc);
  369. }
  370. /**
  371. * IOC is being desabled
  372. */
  373. static void
  374. bfa_ioc_sm_disabling(struct bfa_ioc *ioc, enum ioc_event event)
  375. {
  376. switch (event) {
  377. case IOC_E_DISABLED:
  378. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabled);
  379. break;
  380. case IOC_E_HWERROR:
  381. /*
  382. * No state change. Will move to disabled state
  383. * after iocpf sm completes failure processing and
  384. * moves to disabled state.
  385. */
  386. bfa_iocpf_fail(ioc);
  387. break;
  388. default:
  389. bfa_sm_fault(ioc, event);
  390. }
  391. }
  392. /**
  393. * IOC desable completion entry.
  394. */
  395. static void
  396. bfa_ioc_sm_disabled_entry(struct bfa_ioc *ioc)
  397. {
  398. bfa_ioc_disable_comp(ioc);
  399. }
  400. static void
  401. bfa_ioc_sm_disabled(struct bfa_ioc *ioc, enum ioc_event event)
  402. {
  403. switch (event) {
  404. case IOC_E_ENABLE:
  405. bfa_fsm_set_state(ioc, bfa_ioc_sm_enabling);
  406. break;
  407. case IOC_E_DISABLE:
  408. ioc->cbfn->disable_cbfn(ioc->bfa);
  409. break;
  410. case IOC_E_DETACH:
  411. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  412. bfa_iocpf_stop(ioc);
  413. break;
  414. default:
  415. bfa_sm_fault(ioc, event);
  416. }
  417. }
  418. static void
  419. bfa_ioc_sm_fail_retry_entry(struct bfa_ioc *ioc)
  420. {
  421. }
  422. /**
  423. * Hardware initialization retry.
  424. */
  425. static void
  426. bfa_ioc_sm_fail_retry(struct bfa_ioc *ioc, enum ioc_event event)
  427. {
  428. switch (event) {
  429. case IOC_E_ENABLED:
  430. bfa_fsm_set_state(ioc, bfa_ioc_sm_getattr);
  431. break;
  432. case IOC_E_PFAILED:
  433. case IOC_E_HWERROR:
  434. /**
  435. * Initialization retry failed.
  436. */
  437. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  438. if (event != IOC_E_PFAILED)
  439. bfa_iocpf_initfail(ioc);
  440. break;
  441. case IOC_E_INITFAILED:
  442. bfa_fsm_set_state(ioc, bfa_ioc_sm_fail);
  443. break;
  444. case IOC_E_ENABLE:
  445. break;
  446. case IOC_E_DISABLE:
  447. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  448. break;
  449. case IOC_E_DETACH:
  450. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  451. bfa_iocpf_stop(ioc);
  452. break;
  453. default:
  454. bfa_sm_fault(ioc, event);
  455. }
  456. }
  457. static void
  458. bfa_ioc_sm_fail_entry(struct bfa_ioc *ioc)
  459. {
  460. }
  461. /**
  462. * IOC failure.
  463. */
  464. static void
  465. bfa_ioc_sm_fail(struct bfa_ioc *ioc, enum ioc_event event)
  466. {
  467. switch (event) {
  468. case IOC_E_ENABLE:
  469. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  470. break;
  471. case IOC_E_DISABLE:
  472. bfa_fsm_set_state(ioc, bfa_ioc_sm_disabling);
  473. break;
  474. case IOC_E_DETACH:
  475. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  476. bfa_iocpf_stop(ioc);
  477. break;
  478. case IOC_E_HWERROR:
  479. /* HB failure notification, ignore. */
  480. break;
  481. default:
  482. bfa_sm_fault(ioc, event);
  483. }
  484. }
  485. /**
  486. * IOCPF State Machine
  487. */
  488. /**
  489. * Reset entry actions -- initialize state machine
  490. */
  491. static void
  492. bfa_iocpf_sm_reset_entry(struct bfa_iocpf *iocpf)
  493. {
  494. iocpf->retry_count = 0;
  495. iocpf->auto_recover = bfa_nw_auto_recover;
  496. }
  497. /**
  498. * Beginning state. IOC is in reset state.
  499. */
  500. static void
  501. bfa_iocpf_sm_reset(struct bfa_iocpf *iocpf, enum iocpf_event event)
  502. {
  503. switch (event) {
  504. case IOCPF_E_ENABLE:
  505. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
  506. break;
  507. case IOCPF_E_STOP:
  508. break;
  509. default:
  510. bfa_sm_fault(iocpf->ioc, event);
  511. }
  512. }
  513. /**
  514. * Semaphore should be acquired for version check.
  515. */
  516. static void
  517. bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf *iocpf)
  518. {
  519. bfa_ioc_hw_sem_get(iocpf->ioc);
  520. }
  521. /**
  522. * Awaiting h/w semaphore to continue with version check.
  523. */
  524. static void
  525. bfa_iocpf_sm_fwcheck(struct bfa_iocpf *iocpf, enum iocpf_event event)
  526. {
  527. struct bfa_ioc *ioc = iocpf->ioc;
  528. switch (event) {
  529. case IOCPF_E_SEMLOCKED:
  530. if (bfa_ioc_firmware_lock(ioc)) {
  531. if (bfa_ioc_sync_start(ioc)) {
  532. iocpf->retry_count = 0;
  533. bfa_ioc_sync_join(ioc);
  534. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  535. } else {
  536. bfa_ioc_firmware_unlock(ioc);
  537. bfa_nw_ioc_hw_sem_release(ioc);
  538. mod_timer(&ioc->sem_timer, jiffies +
  539. msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
  540. }
  541. } else {
  542. bfa_nw_ioc_hw_sem_release(ioc);
  543. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_mismatch);
  544. }
  545. break;
  546. case IOCPF_E_DISABLE:
  547. bfa_ioc_hw_sem_get_cancel(ioc);
  548. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  549. bfa_ioc_pf_disabled(ioc);
  550. break;
  551. case IOCPF_E_STOP:
  552. bfa_ioc_hw_sem_get_cancel(ioc);
  553. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  554. break;
  555. default:
  556. bfa_sm_fault(ioc, event);
  557. }
  558. }
  559. /**
  560. * Notify enable completion callback
  561. */
  562. static void
  563. bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
  564. {
  565. /* Call only the first time sm enters fwmismatch state. */
  566. if (iocpf->retry_count == 0)
  567. bfa_ioc_pf_fwmismatch(iocpf->ioc);
  568. iocpf->retry_count++;
  569. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  570. msecs_to_jiffies(BFA_IOC_TOV));
  571. }
  572. /**
  573. * Awaiting firmware version match.
  574. */
  575. static void
  576. bfa_iocpf_sm_mismatch(struct bfa_iocpf *iocpf, enum iocpf_event event)
  577. {
  578. struct bfa_ioc *ioc = iocpf->ioc;
  579. switch (event) {
  580. case IOCPF_E_TIMEOUT:
  581. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fwcheck);
  582. break;
  583. case IOCPF_E_DISABLE:
  584. del_timer(&ioc->iocpf_timer);
  585. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  586. bfa_ioc_pf_disabled(ioc);
  587. break;
  588. case IOCPF_E_STOP:
  589. del_timer(&ioc->iocpf_timer);
  590. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  591. break;
  592. default:
  593. bfa_sm_fault(ioc, event);
  594. }
  595. }
  596. /**
  597. * Request for semaphore.
  598. */
  599. static void
  600. bfa_iocpf_sm_semwait_entry(struct bfa_iocpf *iocpf)
  601. {
  602. bfa_ioc_hw_sem_get(iocpf->ioc);
  603. }
  604. /**
  605. * Awaiting semaphore for h/w initialzation.
  606. */
  607. static void
  608. bfa_iocpf_sm_semwait(struct bfa_iocpf *iocpf, enum iocpf_event event)
  609. {
  610. struct bfa_ioc *ioc = iocpf->ioc;
  611. switch (event) {
  612. case IOCPF_E_SEMLOCKED:
  613. if (bfa_ioc_sync_complete(ioc)) {
  614. bfa_ioc_sync_join(ioc);
  615. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  616. } else {
  617. bfa_nw_ioc_hw_sem_release(ioc);
  618. mod_timer(&ioc->sem_timer, jiffies +
  619. msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
  620. }
  621. break;
  622. case IOCPF_E_DISABLE:
  623. bfa_ioc_hw_sem_get_cancel(ioc);
  624. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  625. break;
  626. default:
  627. bfa_sm_fault(ioc, event);
  628. }
  629. }
  630. static void
  631. bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf *iocpf)
  632. {
  633. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  634. msecs_to_jiffies(BFA_IOC_TOV));
  635. bfa_ioc_reset(iocpf->ioc, 0);
  636. }
  637. /**
  638. * Hardware is being initialized. Interrupts are enabled.
  639. * Holding hardware semaphore lock.
  640. */
  641. static void
  642. bfa_iocpf_sm_hwinit(struct bfa_iocpf *iocpf, enum iocpf_event event)
  643. {
  644. struct bfa_ioc *ioc = iocpf->ioc;
  645. switch (event) {
  646. case IOCPF_E_FWREADY:
  647. del_timer(&ioc->iocpf_timer);
  648. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_enabling);
  649. break;
  650. case IOCPF_E_INITFAIL:
  651. del_timer(&ioc->iocpf_timer);
  652. /*
  653. * !!! fall through !!!
  654. */
  655. case IOCPF_E_TIMEOUT:
  656. bfa_nw_ioc_hw_sem_release(ioc);
  657. if (event == IOCPF_E_TIMEOUT)
  658. bfa_ioc_pf_failed(ioc);
  659. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  660. break;
  661. case IOCPF_E_DISABLE:
  662. del_timer(&ioc->iocpf_timer);
  663. bfa_ioc_sync_leave(ioc);
  664. bfa_nw_ioc_hw_sem_release(ioc);
  665. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  666. break;
  667. default:
  668. bfa_sm_fault(ioc, event);
  669. }
  670. }
  671. static void
  672. bfa_iocpf_sm_enabling_entry(struct bfa_iocpf *iocpf)
  673. {
  674. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  675. msecs_to_jiffies(BFA_IOC_TOV));
  676. bfa_ioc_send_enable(iocpf->ioc);
  677. }
  678. /**
  679. * Host IOC function is being enabled, awaiting response from firmware.
  680. * Semaphore is acquired.
  681. */
  682. static void
  683. bfa_iocpf_sm_enabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
  684. {
  685. struct bfa_ioc *ioc = iocpf->ioc;
  686. switch (event) {
  687. case IOCPF_E_FWRSP_ENABLE:
  688. del_timer(&ioc->iocpf_timer);
  689. bfa_nw_ioc_hw_sem_release(ioc);
  690. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_ready);
  691. break;
  692. case IOCPF_E_INITFAIL:
  693. del_timer(&ioc->iocpf_timer);
  694. /*
  695. * !!! fall through !!!
  696. */
  697. case IOCPF_E_TIMEOUT:
  698. bfa_nw_ioc_hw_sem_release(ioc);
  699. if (event == IOCPF_E_TIMEOUT)
  700. bfa_ioc_pf_failed(ioc);
  701. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  702. break;
  703. case IOCPF_E_DISABLE:
  704. del_timer(&ioc->iocpf_timer);
  705. bfa_nw_ioc_hw_sem_release(ioc);
  706. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
  707. break;
  708. case IOCPF_E_FWREADY:
  709. bfa_ioc_send_enable(ioc);
  710. break;
  711. default:
  712. bfa_sm_fault(ioc, event);
  713. }
  714. }
  715. static bool
  716. bfa_nw_ioc_is_operational(struct bfa_ioc *ioc)
  717. {
  718. return bfa_fsm_cmp_state(ioc, bfa_ioc_sm_op);
  719. }
  720. static void
  721. bfa_iocpf_sm_ready_entry(struct bfa_iocpf *iocpf)
  722. {
  723. bfa_ioc_pf_enabled(iocpf->ioc);
  724. }
  725. static void
  726. bfa_iocpf_sm_ready(struct bfa_iocpf *iocpf, enum iocpf_event event)
  727. {
  728. struct bfa_ioc *ioc = iocpf->ioc;
  729. switch (event) {
  730. case IOCPF_E_DISABLE:
  731. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling);
  732. break;
  733. case IOCPF_E_GETATTRFAIL:
  734. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  735. break;
  736. case IOCPF_E_FAIL:
  737. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
  738. break;
  739. case IOCPF_E_FWREADY:
  740. bfa_ioc_pf_failed(ioc);
  741. if (bfa_nw_ioc_is_operational(ioc))
  742. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail_sync);
  743. else
  744. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail_sync);
  745. break;
  746. default:
  747. bfa_sm_fault(ioc, event);
  748. }
  749. }
  750. static void
  751. bfa_iocpf_sm_disabling_entry(struct bfa_iocpf *iocpf)
  752. {
  753. mod_timer(&(iocpf->ioc)->iocpf_timer, jiffies +
  754. msecs_to_jiffies(BFA_IOC_TOV));
  755. bfa_ioc_send_disable(iocpf->ioc);
  756. }
  757. /**
  758. * IOC is being disabled
  759. */
  760. static void
  761. bfa_iocpf_sm_disabling(struct bfa_iocpf *iocpf, enum iocpf_event event)
  762. {
  763. struct bfa_ioc *ioc = iocpf->ioc;
  764. switch (event) {
  765. case IOCPF_E_FWRSP_DISABLE:
  766. case IOCPF_E_FWREADY:
  767. del_timer(&ioc->iocpf_timer);
  768. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  769. break;
  770. case IOCPF_E_FAIL:
  771. del_timer(&ioc->iocpf_timer);
  772. /*
  773. * !!! fall through !!!
  774. */
  775. case IOCPF_E_TIMEOUT:
  776. writel(BFI_IOC_FAIL, ioc->ioc_regs.ioc_fwstate);
  777. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  778. break;
  779. case IOCPF_E_FWRSP_ENABLE:
  780. break;
  781. default:
  782. bfa_sm_fault(ioc, event);
  783. }
  784. }
  785. static void
  786. bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf *iocpf)
  787. {
  788. bfa_ioc_hw_sem_get(iocpf->ioc);
  789. }
  790. /**
  791. * IOC hb ack request is being removed.
  792. */
  793. static void
  794. bfa_iocpf_sm_disabling_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
  795. {
  796. struct bfa_ioc *ioc = iocpf->ioc;
  797. switch (event) {
  798. case IOCPF_E_SEMLOCKED:
  799. bfa_ioc_sync_leave(ioc);
  800. bfa_nw_ioc_hw_sem_release(ioc);
  801. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  802. break;
  803. case IOCPF_E_FAIL:
  804. break;
  805. default:
  806. bfa_sm_fault(ioc, event);
  807. }
  808. }
  809. /**
  810. * IOC disable completion entry.
  811. */
  812. static void
  813. bfa_iocpf_sm_disabled_entry(struct bfa_iocpf *iocpf)
  814. {
  815. bfa_ioc_pf_disabled(iocpf->ioc);
  816. }
  817. static void
  818. bfa_iocpf_sm_disabled(struct bfa_iocpf *iocpf, enum iocpf_event event)
  819. {
  820. struct bfa_ioc *ioc = iocpf->ioc;
  821. switch (event) {
  822. case IOCPF_E_ENABLE:
  823. iocpf->retry_count = 0;
  824. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
  825. break;
  826. case IOCPF_E_STOP:
  827. bfa_ioc_firmware_unlock(ioc);
  828. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  829. break;
  830. default:
  831. bfa_sm_fault(ioc, event);
  832. }
  833. }
  834. static void
  835. bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf *iocpf)
  836. {
  837. bfa_ioc_hw_sem_get(iocpf->ioc);
  838. }
  839. /**
  840. * Hardware initialization failed.
  841. */
  842. static void
  843. bfa_iocpf_sm_initfail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
  844. {
  845. struct bfa_ioc *ioc = iocpf->ioc;
  846. switch (event) {
  847. case IOCPF_E_SEMLOCKED:
  848. bfa_ioc_notify_fail(ioc);
  849. bfa_ioc_sync_ack(ioc);
  850. iocpf->retry_count++;
  851. if (iocpf->retry_count >= BFA_IOC_HWINIT_MAX) {
  852. bfa_ioc_sync_leave(ioc);
  853. bfa_nw_ioc_hw_sem_release(ioc);
  854. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_initfail);
  855. } else {
  856. if (bfa_ioc_sync_complete(ioc))
  857. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  858. else {
  859. bfa_nw_ioc_hw_sem_release(ioc);
  860. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
  861. }
  862. }
  863. break;
  864. case IOCPF_E_DISABLE:
  865. bfa_ioc_hw_sem_get_cancel(ioc);
  866. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  867. break;
  868. case IOCPF_E_STOP:
  869. bfa_ioc_hw_sem_get_cancel(ioc);
  870. bfa_ioc_firmware_unlock(ioc);
  871. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  872. break;
  873. case IOCPF_E_FAIL:
  874. break;
  875. default:
  876. bfa_sm_fault(ioc, event);
  877. }
  878. }
  879. static void
  880. bfa_iocpf_sm_initfail_entry(struct bfa_iocpf *iocpf)
  881. {
  882. bfa_ioc_pf_initfailed(iocpf->ioc);
  883. }
  884. /**
  885. * Hardware initialization failed.
  886. */
  887. static void
  888. bfa_iocpf_sm_initfail(struct bfa_iocpf *iocpf, enum iocpf_event event)
  889. {
  890. struct bfa_ioc *ioc = iocpf->ioc;
  891. switch (event) {
  892. case IOCPF_E_DISABLE:
  893. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  894. break;
  895. case IOCPF_E_STOP:
  896. bfa_ioc_firmware_unlock(ioc);
  897. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_reset);
  898. break;
  899. default:
  900. bfa_sm_fault(ioc, event);
  901. }
  902. }
  903. static void
  904. bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf *iocpf)
  905. {
  906. /**
  907. * Mark IOC as failed in hardware and stop firmware.
  908. */
  909. bfa_ioc_lpu_stop(iocpf->ioc);
  910. /**
  911. * Flush any queued up mailbox requests.
  912. */
  913. bfa_ioc_mbox_hbfail(iocpf->ioc);
  914. bfa_ioc_hw_sem_get(iocpf->ioc);
  915. }
  916. /**
  917. * IOC is in failed state.
  918. */
  919. static void
  920. bfa_iocpf_sm_fail_sync(struct bfa_iocpf *iocpf, enum iocpf_event event)
  921. {
  922. struct bfa_ioc *ioc = iocpf->ioc;
  923. switch (event) {
  924. case IOCPF_E_SEMLOCKED:
  925. iocpf->retry_count = 0;
  926. bfa_ioc_sync_ack(ioc);
  927. bfa_ioc_notify_fail(ioc);
  928. if (!iocpf->auto_recover) {
  929. bfa_ioc_sync_leave(ioc);
  930. bfa_nw_ioc_hw_sem_release(ioc);
  931. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_fail);
  932. } else {
  933. if (bfa_ioc_sync_complete(ioc))
  934. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_hwinit);
  935. else {
  936. bfa_nw_ioc_hw_sem_release(ioc);
  937. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_semwait);
  938. }
  939. }
  940. break;
  941. case IOCPF_E_DISABLE:
  942. bfa_ioc_hw_sem_get_cancel(ioc);
  943. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabling_sync);
  944. break;
  945. case IOCPF_E_FAIL:
  946. break;
  947. default:
  948. bfa_sm_fault(ioc, event);
  949. }
  950. }
  951. static void
  952. bfa_iocpf_sm_fail_entry(struct bfa_iocpf *iocpf)
  953. {
  954. }
  955. /**
  956. * @brief
  957. * IOC is in failed state.
  958. */
  959. static void
  960. bfa_iocpf_sm_fail(struct bfa_iocpf *iocpf, enum iocpf_event event)
  961. {
  962. switch (event) {
  963. case IOCPF_E_DISABLE:
  964. bfa_fsm_set_state(iocpf, bfa_iocpf_sm_disabled);
  965. break;
  966. default:
  967. bfa_sm_fault(iocpf->ioc, event);
  968. }
  969. }
  970. /**
  971. * BFA IOC private functions
  972. */
  973. static void
  974. bfa_ioc_disable_comp(struct bfa_ioc *ioc)
  975. {
  976. struct list_head *qe;
  977. struct bfa_ioc_hbfail_notify *notify;
  978. ioc->cbfn->disable_cbfn(ioc->bfa);
  979. /**
  980. * Notify common modules registered for notification.
  981. */
  982. list_for_each(qe, &ioc->hb_notify_q) {
  983. notify = (struct bfa_ioc_hbfail_notify *) qe;
  984. notify->cbfn(notify->cbarg);
  985. }
  986. }
  987. bool
  988. bfa_nw_ioc_sem_get(void __iomem *sem_reg)
  989. {
  990. u32 r32;
  991. int cnt = 0;
  992. #define BFA_SEM_SPINCNT 3000
  993. r32 = readl(sem_reg);
  994. while (r32 && (cnt < BFA_SEM_SPINCNT)) {
  995. cnt++;
  996. udelay(2);
  997. r32 = readl(sem_reg);
  998. }
  999. if (r32 == 0)
  1000. return true;
  1001. BUG_ON(!(cnt < BFA_SEM_SPINCNT));
  1002. return false;
  1003. }
  1004. void
  1005. bfa_nw_ioc_sem_release(void __iomem *sem_reg)
  1006. {
  1007. writel(1, sem_reg);
  1008. }
  1009. static void
  1010. bfa_ioc_hw_sem_get(struct bfa_ioc *ioc)
  1011. {
  1012. u32 r32;
  1013. /**
  1014. * First read to the semaphore register will return 0, subsequent reads
  1015. * will return 1. Semaphore is released by writing 1 to the register
  1016. */
  1017. r32 = readl(ioc->ioc_regs.ioc_sem_reg);
  1018. if (r32 == 0) {
  1019. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_SEMLOCKED);
  1020. return;
  1021. }
  1022. mod_timer(&ioc->sem_timer, jiffies +
  1023. msecs_to_jiffies(BFA_IOC_HWSEM_TOV));
  1024. }
  1025. void
  1026. bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc)
  1027. {
  1028. writel(1, ioc->ioc_regs.ioc_sem_reg);
  1029. }
  1030. static void
  1031. bfa_ioc_hw_sem_get_cancel(struct bfa_ioc *ioc)
  1032. {
  1033. del_timer(&ioc->sem_timer);
  1034. }
  1035. /**
  1036. * @brief
  1037. * Initialize LPU local memory (aka secondary memory / SRAM)
  1038. */
  1039. static void
  1040. bfa_ioc_lmem_init(struct bfa_ioc *ioc)
  1041. {
  1042. u32 pss_ctl;
  1043. int i;
  1044. #define PSS_LMEM_INIT_TIME 10000
  1045. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1046. pss_ctl &= ~__PSS_LMEM_RESET;
  1047. pss_ctl |= __PSS_LMEM_INIT_EN;
  1048. /*
  1049. * i2c workaround 12.5khz clock
  1050. */
  1051. pss_ctl |= __PSS_I2C_CLK_DIV(3UL);
  1052. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1053. /**
  1054. * wait for memory initialization to be complete
  1055. */
  1056. i = 0;
  1057. do {
  1058. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1059. i++;
  1060. } while (!(pss_ctl & __PSS_LMEM_INIT_DONE) && (i < PSS_LMEM_INIT_TIME));
  1061. /**
  1062. * If memory initialization is not successful, IOC timeout will catch
  1063. * such failures.
  1064. */
  1065. BUG_ON(!(pss_ctl & __PSS_LMEM_INIT_DONE));
  1066. pss_ctl &= ~(__PSS_LMEM_INIT_DONE | __PSS_LMEM_INIT_EN);
  1067. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1068. }
  1069. static void
  1070. bfa_ioc_lpu_start(struct bfa_ioc *ioc)
  1071. {
  1072. u32 pss_ctl;
  1073. /**
  1074. * Take processor out of reset.
  1075. */
  1076. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1077. pss_ctl &= ~__PSS_LPU0_RESET;
  1078. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1079. }
  1080. static void
  1081. bfa_ioc_lpu_stop(struct bfa_ioc *ioc)
  1082. {
  1083. u32 pss_ctl;
  1084. /**
  1085. * Put processors in reset.
  1086. */
  1087. pss_ctl = readl(ioc->ioc_regs.pss_ctl_reg);
  1088. pss_ctl |= (__PSS_LPU0_RESET | __PSS_LPU1_RESET);
  1089. writel(pss_ctl, ioc->ioc_regs.pss_ctl_reg);
  1090. }
  1091. /**
  1092. * Get driver and firmware versions.
  1093. */
  1094. void
  1095. bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
  1096. {
  1097. u32 pgnum;
  1098. u32 loff = 0;
  1099. int i;
  1100. u32 *fwsig = (u32 *) fwhdr;
  1101. pgnum = bfa_ioc_smem_pgnum(ioc, loff);
  1102. writel(pgnum, ioc->ioc_regs.host_page_num_fn);
  1103. for (i = 0; i < (sizeof(struct bfi_ioc_image_hdr) / sizeof(u32));
  1104. i++) {
  1105. fwsig[i] =
  1106. swab32(readl((loff) + (ioc->ioc_regs.smem_page_start)));
  1107. loff += sizeof(u32);
  1108. }
  1109. }
  1110. /**
  1111. * Returns TRUE if same.
  1112. */
  1113. bool
  1114. bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc, struct bfi_ioc_image_hdr *fwhdr)
  1115. {
  1116. struct bfi_ioc_image_hdr *drv_fwhdr;
  1117. int i;
  1118. drv_fwhdr = (struct bfi_ioc_image_hdr *)
  1119. bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), 0);
  1120. for (i = 0; i < BFI_IOC_MD5SUM_SZ; i++) {
  1121. if (fwhdr->md5sum[i] != drv_fwhdr->md5sum[i])
  1122. return false;
  1123. }
  1124. return true;
  1125. }
  1126. /**
  1127. * Return true if current running version is valid. Firmware signature and
  1128. * execution context (driver/bios) must match.
  1129. */
  1130. static bool
  1131. bfa_ioc_fwver_valid(struct bfa_ioc *ioc, u32 boot_env)
  1132. {
  1133. struct bfi_ioc_image_hdr fwhdr, *drv_fwhdr;
  1134. bfa_nw_ioc_fwver_get(ioc, &fwhdr);
  1135. drv_fwhdr = (struct bfi_ioc_image_hdr *)
  1136. bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), 0);
  1137. if (fwhdr.signature != drv_fwhdr->signature)
  1138. return false;
  1139. if (swab32(fwhdr.param) != boot_env)
  1140. return false;
  1141. return bfa_nw_ioc_fwver_cmp(ioc, &fwhdr);
  1142. }
  1143. /**
  1144. * Conditionally flush any pending message from firmware at start.
  1145. */
  1146. static void
  1147. bfa_ioc_msgflush(struct bfa_ioc *ioc)
  1148. {
  1149. u32 r32;
  1150. r32 = readl(ioc->ioc_regs.lpu_mbox_cmd);
  1151. if (r32)
  1152. writel(1, ioc->ioc_regs.lpu_mbox_cmd);
  1153. }
  1154. /**
  1155. * @img ioc_init_logic.jpg
  1156. */
  1157. static void
  1158. bfa_ioc_hwinit(struct bfa_ioc *ioc, bool force)
  1159. {
  1160. enum bfi_ioc_state ioc_fwstate;
  1161. bool fwvalid;
  1162. u32 boot_env;
  1163. ioc_fwstate = readl(ioc->ioc_regs.ioc_fwstate);
  1164. boot_env = BFI_BOOT_LOADER_OS;
  1165. if (force)
  1166. ioc_fwstate = BFI_IOC_UNINIT;
  1167. /**
  1168. * check if firmware is valid
  1169. */
  1170. fwvalid = (ioc_fwstate == BFI_IOC_UNINIT) ?
  1171. false : bfa_ioc_fwver_valid(ioc, boot_env);
  1172. if (!fwvalid) {
  1173. bfa_ioc_boot(ioc, BFI_BOOT_TYPE_NORMAL, boot_env);
  1174. return;
  1175. }
  1176. /**
  1177. * If hardware initialization is in progress (initialized by other IOC),
  1178. * just wait for an initialization completion interrupt.
  1179. */
  1180. if (ioc_fwstate == BFI_IOC_INITING) {
  1181. ioc->cbfn->reset_cbfn(ioc->bfa);
  1182. return;
  1183. }
  1184. /**
  1185. * If IOC function is disabled and firmware version is same,
  1186. * just re-enable IOC.
  1187. */
  1188. if (ioc_fwstate == BFI_IOC_DISABLED || ioc_fwstate == BFI_IOC_OP) {
  1189. /**
  1190. * When using MSI-X any pending firmware ready event should
  1191. * be flushed. Otherwise MSI-X interrupts are not delivered.
  1192. */
  1193. bfa_ioc_msgflush(ioc);
  1194. ioc->cbfn->reset_cbfn(ioc->bfa);
  1195. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FWREADY);
  1196. return;
  1197. }
  1198. /**
  1199. * Initialize the h/w for any other states.
  1200. */
  1201. bfa_ioc_boot(ioc, BFI_BOOT_TYPE_NORMAL, boot_env);
  1202. }
  1203. void
  1204. bfa_nw_ioc_timeout(void *ioc_arg)
  1205. {
  1206. struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
  1207. bfa_fsm_send_event(ioc, IOC_E_TIMEOUT);
  1208. }
  1209. static void
  1210. bfa_ioc_mbox_send(struct bfa_ioc *ioc, void *ioc_msg, int len)
  1211. {
  1212. u32 *msgp = (u32 *) ioc_msg;
  1213. u32 i;
  1214. BUG_ON(!(len <= BFI_IOC_MSGLEN_MAX));
  1215. /*
  1216. * first write msg to mailbox registers
  1217. */
  1218. for (i = 0; i < len / sizeof(u32); i++)
  1219. writel(cpu_to_le32(msgp[i]),
  1220. ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
  1221. for (; i < BFI_IOC_MSGLEN_MAX / sizeof(u32); i++)
  1222. writel(0, ioc->ioc_regs.hfn_mbox + i * sizeof(u32));
  1223. /*
  1224. * write 1 to mailbox CMD to trigger LPU event
  1225. */
  1226. writel(1, ioc->ioc_regs.hfn_mbox_cmd);
  1227. (void) readl(ioc->ioc_regs.hfn_mbox_cmd);
  1228. }
  1229. static void
  1230. bfa_ioc_send_enable(struct bfa_ioc *ioc)
  1231. {
  1232. struct bfi_ioc_ctrl_req enable_req;
  1233. struct timeval tv;
  1234. bfi_h2i_set(enable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_ENABLE_REQ,
  1235. bfa_ioc_portid(ioc));
  1236. enable_req.ioc_class = ioc->ioc_mc;
  1237. do_gettimeofday(&tv);
  1238. enable_req.tv_sec = ntohl(tv.tv_sec);
  1239. bfa_ioc_mbox_send(ioc, &enable_req, sizeof(struct bfi_ioc_ctrl_req));
  1240. }
  1241. static void
  1242. bfa_ioc_send_disable(struct bfa_ioc *ioc)
  1243. {
  1244. struct bfi_ioc_ctrl_req disable_req;
  1245. bfi_h2i_set(disable_req.mh, BFI_MC_IOC, BFI_IOC_H2I_DISABLE_REQ,
  1246. bfa_ioc_portid(ioc));
  1247. bfa_ioc_mbox_send(ioc, &disable_req, sizeof(struct bfi_ioc_ctrl_req));
  1248. }
  1249. static void
  1250. bfa_ioc_send_getattr(struct bfa_ioc *ioc)
  1251. {
  1252. struct bfi_ioc_getattr_req attr_req;
  1253. bfi_h2i_set(attr_req.mh, BFI_MC_IOC, BFI_IOC_H2I_GETATTR_REQ,
  1254. bfa_ioc_portid(ioc));
  1255. bfa_dma_be_addr_set(attr_req.attr_addr, ioc->attr_dma.pa);
  1256. bfa_ioc_mbox_send(ioc, &attr_req, sizeof(attr_req));
  1257. }
  1258. void
  1259. bfa_nw_ioc_hb_check(void *cbarg)
  1260. {
  1261. struct bfa_ioc *ioc = cbarg;
  1262. u32 hb_count;
  1263. hb_count = readl(ioc->ioc_regs.heartbeat);
  1264. if (ioc->hb_count == hb_count) {
  1265. bfa_ioc_recover(ioc);
  1266. return;
  1267. } else {
  1268. ioc->hb_count = hb_count;
  1269. }
  1270. bfa_ioc_mbox_poll(ioc);
  1271. mod_timer(&ioc->hb_timer, jiffies +
  1272. msecs_to_jiffies(BFA_IOC_HB_TOV));
  1273. }
  1274. static void
  1275. bfa_ioc_hb_monitor(struct bfa_ioc *ioc)
  1276. {
  1277. ioc->hb_count = readl(ioc->ioc_regs.heartbeat);
  1278. mod_timer(&ioc->hb_timer, jiffies +
  1279. msecs_to_jiffies(BFA_IOC_HB_TOV));
  1280. }
  1281. static void
  1282. bfa_ioc_hb_stop(struct bfa_ioc *ioc)
  1283. {
  1284. del_timer(&ioc->hb_timer);
  1285. }
  1286. /**
  1287. * @brief
  1288. * Initiate a full firmware download.
  1289. */
  1290. static void
  1291. bfa_ioc_download_fw(struct bfa_ioc *ioc, u32 boot_type,
  1292. u32 boot_env)
  1293. {
  1294. u32 *fwimg;
  1295. u32 pgnum;
  1296. u32 loff = 0;
  1297. u32 chunkno = 0;
  1298. u32 i;
  1299. /**
  1300. * Initialize LMEM first before code download
  1301. */
  1302. bfa_ioc_lmem_init(ioc);
  1303. fwimg = bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc), chunkno);
  1304. pgnum = bfa_ioc_smem_pgnum(ioc, loff);
  1305. writel(pgnum, ioc->ioc_regs.host_page_num_fn);
  1306. for (i = 0; i < bfa_cb_image_get_size(BFA_IOC_FWIMG_TYPE(ioc)); i++) {
  1307. if (BFA_IOC_FLASH_CHUNK_NO(i) != chunkno) {
  1308. chunkno = BFA_IOC_FLASH_CHUNK_NO(i);
  1309. fwimg = bfa_cb_image_get_chunk(BFA_IOC_FWIMG_TYPE(ioc),
  1310. BFA_IOC_FLASH_CHUNK_ADDR(chunkno));
  1311. }
  1312. /**
  1313. * write smem
  1314. */
  1315. writel((swab32(fwimg[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i)])),
  1316. ((ioc->ioc_regs.smem_page_start) + (loff)));
  1317. loff += sizeof(u32);
  1318. /**
  1319. * handle page offset wrap around
  1320. */
  1321. loff = PSS_SMEM_PGOFF(loff);
  1322. if (loff == 0) {
  1323. pgnum++;
  1324. writel(pgnum,
  1325. ioc->ioc_regs.host_page_num_fn);
  1326. }
  1327. }
  1328. writel(bfa_ioc_smem_pgnum(ioc, 0),
  1329. ioc->ioc_regs.host_page_num_fn);
  1330. /*
  1331. * Set boot type and boot param at the end.
  1332. */
  1333. writel(boot_type, ((ioc->ioc_regs.smem_page_start)
  1334. + (BFI_BOOT_TYPE_OFF)));
  1335. writel(boot_env, ((ioc->ioc_regs.smem_page_start)
  1336. + (BFI_BOOT_LOADER_OFF)));
  1337. }
  1338. static void
  1339. bfa_ioc_reset(struct bfa_ioc *ioc, bool force)
  1340. {
  1341. bfa_ioc_hwinit(ioc, force);
  1342. }
  1343. /**
  1344. * @brief
  1345. * Update BFA configuration from firmware configuration.
  1346. */
  1347. static void
  1348. bfa_ioc_getattr_reply(struct bfa_ioc *ioc)
  1349. {
  1350. struct bfi_ioc_attr *attr = ioc->attr;
  1351. attr->adapter_prop = ntohl(attr->adapter_prop);
  1352. attr->card_type = ntohl(attr->card_type);
  1353. attr->maxfrsize = ntohs(attr->maxfrsize);
  1354. bfa_fsm_send_event(ioc, IOC_E_FWRSP_GETATTR);
  1355. }
  1356. /**
  1357. * Attach time initialization of mbox logic.
  1358. */
  1359. static void
  1360. bfa_ioc_mbox_attach(struct bfa_ioc *ioc)
  1361. {
  1362. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1363. int mc;
  1364. INIT_LIST_HEAD(&mod->cmd_q);
  1365. for (mc = 0; mc < BFI_MC_MAX; mc++) {
  1366. mod->mbhdlr[mc].cbfn = NULL;
  1367. mod->mbhdlr[mc].cbarg = ioc->bfa;
  1368. }
  1369. }
  1370. /**
  1371. * Mbox poll timer -- restarts any pending mailbox requests.
  1372. */
  1373. static void
  1374. bfa_ioc_mbox_poll(struct bfa_ioc *ioc)
  1375. {
  1376. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1377. struct bfa_mbox_cmd *cmd;
  1378. u32 stat;
  1379. /**
  1380. * If no command pending, do nothing
  1381. */
  1382. if (list_empty(&mod->cmd_q))
  1383. return;
  1384. /**
  1385. * If previous command is not yet fetched by firmware, do nothing
  1386. */
  1387. stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
  1388. if (stat)
  1389. return;
  1390. /**
  1391. * Enqueue command to firmware.
  1392. */
  1393. bfa_q_deq(&mod->cmd_q, &cmd);
  1394. bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
  1395. }
  1396. /**
  1397. * Cleanup any pending requests.
  1398. */
  1399. static void
  1400. bfa_ioc_mbox_hbfail(struct bfa_ioc *ioc)
  1401. {
  1402. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1403. struct bfa_mbox_cmd *cmd;
  1404. while (!list_empty(&mod->cmd_q))
  1405. bfa_q_deq(&mod->cmd_q, &cmd);
  1406. }
  1407. static void
  1408. bfa_ioc_fail_notify(struct bfa_ioc *ioc)
  1409. {
  1410. struct list_head *qe;
  1411. struct bfa_ioc_hbfail_notify *notify;
  1412. /**
  1413. * Notify driver and common modules registered for notification.
  1414. */
  1415. ioc->cbfn->hbfail_cbfn(ioc->bfa);
  1416. list_for_each(qe, &ioc->hb_notify_q) {
  1417. notify = (struct bfa_ioc_hbfail_notify *) qe;
  1418. notify->cbfn(notify->cbarg);
  1419. }
  1420. }
  1421. static void
  1422. bfa_ioc_pf_enabled(struct bfa_ioc *ioc)
  1423. {
  1424. bfa_fsm_send_event(ioc, IOC_E_ENABLED);
  1425. }
  1426. static void
  1427. bfa_ioc_pf_disabled(struct bfa_ioc *ioc)
  1428. {
  1429. bfa_fsm_send_event(ioc, IOC_E_DISABLED);
  1430. }
  1431. static void
  1432. bfa_ioc_pf_initfailed(struct bfa_ioc *ioc)
  1433. {
  1434. bfa_fsm_send_event(ioc, IOC_E_INITFAILED);
  1435. }
  1436. static void
  1437. bfa_ioc_pf_failed(struct bfa_ioc *ioc)
  1438. {
  1439. bfa_fsm_send_event(ioc, IOC_E_PFAILED);
  1440. }
  1441. static void
  1442. bfa_ioc_pf_fwmismatch(struct bfa_ioc *ioc)
  1443. {
  1444. /**
  1445. * Provide enable completion callback and AEN notification.
  1446. */
  1447. ioc->cbfn->enable_cbfn(ioc->bfa, BFA_STATUS_IOC_FAILURE);
  1448. }
  1449. /**
  1450. * IOC public
  1451. */
  1452. static enum bfa_status
  1453. bfa_ioc_pll_init(struct bfa_ioc *ioc)
  1454. {
  1455. /*
  1456. * Hold semaphore so that nobody can access the chip during init.
  1457. */
  1458. bfa_nw_ioc_sem_get(ioc->ioc_regs.ioc_init_sem_reg);
  1459. bfa_ioc_pll_init_asic(ioc);
  1460. ioc->pllinit = true;
  1461. /*
  1462. * release semaphore.
  1463. */
  1464. bfa_nw_ioc_sem_release(ioc->ioc_regs.ioc_init_sem_reg);
  1465. return BFA_STATUS_OK;
  1466. }
  1467. /**
  1468. * Interface used by diag module to do firmware boot with memory test
  1469. * as the entry vector.
  1470. */
  1471. static void
  1472. bfa_ioc_boot(struct bfa_ioc *ioc, u32 boot_type, u32 boot_env)
  1473. {
  1474. void __iomem *rb;
  1475. bfa_ioc_stats(ioc, ioc_boots);
  1476. if (bfa_ioc_pll_init(ioc) != BFA_STATUS_OK)
  1477. return;
  1478. /**
  1479. * Initialize IOC state of all functions on a chip reset.
  1480. */
  1481. rb = ioc->pcidev.pci_bar_kva;
  1482. if (boot_type == BFI_BOOT_TYPE_MEMTEST) {
  1483. writel(BFI_IOC_MEMTEST, (rb + BFA_IOC0_STATE_REG));
  1484. writel(BFI_IOC_MEMTEST, (rb + BFA_IOC1_STATE_REG));
  1485. } else {
  1486. writel(BFI_IOC_INITING, (rb + BFA_IOC0_STATE_REG));
  1487. writel(BFI_IOC_INITING, (rb + BFA_IOC1_STATE_REG));
  1488. }
  1489. bfa_ioc_msgflush(ioc);
  1490. bfa_ioc_download_fw(ioc, boot_type, boot_env);
  1491. /**
  1492. * Enable interrupts just before starting LPU
  1493. */
  1494. ioc->cbfn->reset_cbfn(ioc->bfa);
  1495. bfa_ioc_lpu_start(ioc);
  1496. }
  1497. /**
  1498. * Enable/disable IOC failure auto recovery.
  1499. */
  1500. void
  1501. bfa_nw_ioc_auto_recover(bool auto_recover)
  1502. {
  1503. bfa_nw_auto_recover = auto_recover;
  1504. }
  1505. static void
  1506. bfa_ioc_msgget(struct bfa_ioc *ioc, void *mbmsg)
  1507. {
  1508. u32 *msgp = mbmsg;
  1509. u32 r32;
  1510. int i;
  1511. /**
  1512. * read the MBOX msg
  1513. */
  1514. for (i = 0; i < (sizeof(union bfi_ioc_i2h_msg_u) / sizeof(u32));
  1515. i++) {
  1516. r32 = readl(ioc->ioc_regs.lpu_mbox +
  1517. i * sizeof(u32));
  1518. msgp[i] = htonl(r32);
  1519. }
  1520. /**
  1521. * turn off mailbox interrupt by clearing mailbox status
  1522. */
  1523. writel(1, ioc->ioc_regs.lpu_mbox_cmd);
  1524. readl(ioc->ioc_regs.lpu_mbox_cmd);
  1525. }
  1526. static void
  1527. bfa_ioc_isr(struct bfa_ioc *ioc, struct bfi_mbmsg *m)
  1528. {
  1529. union bfi_ioc_i2h_msg_u *msg;
  1530. struct bfa_iocpf *iocpf = &ioc->iocpf;
  1531. msg = (union bfi_ioc_i2h_msg_u *) m;
  1532. bfa_ioc_stats(ioc, ioc_isrs);
  1533. switch (msg->mh.msg_id) {
  1534. case BFI_IOC_I2H_HBEAT:
  1535. break;
  1536. case BFI_IOC_I2H_READY_EVENT:
  1537. bfa_fsm_send_event(iocpf, IOCPF_E_FWREADY);
  1538. break;
  1539. case BFI_IOC_I2H_ENABLE_REPLY:
  1540. bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_ENABLE);
  1541. break;
  1542. case BFI_IOC_I2H_DISABLE_REPLY:
  1543. bfa_fsm_send_event(iocpf, IOCPF_E_FWRSP_DISABLE);
  1544. break;
  1545. case BFI_IOC_I2H_GETATTR_REPLY:
  1546. bfa_ioc_getattr_reply(ioc);
  1547. break;
  1548. default:
  1549. BUG_ON(1);
  1550. }
  1551. }
  1552. /**
  1553. * IOC attach time initialization and setup.
  1554. *
  1555. * @param[in] ioc memory for IOC
  1556. * @param[in] bfa driver instance structure
  1557. */
  1558. void
  1559. bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa, struct bfa_ioc_cbfn *cbfn)
  1560. {
  1561. ioc->bfa = bfa;
  1562. ioc->cbfn = cbfn;
  1563. ioc->fcmode = false;
  1564. ioc->pllinit = false;
  1565. ioc->dbg_fwsave_once = true;
  1566. ioc->iocpf.ioc = ioc;
  1567. bfa_ioc_mbox_attach(ioc);
  1568. INIT_LIST_HEAD(&ioc->hb_notify_q);
  1569. bfa_fsm_set_state(ioc, bfa_ioc_sm_uninit);
  1570. bfa_fsm_send_event(ioc, IOC_E_RESET);
  1571. }
  1572. /**
  1573. * Driver detach time IOC cleanup.
  1574. */
  1575. void
  1576. bfa_nw_ioc_detach(struct bfa_ioc *ioc)
  1577. {
  1578. bfa_fsm_send_event(ioc, IOC_E_DETACH);
  1579. }
  1580. /**
  1581. * Setup IOC PCI properties.
  1582. *
  1583. * @param[in] pcidev PCI device information for this IOC
  1584. */
  1585. void
  1586. bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
  1587. enum bfi_mclass mc)
  1588. {
  1589. ioc->ioc_mc = mc;
  1590. ioc->pcidev = *pcidev;
  1591. ioc->ctdev = bfa_asic_id_ct(ioc->pcidev.device_id);
  1592. ioc->cna = ioc->ctdev && !ioc->fcmode;
  1593. bfa_nw_ioc_set_ct_hwif(ioc);
  1594. bfa_ioc_map_port(ioc);
  1595. bfa_ioc_reg_init(ioc);
  1596. }
  1597. /**
  1598. * Initialize IOC dma memory
  1599. *
  1600. * @param[in] dm_kva kernel virtual address of IOC dma memory
  1601. * @param[in] dm_pa physical address of IOC dma memory
  1602. */
  1603. void
  1604. bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa)
  1605. {
  1606. /**
  1607. * dma memory for firmware attribute
  1608. */
  1609. ioc->attr_dma.kva = dm_kva;
  1610. ioc->attr_dma.pa = dm_pa;
  1611. ioc->attr = (struct bfi_ioc_attr *) dm_kva;
  1612. }
  1613. /**
  1614. * Return size of dma memory required.
  1615. */
  1616. u32
  1617. bfa_nw_ioc_meminfo(void)
  1618. {
  1619. return roundup(sizeof(struct bfi_ioc_attr), BFA_DMA_ALIGN_SZ);
  1620. }
  1621. void
  1622. bfa_nw_ioc_enable(struct bfa_ioc *ioc)
  1623. {
  1624. bfa_ioc_stats(ioc, ioc_enables);
  1625. ioc->dbg_fwsave_once = true;
  1626. bfa_fsm_send_event(ioc, IOC_E_ENABLE);
  1627. }
  1628. void
  1629. bfa_nw_ioc_disable(struct bfa_ioc *ioc)
  1630. {
  1631. bfa_ioc_stats(ioc, ioc_disables);
  1632. bfa_fsm_send_event(ioc, IOC_E_DISABLE);
  1633. }
  1634. static u32
  1635. bfa_ioc_smem_pgnum(struct bfa_ioc *ioc, u32 fmaddr)
  1636. {
  1637. return PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, fmaddr);
  1638. }
  1639. /**
  1640. * Register mailbox message handler function, to be called by common modules
  1641. */
  1642. void
  1643. bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
  1644. bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg)
  1645. {
  1646. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1647. mod->mbhdlr[mc].cbfn = cbfn;
  1648. mod->mbhdlr[mc].cbarg = cbarg;
  1649. }
  1650. /**
  1651. * Queue a mailbox command request to firmware. Waits if mailbox is busy.
  1652. * Responsibility of caller to serialize
  1653. *
  1654. * @param[in] ioc IOC instance
  1655. * @param[i] cmd Mailbox command
  1656. */
  1657. void
  1658. bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd)
  1659. {
  1660. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1661. u32 stat;
  1662. /**
  1663. * If a previous command is pending, queue new command
  1664. */
  1665. if (!list_empty(&mod->cmd_q)) {
  1666. list_add_tail(&cmd->qe, &mod->cmd_q);
  1667. return;
  1668. }
  1669. /**
  1670. * If mailbox is busy, queue command for poll timer
  1671. */
  1672. stat = readl(ioc->ioc_regs.hfn_mbox_cmd);
  1673. if (stat) {
  1674. list_add_tail(&cmd->qe, &mod->cmd_q);
  1675. return;
  1676. }
  1677. /**
  1678. * mailbox is free -- queue command to firmware
  1679. */
  1680. bfa_ioc_mbox_send(ioc, cmd->msg, sizeof(cmd->msg));
  1681. }
  1682. /**
  1683. * Handle mailbox interrupts
  1684. */
  1685. void
  1686. bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc)
  1687. {
  1688. struct bfa_ioc_mbox_mod *mod = &ioc->mbox_mod;
  1689. struct bfi_mbmsg m;
  1690. int mc;
  1691. bfa_ioc_msgget(ioc, &m);
  1692. /**
  1693. * Treat IOC message class as special.
  1694. */
  1695. mc = m.mh.msg_class;
  1696. if (mc == BFI_MC_IOC) {
  1697. bfa_ioc_isr(ioc, &m);
  1698. return;
  1699. }
  1700. if ((mc >= BFI_MC_MAX) || (mod->mbhdlr[mc].cbfn == NULL))
  1701. return;
  1702. mod->mbhdlr[mc].cbfn(mod->mbhdlr[mc].cbarg, &m);
  1703. }
  1704. void
  1705. bfa_nw_ioc_error_isr(struct bfa_ioc *ioc)
  1706. {
  1707. bfa_fsm_send_event(ioc, IOC_E_HWERROR);
  1708. }
  1709. /**
  1710. * Add to IOC heartbeat failure notification queue. To be used by common
  1711. * modules such as cee, port, diag.
  1712. */
  1713. void
  1714. bfa_nw_ioc_hbfail_register(struct bfa_ioc *ioc,
  1715. struct bfa_ioc_hbfail_notify *notify)
  1716. {
  1717. list_add_tail(&notify->qe, &ioc->hb_notify_q);
  1718. }
  1719. #define BFA_MFG_NAME "Brocade"
  1720. static void
  1721. bfa_ioc_get_adapter_attr(struct bfa_ioc *ioc,
  1722. struct bfa_adapter_attr *ad_attr)
  1723. {
  1724. struct bfi_ioc_attr *ioc_attr;
  1725. ioc_attr = ioc->attr;
  1726. bfa_ioc_get_adapter_serial_num(ioc, ad_attr->serial_num);
  1727. bfa_ioc_get_adapter_fw_ver(ioc, ad_attr->fw_ver);
  1728. bfa_ioc_get_adapter_optrom_ver(ioc, ad_attr->optrom_ver);
  1729. bfa_ioc_get_adapter_manufacturer(ioc, ad_attr->manufacturer);
  1730. memcpy(&ad_attr->vpd, &ioc_attr->vpd,
  1731. sizeof(struct bfa_mfg_vpd));
  1732. ad_attr->nports = bfa_ioc_get_nports(ioc);
  1733. ad_attr->max_speed = bfa_ioc_speed_sup(ioc);
  1734. bfa_ioc_get_adapter_model(ioc, ad_attr->model);
  1735. /* For now, model descr uses same model string */
  1736. bfa_ioc_get_adapter_model(ioc, ad_attr->model_descr);
  1737. ad_attr->card_type = ioc_attr->card_type;
  1738. ad_attr->is_mezz = bfa_mfg_is_mezz(ioc_attr->card_type);
  1739. if (BFI_ADAPTER_IS_SPECIAL(ioc_attr->adapter_prop))
  1740. ad_attr->prototype = 1;
  1741. else
  1742. ad_attr->prototype = 0;
  1743. ad_attr->pwwn = bfa_ioc_get_pwwn(ioc);
  1744. ad_attr->mac = bfa_nw_ioc_get_mac(ioc);
  1745. ad_attr->pcie_gen = ioc_attr->pcie_gen;
  1746. ad_attr->pcie_lanes = ioc_attr->pcie_lanes;
  1747. ad_attr->pcie_lanes_orig = ioc_attr->pcie_lanes_orig;
  1748. ad_attr->asic_rev = ioc_attr->asic_rev;
  1749. bfa_ioc_get_pci_chip_rev(ioc, ad_attr->hw_ver);
  1750. ad_attr->cna_capable = ioc->cna;
  1751. ad_attr->trunk_capable = (ad_attr->nports > 1) && !ioc->cna;
  1752. }
  1753. static enum bfa_ioc_type
  1754. bfa_ioc_get_type(struct bfa_ioc *ioc)
  1755. {
  1756. if (!ioc->ctdev || ioc->fcmode)
  1757. return BFA_IOC_TYPE_FC;
  1758. else if (ioc->ioc_mc == BFI_MC_IOCFC)
  1759. return BFA_IOC_TYPE_FCoE;
  1760. else if (ioc->ioc_mc == BFI_MC_LL)
  1761. return BFA_IOC_TYPE_LL;
  1762. else {
  1763. BUG_ON(!(ioc->ioc_mc == BFI_MC_LL));
  1764. return BFA_IOC_TYPE_LL;
  1765. }
  1766. }
  1767. static void
  1768. bfa_ioc_get_adapter_serial_num(struct bfa_ioc *ioc, char *serial_num)
  1769. {
  1770. memset(serial_num, 0, BFA_ADAPTER_SERIAL_NUM_LEN);
  1771. memcpy(serial_num,
  1772. (void *)ioc->attr->brcd_serialnum,
  1773. BFA_ADAPTER_SERIAL_NUM_LEN);
  1774. }
  1775. static void
  1776. bfa_ioc_get_adapter_fw_ver(struct bfa_ioc *ioc, char *fw_ver)
  1777. {
  1778. memset(fw_ver, 0, BFA_VERSION_LEN);
  1779. memcpy(fw_ver, ioc->attr->fw_version, BFA_VERSION_LEN);
  1780. }
  1781. static void
  1782. bfa_ioc_get_pci_chip_rev(struct bfa_ioc *ioc, char *chip_rev)
  1783. {
  1784. BUG_ON(!(chip_rev));
  1785. memset(chip_rev, 0, BFA_IOC_CHIP_REV_LEN);
  1786. chip_rev[0] = 'R';
  1787. chip_rev[1] = 'e';
  1788. chip_rev[2] = 'v';
  1789. chip_rev[3] = '-';
  1790. chip_rev[4] = ioc->attr->asic_rev;
  1791. chip_rev[5] = '\0';
  1792. }
  1793. static void
  1794. bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc *ioc, char *optrom_ver)
  1795. {
  1796. memset(optrom_ver, 0, BFA_VERSION_LEN);
  1797. memcpy(optrom_ver, ioc->attr->optrom_version,
  1798. BFA_VERSION_LEN);
  1799. }
  1800. static void
  1801. bfa_ioc_get_adapter_manufacturer(struct bfa_ioc *ioc, char *manufacturer)
  1802. {
  1803. memset(manufacturer, 0, BFA_ADAPTER_MFG_NAME_LEN);
  1804. memcpy(manufacturer, BFA_MFG_NAME, BFA_ADAPTER_MFG_NAME_LEN);
  1805. }
  1806. static void
  1807. bfa_ioc_get_adapter_model(struct bfa_ioc *ioc, char *model)
  1808. {
  1809. struct bfi_ioc_attr *ioc_attr;
  1810. BUG_ON(!(model));
  1811. memset(model, 0, BFA_ADAPTER_MODEL_NAME_LEN);
  1812. ioc_attr = ioc->attr;
  1813. /**
  1814. * model name
  1815. */
  1816. snprintf(model, BFA_ADAPTER_MODEL_NAME_LEN, "%s-%u",
  1817. BFA_MFG_NAME, ioc_attr->card_type);
  1818. }
  1819. static enum bfa_ioc_state
  1820. bfa_ioc_get_state(struct bfa_ioc *ioc)
  1821. {
  1822. enum bfa_iocpf_state iocpf_st;
  1823. enum bfa_ioc_state ioc_st = bfa_sm_to_state(ioc_sm_table, ioc->fsm);
  1824. if (ioc_st == BFA_IOC_ENABLING ||
  1825. ioc_st == BFA_IOC_FAIL || ioc_st == BFA_IOC_INITFAIL) {
  1826. iocpf_st = bfa_sm_to_state(iocpf_sm_table, ioc->iocpf.fsm);
  1827. switch (iocpf_st) {
  1828. case BFA_IOCPF_SEMWAIT:
  1829. ioc_st = BFA_IOC_SEMWAIT;
  1830. break;
  1831. case BFA_IOCPF_HWINIT:
  1832. ioc_st = BFA_IOC_HWINIT;
  1833. break;
  1834. case BFA_IOCPF_FWMISMATCH:
  1835. ioc_st = BFA_IOC_FWMISMATCH;
  1836. break;
  1837. case BFA_IOCPF_FAIL:
  1838. ioc_st = BFA_IOC_FAIL;
  1839. break;
  1840. case BFA_IOCPF_INITFAIL:
  1841. ioc_st = BFA_IOC_INITFAIL;
  1842. break;
  1843. default:
  1844. break;
  1845. }
  1846. }
  1847. return ioc_st;
  1848. }
  1849. void
  1850. bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr)
  1851. {
  1852. memset((void *)ioc_attr, 0, sizeof(struct bfa_ioc_attr));
  1853. ioc_attr->state = bfa_ioc_get_state(ioc);
  1854. ioc_attr->port_id = ioc->port_id;
  1855. ioc_attr->ioc_type = bfa_ioc_get_type(ioc);
  1856. bfa_ioc_get_adapter_attr(ioc, &ioc_attr->adapter_attr);
  1857. ioc_attr->pci_attr.device_id = ioc->pcidev.device_id;
  1858. ioc_attr->pci_attr.pcifn = ioc->pcidev.pci_func;
  1859. bfa_ioc_get_pci_chip_rev(ioc, ioc_attr->pci_attr.chip_rev);
  1860. }
  1861. /**
  1862. * WWN public
  1863. */
  1864. static u64
  1865. bfa_ioc_get_pwwn(struct bfa_ioc *ioc)
  1866. {
  1867. return ioc->attr->pwwn;
  1868. }
  1869. mac_t
  1870. bfa_nw_ioc_get_mac(struct bfa_ioc *ioc)
  1871. {
  1872. return ioc->attr->mac;
  1873. }
  1874. /**
  1875. * Firmware failure detected. Start recovery actions.
  1876. */
  1877. static void
  1878. bfa_ioc_recover(struct bfa_ioc *ioc)
  1879. {
  1880. pr_crit("Heart Beat of IOC has failed\n");
  1881. bfa_ioc_stats(ioc, ioc_hbfails);
  1882. bfa_fsm_send_event(ioc, IOC_E_HBFAIL);
  1883. }
  1884. static void
  1885. bfa_ioc_check_attr_wwns(struct bfa_ioc *ioc)
  1886. {
  1887. if (bfa_ioc_get_type(ioc) == BFA_IOC_TYPE_LL)
  1888. return;
  1889. }
  1890. /**
  1891. * @dg hal_iocpf_pvt BFA IOC PF private functions
  1892. * @{
  1893. */
  1894. static void
  1895. bfa_iocpf_enable(struct bfa_ioc *ioc)
  1896. {
  1897. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_ENABLE);
  1898. }
  1899. static void
  1900. bfa_iocpf_disable(struct bfa_ioc *ioc)
  1901. {
  1902. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_DISABLE);
  1903. }
  1904. static void
  1905. bfa_iocpf_fail(struct bfa_ioc *ioc)
  1906. {
  1907. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_FAIL);
  1908. }
  1909. static void
  1910. bfa_iocpf_initfail(struct bfa_ioc *ioc)
  1911. {
  1912. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_INITFAIL);
  1913. }
  1914. static void
  1915. bfa_iocpf_getattrfail(struct bfa_ioc *ioc)
  1916. {
  1917. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_GETATTRFAIL);
  1918. }
  1919. static void
  1920. bfa_iocpf_stop(struct bfa_ioc *ioc)
  1921. {
  1922. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_STOP);
  1923. }
  1924. void
  1925. bfa_nw_iocpf_timeout(void *ioc_arg)
  1926. {
  1927. struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
  1928. bfa_fsm_send_event(&ioc->iocpf, IOCPF_E_TIMEOUT);
  1929. }
  1930. void
  1931. bfa_nw_iocpf_sem_timeout(void *ioc_arg)
  1932. {
  1933. struct bfa_ioc *ioc = (struct bfa_ioc *) ioc_arg;
  1934. bfa_ioc_hw_sem_get(ioc);
  1935. }