ak4117.c 16 KB

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  1. /*
  2. * Routines for control of the AK4117 via 4-wire serial interface
  3. * IEC958 (S/PDIF) receiver by Asahi Kasei
  4. * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
  5. *
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. *
  21. */
  22. #include <linux/slab.h>
  23. #include <linux/delay.h>
  24. #include <sound/core.h>
  25. #include <sound/control.h>
  26. #include <sound/pcm.h>
  27. #include <sound/ak4117.h>
  28. #include <sound/asoundef.h>
  29. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  30. MODULE_DESCRIPTION("AK4117 IEC958 (S/PDIF) receiver by Asahi Kasei");
  31. MODULE_LICENSE("GPL");
  32. #define AK4117_ADDR 0x00 /* fixed address */
  33. static void snd_ak4117_timer(unsigned long data);
  34. static void reg_write(struct ak4117 *ak4117, unsigned char reg, unsigned char val)
  35. {
  36. ak4117->write(ak4117->private_data, reg, val);
  37. if (reg < sizeof(ak4117->regmap))
  38. ak4117->regmap[reg] = val;
  39. }
  40. static inline unsigned char reg_read(struct ak4117 *ak4117, unsigned char reg)
  41. {
  42. return ak4117->read(ak4117->private_data, reg);
  43. }
  44. #if 0
  45. static void reg_dump(struct ak4117 *ak4117)
  46. {
  47. int i;
  48. printk(KERN_DEBUG "AK4117 REG DUMP:\n");
  49. for (i = 0; i < 0x1b; i++)
  50. printk(KERN_DEBUG "reg[%02x] = %02x (%02x)\n", i, reg_read(ak4117, i), i < sizeof(ak4117->regmap) ? ak4117->regmap[i] : 0);
  51. }
  52. #endif
  53. static void snd_ak4117_free(struct ak4117 *chip)
  54. {
  55. del_timer(&chip->timer);
  56. kfree(chip);
  57. }
  58. static int snd_ak4117_dev_free(struct snd_device *device)
  59. {
  60. struct ak4117 *chip = device->device_data;
  61. snd_ak4117_free(chip);
  62. return 0;
  63. }
  64. int snd_ak4117_create(struct snd_card *card, ak4117_read_t *read, ak4117_write_t *write,
  65. const unsigned char pgm[5], void *private_data, struct ak4117 **r_ak4117)
  66. {
  67. struct ak4117 *chip;
  68. int err = 0;
  69. unsigned char reg;
  70. static struct snd_device_ops ops = {
  71. .dev_free = snd_ak4117_dev_free,
  72. };
  73. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  74. if (chip == NULL)
  75. return -ENOMEM;
  76. spin_lock_init(&chip->lock);
  77. chip->card = card;
  78. chip->read = read;
  79. chip->write = write;
  80. chip->private_data = private_data;
  81. init_timer(&chip->timer);
  82. chip->timer.data = (unsigned long)chip;
  83. chip->timer.function = snd_ak4117_timer;
  84. for (reg = 0; reg < 5; reg++)
  85. chip->regmap[reg] = pgm[reg];
  86. snd_ak4117_reinit(chip);
  87. chip->rcs0 = reg_read(chip, AK4117_REG_RCS0) & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
  88. chip->rcs1 = reg_read(chip, AK4117_REG_RCS1);
  89. chip->rcs2 = reg_read(chip, AK4117_REG_RCS2);
  90. if ((err = snd_device_new(card, SNDRV_DEV_CODEC, chip, &ops)) < 0)
  91. goto __fail;
  92. if (r_ak4117)
  93. *r_ak4117 = chip;
  94. return 0;
  95. __fail:
  96. snd_ak4117_free(chip);
  97. return err < 0 ? err : -EIO;
  98. }
  99. void snd_ak4117_reg_write(struct ak4117 *chip, unsigned char reg, unsigned char mask, unsigned char val)
  100. {
  101. if (reg >= 5)
  102. return;
  103. reg_write(chip, reg, (chip->regmap[reg] & ~mask) | val);
  104. }
  105. void snd_ak4117_reinit(struct ak4117 *chip)
  106. {
  107. unsigned char old = chip->regmap[AK4117_REG_PWRDN], reg;
  108. del_timer(&chip->timer);
  109. chip->init = 1;
  110. /* bring the chip to reset state and powerdown state */
  111. reg_write(chip, AK4117_REG_PWRDN, 0);
  112. udelay(200);
  113. /* release reset, but leave powerdown */
  114. reg_write(chip, AK4117_REG_PWRDN, (old | AK4117_RST) & ~AK4117_PWN);
  115. udelay(200);
  116. for (reg = 1; reg < 5; reg++)
  117. reg_write(chip, reg, chip->regmap[reg]);
  118. /* release powerdown, everything is initialized now */
  119. reg_write(chip, AK4117_REG_PWRDN, old | AK4117_RST | AK4117_PWN);
  120. chip->init = 0;
  121. chip->timer.expires = 1 + jiffies;
  122. add_timer(&chip->timer);
  123. }
  124. static unsigned int external_rate(unsigned char rcs1)
  125. {
  126. switch (rcs1 & (AK4117_FS0|AK4117_FS1|AK4117_FS2|AK4117_FS3)) {
  127. case AK4117_FS_32000HZ: return 32000;
  128. case AK4117_FS_44100HZ: return 44100;
  129. case AK4117_FS_48000HZ: return 48000;
  130. case AK4117_FS_88200HZ: return 88200;
  131. case AK4117_FS_96000HZ: return 96000;
  132. case AK4117_FS_176400HZ: return 176400;
  133. case AK4117_FS_192000HZ: return 192000;
  134. default: return 0;
  135. }
  136. }
  137. static int snd_ak4117_in_error_info(struct snd_kcontrol *kcontrol,
  138. struct snd_ctl_elem_info *uinfo)
  139. {
  140. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  141. uinfo->count = 1;
  142. uinfo->value.integer.min = 0;
  143. uinfo->value.integer.max = LONG_MAX;
  144. return 0;
  145. }
  146. static int snd_ak4117_in_error_get(struct snd_kcontrol *kcontrol,
  147. struct snd_ctl_elem_value *ucontrol)
  148. {
  149. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  150. long *ptr;
  151. spin_lock_irq(&chip->lock);
  152. ptr = (long *)(((char *)chip) + kcontrol->private_value);
  153. ucontrol->value.integer.value[0] = *ptr;
  154. *ptr = 0;
  155. spin_unlock_irq(&chip->lock);
  156. return 0;
  157. }
  158. #define snd_ak4117_in_bit_info snd_ctl_boolean_mono_info
  159. static int snd_ak4117_in_bit_get(struct snd_kcontrol *kcontrol,
  160. struct snd_ctl_elem_value *ucontrol)
  161. {
  162. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  163. unsigned char reg = kcontrol->private_value & 0xff;
  164. unsigned char bit = (kcontrol->private_value >> 8) & 0xff;
  165. unsigned char inv = (kcontrol->private_value >> 31) & 1;
  166. ucontrol->value.integer.value[0] = ((reg_read(chip, reg) & (1 << bit)) ? 1 : 0) ^ inv;
  167. return 0;
  168. }
  169. static int snd_ak4117_rx_info(struct snd_kcontrol *kcontrol,
  170. struct snd_ctl_elem_info *uinfo)
  171. {
  172. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  173. uinfo->count = 1;
  174. uinfo->value.integer.min = 0;
  175. uinfo->value.integer.max = 1;
  176. return 0;
  177. }
  178. static int snd_ak4117_rx_get(struct snd_kcontrol *kcontrol,
  179. struct snd_ctl_elem_value *ucontrol)
  180. {
  181. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  182. ucontrol->value.integer.value[0] = (chip->regmap[AK4117_REG_IO] & AK4117_IPS) ? 1 : 0;
  183. return 0;
  184. }
  185. static int snd_ak4117_rx_put(struct snd_kcontrol *kcontrol,
  186. struct snd_ctl_elem_value *ucontrol)
  187. {
  188. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  189. int change;
  190. u8 old_val;
  191. spin_lock_irq(&chip->lock);
  192. old_val = chip->regmap[AK4117_REG_IO];
  193. change = !!ucontrol->value.integer.value[0] != ((old_val & AK4117_IPS) ? 1 : 0);
  194. if (change)
  195. reg_write(chip, AK4117_REG_IO, (old_val & ~AK4117_IPS) | (ucontrol->value.integer.value[0] ? AK4117_IPS : 0));
  196. spin_unlock_irq(&chip->lock);
  197. return change;
  198. }
  199. static int snd_ak4117_rate_info(struct snd_kcontrol *kcontrol,
  200. struct snd_ctl_elem_info *uinfo)
  201. {
  202. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  203. uinfo->count = 1;
  204. uinfo->value.integer.min = 0;
  205. uinfo->value.integer.max = 192000;
  206. return 0;
  207. }
  208. static int snd_ak4117_rate_get(struct snd_kcontrol *kcontrol,
  209. struct snd_ctl_elem_value *ucontrol)
  210. {
  211. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  212. ucontrol->value.integer.value[0] = external_rate(reg_read(chip, AK4117_REG_RCS1));
  213. return 0;
  214. }
  215. static int snd_ak4117_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  216. {
  217. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  218. uinfo->count = 1;
  219. return 0;
  220. }
  221. static int snd_ak4117_spdif_get(struct snd_kcontrol *kcontrol,
  222. struct snd_ctl_elem_value *ucontrol)
  223. {
  224. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  225. unsigned i;
  226. for (i = 0; i < AK4117_REG_RXCSB_SIZE; i++)
  227. ucontrol->value.iec958.status[i] = reg_read(chip, AK4117_REG_RXCSB0 + i);
  228. return 0;
  229. }
  230. static int snd_ak4117_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  231. {
  232. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  233. uinfo->count = 1;
  234. return 0;
  235. }
  236. static int snd_ak4117_spdif_mask_get(struct snd_kcontrol *kcontrol,
  237. struct snd_ctl_elem_value *ucontrol)
  238. {
  239. memset(ucontrol->value.iec958.status, 0xff, AK4117_REG_RXCSB_SIZE);
  240. return 0;
  241. }
  242. static int snd_ak4117_spdif_pinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  243. {
  244. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  245. uinfo->value.integer.min = 0;
  246. uinfo->value.integer.max = 0xffff;
  247. uinfo->count = 4;
  248. return 0;
  249. }
  250. static int snd_ak4117_spdif_pget(struct snd_kcontrol *kcontrol,
  251. struct snd_ctl_elem_value *ucontrol)
  252. {
  253. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  254. unsigned short tmp;
  255. ucontrol->value.integer.value[0] = 0xf8f2;
  256. ucontrol->value.integer.value[1] = 0x4e1f;
  257. tmp = reg_read(chip, AK4117_REG_Pc0) | (reg_read(chip, AK4117_REG_Pc1) << 8);
  258. ucontrol->value.integer.value[2] = tmp;
  259. tmp = reg_read(chip, AK4117_REG_Pd0) | (reg_read(chip, AK4117_REG_Pd1) << 8);
  260. ucontrol->value.integer.value[3] = tmp;
  261. return 0;
  262. }
  263. static int snd_ak4117_spdif_qinfo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  264. {
  265. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  266. uinfo->count = AK4117_REG_QSUB_SIZE;
  267. return 0;
  268. }
  269. static int snd_ak4117_spdif_qget(struct snd_kcontrol *kcontrol,
  270. struct snd_ctl_elem_value *ucontrol)
  271. {
  272. struct ak4117 *chip = snd_kcontrol_chip(kcontrol);
  273. unsigned i;
  274. for (i = 0; i < AK4117_REG_QSUB_SIZE; i++)
  275. ucontrol->value.bytes.data[i] = reg_read(chip, AK4117_REG_QSUB_ADDR + i);
  276. return 0;
  277. }
  278. /* Don't forget to change AK4117_CONTROLS define!!! */
  279. static struct snd_kcontrol_new snd_ak4117_iec958_controls[] = {
  280. {
  281. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  282. .name = "IEC958 Parity Errors",
  283. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  284. .info = snd_ak4117_in_error_info,
  285. .get = snd_ak4117_in_error_get,
  286. .private_value = offsetof(struct ak4117, parity_errors),
  287. },
  288. {
  289. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  290. .name = "IEC958 V-Bit Errors",
  291. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  292. .info = snd_ak4117_in_error_info,
  293. .get = snd_ak4117_in_error_get,
  294. .private_value = offsetof(struct ak4117, v_bit_errors),
  295. },
  296. {
  297. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  298. .name = "IEC958 C-CRC Errors",
  299. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  300. .info = snd_ak4117_in_error_info,
  301. .get = snd_ak4117_in_error_get,
  302. .private_value = offsetof(struct ak4117, ccrc_errors),
  303. },
  304. {
  305. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  306. .name = "IEC958 Q-CRC Errors",
  307. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  308. .info = snd_ak4117_in_error_info,
  309. .get = snd_ak4117_in_error_get,
  310. .private_value = offsetof(struct ak4117, qcrc_errors),
  311. },
  312. {
  313. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  314. .name = "IEC958 External Rate",
  315. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  316. .info = snd_ak4117_rate_info,
  317. .get = snd_ak4117_rate_get,
  318. },
  319. {
  320. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  321. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  322. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  323. .info = snd_ak4117_spdif_mask_info,
  324. .get = snd_ak4117_spdif_mask_get,
  325. },
  326. {
  327. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  328. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  329. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  330. .info = snd_ak4117_spdif_info,
  331. .get = snd_ak4117_spdif_get,
  332. },
  333. {
  334. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  335. .name = "IEC958 Preample Capture Default",
  336. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  337. .info = snd_ak4117_spdif_pinfo,
  338. .get = snd_ak4117_spdif_pget,
  339. },
  340. {
  341. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  342. .name = "IEC958 Q-subcode Capture Default",
  343. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  344. .info = snd_ak4117_spdif_qinfo,
  345. .get = snd_ak4117_spdif_qget,
  346. },
  347. {
  348. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  349. .name = "IEC958 Audio",
  350. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  351. .info = snd_ak4117_in_bit_info,
  352. .get = snd_ak4117_in_bit_get,
  353. .private_value = (1<<31) | (3<<8) | AK4117_REG_RCS0,
  354. },
  355. {
  356. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  357. .name = "IEC958 Non-PCM Bitstream",
  358. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  359. .info = snd_ak4117_in_bit_info,
  360. .get = snd_ak4117_in_bit_get,
  361. .private_value = (5<<8) | AK4117_REG_RCS1,
  362. },
  363. {
  364. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  365. .name = "IEC958 DTS Bitstream",
  366. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  367. .info = snd_ak4117_in_bit_info,
  368. .get = snd_ak4117_in_bit_get,
  369. .private_value = (6<<8) | AK4117_REG_RCS1,
  370. },
  371. {
  372. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  373. .name = "AK4117 Input Select",
  374. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_WRITE,
  375. .info = snd_ak4117_rx_info,
  376. .get = snd_ak4117_rx_get,
  377. .put = snd_ak4117_rx_put,
  378. }
  379. };
  380. int snd_ak4117_build(struct ak4117 *ak4117, struct snd_pcm_substream *cap_substream)
  381. {
  382. struct snd_kcontrol *kctl;
  383. unsigned int idx;
  384. int err;
  385. if (snd_BUG_ON(!cap_substream))
  386. return -EINVAL;
  387. ak4117->substream = cap_substream;
  388. for (idx = 0; idx < AK4117_CONTROLS; idx++) {
  389. kctl = snd_ctl_new1(&snd_ak4117_iec958_controls[idx], ak4117);
  390. if (kctl == NULL)
  391. return -ENOMEM;
  392. kctl->id.device = cap_substream->pcm->device;
  393. kctl->id.subdevice = cap_substream->number;
  394. err = snd_ctl_add(ak4117->card, kctl);
  395. if (err < 0)
  396. return err;
  397. ak4117->kctls[idx] = kctl;
  398. }
  399. return 0;
  400. }
  401. int snd_ak4117_external_rate(struct ak4117 *ak4117)
  402. {
  403. unsigned char rcs1;
  404. rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
  405. return external_rate(rcs1);
  406. }
  407. int snd_ak4117_check_rate_and_errors(struct ak4117 *ak4117, unsigned int flags)
  408. {
  409. struct snd_pcm_runtime *runtime = ak4117->substream ? ak4117->substream->runtime : NULL;
  410. unsigned long _flags;
  411. int res = 0;
  412. unsigned char rcs0, rcs1, rcs2;
  413. unsigned char c0, c1;
  414. rcs1 = reg_read(ak4117, AK4117_REG_RCS1);
  415. if (flags & AK4117_CHECK_NO_STAT)
  416. goto __rate;
  417. rcs0 = reg_read(ak4117, AK4117_REG_RCS0);
  418. rcs2 = reg_read(ak4117, AK4117_REG_RCS2);
  419. // printk(KERN_DEBUG "AK IRQ: rcs0 = 0x%x, rcs1 = 0x%x, rcs2 = 0x%x\n", rcs0, rcs1, rcs2);
  420. spin_lock_irqsave(&ak4117->lock, _flags);
  421. if (rcs0 & AK4117_PAR)
  422. ak4117->parity_errors++;
  423. if (rcs0 & AK4117_V)
  424. ak4117->v_bit_errors++;
  425. if (rcs2 & AK4117_CCRC)
  426. ak4117->ccrc_errors++;
  427. if (rcs2 & AK4117_QCRC)
  428. ak4117->qcrc_errors++;
  429. c0 = (ak4117->rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK)) ^
  430. (rcs0 & (AK4117_QINT | AK4117_CINT | AK4117_STC | AK4117_AUDION | AK4117_AUTO | AK4117_UNLCK));
  431. c1 = (ak4117->rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f)) ^
  432. (rcs1 & (AK4117_DTSCD | AK4117_NPCM | AK4117_PEM | 0x0f));
  433. ak4117->rcs0 = rcs0 & ~(AK4117_QINT | AK4117_CINT | AK4117_STC);
  434. ak4117->rcs1 = rcs1;
  435. ak4117->rcs2 = rcs2;
  436. spin_unlock_irqrestore(&ak4117->lock, _flags);
  437. if (rcs0 & AK4117_PAR)
  438. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[0]->id);
  439. if (rcs0 & AK4117_V)
  440. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[1]->id);
  441. if (rcs2 & AK4117_CCRC)
  442. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[2]->id);
  443. if (rcs2 & AK4117_QCRC)
  444. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[3]->id);
  445. /* rate change */
  446. if (c1 & 0x0f)
  447. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[4]->id);
  448. if ((c1 & AK4117_PEM) | (c0 & AK4117_CINT))
  449. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[6]->id);
  450. if (c0 & AK4117_QINT)
  451. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[8]->id);
  452. if (c0 & AK4117_AUDION)
  453. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[9]->id);
  454. if (c1 & AK4117_NPCM)
  455. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[10]->id);
  456. if (c1 & AK4117_DTSCD)
  457. snd_ctl_notify(ak4117->card, SNDRV_CTL_EVENT_MASK_VALUE, &ak4117->kctls[11]->id);
  458. if (ak4117->change_callback && (c0 | c1) != 0)
  459. ak4117->change_callback(ak4117, c0, c1);
  460. __rate:
  461. /* compare rate */
  462. res = external_rate(rcs1);
  463. if (!(flags & AK4117_CHECK_NO_RATE) && runtime && runtime->rate != res) {
  464. snd_pcm_stream_lock_irqsave(ak4117->substream, _flags);
  465. if (snd_pcm_running(ak4117->substream)) {
  466. // printk(KERN_DEBUG "rate changed (%i <- %i)\n", runtime->rate, res);
  467. snd_pcm_stop(ak4117->substream, SNDRV_PCM_STATE_DRAINING);
  468. wake_up(&runtime->sleep);
  469. res = 1;
  470. }
  471. snd_pcm_stream_unlock_irqrestore(ak4117->substream, _flags);
  472. }
  473. return res;
  474. }
  475. static void snd_ak4117_timer(unsigned long data)
  476. {
  477. struct ak4117 *chip = (struct ak4117 *)data;
  478. if (chip->init)
  479. return;
  480. snd_ak4117_check_rate_and_errors(chip, 0);
  481. chip->timer.expires = 1 + jiffies;
  482. add_timer(&chip->timer);
  483. }
  484. EXPORT_SYMBOL(snd_ak4117_create);
  485. EXPORT_SYMBOL(snd_ak4117_reg_write);
  486. EXPORT_SYMBOL(snd_ak4117_reinit);
  487. EXPORT_SYMBOL(snd_ak4117_build);
  488. EXPORT_SYMBOL(snd_ak4117_external_rate);
  489. EXPORT_SYMBOL(snd_ak4117_check_rate_and_errors);