mxc_w1.c 4.9 KB

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  1. /*
  2. * Copyright 2005-2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. * Copyright 2008 Luotao Fu, kernel@pengutronix.de
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
  17. *
  18. */
  19. #include <linux/module.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/clk.h>
  23. #include <linux/delay.h>
  24. #include <linux/io.h>
  25. #include "../w1.h"
  26. #include "../w1_int.h"
  27. #include "../w1_log.h"
  28. /* According to the mx27 Datasheet the reset procedure should take up to about
  29. * 1350us. We set the timeout to 500*100us = 50ms for sure */
  30. #define MXC_W1_RESET_TIMEOUT 500
  31. /*
  32. * MXC W1 Register offsets
  33. */
  34. #define MXC_W1_CONTROL 0x00
  35. #define MXC_W1_TIME_DIVIDER 0x02
  36. #define MXC_W1_RESET 0x04
  37. #define MXC_W1_COMMAND 0x06
  38. #define MXC_W1_TXRX 0x08
  39. #define MXC_W1_INTERRUPT 0x0A
  40. #define MXC_W1_INTERRUPT_EN 0x0C
  41. struct mxc_w1_device {
  42. void __iomem *regs;
  43. unsigned int clkdiv;
  44. struct clk *clk;
  45. struct w1_bus_master bus_master;
  46. };
  47. /*
  48. * this is the low level routine to
  49. * reset the device on the One Wire interface
  50. * on the hardware
  51. */
  52. static u8 mxc_w1_ds2_reset_bus(void *data)
  53. {
  54. u8 reg_val;
  55. unsigned int timeout_cnt = 0;
  56. struct mxc_w1_device *dev = data;
  57. __raw_writeb(0x80, (dev->regs + MXC_W1_CONTROL));
  58. while (1) {
  59. reg_val = __raw_readb(dev->regs + MXC_W1_CONTROL);
  60. if (((reg_val >> 7) & 0x1) == 0 ||
  61. timeout_cnt > MXC_W1_RESET_TIMEOUT)
  62. break;
  63. else
  64. timeout_cnt++;
  65. udelay(100);
  66. }
  67. return (reg_val >> 7) & 0x1;
  68. }
  69. /*
  70. * this is the low level routine to read/write a bit on the One Wire
  71. * interface on the hardware. It does write 0 if parameter bit is set
  72. * to 0, otherwise a write 1/read.
  73. */
  74. static u8 mxc_w1_ds2_touch_bit(void *data, u8 bit)
  75. {
  76. struct mxc_w1_device *mdev = data;
  77. void __iomem *ctrl_addr = mdev->regs + MXC_W1_CONTROL;
  78. unsigned int timeout_cnt = 400; /* Takes max. 120us according to
  79. * datasheet.
  80. */
  81. __raw_writeb((1 << (5 - bit)), ctrl_addr);
  82. while (timeout_cnt--) {
  83. if (!((__raw_readb(ctrl_addr) >> (5 - bit)) & 0x1))
  84. break;
  85. udelay(1);
  86. }
  87. return ((__raw_readb(ctrl_addr)) >> 3) & 0x1;
  88. }
  89. static int __init mxc_w1_probe(struct platform_device *pdev)
  90. {
  91. struct mxc_w1_device *mdev;
  92. struct resource *res;
  93. int err = 0;
  94. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  95. if (!res)
  96. return -ENODEV;
  97. mdev = kzalloc(sizeof(struct mxc_w1_device), GFP_KERNEL);
  98. if (!mdev)
  99. return -ENOMEM;
  100. mdev->clk = clk_get(&pdev->dev, "owire");
  101. if (!mdev->clk) {
  102. err = -ENODEV;
  103. goto failed_clk;
  104. }
  105. mdev->clkdiv = (clk_get_rate(mdev->clk) / 1000000) - 1;
  106. res = request_mem_region(res->start, resource_size(res),
  107. "mxc_w1");
  108. if (!res) {
  109. err = -EBUSY;
  110. goto failed_req;
  111. }
  112. mdev->regs = ioremap(res->start, resource_size(res));
  113. if (!mdev->regs) {
  114. printk(KERN_ERR "Cannot map frame buffer registers\n");
  115. goto failed_ioremap;
  116. }
  117. clk_enable(mdev->clk);
  118. __raw_writeb(mdev->clkdiv, mdev->regs + MXC_W1_TIME_DIVIDER);
  119. mdev->bus_master.data = mdev;
  120. mdev->bus_master.reset_bus = mxc_w1_ds2_reset_bus;
  121. mdev->bus_master.touch_bit = mxc_w1_ds2_touch_bit;
  122. err = w1_add_master_device(&mdev->bus_master);
  123. if (err)
  124. goto failed_add;
  125. platform_set_drvdata(pdev, mdev);
  126. return 0;
  127. failed_add:
  128. iounmap(mdev->regs);
  129. failed_ioremap:
  130. release_mem_region(res->start, resource_size(res));
  131. failed_req:
  132. clk_put(mdev->clk);
  133. failed_clk:
  134. kfree(mdev);
  135. return err;
  136. }
  137. /*
  138. * disassociate the w1 device from the driver
  139. */
  140. static int mxc_w1_remove(struct platform_device *pdev)
  141. {
  142. struct mxc_w1_device *mdev = platform_get_drvdata(pdev);
  143. struct resource *res;
  144. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  145. w1_remove_master_device(&mdev->bus_master);
  146. iounmap(mdev->regs);
  147. release_mem_region(res->start, resource_size(res));
  148. clk_disable(mdev->clk);
  149. clk_put(mdev->clk);
  150. platform_set_drvdata(pdev, NULL);
  151. return 0;
  152. }
  153. static struct platform_driver mxc_w1_driver = {
  154. .driver = {
  155. .name = "mxc_w1",
  156. },
  157. .probe = mxc_w1_probe,
  158. .remove = mxc_w1_remove,
  159. };
  160. static int __init mxc_w1_init(void)
  161. {
  162. return platform_driver_register(&mxc_w1_driver);
  163. }
  164. static void mxc_w1_exit(void)
  165. {
  166. platform_driver_unregister(&mxc_w1_driver);
  167. }
  168. module_init(mxc_w1_init);
  169. module_exit(mxc_w1_exit);
  170. MODULE_LICENSE("GPL");
  171. MODULE_AUTHOR("Freescale Semiconductors Inc");
  172. MODULE_DESCRIPTION("Driver for One-Wire on MXC");