qdio_setup.c 13 KB

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  1. /*
  2. * driver/s390/cio/qdio_setup.c
  3. *
  4. * qdio queue initialization
  5. *
  6. * Copyright (C) IBM Corp. 2008
  7. * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <asm/qdio.h>
  12. #include "cio.h"
  13. #include "css.h"
  14. #include "device.h"
  15. #include "ioasm.h"
  16. #include "chsc.h"
  17. #include "qdio.h"
  18. #include "qdio_debug.h"
  19. static struct kmem_cache *qdio_q_cache;
  20. /*
  21. * qebsm is only available under 64bit but the adapter sets the feature
  22. * flag anyway, so we manually override it.
  23. */
  24. static inline int qebsm_possible(void)
  25. {
  26. #ifdef CONFIG_64BIT
  27. return css_general_characteristics.qebsm;
  28. #endif
  29. return 0;
  30. }
  31. /*
  32. * qib_param_field: pointer to 128 bytes or NULL, if no param field
  33. * nr_input_qs: pointer to nr_queues*128 words of data or NULL
  34. */
  35. static void set_impl_params(struct qdio_irq *irq_ptr,
  36. unsigned int qib_param_field_format,
  37. unsigned char *qib_param_field,
  38. unsigned long *input_slib_elements,
  39. unsigned long *output_slib_elements)
  40. {
  41. struct qdio_q *q;
  42. int i, j;
  43. if (!irq_ptr)
  44. return;
  45. WARN_ON((unsigned long)&irq_ptr->qib & 0xff);
  46. irq_ptr->qib.pfmt = qib_param_field_format;
  47. if (qib_param_field)
  48. memcpy(irq_ptr->qib.parm, qib_param_field,
  49. QDIO_MAX_BUFFERS_PER_Q);
  50. if (!input_slib_elements)
  51. goto output;
  52. for_each_input_queue(irq_ptr, q, i) {
  53. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  54. q->slib->slibe[j].parms =
  55. input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
  56. }
  57. output:
  58. if (!output_slib_elements)
  59. return;
  60. for_each_output_queue(irq_ptr, q, i) {
  61. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  62. q->slib->slibe[j].parms =
  63. output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
  64. }
  65. }
  66. static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
  67. {
  68. struct qdio_q *q;
  69. int i;
  70. for (i = 0; i < nr_queues; i++) {
  71. q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
  72. if (!q)
  73. return -ENOMEM;
  74. WARN_ON((unsigned long)q & 0xff);
  75. q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
  76. if (!q->slib) {
  77. kmem_cache_free(qdio_q_cache, q);
  78. return -ENOMEM;
  79. }
  80. WARN_ON((unsigned long)q->slib & 0x7ff);
  81. irq_ptr_qs[i] = q;
  82. }
  83. return 0;
  84. }
  85. int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
  86. {
  87. int rc;
  88. rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
  89. if (rc)
  90. return rc;
  91. rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
  92. return rc;
  93. }
  94. static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
  95. qdio_handler_t *handler, int i)
  96. {
  97. /* must be cleared by every qdio_establish */
  98. memset(q, 0, ((char *)&q->slib) - ((char *)q));
  99. memset(q->slib, 0, PAGE_SIZE);
  100. q->irq_ptr = irq_ptr;
  101. q->mask = 1 << (31 - i);
  102. q->nr = i;
  103. q->handler = handler;
  104. }
  105. static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
  106. void **sbals_array, int i)
  107. {
  108. struct qdio_q *prev;
  109. int j;
  110. DBF_HEX(&q, sizeof(void *));
  111. q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);
  112. /* fill in sbal */
  113. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
  114. q->sbal[j] = *sbals_array++;
  115. WARN_ON((unsigned long)q->sbal[j] & 0xff);
  116. }
  117. /* fill in slib */
  118. if (i > 0) {
  119. prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
  120. : irq_ptr->output_qs[i - 1];
  121. prev->slib->nsliba = (unsigned long)q->slib;
  122. }
  123. q->slib->sla = (unsigned long)q->sl;
  124. q->slib->slsba = (unsigned long)&q->slsb.val[0];
  125. /* fill in sl */
  126. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  127. q->sl->element[j].sbal = (unsigned long)q->sbal[j];
  128. DBF_EVENT("sl-slsb-sbal");
  129. DBF_HEX(q->sl, sizeof(void *));
  130. DBF_HEX(&q->slsb, sizeof(void *));
  131. DBF_HEX(q->sbal, sizeof(void *));
  132. }
  133. static void setup_queues(struct qdio_irq *irq_ptr,
  134. struct qdio_initialize *qdio_init)
  135. {
  136. struct qdio_q *q;
  137. void **input_sbal_array = qdio_init->input_sbal_addr_array;
  138. void **output_sbal_array = qdio_init->output_sbal_addr_array;
  139. int i;
  140. for_each_input_queue(irq_ptr, q, i) {
  141. DBF_EVENT("in-q:%1d", i);
  142. setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
  143. q->is_input_q = 1;
  144. setup_storage_lists(q, irq_ptr, input_sbal_array, i);
  145. input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
  146. if (is_thinint_irq(irq_ptr))
  147. tasklet_init(&q->tasklet, tiqdio_inbound_processing,
  148. (unsigned long) q);
  149. else
  150. tasklet_init(&q->tasklet, qdio_inbound_processing,
  151. (unsigned long) q);
  152. }
  153. for_each_output_queue(irq_ptr, q, i) {
  154. DBF_EVENT("outq:%1d", i);
  155. setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
  156. q->is_input_q = 0;
  157. setup_storage_lists(q, irq_ptr, output_sbal_array, i);
  158. output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
  159. tasklet_init(&q->tasklet, qdio_outbound_processing,
  160. (unsigned long) q);
  161. setup_timer(&q->u.out.timer, (void(*)(unsigned long))
  162. &qdio_outbound_timer, (unsigned long)q);
  163. }
  164. }
  165. static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
  166. {
  167. if (qdioac & AC1_SIGA_INPUT_NEEDED)
  168. irq_ptr->siga_flag.input = 1;
  169. if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
  170. irq_ptr->siga_flag.output = 1;
  171. if (qdioac & AC1_SIGA_SYNC_NEEDED)
  172. irq_ptr->siga_flag.sync = 1;
  173. if (qdioac & AC1_AUTOMATIC_SYNC_ON_THININT)
  174. irq_ptr->siga_flag.no_sync_ti = 1;
  175. if (qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI)
  176. irq_ptr->siga_flag.no_sync_out_pci = 1;
  177. if (irq_ptr->siga_flag.no_sync_out_pci &&
  178. irq_ptr->siga_flag.no_sync_ti)
  179. irq_ptr->siga_flag.no_sync_out_ti = 1;
  180. }
  181. static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
  182. unsigned char qdioac, unsigned long token)
  183. {
  184. if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
  185. goto no_qebsm;
  186. if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
  187. (!(qdioac & AC1_SC_QEBSM_ENABLED)))
  188. goto no_qebsm;
  189. irq_ptr->sch_token = token;
  190. DBF_EVENT("V=V:1");
  191. DBF_EVENT("%8lx", irq_ptr->sch_token);
  192. return;
  193. no_qebsm:
  194. irq_ptr->sch_token = 0;
  195. irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
  196. DBF_EVENT("noV=V");
  197. }
  198. /*
  199. * If there is a qdio_irq we use the chsc_page and store the information
  200. * in the qdio_irq, otherwise we copy it to the specified structure.
  201. */
  202. int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
  203. struct subchannel_id *schid,
  204. struct qdio_ssqd_desc *data)
  205. {
  206. struct chsc_ssqd_area *ssqd;
  207. int rc;
  208. DBF_EVENT("getssqd:%4x", schid->sch_no);
  209. if (irq_ptr != NULL)
  210. ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
  211. else
  212. ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
  213. memset(ssqd, 0, PAGE_SIZE);
  214. ssqd->request = (struct chsc_header) {
  215. .length = 0x0010,
  216. .code = 0x0024,
  217. };
  218. ssqd->first_sch = schid->sch_no;
  219. ssqd->last_sch = schid->sch_no;
  220. ssqd->ssid = schid->ssid;
  221. if (chsc(ssqd))
  222. return -EIO;
  223. rc = chsc_error_from_response(ssqd->response.code);
  224. if (rc)
  225. return rc;
  226. if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
  227. !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
  228. (ssqd->qdio_ssqd.sch != schid->sch_no))
  229. return -EINVAL;
  230. if (irq_ptr != NULL)
  231. memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
  232. sizeof(struct qdio_ssqd_desc));
  233. else {
  234. memcpy(data, &ssqd->qdio_ssqd,
  235. sizeof(struct qdio_ssqd_desc));
  236. free_page((unsigned long)ssqd);
  237. }
  238. return 0;
  239. }
  240. void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
  241. {
  242. unsigned char qdioac;
  243. int rc;
  244. rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
  245. if (rc) {
  246. DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
  247. DBF_ERROR("rc:%x", rc);
  248. /* all flags set, worst case */
  249. qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
  250. AC1_SIGA_SYNC_NEEDED;
  251. } else
  252. qdioac = irq_ptr->ssqd_desc.qdioac1;
  253. check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
  254. process_ac_flags(irq_ptr, qdioac);
  255. DBF_EVENT("qdioac:%4x", qdioac);
  256. }
  257. void qdio_release_memory(struct qdio_irq *irq_ptr)
  258. {
  259. struct qdio_q *q;
  260. int i;
  261. /*
  262. * Must check queue array manually since irq_ptr->nr_input_queues /
  263. * irq_ptr->nr_input_queues may not yet be set.
  264. */
  265. for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
  266. q = irq_ptr->input_qs[i];
  267. if (q) {
  268. free_page((unsigned long) q->slib);
  269. kmem_cache_free(qdio_q_cache, q);
  270. }
  271. }
  272. for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
  273. q = irq_ptr->output_qs[i];
  274. if (q) {
  275. free_page((unsigned long) q->slib);
  276. kmem_cache_free(qdio_q_cache, q);
  277. }
  278. }
  279. free_page((unsigned long) irq_ptr->qdr);
  280. free_page(irq_ptr->chsc_page);
  281. free_page((unsigned long) irq_ptr);
  282. }
  283. static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
  284. struct qdio_q **irq_ptr_qs,
  285. int i, int nr)
  286. {
  287. irq_ptr->qdr->qdf0[i + nr].sliba =
  288. (unsigned long)irq_ptr_qs[i]->slib;
  289. irq_ptr->qdr->qdf0[i + nr].sla =
  290. (unsigned long)irq_ptr_qs[i]->sl;
  291. irq_ptr->qdr->qdf0[i + nr].slsba =
  292. (unsigned long)&irq_ptr_qs[i]->slsb.val[0];
  293. irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY;
  294. irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY;
  295. irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY;
  296. irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY;
  297. }
  298. static void setup_qdr(struct qdio_irq *irq_ptr,
  299. struct qdio_initialize *qdio_init)
  300. {
  301. int i;
  302. irq_ptr->qdr->qfmt = qdio_init->q_format;
  303. irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
  304. irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
  305. irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
  306. irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
  307. irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
  308. irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY;
  309. for (i = 0; i < qdio_init->no_input_qs; i++)
  310. __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);
  311. for (i = 0; i < qdio_init->no_output_qs; i++)
  312. __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
  313. qdio_init->no_input_qs);
  314. }
  315. static void setup_qib(struct qdio_irq *irq_ptr,
  316. struct qdio_initialize *init_data)
  317. {
  318. if (qebsm_possible())
  319. irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
  320. irq_ptr->qib.qfmt = init_data->q_format;
  321. if (init_data->no_input_qs)
  322. irq_ptr->qib.isliba =
  323. (unsigned long)(irq_ptr->input_qs[0]->slib);
  324. if (init_data->no_output_qs)
  325. irq_ptr->qib.osliba =
  326. (unsigned long)(irq_ptr->output_qs[0]->slib);
  327. memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
  328. }
  329. int qdio_setup_irq(struct qdio_initialize *init_data)
  330. {
  331. struct ciw *ciw;
  332. struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
  333. int rc;
  334. memset(irq_ptr, 0, ((char *)&irq_ptr->qdr) - ((char *)irq_ptr));
  335. /* wipes qib.ac, required by ar7063 */
  336. memset(irq_ptr->qdr, 0, sizeof(struct qdr));
  337. irq_ptr->int_parm = init_data->int_parm;
  338. irq_ptr->nr_input_qs = init_data->no_input_qs;
  339. irq_ptr->nr_output_qs = init_data->no_output_qs;
  340. irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
  341. irq_ptr->cdev = init_data->cdev;
  342. setup_queues(irq_ptr, init_data);
  343. setup_qib(irq_ptr, init_data);
  344. qdio_setup_thinint(irq_ptr);
  345. set_impl_params(irq_ptr, init_data->qib_param_field_format,
  346. init_data->qib_param_field,
  347. init_data->input_slib_elements,
  348. init_data->output_slib_elements);
  349. /* fill input and output descriptors */
  350. setup_qdr(irq_ptr, init_data);
  351. /* qdr, qib, sls, slsbs, slibs, sbales are filled now */
  352. /* get qdio commands */
  353. ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
  354. if (!ciw) {
  355. DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
  356. rc = -EINVAL;
  357. goto out_err;
  358. }
  359. irq_ptr->equeue = *ciw;
  360. ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
  361. if (!ciw) {
  362. DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
  363. rc = -EINVAL;
  364. goto out_err;
  365. }
  366. irq_ptr->aqueue = *ciw;
  367. /* set new interrupt handler */
  368. irq_ptr->orig_handler = init_data->cdev->handler;
  369. init_data->cdev->handler = qdio_int_handler;
  370. return 0;
  371. out_err:
  372. qdio_release_memory(irq_ptr);
  373. return rc;
  374. }
  375. void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
  376. struct ccw_device *cdev)
  377. {
  378. char s[80];
  379. snprintf(s, 80, "qdio: %s %s on SC %x using "
  380. "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s%s\n",
  381. dev_name(&cdev->dev),
  382. (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
  383. ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
  384. irq_ptr->schid.sch_no,
  385. is_thinint_irq(irq_ptr),
  386. (irq_ptr->sch_token) ? 1 : 0,
  387. (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
  388. css_general_characteristics.aif_tdd,
  389. (irq_ptr->siga_flag.input) ? "R" : " ",
  390. (irq_ptr->siga_flag.output) ? "W" : " ",
  391. (irq_ptr->siga_flag.sync) ? "S" : " ",
  392. (!irq_ptr->siga_flag.no_sync_ti) ? "A" : " ",
  393. (!irq_ptr->siga_flag.no_sync_out_ti) ? "O" : " ",
  394. (!irq_ptr->siga_flag.no_sync_out_pci) ? "P" : " ");
  395. printk(KERN_INFO "%s", s);
  396. }
  397. int __init qdio_setup_init(void)
  398. {
  399. qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
  400. 256, 0, NULL);
  401. if (!qdio_q_cache)
  402. return -ENOMEM;
  403. /* Check for OSA/FCP thin interrupts (bit 67). */
  404. DBF_EVENT("thinint:%1d",
  405. (css_general_characteristics.aif_osa) ? 1 : 0);
  406. /* Check for QEBSM support in general (bit 58). */
  407. DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
  408. return 0;
  409. }
  410. void qdio_setup_exit(void)
  411. {
  412. kmem_cache_destroy(qdio_q_cache);
  413. }