iwl3945-base.c 148 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /*************** STATION TABLE MANAGEMENT ****
  85. * mac80211 should be examined to determine if sta_info is duplicating
  86. * the functionality provided here
  87. */
  88. /**************************************************************/
  89. #if 0 /* temporary disable till we add real remove station */
  90. /**
  91. * iwl3945_remove_station - Remove driver's knowledge of station.
  92. *
  93. * NOTE: This does not remove station from device's station table.
  94. */
  95. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  96. {
  97. int index = IWL_INVALID_STATION;
  98. int i;
  99. unsigned long flags;
  100. spin_lock_irqsave(&priv->sta_lock, flags);
  101. if (is_ap)
  102. index = IWL_AP_ID;
  103. else if (is_broadcast_ether_addr(addr))
  104. index = priv->hw_params.bcast_sta_id;
  105. else
  106. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  107. if (priv->stations_39[i].used &&
  108. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  109. addr)) {
  110. index = i;
  111. break;
  112. }
  113. if (unlikely(index == IWL_INVALID_STATION))
  114. goto out;
  115. if (priv->stations_39[index].used) {
  116. priv->stations_39[index].used = 0;
  117. priv->num_stations--;
  118. }
  119. BUG_ON(priv->num_stations < 0);
  120. out:
  121. spin_unlock_irqrestore(&priv->sta_lock, flags);
  122. return 0;
  123. }
  124. #endif
  125. /**
  126. * iwl3945_clear_stations_table - Clear the driver's station table
  127. *
  128. * NOTE: This does not clear or otherwise alter the device's station table.
  129. */
  130. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  131. {
  132. unsigned long flags;
  133. spin_lock_irqsave(&priv->sta_lock, flags);
  134. priv->num_stations = 0;
  135. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  136. spin_unlock_irqrestore(&priv->sta_lock, flags);
  137. }
  138. /**
  139. * iwl3945_add_station - Add station to station tables in driver and device
  140. */
  141. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  142. {
  143. int i;
  144. int index = IWL_INVALID_STATION;
  145. struct iwl3945_station_entry *station;
  146. unsigned long flags_spin;
  147. u8 rate;
  148. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  149. if (is_ap)
  150. index = IWL_AP_ID;
  151. else if (is_broadcast_ether_addr(addr))
  152. index = priv->hw_params.bcast_sta_id;
  153. else
  154. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  155. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  156. addr)) {
  157. index = i;
  158. break;
  159. }
  160. if (!priv->stations_39[i].used &&
  161. index == IWL_INVALID_STATION)
  162. index = i;
  163. }
  164. /* These two conditions has the same outcome but keep them separate
  165. since they have different meaning */
  166. if (unlikely(index == IWL_INVALID_STATION)) {
  167. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  168. return index;
  169. }
  170. if (priv->stations_39[index].used &&
  171. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  172. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  173. return index;
  174. }
  175. IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
  176. station = &priv->stations_39[index];
  177. station->used = 1;
  178. priv->num_stations++;
  179. /* Set up the REPLY_ADD_STA command to send to device */
  180. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  181. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  182. station->sta.mode = 0;
  183. station->sta.sta.sta_id = index;
  184. station->sta.station_flags = 0;
  185. if (priv->band == IEEE80211_BAND_5GHZ)
  186. rate = IWL_RATE_6M_PLCP;
  187. else
  188. rate = IWL_RATE_1M_PLCP;
  189. /* Turn on both antennas for the station... */
  190. station->sta.rate_n_flags =
  191. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  192. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  193. /* Add station to device's station table */
  194. iwl_send_add_sta(priv,
  195. (struct iwl_addsta_cmd *)&station->sta, flags);
  196. return index;
  197. }
  198. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  199. {
  200. int rc = 0;
  201. struct iwl_rx_packet *res = NULL;
  202. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  203. struct iwl_host_cmd cmd = {
  204. .id = REPLY_RXON_ASSOC,
  205. .len = sizeof(rxon_assoc),
  206. .meta.flags = CMD_WANT_SKB,
  207. .data = &rxon_assoc,
  208. };
  209. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  210. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  211. if ((rxon1->flags == rxon2->flags) &&
  212. (rxon1->filter_flags == rxon2->filter_flags) &&
  213. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  214. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  215. IWL_DEBUG_INFO(priv, "Using current RXON_ASSOC. Not resending.\n");
  216. return 0;
  217. }
  218. rxon_assoc.flags = priv->staging_rxon.flags;
  219. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  220. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  221. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  222. rxon_assoc.reserved = 0;
  223. rc = iwl_send_cmd_sync(priv, &cmd);
  224. if (rc)
  225. return rc;
  226. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  227. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  228. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  229. rc = -EIO;
  230. }
  231. priv->alloc_rxb_skb--;
  232. dev_kfree_skb_any(cmd.meta.u.skb);
  233. return rc;
  234. }
  235. /**
  236. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  237. * @priv: eeprom and antenna fields are used to determine antenna flags
  238. *
  239. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  240. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  241. *
  242. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  243. * IWL_ANTENNA_MAIN - Force MAIN antenna
  244. * IWL_ANTENNA_AUX - Force AUX antenna
  245. */
  246. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  247. {
  248. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  249. switch (iwl3945_mod_params.antenna) {
  250. case IWL_ANTENNA_DIVERSITY:
  251. return 0;
  252. case IWL_ANTENNA_MAIN:
  253. if (eeprom->antenna_switch_type)
  254. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  255. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  256. case IWL_ANTENNA_AUX:
  257. if (eeprom->antenna_switch_type)
  258. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  259. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  260. }
  261. /* bad antenna selector value */
  262. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  263. iwl3945_mod_params.antenna);
  264. return 0; /* "diversity" is default if error */
  265. }
  266. /**
  267. * iwl3945_commit_rxon - commit staging_rxon to hardware
  268. *
  269. * The RXON command in staging_rxon is committed to the hardware and
  270. * the active_rxon structure is updated with the new data. This
  271. * function correctly transitions out of the RXON_ASSOC_MSK state if
  272. * a HW tune is required based on the RXON structure changes.
  273. */
  274. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  275. {
  276. /* cast away the const for active_rxon in this function */
  277. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  278. struct iwl3945_rxon_cmd *staging_rxon = (void *)&priv->staging_rxon;
  279. int rc = 0;
  280. bool new_assoc =
  281. !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
  282. if (!iwl_is_alive(priv))
  283. return -1;
  284. /* always get timestamp with Rx frame */
  285. staging_rxon->flags |= RXON_FLG_TSF2HOST_MSK;
  286. /* select antenna */
  287. staging_rxon->flags &=
  288. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  289. staging_rxon->flags |= iwl3945_get_antenna_flags(priv);
  290. rc = iwl_check_rxon_cmd(priv);
  291. if (rc) {
  292. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  293. return -EINVAL;
  294. }
  295. /* If we don't need to send a full RXON, we can use
  296. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  297. * and other flags for the current radio configuration. */
  298. if (!iwl_full_rxon_required(priv)) {
  299. rc = iwl3945_send_rxon_assoc(priv);
  300. if (rc) {
  301. IWL_ERR(priv, "Error setting RXON_ASSOC "
  302. "configuration (%d).\n", rc);
  303. return rc;
  304. }
  305. memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
  306. return 0;
  307. }
  308. /* If we are currently associated and the new config requires
  309. * an RXON_ASSOC and the new config wants the associated mask enabled,
  310. * we must clear the associated from the active configuration
  311. * before we apply the new config */
  312. if (iwl_is_associated(priv) && new_assoc) {
  313. IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
  314. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  315. /*
  316. * reserved4 and 5 could have been filled by the iwlcore code.
  317. * Let's clear them before pushing to the 3945.
  318. */
  319. active_rxon->reserved4 = 0;
  320. active_rxon->reserved5 = 0;
  321. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  322. sizeof(struct iwl3945_rxon_cmd),
  323. &priv->active_rxon);
  324. /* If the mask clearing failed then we set
  325. * active_rxon back to what it was previously */
  326. if (rc) {
  327. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  328. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  329. "configuration (%d).\n", rc);
  330. return rc;
  331. }
  332. }
  333. IWL_DEBUG_INFO(priv, "Sending RXON\n"
  334. "* with%s RXON_FILTER_ASSOC_MSK\n"
  335. "* channel = %d\n"
  336. "* bssid = %pM\n",
  337. (new_assoc ? "" : "out"),
  338. le16_to_cpu(staging_rxon->channel),
  339. staging_rxon->bssid_addr);
  340. /*
  341. * reserved4 and 5 could have been filled by the iwlcore code.
  342. * Let's clear them before pushing to the 3945.
  343. */
  344. staging_rxon->reserved4 = 0;
  345. staging_rxon->reserved5 = 0;
  346. iwl_set_rxon_hwcrypto(priv, !priv->hw_params.sw_crypto);
  347. /* Apply the new configuration */
  348. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  349. sizeof(struct iwl3945_rxon_cmd),
  350. staging_rxon);
  351. if (rc) {
  352. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  353. return rc;
  354. }
  355. memcpy(active_rxon, staging_rxon, sizeof(*active_rxon));
  356. iwl3945_clear_stations_table(priv);
  357. /* If we issue a new RXON command which required a tune then we must
  358. * send a new TXPOWER command or we won't be able to Tx any frames */
  359. rc = priv->cfg->ops->lib->send_tx_power(priv);
  360. if (rc) {
  361. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  362. return rc;
  363. }
  364. /* Add the broadcast address so we can send broadcast frames */
  365. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  366. IWL_INVALID_STATION) {
  367. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  368. return -EIO;
  369. }
  370. /* If we have set the ASSOC_MSK and we are in BSS mode then
  371. * add the IWL_AP_ID to the station rate table */
  372. if (iwl_is_associated(priv) &&
  373. (priv->iw_mode == NL80211_IFTYPE_STATION))
  374. if (iwl3945_add_station(priv, priv->active_rxon.bssid_addr,
  375. 1, 0)
  376. == IWL_INVALID_STATION) {
  377. IWL_ERR(priv, "Error adding AP address for transmit\n");
  378. return -EIO;
  379. }
  380. /* Init the hardware's rate fallback order based on the band */
  381. rc = iwl3945_init_hw_rate_table(priv);
  382. if (rc) {
  383. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  384. return -EIO;
  385. }
  386. return 0;
  387. }
  388. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  389. struct ieee80211_key_conf *keyconf,
  390. u8 sta_id)
  391. {
  392. unsigned long flags;
  393. __le16 key_flags = 0;
  394. int ret;
  395. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  396. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  397. if (sta_id == priv->hw_params.bcast_sta_id)
  398. key_flags |= STA_KEY_MULTICAST_MSK;
  399. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  400. keyconf->hw_key_idx = keyconf->keyidx;
  401. key_flags &= ~STA_KEY_FLG_INVALID;
  402. spin_lock_irqsave(&priv->sta_lock, flags);
  403. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  404. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  405. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  406. keyconf->keylen);
  407. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  408. keyconf->keylen);
  409. if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  410. == STA_KEY_FLG_NO_ENC)
  411. priv->stations_39[sta_id].sta.key.key_offset =
  412. iwl_get_free_ucode_key_index(priv);
  413. /* else, we are overriding an existing key => no need to allocated room
  414. * in uCode. */
  415. WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  416. "no space for a new key");
  417. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  418. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  419. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  420. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  421. ret = iwl_send_add_sta(priv,
  422. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
  423. spin_unlock_irqrestore(&priv->sta_lock, flags);
  424. return ret;
  425. }
  426. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  427. struct ieee80211_key_conf *keyconf,
  428. u8 sta_id)
  429. {
  430. return -EOPNOTSUPP;
  431. }
  432. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  433. struct ieee80211_key_conf *keyconf,
  434. u8 sta_id)
  435. {
  436. return -EOPNOTSUPP;
  437. }
  438. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  439. {
  440. unsigned long flags;
  441. spin_lock_irqsave(&priv->sta_lock, flags);
  442. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  443. memset(&priv->stations_39[sta_id].sta.key, 0,
  444. sizeof(struct iwl4965_keyinfo));
  445. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  446. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  447. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  448. spin_unlock_irqrestore(&priv->sta_lock, flags);
  449. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  450. iwl_send_add_sta(priv,
  451. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
  452. return 0;
  453. }
  454. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  455. struct ieee80211_key_conf *keyconf, u8 sta_id)
  456. {
  457. int ret = 0;
  458. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  459. switch (keyconf->alg) {
  460. case ALG_CCMP:
  461. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  462. break;
  463. case ALG_TKIP:
  464. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  465. break;
  466. case ALG_WEP:
  467. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  468. break;
  469. default:
  470. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  471. ret = -EINVAL;
  472. }
  473. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  474. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  475. sta_id, ret);
  476. return ret;
  477. }
  478. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  479. {
  480. int ret = -EOPNOTSUPP;
  481. return ret;
  482. }
  483. static int iwl3945_set_static_key(struct iwl_priv *priv,
  484. struct ieee80211_key_conf *key)
  485. {
  486. if (key->alg == ALG_WEP)
  487. return -EOPNOTSUPP;
  488. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  489. return -EINVAL;
  490. }
  491. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  492. {
  493. struct list_head *element;
  494. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  495. priv->frames_count);
  496. while (!list_empty(&priv->free_frames)) {
  497. element = priv->free_frames.next;
  498. list_del(element);
  499. kfree(list_entry(element, struct iwl3945_frame, list));
  500. priv->frames_count--;
  501. }
  502. if (priv->frames_count) {
  503. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  504. priv->frames_count);
  505. priv->frames_count = 0;
  506. }
  507. }
  508. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  509. {
  510. struct iwl3945_frame *frame;
  511. struct list_head *element;
  512. if (list_empty(&priv->free_frames)) {
  513. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  514. if (!frame) {
  515. IWL_ERR(priv, "Could not allocate frame!\n");
  516. return NULL;
  517. }
  518. priv->frames_count++;
  519. return frame;
  520. }
  521. element = priv->free_frames.next;
  522. list_del(element);
  523. return list_entry(element, struct iwl3945_frame, list);
  524. }
  525. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  526. {
  527. memset(frame, 0, sizeof(*frame));
  528. list_add(&frame->list, &priv->free_frames);
  529. }
  530. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  531. struct ieee80211_hdr *hdr,
  532. int left)
  533. {
  534. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  535. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  536. (priv->iw_mode != NL80211_IFTYPE_AP)))
  537. return 0;
  538. if (priv->ibss_beacon->len > left)
  539. return 0;
  540. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  541. return priv->ibss_beacon->len;
  542. }
  543. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  544. {
  545. struct iwl3945_frame *frame;
  546. unsigned int frame_size;
  547. int rc;
  548. u8 rate;
  549. frame = iwl3945_get_free_frame(priv);
  550. if (!frame) {
  551. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  552. "command.\n");
  553. return -ENOMEM;
  554. }
  555. rate = iwl_rate_get_lowest_plcp(priv);
  556. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  557. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  558. &frame->u.cmd[0]);
  559. iwl3945_free_frame(priv, frame);
  560. return rc;
  561. }
  562. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  563. {
  564. if (priv->shared_virt)
  565. pci_free_consistent(priv->pci_dev,
  566. sizeof(struct iwl3945_shared),
  567. priv->shared_virt,
  568. priv->shared_phys);
  569. }
  570. #define MAX_UCODE_BEACON_INTERVAL 1024
  571. #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
  572. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  573. {
  574. u16 new_val = 0;
  575. u16 beacon_factor = 0;
  576. beacon_factor =
  577. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  578. / MAX_UCODE_BEACON_INTERVAL;
  579. new_val = beacon_val / beacon_factor;
  580. return cpu_to_le16(new_val);
  581. }
  582. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  583. {
  584. u64 interval_tm_unit;
  585. u64 tsf, result;
  586. unsigned long flags;
  587. struct ieee80211_conf *conf = NULL;
  588. u16 beacon_int = 0;
  589. conf = ieee80211_get_hw_conf(priv->hw);
  590. spin_lock_irqsave(&priv->lock, flags);
  591. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  592. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  593. tsf = priv->timestamp;
  594. beacon_int = priv->beacon_int;
  595. spin_unlock_irqrestore(&priv->lock, flags);
  596. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  597. if (beacon_int == 0) {
  598. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  599. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  600. } else {
  601. priv->rxon_timing.beacon_interval =
  602. cpu_to_le16(beacon_int);
  603. priv->rxon_timing.beacon_interval =
  604. iwl3945_adjust_beacon_interval(
  605. le16_to_cpu(priv->rxon_timing.beacon_interval));
  606. }
  607. priv->rxon_timing.atim_window = 0;
  608. } else {
  609. priv->rxon_timing.beacon_interval =
  610. iwl3945_adjust_beacon_interval(conf->beacon_int);
  611. /* TODO: we need to get atim_window from upper stack
  612. * for now we set to 0 */
  613. priv->rxon_timing.atim_window = 0;
  614. }
  615. interval_tm_unit =
  616. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  617. result = do_div(tsf, interval_tm_unit);
  618. priv->rxon_timing.beacon_init_val =
  619. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  620. IWL_DEBUG_ASSOC(priv,
  621. "beacon interval %d beacon timer %d beacon tim %d\n",
  622. le16_to_cpu(priv->rxon_timing.beacon_interval),
  623. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  624. le16_to_cpu(priv->rxon_timing.atim_window));
  625. }
  626. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  627. {
  628. if (mode == NL80211_IFTYPE_ADHOC) {
  629. const struct iwl_channel_info *ch_info;
  630. ch_info = iwl_get_channel_info(priv,
  631. priv->band,
  632. le16_to_cpu(priv->staging_rxon.channel));
  633. if (!ch_info || !is_channel_ibss(ch_info)) {
  634. IWL_ERR(priv, "channel %d not IBSS channel\n",
  635. le16_to_cpu(priv->staging_rxon.channel));
  636. return -EINVAL;
  637. }
  638. }
  639. iwl_connection_init_rx_config(priv, mode);
  640. iwl3945_clear_stations_table(priv);
  641. /* don't commit rxon if rf-kill is on*/
  642. if (!iwl_is_ready_rf(priv))
  643. return -EAGAIN;
  644. cancel_delayed_work(&priv->scan_check);
  645. if (iwl_scan_cancel_timeout(priv, 100)) {
  646. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  647. IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
  648. return -EAGAIN;
  649. }
  650. iwl3945_commit_rxon(priv);
  651. return 0;
  652. }
  653. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  654. struct ieee80211_tx_info *info,
  655. struct iwl_cmd *cmd,
  656. struct sk_buff *skb_frag,
  657. int sta_id)
  658. {
  659. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  660. struct iwl3945_hw_key *keyinfo =
  661. &priv->stations_39[sta_id].keyinfo;
  662. switch (keyinfo->alg) {
  663. case ALG_CCMP:
  664. tx->sec_ctl = TX_CMD_SEC_CCM;
  665. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  666. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  667. break;
  668. case ALG_TKIP:
  669. break;
  670. case ALG_WEP:
  671. tx->sec_ctl = TX_CMD_SEC_WEP |
  672. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  673. if (keyinfo->keylen == 13)
  674. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  675. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  676. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  677. "with key %d\n", info->control.hw_key->hw_key_idx);
  678. break;
  679. default:
  680. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  681. break;
  682. }
  683. }
  684. /*
  685. * handle build REPLY_TX command notification.
  686. */
  687. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  688. struct iwl_cmd *cmd,
  689. struct ieee80211_tx_info *info,
  690. struct ieee80211_hdr *hdr, u8 std_id)
  691. {
  692. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  693. __le32 tx_flags = tx->tx_flags;
  694. __le16 fc = hdr->frame_control;
  695. u8 rc_flags = info->control.rates[0].flags;
  696. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  697. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  698. tx_flags |= TX_CMD_FLG_ACK_MSK;
  699. if (ieee80211_is_mgmt(fc))
  700. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  701. if (ieee80211_is_probe_resp(fc) &&
  702. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  703. tx_flags |= TX_CMD_FLG_TSF_MSK;
  704. } else {
  705. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  706. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  707. }
  708. tx->sta_id = std_id;
  709. if (ieee80211_has_morefrags(fc))
  710. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  711. if (ieee80211_is_data_qos(fc)) {
  712. u8 *qc = ieee80211_get_qos_ctl(hdr);
  713. tx->tid_tspec = qc[0] & 0xf;
  714. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  715. } else {
  716. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  717. }
  718. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  719. tx_flags |= TX_CMD_FLG_RTS_MSK;
  720. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  721. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  722. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  723. tx_flags |= TX_CMD_FLG_CTS_MSK;
  724. }
  725. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  726. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  727. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  728. if (ieee80211_is_mgmt(fc)) {
  729. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  730. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  731. else
  732. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  733. } else {
  734. tx->timeout.pm_frame_timeout = 0;
  735. #ifdef CONFIG_IWLWIFI_LEDS
  736. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  737. #endif
  738. }
  739. tx->driver_txop = 0;
  740. tx->tx_flags = tx_flags;
  741. tx->next_frame_len = 0;
  742. }
  743. /**
  744. * iwl3945_get_sta_id - Find station's index within station table
  745. */
  746. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  747. {
  748. int sta_id;
  749. u16 fc = le16_to_cpu(hdr->frame_control);
  750. /* If this frame is broadcast or management, use broadcast station id */
  751. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  752. is_multicast_ether_addr(hdr->addr1))
  753. return priv->hw_params.bcast_sta_id;
  754. switch (priv->iw_mode) {
  755. /* If we are a client station in a BSS network, use the special
  756. * AP station entry (that's the only station we communicate with) */
  757. case NL80211_IFTYPE_STATION:
  758. return IWL_AP_ID;
  759. /* If we are an AP, then find the station, or use BCAST */
  760. case NL80211_IFTYPE_AP:
  761. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  762. if (sta_id != IWL_INVALID_STATION)
  763. return sta_id;
  764. return priv->hw_params.bcast_sta_id;
  765. /* If this frame is going out to an IBSS network, find the station,
  766. * or create a new station table entry */
  767. case NL80211_IFTYPE_ADHOC: {
  768. /* Create new station table entry */
  769. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  770. if (sta_id != IWL_INVALID_STATION)
  771. return sta_id;
  772. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  773. if (sta_id != IWL_INVALID_STATION)
  774. return sta_id;
  775. IWL_DEBUG_DROP(priv, "Station %pM not in station map. "
  776. "Defaulting to broadcast...\n",
  777. hdr->addr1);
  778. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  779. return priv->hw_params.bcast_sta_id;
  780. }
  781. /* If we are in monitor mode, use BCAST. This is required for
  782. * packet injection. */
  783. case NL80211_IFTYPE_MONITOR:
  784. return priv->hw_params.bcast_sta_id;
  785. default:
  786. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  787. priv->iw_mode);
  788. return priv->hw_params.bcast_sta_id;
  789. }
  790. }
  791. /*
  792. * start REPLY_TX command process
  793. */
  794. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  795. {
  796. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  797. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  798. struct iwl3945_tx_cmd *tx;
  799. struct iwl_tx_queue *txq = NULL;
  800. struct iwl_queue *q = NULL;
  801. struct iwl_cmd *out_cmd = NULL;
  802. dma_addr_t phys_addr;
  803. dma_addr_t txcmd_phys;
  804. int txq_id = skb_get_queue_mapping(skb);
  805. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  806. u8 id;
  807. u8 unicast;
  808. u8 sta_id;
  809. u8 tid = 0;
  810. u16 seq_number = 0;
  811. __le16 fc;
  812. u8 wait_write_ptr = 0;
  813. u8 *qc = NULL;
  814. unsigned long flags;
  815. int rc;
  816. spin_lock_irqsave(&priv->lock, flags);
  817. if (iwl_is_rfkill(priv)) {
  818. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  819. goto drop_unlock;
  820. }
  821. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  822. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  823. goto drop_unlock;
  824. }
  825. unicast = !is_multicast_ether_addr(hdr->addr1);
  826. id = 0;
  827. fc = hdr->frame_control;
  828. #ifdef CONFIG_IWLWIFI_DEBUG
  829. if (ieee80211_is_auth(fc))
  830. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  831. else if (ieee80211_is_assoc_req(fc))
  832. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  833. else if (ieee80211_is_reassoc_req(fc))
  834. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  835. #endif
  836. /* drop all data frame if we are not associated */
  837. if (ieee80211_is_data(fc) &&
  838. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  839. (!iwl_is_associated(priv) ||
  840. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  841. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  842. goto drop_unlock;
  843. }
  844. spin_unlock_irqrestore(&priv->lock, flags);
  845. hdr_len = ieee80211_hdrlen(fc);
  846. /* Find (or create) index into station table for destination station */
  847. sta_id = iwl3945_get_sta_id(priv, hdr);
  848. if (sta_id == IWL_INVALID_STATION) {
  849. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  850. hdr->addr1);
  851. goto drop;
  852. }
  853. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  854. if (ieee80211_is_data_qos(fc)) {
  855. qc = ieee80211_get_qos_ctl(hdr);
  856. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  857. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  858. IEEE80211_SCTL_SEQ;
  859. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  860. (hdr->seq_ctrl &
  861. cpu_to_le16(IEEE80211_SCTL_FRAG));
  862. seq_number += 0x10;
  863. }
  864. /* Descriptor for chosen Tx queue */
  865. txq = &priv->txq[txq_id];
  866. q = &txq->q;
  867. spin_lock_irqsave(&priv->lock, flags);
  868. idx = get_cmd_index(q, q->write_ptr, 0);
  869. /* Set up driver data for this TFD */
  870. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  871. txq->txb[q->write_ptr].skb[0] = skb;
  872. /* Init first empty entry in queue's array of Tx/cmd buffers */
  873. out_cmd = txq->cmd[idx];
  874. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  875. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  876. memset(tx, 0, sizeof(*tx));
  877. /*
  878. * Set up the Tx-command (not MAC!) header.
  879. * Store the chosen Tx queue and TFD index within the sequence field;
  880. * after Tx, uCode's Tx response will return this value so driver can
  881. * locate the frame within the tx queue and do post-tx processing.
  882. */
  883. out_cmd->hdr.cmd = REPLY_TX;
  884. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  885. INDEX_TO_SEQ(q->write_ptr)));
  886. /* Copy MAC header from skb into command buffer */
  887. memcpy(tx->hdr, hdr, hdr_len);
  888. if (info->control.hw_key)
  889. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  890. /* TODO need this for burst mode later on */
  891. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  892. /* set is_hcca to 0; it probably will never be implemented */
  893. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  894. /* Total # bytes to be transmitted */
  895. len = (u16)skb->len;
  896. tx->len = cpu_to_le16(len);
  897. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  898. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  899. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  900. txq->need_update = 1;
  901. if (qc)
  902. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  903. } else {
  904. wait_write_ptr = 1;
  905. txq->need_update = 0;
  906. }
  907. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  908. le16_to_cpu(out_cmd->hdr.sequence));
  909. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  910. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  911. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  912. ieee80211_hdrlen(fc));
  913. /*
  914. * Use the first empty entry in this queue's command buffer array
  915. * to contain the Tx command and MAC header concatenated together
  916. * (payload data will be in another buffer).
  917. * Size of this varies, due to varying MAC header length.
  918. * If end is not dword aligned, we'll have 2 extra bytes at the end
  919. * of the MAC header (device reads on dword boundaries).
  920. * We'll tell device about this padding later.
  921. */
  922. len = sizeof(struct iwl3945_tx_cmd) +
  923. sizeof(struct iwl_cmd_header) + hdr_len;
  924. len_org = len;
  925. len = (len + 3) & ~3;
  926. if (len_org != len)
  927. len_org = 1;
  928. else
  929. len_org = 0;
  930. /* Physical address of this Tx command's header (not MAC header!),
  931. * within command buffer array. */
  932. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  933. len, PCI_DMA_TODEVICE);
  934. /* we do not map meta data ... so we can safely access address to
  935. * provide to unmap command*/
  936. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  937. pci_unmap_len_set(&out_cmd->meta, len, len);
  938. /* Add buffer containing Tx command and MAC(!) header to TFD's
  939. * first entry */
  940. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  941. txcmd_phys, len, 1, 0);
  942. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  943. * if any (802.11 null frames have no payload). */
  944. len = skb->len - hdr_len;
  945. if (len) {
  946. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  947. len, PCI_DMA_TODEVICE);
  948. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  949. phys_addr, len,
  950. 0, U32_PAD(len));
  951. }
  952. /* Tell device the write index *just past* this latest filled TFD */
  953. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  954. rc = iwl_txq_update_write_ptr(priv, txq);
  955. spin_unlock_irqrestore(&priv->lock, flags);
  956. if (rc)
  957. return rc;
  958. if ((iwl_queue_space(q) < q->high_mark)
  959. && priv->mac80211_registered) {
  960. if (wait_write_ptr) {
  961. spin_lock_irqsave(&priv->lock, flags);
  962. txq->need_update = 1;
  963. iwl_txq_update_write_ptr(priv, txq);
  964. spin_unlock_irqrestore(&priv->lock, flags);
  965. }
  966. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  967. }
  968. return 0;
  969. drop_unlock:
  970. spin_unlock_irqrestore(&priv->lock, flags);
  971. drop:
  972. return -1;
  973. }
  974. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  975. #include "iwl-spectrum.h"
  976. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  977. #define BEACON_TIME_MASK_HIGH 0xFF000000
  978. #define TIME_UNIT 1024
  979. /*
  980. * extended beacon time format
  981. * time in usec will be changed into a 32-bit value in 8:24 format
  982. * the high 1 byte is the beacon counts
  983. * the lower 3 bytes is the time in usec within one beacon interval
  984. */
  985. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  986. {
  987. u32 quot;
  988. u32 rem;
  989. u32 interval = beacon_interval * 1024;
  990. if (!interval || !usec)
  991. return 0;
  992. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  993. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  994. return (quot << 24) + rem;
  995. }
  996. /* base is usually what we get from ucode with each received frame,
  997. * the same as HW timer counter counting down
  998. */
  999. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  1000. {
  1001. u32 base_low = base & BEACON_TIME_MASK_LOW;
  1002. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  1003. u32 interval = beacon_interval * TIME_UNIT;
  1004. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  1005. (addon & BEACON_TIME_MASK_HIGH);
  1006. if (base_low > addon_low)
  1007. res += base_low - addon_low;
  1008. else if (base_low < addon_low) {
  1009. res += interval + base_low - addon_low;
  1010. res += (1 << 24);
  1011. } else
  1012. res += (1 << 24);
  1013. return cpu_to_le32(res);
  1014. }
  1015. static int iwl3945_get_measurement(struct iwl_priv *priv,
  1016. struct ieee80211_measurement_params *params,
  1017. u8 type)
  1018. {
  1019. struct iwl_spectrum_cmd spectrum;
  1020. struct iwl_rx_packet *res;
  1021. struct iwl_host_cmd cmd = {
  1022. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  1023. .data = (void *)&spectrum,
  1024. .meta.flags = CMD_WANT_SKB,
  1025. };
  1026. u32 add_time = le64_to_cpu(params->start_time);
  1027. int rc;
  1028. int spectrum_resp_status;
  1029. int duration = le16_to_cpu(params->duration);
  1030. if (iwl_is_associated(priv))
  1031. add_time =
  1032. iwl3945_usecs_to_beacons(
  1033. le64_to_cpu(params->start_time) - priv->last_tsf,
  1034. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1035. memset(&spectrum, 0, sizeof(spectrum));
  1036. spectrum.channel_count = cpu_to_le16(1);
  1037. spectrum.flags =
  1038. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  1039. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  1040. cmd.len = sizeof(spectrum);
  1041. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  1042. if (iwl_is_associated(priv))
  1043. spectrum.start_time =
  1044. iwl3945_add_beacon_time(priv->last_beacon_time,
  1045. add_time,
  1046. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1047. else
  1048. spectrum.start_time = 0;
  1049. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  1050. spectrum.channels[0].channel = params->channel;
  1051. spectrum.channels[0].type = type;
  1052. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1053. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  1054. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  1055. rc = iwl_send_cmd_sync(priv, &cmd);
  1056. if (rc)
  1057. return rc;
  1058. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1059. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1060. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  1061. rc = -EIO;
  1062. }
  1063. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  1064. switch (spectrum_resp_status) {
  1065. case 0: /* Command will be handled */
  1066. if (res->u.spectrum.id != 0xff) {
  1067. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  1068. res->u.spectrum.id);
  1069. priv->measurement_status &= ~MEASUREMENT_READY;
  1070. }
  1071. priv->measurement_status |= MEASUREMENT_ACTIVE;
  1072. rc = 0;
  1073. break;
  1074. case 1: /* Command will not be handled */
  1075. rc = -EAGAIN;
  1076. break;
  1077. }
  1078. dev_kfree_skb_any(cmd.meta.u.skb);
  1079. return rc;
  1080. }
  1081. #endif
  1082. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  1083. struct iwl_rx_mem_buffer *rxb)
  1084. {
  1085. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1086. struct iwl_alive_resp *palive;
  1087. struct delayed_work *pwork;
  1088. palive = &pkt->u.alive_frame;
  1089. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  1090. "0x%01X 0x%01X\n",
  1091. palive->is_valid, palive->ver_type,
  1092. palive->ver_subtype);
  1093. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  1094. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  1095. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  1096. sizeof(struct iwl_alive_resp));
  1097. pwork = &priv->init_alive_start;
  1098. } else {
  1099. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  1100. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  1101. sizeof(struct iwl_alive_resp));
  1102. pwork = &priv->alive_start;
  1103. iwl3945_disable_events(priv);
  1104. }
  1105. /* We delay the ALIVE response by 5ms to
  1106. * give the HW RF Kill time to activate... */
  1107. if (palive->is_valid == UCODE_VALID_OK)
  1108. queue_delayed_work(priv->workqueue, pwork,
  1109. msecs_to_jiffies(5));
  1110. else
  1111. IWL_WARN(priv, "uCode did not respond OK.\n");
  1112. }
  1113. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  1114. struct iwl_rx_mem_buffer *rxb)
  1115. {
  1116. #ifdef CONFIG_IWLWIFI_DEBUG
  1117. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1118. #endif
  1119. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  1120. return;
  1121. }
  1122. static void iwl3945_bg_beacon_update(struct work_struct *work)
  1123. {
  1124. struct iwl_priv *priv =
  1125. container_of(work, struct iwl_priv, beacon_update);
  1126. struct sk_buff *beacon;
  1127. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  1128. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  1129. if (!beacon) {
  1130. IWL_ERR(priv, "update beacon failed\n");
  1131. return;
  1132. }
  1133. mutex_lock(&priv->mutex);
  1134. /* new beacon skb is allocated every time; dispose previous.*/
  1135. if (priv->ibss_beacon)
  1136. dev_kfree_skb(priv->ibss_beacon);
  1137. priv->ibss_beacon = beacon;
  1138. mutex_unlock(&priv->mutex);
  1139. iwl3945_send_beacon_cmd(priv);
  1140. }
  1141. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  1142. struct iwl_rx_mem_buffer *rxb)
  1143. {
  1144. #ifdef CONFIG_IWLWIFI_DEBUG
  1145. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1146. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  1147. u8 rate = beacon->beacon_notify_hdr.rate;
  1148. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  1149. "tsf %d %d rate %d\n",
  1150. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  1151. beacon->beacon_notify_hdr.failure_frame,
  1152. le32_to_cpu(beacon->ibss_mgr_status),
  1153. le32_to_cpu(beacon->high_tsf),
  1154. le32_to_cpu(beacon->low_tsf), rate);
  1155. #endif
  1156. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  1157. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  1158. queue_work(priv->workqueue, &priv->beacon_update);
  1159. }
  1160. /* Handle notification from uCode that card's power state is changing
  1161. * due to software, hardware, or critical temperature RFKILL */
  1162. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  1163. struct iwl_rx_mem_buffer *rxb)
  1164. {
  1165. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1166. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  1167. unsigned long status = priv->status;
  1168. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
  1169. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  1170. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  1171. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1172. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  1173. if (flags & HW_CARD_DISABLED)
  1174. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1175. else
  1176. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1177. if (flags & SW_CARD_DISABLED)
  1178. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1179. else
  1180. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1181. iwl_scan_cancel(priv);
  1182. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  1183. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  1184. (test_bit(STATUS_RF_KILL_SW, &status) !=
  1185. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  1186. queue_work(priv->workqueue, &priv->rf_kill);
  1187. else
  1188. wake_up_interruptible(&priv->wait_command_queue);
  1189. }
  1190. /**
  1191. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  1192. *
  1193. * Setup the RX handlers for each of the reply types sent from the uCode
  1194. * to the host.
  1195. *
  1196. * This function chains into the hardware specific files for them to setup
  1197. * any hardware specific handlers as well.
  1198. */
  1199. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  1200. {
  1201. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  1202. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  1203. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  1204. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  1205. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  1206. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  1207. iwl_rx_pm_debug_statistics_notif;
  1208. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  1209. /*
  1210. * The same handler is used for both the REPLY to a discrete
  1211. * statistics request from the host as well as for the periodic
  1212. * statistics notifications (after received beacons) from the uCode.
  1213. */
  1214. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  1215. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  1216. iwl_setup_spectrum_handlers(priv);
  1217. iwl_setup_rx_scan_handlers(priv);
  1218. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  1219. /* Set up hardware specific Rx handlers */
  1220. iwl3945_hw_rx_handler_setup(priv);
  1221. }
  1222. /************************** RX-FUNCTIONS ****************************/
  1223. /*
  1224. * Rx theory of operation
  1225. *
  1226. * The host allocates 32 DMA target addresses and passes the host address
  1227. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  1228. * 0 to 31
  1229. *
  1230. * Rx Queue Indexes
  1231. * The host/firmware share two index registers for managing the Rx buffers.
  1232. *
  1233. * The READ index maps to the first position that the firmware may be writing
  1234. * to -- the driver can read up to (but not including) this position and get
  1235. * good data.
  1236. * The READ index is managed by the firmware once the card is enabled.
  1237. *
  1238. * The WRITE index maps to the last position the driver has read from -- the
  1239. * position preceding WRITE is the last slot the firmware can place a packet.
  1240. *
  1241. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  1242. * WRITE = READ.
  1243. *
  1244. * During initialization, the host sets up the READ queue position to the first
  1245. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  1246. *
  1247. * When the firmware places a packet in a buffer, it will advance the READ index
  1248. * and fire the RX interrupt. The driver can then query the READ index and
  1249. * process as many packets as possible, moving the WRITE index forward as it
  1250. * resets the Rx queue buffers with new memory.
  1251. *
  1252. * The management in the driver is as follows:
  1253. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  1254. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  1255. * to replenish the iwl->rxq->rx_free.
  1256. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  1257. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  1258. * 'processed' and 'read' driver indexes as well)
  1259. * + A received packet is processed and handed to the kernel network stack,
  1260. * detached from the iwl->rxq. The driver 'processed' index is updated.
  1261. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  1262. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  1263. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  1264. * were enough free buffers and RX_STALLED is set it is cleared.
  1265. *
  1266. *
  1267. * Driver sequence:
  1268. *
  1269. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  1270. * iwl3945_rx_queue_restock
  1271. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  1272. * queue, updates firmware pointers, and updates
  1273. * the WRITE index. If insufficient rx_free buffers
  1274. * are available, schedules iwl3945_rx_replenish
  1275. *
  1276. * -- enable interrupts --
  1277. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  1278. * READ INDEX, detaching the SKB from the pool.
  1279. * Moves the packet buffer from queue to rx_used.
  1280. * Calls iwl3945_rx_queue_restock to refill any empty
  1281. * slots.
  1282. * ...
  1283. *
  1284. */
  1285. /**
  1286. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  1287. */
  1288. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  1289. dma_addr_t dma_addr)
  1290. {
  1291. return cpu_to_le32((u32)dma_addr);
  1292. }
  1293. /**
  1294. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  1295. *
  1296. * If there are slots in the RX queue that need to be restocked,
  1297. * and we have free pre-allocated buffers, fill the ranks as much
  1298. * as we can, pulling from rx_free.
  1299. *
  1300. * This moves the 'write' index forward to catch up with 'processed', and
  1301. * also updates the memory address in the firmware to reference the new
  1302. * target buffer.
  1303. */
  1304. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  1305. {
  1306. struct iwl_rx_queue *rxq = &priv->rxq;
  1307. struct list_head *element;
  1308. struct iwl_rx_mem_buffer *rxb;
  1309. unsigned long flags;
  1310. int write, rc;
  1311. spin_lock_irqsave(&rxq->lock, flags);
  1312. write = rxq->write & ~0x7;
  1313. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  1314. /* Get next free Rx buffer, remove from free list */
  1315. element = rxq->rx_free.next;
  1316. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1317. list_del(element);
  1318. /* Point to Rx buffer via next RBD in circular buffer */
  1319. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  1320. rxq->queue[rxq->write] = rxb;
  1321. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  1322. rxq->free_count--;
  1323. }
  1324. spin_unlock_irqrestore(&rxq->lock, flags);
  1325. /* If the pre-allocated buffer pool is dropping low, schedule to
  1326. * refill it */
  1327. if (rxq->free_count <= RX_LOW_WATERMARK)
  1328. queue_work(priv->workqueue, &priv->rx_replenish);
  1329. /* If we've added more space for the firmware to place data, tell it.
  1330. * Increment device's write pointer in multiples of 8. */
  1331. if ((write != (rxq->write & ~0x7))
  1332. || (abs(rxq->write - rxq->read) > 7)) {
  1333. spin_lock_irqsave(&rxq->lock, flags);
  1334. rxq->need_update = 1;
  1335. spin_unlock_irqrestore(&rxq->lock, flags);
  1336. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  1337. if (rc)
  1338. return rc;
  1339. }
  1340. return 0;
  1341. }
  1342. /**
  1343. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  1344. *
  1345. * When moving to rx_free an SKB is allocated for the slot.
  1346. *
  1347. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  1348. * This is called as a scheduled work item (except for during initialization)
  1349. */
  1350. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  1351. {
  1352. struct iwl_rx_queue *rxq = &priv->rxq;
  1353. struct list_head *element;
  1354. struct iwl_rx_mem_buffer *rxb;
  1355. unsigned long flags;
  1356. spin_lock_irqsave(&rxq->lock, flags);
  1357. while (!list_empty(&rxq->rx_used)) {
  1358. element = rxq->rx_used.next;
  1359. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1360. /* Alloc a new receive buffer */
  1361. rxb->skb =
  1362. alloc_skb(priv->hw_params.rx_buf_size,
  1363. __GFP_NOWARN | GFP_ATOMIC);
  1364. if (!rxb->skb) {
  1365. if (net_ratelimit())
  1366. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  1367. /* We don't reschedule replenish work here -- we will
  1368. * call the restock method and if it still needs
  1369. * more buffers it will schedule replenish */
  1370. break;
  1371. }
  1372. /* If radiotap head is required, reserve some headroom here.
  1373. * The physical head count is a variable rx_stats->phy_count.
  1374. * We reserve 4 bytes here. Plus these extra bytes, the
  1375. * headroom of the physical head should be enough for the
  1376. * radiotap head that iwl3945 supported. See iwl3945_rt.
  1377. */
  1378. skb_reserve(rxb->skb, 4);
  1379. priv->alloc_rxb_skb++;
  1380. list_del(element);
  1381. /* Get physical address of RB/SKB */
  1382. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  1383. rxb->skb->data,
  1384. priv->hw_params.rx_buf_size,
  1385. PCI_DMA_FROMDEVICE);
  1386. list_add_tail(&rxb->list, &rxq->rx_free);
  1387. rxq->free_count++;
  1388. }
  1389. spin_unlock_irqrestore(&rxq->lock, flags);
  1390. }
  1391. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1392. {
  1393. unsigned long flags;
  1394. int i;
  1395. spin_lock_irqsave(&rxq->lock, flags);
  1396. INIT_LIST_HEAD(&rxq->rx_free);
  1397. INIT_LIST_HEAD(&rxq->rx_used);
  1398. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1399. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1400. /* In the reset function, these buffers may have been allocated
  1401. * to an SKB, so we need to unmap and free potential storage */
  1402. if (rxq->pool[i].skb != NULL) {
  1403. pci_unmap_single(priv->pci_dev,
  1404. rxq->pool[i].real_dma_addr,
  1405. priv->hw_params.rx_buf_size,
  1406. PCI_DMA_FROMDEVICE);
  1407. priv->alloc_rxb_skb--;
  1408. dev_kfree_skb(rxq->pool[i].skb);
  1409. rxq->pool[i].skb = NULL;
  1410. }
  1411. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1412. }
  1413. /* Set us so that we have processed and used all buffers, but have
  1414. * not restocked the Rx queue with fresh buffers */
  1415. rxq->read = rxq->write = 0;
  1416. rxq->free_count = 0;
  1417. spin_unlock_irqrestore(&rxq->lock, flags);
  1418. }
  1419. /*
  1420. * this should be called while priv->lock is locked
  1421. */
  1422. static void __iwl3945_rx_replenish(void *data)
  1423. {
  1424. struct iwl_priv *priv = data;
  1425. iwl3945_rx_allocate(priv);
  1426. iwl3945_rx_queue_restock(priv);
  1427. }
  1428. void iwl3945_rx_replenish(void *data)
  1429. {
  1430. struct iwl_priv *priv = data;
  1431. unsigned long flags;
  1432. iwl3945_rx_allocate(priv);
  1433. spin_lock_irqsave(&priv->lock, flags);
  1434. iwl3945_rx_queue_restock(priv);
  1435. spin_unlock_irqrestore(&priv->lock, flags);
  1436. }
  1437. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1438. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1439. * This free routine walks the list of POOL entries and if SKB is set to
  1440. * non NULL it is unmapped and freed
  1441. */
  1442. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1443. {
  1444. int i;
  1445. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1446. if (rxq->pool[i].skb != NULL) {
  1447. pci_unmap_single(priv->pci_dev,
  1448. rxq->pool[i].real_dma_addr,
  1449. priv->hw_params.rx_buf_size,
  1450. PCI_DMA_FROMDEVICE);
  1451. dev_kfree_skb(rxq->pool[i].skb);
  1452. }
  1453. }
  1454. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1455. rxq->dma_addr);
  1456. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1457. rxq->rb_stts, rxq->rb_stts_dma);
  1458. rxq->bd = NULL;
  1459. rxq->rb_stts = NULL;
  1460. }
  1461. /* Convert linear signal-to-noise ratio into dB */
  1462. static u8 ratio2dB[100] = {
  1463. /* 0 1 2 3 4 5 6 7 8 9 */
  1464. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1465. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1466. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1467. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1468. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1469. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1470. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1471. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1472. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1473. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1474. };
  1475. /* Calculates a relative dB value from a ratio of linear
  1476. * (i.e. not dB) signal levels.
  1477. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1478. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1479. {
  1480. /* 1000:1 or higher just report as 60 dB */
  1481. if (sig_ratio >= 1000)
  1482. return 60;
  1483. /* 100:1 or higher, divide by 10 and use table,
  1484. * add 20 dB to make up for divide by 10 */
  1485. if (sig_ratio >= 100)
  1486. return 20 + (int)ratio2dB[sig_ratio/10];
  1487. /* We shouldn't see this */
  1488. if (sig_ratio < 1)
  1489. return 0;
  1490. /* Use table for ratios 1:1 - 99:1 */
  1491. return (int)ratio2dB[sig_ratio];
  1492. }
  1493. #define PERFECT_RSSI (-20) /* dBm */
  1494. #define WORST_RSSI (-95) /* dBm */
  1495. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1496. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1497. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1498. * about formulas used below. */
  1499. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1500. {
  1501. int sig_qual;
  1502. int degradation = PERFECT_RSSI - rssi_dbm;
  1503. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1504. * as indicator; formula is (signal dbm - noise dbm).
  1505. * SNR at or above 40 is a great signal (100%).
  1506. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1507. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1508. if (noise_dbm) {
  1509. if (rssi_dbm - noise_dbm >= 40)
  1510. return 100;
  1511. else if (rssi_dbm < noise_dbm)
  1512. return 0;
  1513. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1514. /* Else use just the signal level.
  1515. * This formula is a least squares fit of data points collected and
  1516. * compared with a reference system that had a percentage (%) display
  1517. * for signal quality. */
  1518. } else
  1519. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1520. (15 * RSSI_RANGE + 62 * degradation)) /
  1521. (RSSI_RANGE * RSSI_RANGE);
  1522. if (sig_qual > 100)
  1523. sig_qual = 100;
  1524. else if (sig_qual < 1)
  1525. sig_qual = 0;
  1526. return sig_qual;
  1527. }
  1528. /**
  1529. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1530. *
  1531. * Uses the priv->rx_handlers callback function array to invoke
  1532. * the appropriate handlers, including command responses,
  1533. * frame-received notifications, and other notifications.
  1534. */
  1535. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1536. {
  1537. struct iwl_rx_mem_buffer *rxb;
  1538. struct iwl_rx_packet *pkt;
  1539. struct iwl_rx_queue *rxq = &priv->rxq;
  1540. u32 r, i;
  1541. int reclaim;
  1542. unsigned long flags;
  1543. u8 fill_rx = 0;
  1544. u32 count = 8;
  1545. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1546. * buffer that the driver may process (last buffer filled by ucode). */
  1547. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1548. i = rxq->read;
  1549. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  1550. fill_rx = 1;
  1551. /* Rx interrupt, but nothing sent from uCode */
  1552. if (i == r)
  1553. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1554. while (i != r) {
  1555. rxb = rxq->queue[i];
  1556. /* If an RXB doesn't have a Rx queue slot associated with it,
  1557. * then a bug has been introduced in the queue refilling
  1558. * routines -- catch it here */
  1559. BUG_ON(rxb == NULL);
  1560. rxq->queue[i] = NULL;
  1561. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1562. priv->hw_params.rx_buf_size,
  1563. PCI_DMA_FROMDEVICE);
  1564. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1565. /* Reclaim a command buffer only if this packet is a response
  1566. * to a (driver-originated) command.
  1567. * If the packet (e.g. Rx frame) originated from uCode,
  1568. * there is no command buffer to reclaim.
  1569. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1570. * but apparently a few don't get set; catch them here. */
  1571. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1572. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1573. (pkt->hdr.cmd != REPLY_TX);
  1574. /* Based on type of command response or notification,
  1575. * handle those that need handling via function in
  1576. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1577. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1578. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1579. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1580. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1581. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1582. } else {
  1583. /* No handling needed */
  1584. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1585. "r %d i %d No handler needed for %s, 0x%02x\n",
  1586. r, i, get_cmd_string(pkt->hdr.cmd),
  1587. pkt->hdr.cmd);
  1588. }
  1589. if (reclaim) {
  1590. /* Invoke any callbacks, transfer the skb to caller, and
  1591. * fire off the (possibly) blocking iwl_send_cmd()
  1592. * as we reclaim the driver command queue */
  1593. if (rxb && rxb->skb)
  1594. iwl_tx_cmd_complete(priv, rxb);
  1595. else
  1596. IWL_WARN(priv, "Claim null rxb?\n");
  1597. }
  1598. /* For now we just don't re-use anything. We can tweak this
  1599. * later to try and re-use notification packets and SKBs that
  1600. * fail to Rx correctly */
  1601. if (rxb->skb != NULL) {
  1602. priv->alloc_rxb_skb--;
  1603. dev_kfree_skb_any(rxb->skb);
  1604. rxb->skb = NULL;
  1605. }
  1606. spin_lock_irqsave(&rxq->lock, flags);
  1607. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1608. spin_unlock_irqrestore(&rxq->lock, flags);
  1609. i = (i + 1) & RX_QUEUE_MASK;
  1610. /* If there are a lot of unused frames,
  1611. * restock the Rx queue so ucode won't assert. */
  1612. if (fill_rx) {
  1613. count++;
  1614. if (count >= 8) {
  1615. priv->rxq.read = i;
  1616. __iwl3945_rx_replenish(priv);
  1617. count = 0;
  1618. }
  1619. }
  1620. }
  1621. /* Backtrack one entry */
  1622. priv->rxq.read = i;
  1623. iwl3945_rx_queue_restock(priv);
  1624. }
  1625. /* call this function to flush any scheduled tasklet */
  1626. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1627. {
  1628. /* wait to make sure we flush pending tasklet*/
  1629. synchronize_irq(priv->pci_dev->irq);
  1630. tasklet_kill(&priv->irq_tasklet);
  1631. }
  1632. static const char *desc_lookup(int i)
  1633. {
  1634. switch (i) {
  1635. case 1:
  1636. return "FAIL";
  1637. case 2:
  1638. return "BAD_PARAM";
  1639. case 3:
  1640. return "BAD_CHECKSUM";
  1641. case 4:
  1642. return "NMI_INTERRUPT";
  1643. case 5:
  1644. return "SYSASSERT";
  1645. case 6:
  1646. return "FATAL_ERROR";
  1647. }
  1648. return "UNKNOWN";
  1649. }
  1650. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1651. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1652. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1653. {
  1654. u32 i;
  1655. u32 desc, time, count, base, data1;
  1656. u32 blink1, blink2, ilink1, ilink2;
  1657. int rc;
  1658. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1659. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1660. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1661. return;
  1662. }
  1663. rc = iwl_grab_nic_access(priv);
  1664. if (rc) {
  1665. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1666. return;
  1667. }
  1668. count = iwl_read_targ_mem(priv, base);
  1669. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1670. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1671. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1672. priv->status, count);
  1673. }
  1674. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1675. "ilink1 nmiPC Line\n");
  1676. for (i = ERROR_START_OFFSET;
  1677. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1678. i += ERROR_ELEM_SIZE) {
  1679. desc = iwl_read_targ_mem(priv, base + i);
  1680. time =
  1681. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1682. blink1 =
  1683. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1684. blink2 =
  1685. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1686. ilink1 =
  1687. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1688. ilink2 =
  1689. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1690. data1 =
  1691. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1692. IWL_ERR(priv,
  1693. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1694. desc_lookup(desc), desc, time, blink1, blink2,
  1695. ilink1, ilink2, data1);
  1696. }
  1697. iwl_release_nic_access(priv);
  1698. }
  1699. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1700. /**
  1701. * iwl3945_print_event_log - Dump error event log to syslog
  1702. *
  1703. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  1704. */
  1705. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1706. u32 num_events, u32 mode)
  1707. {
  1708. u32 i;
  1709. u32 base; /* SRAM byte address of event log header */
  1710. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1711. u32 ptr; /* SRAM byte address of log data */
  1712. u32 ev, time, data; /* event log data */
  1713. if (num_events == 0)
  1714. return;
  1715. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1716. if (mode == 0)
  1717. event_size = 2 * sizeof(u32);
  1718. else
  1719. event_size = 3 * sizeof(u32);
  1720. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1721. /* "time" is actually "data" for mode 0 (no timestamp).
  1722. * place event id # at far right for easier visual parsing. */
  1723. for (i = 0; i < num_events; i++) {
  1724. ev = iwl_read_targ_mem(priv, ptr);
  1725. ptr += sizeof(u32);
  1726. time = iwl_read_targ_mem(priv, ptr);
  1727. ptr += sizeof(u32);
  1728. if (mode == 0) {
  1729. /* data, ev */
  1730. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1731. } else {
  1732. data = iwl_read_targ_mem(priv, ptr);
  1733. ptr += sizeof(u32);
  1734. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1735. }
  1736. }
  1737. }
  1738. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1739. {
  1740. int rc;
  1741. u32 base; /* SRAM byte address of event log header */
  1742. u32 capacity; /* event log capacity in # entries */
  1743. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1744. u32 num_wraps; /* # times uCode wrapped to top of log */
  1745. u32 next_entry; /* index of next entry to be written by uCode */
  1746. u32 size; /* # entries that we'll print */
  1747. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1748. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1749. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1750. return;
  1751. }
  1752. rc = iwl_grab_nic_access(priv);
  1753. if (rc) {
  1754. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1755. return;
  1756. }
  1757. /* event log header */
  1758. capacity = iwl_read_targ_mem(priv, base);
  1759. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1760. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1761. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1762. size = num_wraps ? capacity : next_entry;
  1763. /* bail out if nothing in log */
  1764. if (size == 0) {
  1765. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1766. iwl_release_nic_access(priv);
  1767. return;
  1768. }
  1769. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1770. size, num_wraps);
  1771. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1772. * i.e the next one that uCode would fill. */
  1773. if (num_wraps)
  1774. iwl3945_print_event_log(priv, next_entry,
  1775. capacity - next_entry, mode);
  1776. /* (then/else) start at top of log */
  1777. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1778. iwl_release_nic_access(priv);
  1779. }
  1780. static void iwl3945_error_recovery(struct iwl_priv *priv)
  1781. {
  1782. unsigned long flags;
  1783. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  1784. sizeof(priv->staging_rxon));
  1785. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1786. iwl3945_commit_rxon(priv);
  1787. iwl3945_add_station(priv, priv->bssid, 1, 0);
  1788. spin_lock_irqsave(&priv->lock, flags);
  1789. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  1790. priv->error_recovering = 0;
  1791. spin_unlock_irqrestore(&priv->lock, flags);
  1792. }
  1793. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1794. {
  1795. u32 inta, handled = 0;
  1796. u32 inta_fh;
  1797. unsigned long flags;
  1798. #ifdef CONFIG_IWLWIFI_DEBUG
  1799. u32 inta_mask;
  1800. #endif
  1801. spin_lock_irqsave(&priv->lock, flags);
  1802. /* Ack/clear/reset pending uCode interrupts.
  1803. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1804. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1805. inta = iwl_read32(priv, CSR_INT);
  1806. iwl_write32(priv, CSR_INT, inta);
  1807. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1808. * Any new interrupts that happen after this, either while we're
  1809. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1810. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1811. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1812. #ifdef CONFIG_IWLWIFI_DEBUG
  1813. if (priv->debug_level & IWL_DL_ISR) {
  1814. /* just for debug */
  1815. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1816. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1817. inta, inta_mask, inta_fh);
  1818. }
  1819. #endif
  1820. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1821. * atomic, make sure that inta covers all the interrupts that
  1822. * we've discovered, even if FH interrupt came in just after
  1823. * reading CSR_INT. */
  1824. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1825. inta |= CSR_INT_BIT_FH_RX;
  1826. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1827. inta |= CSR_INT_BIT_FH_TX;
  1828. /* Now service all interrupt bits discovered above. */
  1829. if (inta & CSR_INT_BIT_HW_ERR) {
  1830. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  1831. /* Tell the device to stop sending interrupts */
  1832. iwl_disable_interrupts(priv);
  1833. iwl_irq_handle_error(priv);
  1834. handled |= CSR_INT_BIT_HW_ERR;
  1835. spin_unlock_irqrestore(&priv->lock, flags);
  1836. return;
  1837. }
  1838. #ifdef CONFIG_IWLWIFI_DEBUG
  1839. if (priv->debug_level & (IWL_DL_ISR)) {
  1840. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1841. if (inta & CSR_INT_BIT_SCD)
  1842. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1843. "the frame/frames.\n");
  1844. /* Alive notification via Rx interrupt will do the real work */
  1845. if (inta & CSR_INT_BIT_ALIVE)
  1846. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1847. }
  1848. #endif
  1849. /* Safely ignore these bits for debug checks below */
  1850. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1851. /* Error detected by uCode */
  1852. if (inta & CSR_INT_BIT_SW_ERR) {
  1853. IWL_ERR(priv, "Microcode SW error detected. "
  1854. "Restarting 0x%X.\n", inta);
  1855. iwl_irq_handle_error(priv);
  1856. handled |= CSR_INT_BIT_SW_ERR;
  1857. }
  1858. /* uCode wakes up after power-down sleep */
  1859. if (inta & CSR_INT_BIT_WAKEUP) {
  1860. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1861. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1862. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1863. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1864. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1865. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1866. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1867. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1868. handled |= CSR_INT_BIT_WAKEUP;
  1869. }
  1870. /* All uCode command responses, including Tx command responses,
  1871. * Rx "responses" (frame-received notification), and other
  1872. * notifications from uCode come through here*/
  1873. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1874. iwl3945_rx_handle(priv);
  1875. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1876. }
  1877. if (inta & CSR_INT_BIT_FH_TX) {
  1878. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1879. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1880. if (!iwl_grab_nic_access(priv)) {
  1881. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1882. (FH39_SRVC_CHNL), 0x0);
  1883. iwl_release_nic_access(priv);
  1884. }
  1885. handled |= CSR_INT_BIT_FH_TX;
  1886. }
  1887. if (inta & ~handled)
  1888. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1889. if (inta & ~CSR_INI_SET_MASK) {
  1890. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1891. inta & ~CSR_INI_SET_MASK);
  1892. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1893. }
  1894. /* Re-enable all interrupts */
  1895. /* only Re-enable if disabled by irq */
  1896. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1897. iwl_enable_interrupts(priv);
  1898. #ifdef CONFIG_IWLWIFI_DEBUG
  1899. if (priv->debug_level & (IWL_DL_ISR)) {
  1900. inta = iwl_read32(priv, CSR_INT);
  1901. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1902. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1903. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1904. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1905. }
  1906. #endif
  1907. spin_unlock_irqrestore(&priv->lock, flags);
  1908. }
  1909. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1910. enum ieee80211_band band,
  1911. u8 is_active, u8 n_probes,
  1912. struct iwl3945_scan_channel *scan_ch)
  1913. {
  1914. const struct ieee80211_channel *channels = NULL;
  1915. const struct ieee80211_supported_band *sband;
  1916. const struct iwl_channel_info *ch_info;
  1917. u16 passive_dwell = 0;
  1918. u16 active_dwell = 0;
  1919. int added, i;
  1920. sband = iwl_get_hw_mode(priv, band);
  1921. if (!sband)
  1922. return 0;
  1923. channels = sband->channels;
  1924. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1925. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1926. if (passive_dwell <= active_dwell)
  1927. passive_dwell = active_dwell + 1;
  1928. for (i = 0, added = 0; i < sband->n_channels; i++) {
  1929. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  1930. continue;
  1931. scan_ch->channel = channels[i].hw_value;
  1932. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1933. if (!is_channel_valid(ch_info)) {
  1934. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1935. scan_ch->channel);
  1936. continue;
  1937. }
  1938. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1939. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1940. /* If passive , set up for auto-switch
  1941. * and use long active_dwell time.
  1942. */
  1943. if (!is_active || is_channel_passive(ch_info) ||
  1944. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1945. scan_ch->type = 0; /* passive */
  1946. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1947. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1948. } else {
  1949. scan_ch->type = 1; /* active */
  1950. }
  1951. /* Set direct probe bits. These may be used both for active
  1952. * scan channels (probes gets sent right away),
  1953. * or for passive channels (probes get se sent only after
  1954. * hearing clear Rx packet).*/
  1955. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1956. if (n_probes)
  1957. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1958. } else {
  1959. /* uCode v1 does not allow setting direct probe bits on
  1960. * passive channel. */
  1961. if ((scan_ch->type & 1) && n_probes)
  1962. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1963. }
  1964. /* Set txpower levels to defaults */
  1965. scan_ch->tpc.dsp_atten = 110;
  1966. /* scan_pwr_info->tpc.dsp_atten; */
  1967. /*scan_pwr_info->tpc.tx_gain; */
  1968. if (band == IEEE80211_BAND_5GHZ)
  1969. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1970. else {
  1971. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1972. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1973. * power level:
  1974. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1975. */
  1976. }
  1977. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1978. scan_ch->channel,
  1979. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1980. (scan_ch->type & 1) ?
  1981. active_dwell : passive_dwell);
  1982. scan_ch++;
  1983. added++;
  1984. }
  1985. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1986. return added;
  1987. }
  1988. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1989. struct ieee80211_rate *rates)
  1990. {
  1991. int i;
  1992. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1993. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1994. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1995. rates[i].hw_value_short = i;
  1996. rates[i].flags = 0;
  1997. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1998. /*
  1999. * If CCK != 1M then set short preamble rate flag.
  2000. */
  2001. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  2002. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  2003. }
  2004. }
  2005. }
  2006. /******************************************************************************
  2007. *
  2008. * uCode download functions
  2009. *
  2010. ******************************************************************************/
  2011. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  2012. {
  2013. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  2014. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  2015. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2016. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  2017. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2018. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2019. }
  2020. /**
  2021. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  2022. * looking at all data.
  2023. */
  2024. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  2025. {
  2026. u32 val;
  2027. u32 save_len = len;
  2028. int rc = 0;
  2029. u32 errcnt;
  2030. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  2031. rc = iwl_grab_nic_access(priv);
  2032. if (rc)
  2033. return rc;
  2034. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  2035. IWL39_RTC_INST_LOWER_BOUND);
  2036. errcnt = 0;
  2037. for (; len > 0; len -= sizeof(u32), image++) {
  2038. /* read data comes through single port, auto-incr addr */
  2039. /* NOTE: Use the debugless read so we don't flood kernel log
  2040. * if IWL_DL_IO is set */
  2041. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  2042. if (val != le32_to_cpu(*image)) {
  2043. IWL_ERR(priv, "uCode INST section is invalid at "
  2044. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  2045. save_len - len, val, le32_to_cpu(*image));
  2046. rc = -EIO;
  2047. errcnt++;
  2048. if (errcnt >= 20)
  2049. break;
  2050. }
  2051. }
  2052. iwl_release_nic_access(priv);
  2053. if (!errcnt)
  2054. IWL_DEBUG_INFO(priv,
  2055. "ucode image in INSTRUCTION memory is good\n");
  2056. return rc;
  2057. }
  2058. /**
  2059. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  2060. * using sample data 100 bytes apart. If these sample points are good,
  2061. * it's a pretty good bet that everything between them is good, too.
  2062. */
  2063. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  2064. {
  2065. u32 val;
  2066. int rc = 0;
  2067. u32 errcnt = 0;
  2068. u32 i;
  2069. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  2070. rc = iwl_grab_nic_access(priv);
  2071. if (rc)
  2072. return rc;
  2073. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  2074. /* read data comes through single port, auto-incr addr */
  2075. /* NOTE: Use the debugless read so we don't flood kernel log
  2076. * if IWL_DL_IO is set */
  2077. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  2078. i + IWL39_RTC_INST_LOWER_BOUND);
  2079. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  2080. if (val != le32_to_cpu(*image)) {
  2081. #if 0 /* Enable this if you want to see details */
  2082. IWL_ERR(priv, "uCode INST section is invalid at "
  2083. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  2084. i, val, *image);
  2085. #endif
  2086. rc = -EIO;
  2087. errcnt++;
  2088. if (errcnt >= 3)
  2089. break;
  2090. }
  2091. }
  2092. iwl_release_nic_access(priv);
  2093. return rc;
  2094. }
  2095. /**
  2096. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  2097. * and verify its contents
  2098. */
  2099. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  2100. {
  2101. __le32 *image;
  2102. u32 len;
  2103. int rc = 0;
  2104. /* Try bootstrap */
  2105. image = (__le32 *)priv->ucode_boot.v_addr;
  2106. len = priv->ucode_boot.len;
  2107. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2108. if (rc == 0) {
  2109. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  2110. return 0;
  2111. }
  2112. /* Try initialize */
  2113. image = (__le32 *)priv->ucode_init.v_addr;
  2114. len = priv->ucode_init.len;
  2115. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2116. if (rc == 0) {
  2117. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  2118. return 0;
  2119. }
  2120. /* Try runtime/protocol */
  2121. image = (__le32 *)priv->ucode_code.v_addr;
  2122. len = priv->ucode_code.len;
  2123. rc = iwl3945_verify_inst_sparse(priv, image, len);
  2124. if (rc == 0) {
  2125. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  2126. return 0;
  2127. }
  2128. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  2129. /* Since nothing seems to match, show first several data entries in
  2130. * instruction SRAM, so maybe visual inspection will give a clue.
  2131. * Selection of bootstrap image (vs. other images) is arbitrary. */
  2132. image = (__le32 *)priv->ucode_boot.v_addr;
  2133. len = priv->ucode_boot.len;
  2134. rc = iwl3945_verify_inst_full(priv, image, len);
  2135. return rc;
  2136. }
  2137. static void iwl3945_nic_start(struct iwl_priv *priv)
  2138. {
  2139. /* Remove all resets to allow NIC to operate */
  2140. iwl_write32(priv, CSR_RESET, 0);
  2141. }
  2142. /**
  2143. * iwl3945_read_ucode - Read uCode images from disk file.
  2144. *
  2145. * Copy into buffers for card to fetch via bus-mastering
  2146. */
  2147. static int iwl3945_read_ucode(struct iwl_priv *priv)
  2148. {
  2149. struct iwl_ucode *ucode;
  2150. int ret = -EINVAL, index;
  2151. const struct firmware *ucode_raw;
  2152. /* firmware file name contains uCode/driver compatibility version */
  2153. const char *name_pre = priv->cfg->fw_name_pre;
  2154. const unsigned int api_max = priv->cfg->ucode_api_max;
  2155. const unsigned int api_min = priv->cfg->ucode_api_min;
  2156. char buf[25];
  2157. u8 *src;
  2158. size_t len;
  2159. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  2160. /* Ask kernel firmware_class module to get the boot firmware off disk.
  2161. * request_firmware() is synchronous, file is in memory on return. */
  2162. for (index = api_max; index >= api_min; index--) {
  2163. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  2164. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  2165. if (ret < 0) {
  2166. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  2167. buf, ret);
  2168. if (ret == -ENOENT)
  2169. continue;
  2170. else
  2171. goto error;
  2172. } else {
  2173. if (index < api_max)
  2174. IWL_ERR(priv, "Loaded firmware %s, "
  2175. "which is deprecated. "
  2176. " Please use API v%u instead.\n",
  2177. buf, api_max);
  2178. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  2179. "(%zd bytes) from disk\n",
  2180. buf, ucode_raw->size);
  2181. break;
  2182. }
  2183. }
  2184. if (ret < 0)
  2185. goto error;
  2186. /* Make sure that we got at least our header! */
  2187. if (ucode_raw->size < sizeof(*ucode)) {
  2188. IWL_ERR(priv, "File size way too small!\n");
  2189. ret = -EINVAL;
  2190. goto err_release;
  2191. }
  2192. /* Data from ucode file: header followed by uCode images */
  2193. ucode = (void *)ucode_raw->data;
  2194. priv->ucode_ver = le32_to_cpu(ucode->ver);
  2195. api_ver = IWL_UCODE_API(priv->ucode_ver);
  2196. inst_size = le32_to_cpu(ucode->inst_size);
  2197. data_size = le32_to_cpu(ucode->data_size);
  2198. init_size = le32_to_cpu(ucode->init_size);
  2199. init_data_size = le32_to_cpu(ucode->init_data_size);
  2200. boot_size = le32_to_cpu(ucode->boot_size);
  2201. /* api_ver should match the api version forming part of the
  2202. * firmware filename ... but we don't check for that and only rely
  2203. * on the API version read from firmware header from here on forward */
  2204. if (api_ver < api_min || api_ver > api_max) {
  2205. IWL_ERR(priv, "Driver unable to support your firmware API. "
  2206. "Driver supports v%u, firmware is v%u.\n",
  2207. api_max, api_ver);
  2208. priv->ucode_ver = 0;
  2209. ret = -EINVAL;
  2210. goto err_release;
  2211. }
  2212. if (api_ver != api_max)
  2213. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  2214. "got %u. New firmware can be obtained "
  2215. "from http://www.intellinuxwireless.org.\n",
  2216. api_max, api_ver);
  2217. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  2218. IWL_UCODE_MAJOR(priv->ucode_ver),
  2219. IWL_UCODE_MINOR(priv->ucode_ver),
  2220. IWL_UCODE_API(priv->ucode_ver),
  2221. IWL_UCODE_SERIAL(priv->ucode_ver));
  2222. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  2223. priv->ucode_ver);
  2224. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  2225. inst_size);
  2226. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  2227. data_size);
  2228. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  2229. init_size);
  2230. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  2231. init_data_size);
  2232. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  2233. boot_size);
  2234. /* Verify size of file vs. image size info in file's header */
  2235. if (ucode_raw->size < sizeof(*ucode) +
  2236. inst_size + data_size + init_size +
  2237. init_data_size + boot_size) {
  2238. IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
  2239. ucode_raw->size);
  2240. ret = -EINVAL;
  2241. goto err_release;
  2242. }
  2243. /* Verify that uCode images will fit in card's SRAM */
  2244. if (inst_size > IWL39_MAX_INST_SIZE) {
  2245. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  2246. inst_size);
  2247. ret = -EINVAL;
  2248. goto err_release;
  2249. }
  2250. if (data_size > IWL39_MAX_DATA_SIZE) {
  2251. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  2252. data_size);
  2253. ret = -EINVAL;
  2254. goto err_release;
  2255. }
  2256. if (init_size > IWL39_MAX_INST_SIZE) {
  2257. IWL_DEBUG_INFO(priv,
  2258. "uCode init instr len %d too large to fit in\n",
  2259. init_size);
  2260. ret = -EINVAL;
  2261. goto err_release;
  2262. }
  2263. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  2264. IWL_DEBUG_INFO(priv,
  2265. "uCode init data len %d too large to fit in\n",
  2266. init_data_size);
  2267. ret = -EINVAL;
  2268. goto err_release;
  2269. }
  2270. if (boot_size > IWL39_MAX_BSM_SIZE) {
  2271. IWL_DEBUG_INFO(priv,
  2272. "uCode boot instr len %d too large to fit in\n",
  2273. boot_size);
  2274. ret = -EINVAL;
  2275. goto err_release;
  2276. }
  2277. /* Allocate ucode buffers for card's bus-master loading ... */
  2278. /* Runtime instructions and 2 copies of data:
  2279. * 1) unmodified from disk
  2280. * 2) backup cache for save/restore during power-downs */
  2281. priv->ucode_code.len = inst_size;
  2282. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  2283. priv->ucode_data.len = data_size;
  2284. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  2285. priv->ucode_data_backup.len = data_size;
  2286. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2287. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  2288. !priv->ucode_data_backup.v_addr)
  2289. goto err_pci_alloc;
  2290. /* Initialization instructions and data */
  2291. if (init_size && init_data_size) {
  2292. priv->ucode_init.len = init_size;
  2293. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  2294. priv->ucode_init_data.len = init_data_size;
  2295. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2296. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  2297. goto err_pci_alloc;
  2298. }
  2299. /* Bootstrap (instructions only, no data) */
  2300. if (boot_size) {
  2301. priv->ucode_boot.len = boot_size;
  2302. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2303. if (!priv->ucode_boot.v_addr)
  2304. goto err_pci_alloc;
  2305. }
  2306. /* Copy images into buffers for card's bus-master reads ... */
  2307. /* Runtime instructions (first block of data in file) */
  2308. src = &ucode->data[0];
  2309. len = priv->ucode_code.len;
  2310. IWL_DEBUG_INFO(priv,
  2311. "Copying (but not loading) uCode instr len %zd\n", len);
  2312. memcpy(priv->ucode_code.v_addr, src, len);
  2313. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  2314. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  2315. /* Runtime data (2nd block)
  2316. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  2317. src = &ucode->data[inst_size];
  2318. len = priv->ucode_data.len;
  2319. IWL_DEBUG_INFO(priv,
  2320. "Copying (but not loading) uCode data len %zd\n", len);
  2321. memcpy(priv->ucode_data.v_addr, src, len);
  2322. memcpy(priv->ucode_data_backup.v_addr, src, len);
  2323. /* Initialization instructions (3rd block) */
  2324. if (init_size) {
  2325. src = &ucode->data[inst_size + data_size];
  2326. len = priv->ucode_init.len;
  2327. IWL_DEBUG_INFO(priv,
  2328. "Copying (but not loading) init instr len %zd\n", len);
  2329. memcpy(priv->ucode_init.v_addr, src, len);
  2330. }
  2331. /* Initialization data (4th block) */
  2332. if (init_data_size) {
  2333. src = &ucode->data[inst_size + data_size + init_size];
  2334. len = priv->ucode_init_data.len;
  2335. IWL_DEBUG_INFO(priv,
  2336. "Copying (but not loading) init data len %zd\n", len);
  2337. memcpy(priv->ucode_init_data.v_addr, src, len);
  2338. }
  2339. /* Bootstrap instructions (5th block) */
  2340. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  2341. len = priv->ucode_boot.len;
  2342. IWL_DEBUG_INFO(priv,
  2343. "Copying (but not loading) boot instr len %zd\n", len);
  2344. memcpy(priv->ucode_boot.v_addr, src, len);
  2345. /* We have our copies now, allow OS release its copies */
  2346. release_firmware(ucode_raw);
  2347. return 0;
  2348. err_pci_alloc:
  2349. IWL_ERR(priv, "failed to allocate pci memory\n");
  2350. ret = -ENOMEM;
  2351. iwl3945_dealloc_ucode_pci(priv);
  2352. err_release:
  2353. release_firmware(ucode_raw);
  2354. error:
  2355. return ret;
  2356. }
  2357. /**
  2358. * iwl3945_set_ucode_ptrs - Set uCode address location
  2359. *
  2360. * Tell initialization uCode where to find runtime uCode.
  2361. *
  2362. * BSM registers initially contain pointers to initialization uCode.
  2363. * We need to replace them to load runtime uCode inst and data,
  2364. * and to save runtime data when powering down.
  2365. */
  2366. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2367. {
  2368. dma_addr_t pinst;
  2369. dma_addr_t pdata;
  2370. int rc = 0;
  2371. unsigned long flags;
  2372. /* bits 31:0 for 3945 */
  2373. pinst = priv->ucode_code.p_addr;
  2374. pdata = priv->ucode_data_backup.p_addr;
  2375. spin_lock_irqsave(&priv->lock, flags);
  2376. rc = iwl_grab_nic_access(priv);
  2377. if (rc) {
  2378. spin_unlock_irqrestore(&priv->lock, flags);
  2379. return rc;
  2380. }
  2381. /* Tell bootstrap uCode where to find image to load */
  2382. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2383. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2384. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2385. priv->ucode_data.len);
  2386. /* Inst byte count must be last to set up, bit 31 signals uCode
  2387. * that all new ptr/size info is in place */
  2388. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2389. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2390. iwl_release_nic_access(priv);
  2391. spin_unlock_irqrestore(&priv->lock, flags);
  2392. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2393. return rc;
  2394. }
  2395. /**
  2396. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2397. *
  2398. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2399. *
  2400. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2401. */
  2402. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2403. {
  2404. /* Check alive response for "valid" sign from uCode */
  2405. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2406. /* We had an error bringing up the hardware, so take it
  2407. * all the way back down so we can try again */
  2408. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2409. goto restart;
  2410. }
  2411. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2412. * This is a paranoid check, because we would not have gotten the
  2413. * "initialize" alive if code weren't properly loaded. */
  2414. if (iwl3945_verify_ucode(priv)) {
  2415. /* Runtime instruction load was bad;
  2416. * take it all the way back down so we can try again */
  2417. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2418. goto restart;
  2419. }
  2420. /* Send pointers to protocol/runtime uCode image ... init code will
  2421. * load and launch runtime uCode, which will send us another "Alive"
  2422. * notification. */
  2423. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2424. if (iwl3945_set_ucode_ptrs(priv)) {
  2425. /* Runtime instruction load won't happen;
  2426. * take it all the way back down so we can try again */
  2427. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2428. goto restart;
  2429. }
  2430. return;
  2431. restart:
  2432. queue_work(priv->workqueue, &priv->restart);
  2433. }
  2434. /* temporary */
  2435. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  2436. struct sk_buff *skb);
  2437. /**
  2438. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2439. * from protocol/runtime uCode (initialization uCode's
  2440. * Alive gets handled by iwl3945_init_alive_start()).
  2441. */
  2442. static void iwl3945_alive_start(struct iwl_priv *priv)
  2443. {
  2444. int rc = 0;
  2445. int thermal_spin = 0;
  2446. u32 rfkill;
  2447. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2448. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2449. /* We had an error bringing up the hardware, so take it
  2450. * all the way back down so we can try again */
  2451. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2452. goto restart;
  2453. }
  2454. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2455. * This is a paranoid check, because we would not have gotten the
  2456. * "runtime" alive if code weren't properly loaded. */
  2457. if (iwl3945_verify_ucode(priv)) {
  2458. /* Runtime instruction load was bad;
  2459. * take it all the way back down so we can try again */
  2460. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2461. goto restart;
  2462. }
  2463. iwl3945_clear_stations_table(priv);
  2464. rc = iwl_grab_nic_access(priv);
  2465. if (rc) {
  2466. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  2467. return;
  2468. }
  2469. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2470. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2471. iwl_release_nic_access(priv);
  2472. if (rfkill & 0x1) {
  2473. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2474. /* if RFKILL is not on, then wait for thermal
  2475. * sensor in adapter to kick in */
  2476. while (iwl3945_hw_get_temperature(priv) == 0) {
  2477. thermal_spin++;
  2478. udelay(10);
  2479. }
  2480. if (thermal_spin)
  2481. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2482. thermal_spin * 10);
  2483. } else
  2484. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2485. /* After the ALIVE response, we can send commands to 3945 uCode */
  2486. set_bit(STATUS_ALIVE, &priv->status);
  2487. /* Clear out the uCode error bit if it is set */
  2488. clear_bit(STATUS_FW_ERROR, &priv->status);
  2489. if (iwl_is_rfkill(priv))
  2490. return;
  2491. ieee80211_wake_queues(priv->hw);
  2492. priv->active_rate = priv->rates_mask;
  2493. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2494. iwl_power_update_mode(priv, false);
  2495. if (iwl_is_associated(priv)) {
  2496. struct iwl3945_rxon_cmd *active_rxon =
  2497. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2498. memcpy(&priv->staging_rxon, &priv->active_rxon,
  2499. sizeof(priv->staging_rxon));
  2500. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2501. } else {
  2502. /* Initialize our rx_config data */
  2503. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2504. }
  2505. /* Configure Bluetooth device coexistence support */
  2506. iwl_send_bt_config(priv);
  2507. /* Configure the adapter for unassociated operation */
  2508. iwl3945_commit_rxon(priv);
  2509. iwl3945_reg_txpower_periodic(priv);
  2510. iwl3945_led_register(priv);
  2511. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2512. set_bit(STATUS_READY, &priv->status);
  2513. wake_up_interruptible(&priv->wait_command_queue);
  2514. if (priv->error_recovering)
  2515. iwl3945_error_recovery(priv);
  2516. /* reassociate for ADHOC mode */
  2517. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2518. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2519. priv->vif);
  2520. if (beacon)
  2521. iwl3945_mac_beacon_update(priv->hw, beacon);
  2522. }
  2523. return;
  2524. restart:
  2525. queue_work(priv->workqueue, &priv->restart);
  2526. }
  2527. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2528. static void __iwl3945_down(struct iwl_priv *priv)
  2529. {
  2530. unsigned long flags;
  2531. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2532. struct ieee80211_conf *conf = NULL;
  2533. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2534. conf = ieee80211_get_hw_conf(priv->hw);
  2535. if (!exit_pending)
  2536. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2537. iwl3945_led_unregister(priv);
  2538. iwl3945_clear_stations_table(priv);
  2539. /* Unblock any waiting calls */
  2540. wake_up_interruptible_all(&priv->wait_command_queue);
  2541. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2542. * exiting the module */
  2543. if (!exit_pending)
  2544. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2545. /* stop and reset the on-board processor */
  2546. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2547. /* tell the device to stop sending interrupts */
  2548. spin_lock_irqsave(&priv->lock, flags);
  2549. iwl_disable_interrupts(priv);
  2550. spin_unlock_irqrestore(&priv->lock, flags);
  2551. iwl_synchronize_irq(priv);
  2552. if (priv->mac80211_registered)
  2553. ieee80211_stop_queues(priv->hw);
  2554. /* If we have not previously called iwl3945_init() then
  2555. * clear all bits but the RF Kill and SUSPEND bits and return */
  2556. if (!iwl_is_init(priv)) {
  2557. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2558. STATUS_RF_KILL_HW |
  2559. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2560. STATUS_RF_KILL_SW |
  2561. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2562. STATUS_GEO_CONFIGURED |
  2563. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  2564. STATUS_IN_SUSPEND |
  2565. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2566. STATUS_EXIT_PENDING;
  2567. goto exit;
  2568. }
  2569. /* ...otherwise clear out all the status bits but the RF Kill and
  2570. * SUSPEND bits and continue taking the NIC down. */
  2571. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2572. STATUS_RF_KILL_HW |
  2573. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2574. STATUS_RF_KILL_SW |
  2575. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2576. STATUS_GEO_CONFIGURED |
  2577. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  2578. STATUS_IN_SUSPEND |
  2579. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2580. STATUS_FW_ERROR |
  2581. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2582. STATUS_EXIT_PENDING;
  2583. priv->cfg->ops->lib->apm_ops.reset(priv);
  2584. spin_lock_irqsave(&priv->lock, flags);
  2585. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2586. spin_unlock_irqrestore(&priv->lock, flags);
  2587. iwl3945_hw_txq_ctx_stop(priv);
  2588. iwl3945_hw_rxq_stop(priv);
  2589. spin_lock_irqsave(&priv->lock, flags);
  2590. if (!iwl_grab_nic_access(priv)) {
  2591. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2592. APMG_CLK_VAL_DMA_CLK_RQT);
  2593. iwl_release_nic_access(priv);
  2594. }
  2595. spin_unlock_irqrestore(&priv->lock, flags);
  2596. udelay(5);
  2597. if (exit_pending || test_bit(STATUS_IN_SUSPEND, &priv->status))
  2598. priv->cfg->ops->lib->apm_ops.stop(priv);
  2599. else
  2600. priv->cfg->ops->lib->apm_ops.reset(priv);
  2601. exit:
  2602. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2603. if (priv->ibss_beacon)
  2604. dev_kfree_skb(priv->ibss_beacon);
  2605. priv->ibss_beacon = NULL;
  2606. /* clear out any free frames */
  2607. iwl3945_clear_free_frames(priv);
  2608. }
  2609. static void iwl3945_down(struct iwl_priv *priv)
  2610. {
  2611. mutex_lock(&priv->mutex);
  2612. __iwl3945_down(priv);
  2613. mutex_unlock(&priv->mutex);
  2614. iwl3945_cancel_deferred_work(priv);
  2615. }
  2616. #define MAX_HW_RESTARTS 5
  2617. static int __iwl3945_up(struct iwl_priv *priv)
  2618. {
  2619. int rc, i;
  2620. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2621. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2622. return -EIO;
  2623. }
  2624. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  2625. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  2626. "parameter)\n");
  2627. return -ENODEV;
  2628. }
  2629. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2630. IWL_ERR(priv, "ucode not available for device bring up\n");
  2631. return -EIO;
  2632. }
  2633. /* If platform's RF_KILL switch is NOT set to KILL */
  2634. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2635. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2636. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2637. else {
  2638. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2639. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  2640. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2641. return -ENODEV;
  2642. }
  2643. }
  2644. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2645. rc = iwl3945_hw_nic_init(priv);
  2646. if (rc) {
  2647. IWL_ERR(priv, "Unable to int nic\n");
  2648. return rc;
  2649. }
  2650. /* make sure rfkill handshake bits are cleared */
  2651. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2652. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2653. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2654. /* clear (again), then enable host interrupts */
  2655. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2656. iwl_enable_interrupts(priv);
  2657. /* really make sure rfkill handshake bits are cleared */
  2658. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2659. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2660. /* Copy original ucode data image from disk into backup cache.
  2661. * This will be used to initialize the on-board processor's
  2662. * data SRAM for a clean start when the runtime program first loads. */
  2663. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2664. priv->ucode_data.len);
  2665. /* We return success when we resume from suspend and rf_kill is on. */
  2666. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2667. return 0;
  2668. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2669. iwl3945_clear_stations_table(priv);
  2670. /* load bootstrap state machine,
  2671. * load bootstrap program into processor's memory,
  2672. * prepare to load the "initialize" uCode */
  2673. priv->cfg->ops->lib->load_ucode(priv);
  2674. if (rc) {
  2675. IWL_ERR(priv,
  2676. "Unable to set up bootstrap uCode: %d\n", rc);
  2677. continue;
  2678. }
  2679. /* start card; "initialize" will load runtime ucode */
  2680. iwl3945_nic_start(priv);
  2681. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2682. return 0;
  2683. }
  2684. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2685. __iwl3945_down(priv);
  2686. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2687. /* tried to restart and config the device for as long as our
  2688. * patience could withstand */
  2689. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2690. return -EIO;
  2691. }
  2692. /*****************************************************************************
  2693. *
  2694. * Workqueue callbacks
  2695. *
  2696. *****************************************************************************/
  2697. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2698. {
  2699. struct iwl_priv *priv =
  2700. container_of(data, struct iwl_priv, init_alive_start.work);
  2701. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2702. return;
  2703. mutex_lock(&priv->mutex);
  2704. iwl3945_init_alive_start(priv);
  2705. mutex_unlock(&priv->mutex);
  2706. }
  2707. static void iwl3945_bg_alive_start(struct work_struct *data)
  2708. {
  2709. struct iwl_priv *priv =
  2710. container_of(data, struct iwl_priv, alive_start.work);
  2711. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2712. return;
  2713. mutex_lock(&priv->mutex);
  2714. iwl3945_alive_start(priv);
  2715. mutex_unlock(&priv->mutex);
  2716. }
  2717. static void iwl3945_rfkill_poll(struct work_struct *data)
  2718. {
  2719. struct iwl_priv *priv =
  2720. container_of(data, struct iwl_priv, rfkill_poll.work);
  2721. unsigned long status = priv->status;
  2722. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2723. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2724. else
  2725. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2726. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  2727. queue_work(priv->workqueue, &priv->rf_kill);
  2728. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2729. round_jiffies_relative(2 * HZ));
  2730. }
  2731. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2732. static void iwl3945_bg_request_scan(struct work_struct *data)
  2733. {
  2734. struct iwl_priv *priv =
  2735. container_of(data, struct iwl_priv, request_scan);
  2736. struct iwl_host_cmd cmd = {
  2737. .id = REPLY_SCAN_CMD,
  2738. .len = sizeof(struct iwl3945_scan_cmd),
  2739. .meta.flags = CMD_SIZE_HUGE,
  2740. };
  2741. int rc = 0;
  2742. struct iwl3945_scan_cmd *scan;
  2743. struct ieee80211_conf *conf = NULL;
  2744. u8 n_probes = 2;
  2745. enum ieee80211_band band;
  2746. DECLARE_SSID_BUF(ssid);
  2747. conf = ieee80211_get_hw_conf(priv->hw);
  2748. mutex_lock(&priv->mutex);
  2749. if (!iwl_is_ready(priv)) {
  2750. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2751. goto done;
  2752. }
  2753. /* Make sure the scan wasn't canceled before this queued work
  2754. * was given the chance to run... */
  2755. if (!test_bit(STATUS_SCANNING, &priv->status))
  2756. goto done;
  2757. /* This should never be called or scheduled if there is currently
  2758. * a scan active in the hardware. */
  2759. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2760. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2761. "Ignoring second request.\n");
  2762. rc = -EIO;
  2763. goto done;
  2764. }
  2765. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2766. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2767. goto done;
  2768. }
  2769. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2770. IWL_DEBUG_HC(priv,
  2771. "Scan request while abort pending. Queuing.\n");
  2772. goto done;
  2773. }
  2774. if (iwl_is_rfkill(priv)) {
  2775. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2776. goto done;
  2777. }
  2778. if (!test_bit(STATUS_READY, &priv->status)) {
  2779. IWL_DEBUG_HC(priv,
  2780. "Scan request while uninitialized. Queuing.\n");
  2781. goto done;
  2782. }
  2783. if (!priv->scan_bands) {
  2784. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2785. goto done;
  2786. }
  2787. if (!priv->scan) {
  2788. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2789. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2790. if (!priv->scan) {
  2791. rc = -ENOMEM;
  2792. goto done;
  2793. }
  2794. }
  2795. scan = priv->scan;
  2796. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2797. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2798. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2799. if (iwl_is_associated(priv)) {
  2800. u16 interval = 0;
  2801. u32 extra;
  2802. u32 suspend_time = 100;
  2803. u32 scan_suspend_time = 100;
  2804. unsigned long flags;
  2805. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2806. spin_lock_irqsave(&priv->lock, flags);
  2807. interval = priv->beacon_int;
  2808. spin_unlock_irqrestore(&priv->lock, flags);
  2809. scan->suspend_time = 0;
  2810. scan->max_out_time = cpu_to_le32(200 * 1024);
  2811. if (!interval)
  2812. interval = suspend_time;
  2813. /*
  2814. * suspend time format:
  2815. * 0-19: beacon interval in usec (time before exec.)
  2816. * 20-23: 0
  2817. * 24-31: number of beacons (suspend between channels)
  2818. */
  2819. extra = (suspend_time / interval) << 24;
  2820. scan_suspend_time = 0xFF0FFFFF &
  2821. (extra | ((suspend_time % interval) * 1024));
  2822. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2823. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2824. scan_suspend_time, interval);
  2825. }
  2826. /* We should add the ability for user to lock to PASSIVE ONLY */
  2827. if (priv->one_direct_scan) {
  2828. IWL_DEBUG_SCAN(priv, "Kicking off one direct scan for '%s'\n",
  2829. print_ssid(ssid, priv->direct_ssid,
  2830. priv->direct_ssid_len));
  2831. scan->direct_scan[0].id = WLAN_EID_SSID;
  2832. scan->direct_scan[0].len = priv->direct_ssid_len;
  2833. memcpy(scan->direct_scan[0].ssid,
  2834. priv->direct_ssid, priv->direct_ssid_len);
  2835. n_probes++;
  2836. } else
  2837. IWL_DEBUG_SCAN(priv, "Kicking off one indirect scan.\n");
  2838. /* We don't build a direct scan probe request; the uCode will do
  2839. * that based on the direct_mask added to each channel entry */
  2840. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2841. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2842. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2843. /* flags + rate selection */
  2844. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2845. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2846. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2847. scan->good_CRC_th = 0;
  2848. band = IEEE80211_BAND_2GHZ;
  2849. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2850. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2851. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  2852. band = IEEE80211_BAND_5GHZ;
  2853. } else {
  2854. IWL_WARN(priv, "Invalid scan band count\n");
  2855. goto done;
  2856. }
  2857. scan->tx_cmd.len = cpu_to_le16(
  2858. iwl_fill_probe_req(priv, band,
  2859. (struct ieee80211_mgmt *)scan->data,
  2860. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2861. /* select Rx antennas */
  2862. scan->flags |= iwl3945_get_antenna_flags(priv);
  2863. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  2864. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2865. scan->channel_count =
  2866. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  2867. n_probes,
  2868. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2869. if (scan->channel_count == 0) {
  2870. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2871. goto done;
  2872. }
  2873. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2874. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2875. cmd.data = scan;
  2876. scan->len = cpu_to_le16(cmd.len);
  2877. set_bit(STATUS_SCAN_HW, &priv->status);
  2878. rc = iwl_send_cmd_sync(priv, &cmd);
  2879. if (rc)
  2880. goto done;
  2881. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2882. IWL_SCAN_CHECK_WATCHDOG);
  2883. mutex_unlock(&priv->mutex);
  2884. return;
  2885. done:
  2886. /* can not perform scan make sure we clear scanning
  2887. * bits from status so next scan request can be performed.
  2888. * if we dont clear scanning status bit here all next scan
  2889. * will fail
  2890. */
  2891. clear_bit(STATUS_SCAN_HW, &priv->status);
  2892. clear_bit(STATUS_SCANNING, &priv->status);
  2893. /* inform mac80211 scan aborted */
  2894. queue_work(priv->workqueue, &priv->scan_completed);
  2895. mutex_unlock(&priv->mutex);
  2896. }
  2897. static void iwl3945_bg_up(struct work_struct *data)
  2898. {
  2899. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2900. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2901. return;
  2902. mutex_lock(&priv->mutex);
  2903. __iwl3945_up(priv);
  2904. mutex_unlock(&priv->mutex);
  2905. iwl_rfkill_set_hw_state(priv);
  2906. }
  2907. static void iwl3945_bg_restart(struct work_struct *data)
  2908. {
  2909. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2910. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2911. return;
  2912. iwl3945_down(priv);
  2913. queue_work(priv->workqueue, &priv->up);
  2914. }
  2915. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2916. {
  2917. struct iwl_priv *priv =
  2918. container_of(data, struct iwl_priv, rx_replenish);
  2919. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2920. return;
  2921. mutex_lock(&priv->mutex);
  2922. iwl3945_rx_replenish(priv);
  2923. mutex_unlock(&priv->mutex);
  2924. }
  2925. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2926. static void iwl3945_post_associate(struct iwl_priv *priv)
  2927. {
  2928. int rc = 0;
  2929. struct ieee80211_conf *conf = NULL;
  2930. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2931. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2932. return;
  2933. }
  2934. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2935. priv->assoc_id, priv->active_rxon.bssid_addr);
  2936. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2937. return;
  2938. if (!priv->vif || !priv->is_open)
  2939. return;
  2940. iwl_scan_cancel_timeout(priv, 200);
  2941. conf = ieee80211_get_hw_conf(priv->hw);
  2942. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2943. iwl3945_commit_rxon(priv);
  2944. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2945. iwl3945_setup_rxon_timing(priv);
  2946. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2947. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2948. if (rc)
  2949. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2950. "Attempting to continue.\n");
  2951. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2952. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2953. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2954. priv->assoc_id, priv->beacon_int);
  2955. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2956. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2957. else
  2958. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2959. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2960. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2961. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2962. else
  2963. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2964. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2965. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2966. }
  2967. iwl3945_commit_rxon(priv);
  2968. switch (priv->iw_mode) {
  2969. case NL80211_IFTYPE_STATION:
  2970. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2971. break;
  2972. case NL80211_IFTYPE_ADHOC:
  2973. priv->assoc_id = 1;
  2974. iwl3945_add_station(priv, priv->bssid, 0, 0);
  2975. iwl3945_sync_sta(priv, IWL_STA_ID,
  2976. (priv->band == IEEE80211_BAND_5GHZ) ?
  2977. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2978. CMD_ASYNC);
  2979. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2980. iwl3945_send_beacon_cmd(priv);
  2981. break;
  2982. default:
  2983. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2984. __func__, priv->iw_mode);
  2985. break;
  2986. }
  2987. iwl_activate_qos(priv, 0);
  2988. /* we have just associated, don't start scan too early */
  2989. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2990. }
  2991. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  2992. /*****************************************************************************
  2993. *
  2994. * mac80211 entry point functions
  2995. *
  2996. *****************************************************************************/
  2997. #define UCODE_READY_TIMEOUT (2 * HZ)
  2998. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2999. {
  3000. struct iwl_priv *priv = hw->priv;
  3001. int ret;
  3002. IWL_DEBUG_MAC80211(priv, "enter\n");
  3003. /* we should be verifying the device is ready to be opened */
  3004. mutex_lock(&priv->mutex);
  3005. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  3006. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  3007. * ucode filename and max sizes are card-specific. */
  3008. if (!priv->ucode_code.len) {
  3009. ret = iwl3945_read_ucode(priv);
  3010. if (ret) {
  3011. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  3012. mutex_unlock(&priv->mutex);
  3013. goto out_release_irq;
  3014. }
  3015. }
  3016. ret = __iwl3945_up(priv);
  3017. mutex_unlock(&priv->mutex);
  3018. iwl_rfkill_set_hw_state(priv);
  3019. if (ret)
  3020. goto out_release_irq;
  3021. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  3022. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  3023. return 0;
  3024. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  3025. * mac80211 will not be run successfully. */
  3026. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  3027. test_bit(STATUS_READY, &priv->status),
  3028. UCODE_READY_TIMEOUT);
  3029. if (!ret) {
  3030. if (!test_bit(STATUS_READY, &priv->status)) {
  3031. IWL_ERR(priv,
  3032. "Wait for START_ALIVE timeout after %dms.\n",
  3033. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  3034. ret = -ETIMEDOUT;
  3035. goto out_release_irq;
  3036. }
  3037. }
  3038. /* ucode is running and will send rfkill notifications,
  3039. * no need to poll the killswitch state anymore */
  3040. cancel_delayed_work(&priv->rfkill_poll);
  3041. priv->is_open = 1;
  3042. IWL_DEBUG_MAC80211(priv, "leave\n");
  3043. return 0;
  3044. out_release_irq:
  3045. priv->is_open = 0;
  3046. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  3047. return ret;
  3048. }
  3049. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  3050. {
  3051. struct iwl_priv *priv = hw->priv;
  3052. IWL_DEBUG_MAC80211(priv, "enter\n");
  3053. if (!priv->is_open) {
  3054. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  3055. return;
  3056. }
  3057. priv->is_open = 0;
  3058. if (iwl_is_ready_rf(priv)) {
  3059. /* stop mac, cancel any scan request and clear
  3060. * RXON_FILTER_ASSOC_MSK BIT
  3061. */
  3062. mutex_lock(&priv->mutex);
  3063. iwl_scan_cancel_timeout(priv, 100);
  3064. mutex_unlock(&priv->mutex);
  3065. }
  3066. iwl3945_down(priv);
  3067. flush_workqueue(priv->workqueue);
  3068. /* start polling the killswitch state again */
  3069. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3070. round_jiffies_relative(2 * HZ));
  3071. IWL_DEBUG_MAC80211(priv, "leave\n");
  3072. }
  3073. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  3074. {
  3075. struct iwl_priv *priv = hw->priv;
  3076. IWL_DEBUG_MAC80211(priv, "enter\n");
  3077. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  3078. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  3079. if (iwl3945_tx_skb(priv, skb))
  3080. dev_kfree_skb_any(skb);
  3081. IWL_DEBUG_MAC80211(priv, "leave\n");
  3082. return NETDEV_TX_OK;
  3083. }
  3084. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  3085. struct ieee80211_if_init_conf *conf)
  3086. {
  3087. struct iwl_priv *priv = hw->priv;
  3088. unsigned long flags;
  3089. IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type);
  3090. if (priv->vif) {
  3091. IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
  3092. return -EOPNOTSUPP;
  3093. }
  3094. spin_lock_irqsave(&priv->lock, flags);
  3095. priv->vif = conf->vif;
  3096. priv->iw_mode = conf->type;
  3097. spin_unlock_irqrestore(&priv->lock, flags);
  3098. mutex_lock(&priv->mutex);
  3099. if (conf->mac_addr) {
  3100. IWL_DEBUG_MAC80211(priv, "Set: %pM\n", conf->mac_addr);
  3101. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  3102. }
  3103. if (iwl_is_ready(priv))
  3104. iwl3945_set_mode(priv, conf->type);
  3105. mutex_unlock(&priv->mutex);
  3106. IWL_DEBUG_MAC80211(priv, "leave\n");
  3107. return 0;
  3108. }
  3109. /**
  3110. * iwl3945_mac_config - mac80211 config callback
  3111. *
  3112. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  3113. * be set inappropriately and the driver currently sets the hardware up to
  3114. * use it whenever needed.
  3115. */
  3116. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  3117. {
  3118. struct iwl_priv *priv = hw->priv;
  3119. const struct iwl_channel_info *ch_info;
  3120. struct ieee80211_conf *conf = &hw->conf;
  3121. unsigned long flags;
  3122. int ret = 0;
  3123. mutex_lock(&priv->mutex);
  3124. IWL_DEBUG_MAC80211(priv, "enter to channel %d\n",
  3125. conf->channel->hw_value);
  3126. if (!iwl_is_ready(priv)) {
  3127. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  3128. ret = -EIO;
  3129. goto out;
  3130. }
  3131. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  3132. test_bit(STATUS_SCANNING, &priv->status))) {
  3133. IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
  3134. set_bit(STATUS_CONF_PENDING, &priv->status);
  3135. mutex_unlock(&priv->mutex);
  3136. return 0;
  3137. }
  3138. spin_lock_irqsave(&priv->lock, flags);
  3139. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  3140. conf->channel->hw_value);
  3141. if (!is_channel_valid(ch_info)) {
  3142. IWL_DEBUG_SCAN(priv,
  3143. "Channel %d [%d] is INVALID for this band.\n",
  3144. conf->channel->hw_value, conf->channel->band);
  3145. IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
  3146. spin_unlock_irqrestore(&priv->lock, flags);
  3147. ret = -EINVAL;
  3148. goto out;
  3149. }
  3150. iwl_set_rxon_channel(priv, conf->channel);
  3151. iwl_set_flags_for_band(priv, conf->channel->band);
  3152. /* The list of supported rates and rate mask can be different
  3153. * for each phymode; since the phymode may have changed, reset
  3154. * the rate mask to what mac80211 lists */
  3155. iwl_set_rate(priv);
  3156. spin_unlock_irqrestore(&priv->lock, flags);
  3157. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  3158. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  3159. iwl3945_hw_channel_switch(priv, conf->channel);
  3160. goto out;
  3161. }
  3162. #endif
  3163. if (changed & IEEE80211_CONF_CHANGE_RADIO_ENABLED) {
  3164. if (conf->radio_enabled &&
  3165. iwl_radio_kill_sw_enable_radio(priv)) {
  3166. IWL_DEBUG_MAC80211(priv, "leave - RF-KILL - "
  3167. "waiting for uCode\n");
  3168. goto out;
  3169. }
  3170. if (!conf->radio_enabled) {
  3171. iwl_radio_kill_sw_disable_radio(priv);
  3172. IWL_DEBUG_MAC80211(priv, "leave - radio disabled\n");
  3173. goto out;
  3174. }
  3175. }
  3176. if (iwl_is_rfkill(priv)) {
  3177. IWL_DEBUG_MAC80211(priv, "leave - RF kill\n");
  3178. ret = -EIO;
  3179. goto out;
  3180. }
  3181. iwl_set_rate(priv);
  3182. if (memcmp(&priv->active_rxon,
  3183. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  3184. iwl3945_commit_rxon(priv);
  3185. else
  3186. IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration\n");
  3187. IWL_DEBUG_MAC80211(priv, "leave\n");
  3188. out:
  3189. clear_bit(STATUS_CONF_PENDING, &priv->status);
  3190. mutex_unlock(&priv->mutex);
  3191. return ret;
  3192. }
  3193. static void iwl3945_config_ap(struct iwl_priv *priv)
  3194. {
  3195. int rc = 0;
  3196. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  3197. return;
  3198. /* The following should be done only at AP bring up */
  3199. if (!(iwl_is_associated(priv))) {
  3200. /* RXON - unassoc (to set timing command) */
  3201. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3202. iwl3945_commit_rxon(priv);
  3203. /* RXON Timing */
  3204. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  3205. iwl3945_setup_rxon_timing(priv);
  3206. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  3207. sizeof(priv->rxon_timing),
  3208. &priv->rxon_timing);
  3209. if (rc)
  3210. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  3211. "Attempting to continue.\n");
  3212. /* FIXME: what should be the assoc_id for AP? */
  3213. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  3214. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  3215. priv->staging_rxon.flags |=
  3216. RXON_FLG_SHORT_PREAMBLE_MSK;
  3217. else
  3218. priv->staging_rxon.flags &=
  3219. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3220. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  3221. if (priv->assoc_capability &
  3222. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  3223. priv->staging_rxon.flags |=
  3224. RXON_FLG_SHORT_SLOT_MSK;
  3225. else
  3226. priv->staging_rxon.flags &=
  3227. ~RXON_FLG_SHORT_SLOT_MSK;
  3228. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  3229. priv->staging_rxon.flags &=
  3230. ~RXON_FLG_SHORT_SLOT_MSK;
  3231. }
  3232. /* restore RXON assoc */
  3233. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  3234. iwl3945_commit_rxon(priv);
  3235. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  3236. }
  3237. iwl3945_send_beacon_cmd(priv);
  3238. /* FIXME - we need to add code here to detect a totally new
  3239. * configuration, reset the AP, unassoc, rxon timing, assoc,
  3240. * clear sta table, add BCAST sta... */
  3241. }
  3242. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  3243. struct ieee80211_vif *vif,
  3244. struct ieee80211_if_conf *conf)
  3245. {
  3246. struct iwl_priv *priv = hw->priv;
  3247. int rc;
  3248. if (conf == NULL)
  3249. return -EIO;
  3250. if (priv->vif != vif) {
  3251. IWL_DEBUG_MAC80211(priv, "leave - priv->vif != vif\n");
  3252. return 0;
  3253. }
  3254. /* handle this temporarily here */
  3255. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  3256. conf->changed & IEEE80211_IFCC_BEACON) {
  3257. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  3258. if (!beacon)
  3259. return -ENOMEM;
  3260. mutex_lock(&priv->mutex);
  3261. rc = iwl3945_mac_beacon_update(hw, beacon);
  3262. mutex_unlock(&priv->mutex);
  3263. if (rc)
  3264. return rc;
  3265. }
  3266. if (!iwl_is_alive(priv))
  3267. return -EAGAIN;
  3268. mutex_lock(&priv->mutex);
  3269. if (conf->bssid)
  3270. IWL_DEBUG_MAC80211(priv, "bssid: %pM\n", conf->bssid);
  3271. /*
  3272. * very dubious code was here; the probe filtering flag is never set:
  3273. *
  3274. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  3275. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  3276. */
  3277. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  3278. if (!conf->bssid) {
  3279. conf->bssid = priv->mac_addr;
  3280. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  3281. IWL_DEBUG_MAC80211(priv, "bssid was set to: %pM\n",
  3282. conf->bssid);
  3283. }
  3284. if (priv->ibss_beacon)
  3285. dev_kfree_skb(priv->ibss_beacon);
  3286. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  3287. }
  3288. if (iwl_is_rfkill(priv))
  3289. goto done;
  3290. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  3291. !is_multicast_ether_addr(conf->bssid)) {
  3292. /* If there is currently a HW scan going on in the background
  3293. * then we need to cancel it else the RXON below will fail. */
  3294. if (iwl_scan_cancel_timeout(priv, 100)) {
  3295. IWL_WARN(priv, "Aborted scan still in progress "
  3296. "after 100ms\n");
  3297. IWL_DEBUG_MAC80211(priv, "leaving:scan abort failed\n");
  3298. mutex_unlock(&priv->mutex);
  3299. return -EAGAIN;
  3300. }
  3301. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  3302. /* TODO: Audit driver for usage of these members and see
  3303. * if mac80211 deprecates them (priv->bssid looks like it
  3304. * shouldn't be there, but I haven't scanned the IBSS code
  3305. * to verify) - jpk */
  3306. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  3307. if (priv->iw_mode == NL80211_IFTYPE_AP)
  3308. iwl3945_config_ap(priv);
  3309. else {
  3310. rc = iwl3945_commit_rxon(priv);
  3311. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  3312. iwl3945_add_station(priv,
  3313. priv->active_rxon.bssid_addr, 1, 0);
  3314. }
  3315. } else {
  3316. iwl_scan_cancel_timeout(priv, 100);
  3317. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3318. iwl3945_commit_rxon(priv);
  3319. }
  3320. done:
  3321. IWL_DEBUG_MAC80211(priv, "leave\n");
  3322. mutex_unlock(&priv->mutex);
  3323. return 0;
  3324. }
  3325. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  3326. struct ieee80211_if_init_conf *conf)
  3327. {
  3328. struct iwl_priv *priv = hw->priv;
  3329. IWL_DEBUG_MAC80211(priv, "enter\n");
  3330. mutex_lock(&priv->mutex);
  3331. if (iwl_is_ready_rf(priv)) {
  3332. iwl_scan_cancel_timeout(priv, 100);
  3333. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3334. iwl3945_commit_rxon(priv);
  3335. }
  3336. if (priv->vif == conf->vif) {
  3337. priv->vif = NULL;
  3338. memset(priv->bssid, 0, ETH_ALEN);
  3339. }
  3340. mutex_unlock(&priv->mutex);
  3341. IWL_DEBUG_MAC80211(priv, "leave\n");
  3342. }
  3343. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  3344. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  3345. struct ieee80211_vif *vif,
  3346. struct ieee80211_bss_conf *bss_conf,
  3347. u32 changes)
  3348. {
  3349. struct iwl_priv *priv = hw->priv;
  3350. IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
  3351. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  3352. IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
  3353. bss_conf->use_short_preamble);
  3354. if (bss_conf->use_short_preamble)
  3355. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3356. else
  3357. priv->staging_rxon.flags &=
  3358. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3359. }
  3360. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  3361. IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n",
  3362. bss_conf->use_cts_prot);
  3363. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  3364. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  3365. else
  3366. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  3367. }
  3368. if (changes & BSS_CHANGED_ASSOC) {
  3369. IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
  3370. /* This should never happen as this function should
  3371. * never be called from interrupt context. */
  3372. if (WARN_ON_ONCE(in_interrupt()))
  3373. return;
  3374. if (bss_conf->assoc) {
  3375. priv->assoc_id = bss_conf->aid;
  3376. priv->beacon_int = bss_conf->beacon_int;
  3377. priv->timestamp = bss_conf->timestamp;
  3378. priv->assoc_capability = bss_conf->assoc_capability;
  3379. priv->power_data.dtim_period = bss_conf->dtim_period;
  3380. priv->next_scan_jiffies = jiffies +
  3381. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  3382. mutex_lock(&priv->mutex);
  3383. iwl3945_post_associate(priv);
  3384. mutex_unlock(&priv->mutex);
  3385. } else {
  3386. priv->assoc_id = 0;
  3387. IWL_DEBUG_MAC80211(priv,
  3388. "DISASSOC %d\n", bss_conf->assoc);
  3389. }
  3390. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  3391. IWL_DEBUG_MAC80211(priv,
  3392. "Associated Changes %d\n", changes);
  3393. iwl3945_send_rxon_assoc(priv);
  3394. }
  3395. }
  3396. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  3397. struct ieee80211_vif *vif,
  3398. struct ieee80211_sta *sta,
  3399. struct ieee80211_key_conf *key)
  3400. {
  3401. struct iwl_priv *priv = hw->priv;
  3402. const u8 *addr;
  3403. int ret = 0;
  3404. u8 sta_id = IWL_INVALID_STATION;
  3405. u8 static_key;
  3406. IWL_DEBUG_MAC80211(priv, "enter\n");
  3407. if (iwl3945_mod_params.sw_crypto) {
  3408. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  3409. return -EOPNOTSUPP;
  3410. }
  3411. addr = sta ? sta->addr : iwl_bcast_addr;
  3412. static_key = !iwl_is_associated(priv);
  3413. if (!static_key) {
  3414. sta_id = iwl3945_hw_find_station(priv, addr);
  3415. if (sta_id == IWL_INVALID_STATION) {
  3416. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  3417. addr);
  3418. return -EINVAL;
  3419. }
  3420. }
  3421. mutex_lock(&priv->mutex);
  3422. iwl_scan_cancel_timeout(priv, 100);
  3423. mutex_unlock(&priv->mutex);
  3424. switch (cmd) {
  3425. case SET_KEY:
  3426. if (static_key)
  3427. ret = iwl3945_set_static_key(priv, key);
  3428. else
  3429. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  3430. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  3431. break;
  3432. case DISABLE_KEY:
  3433. if (static_key)
  3434. ret = iwl3945_remove_static_key(priv);
  3435. else
  3436. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  3437. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  3438. break;
  3439. default:
  3440. ret = -EINVAL;
  3441. }
  3442. IWL_DEBUG_MAC80211(priv, "leave\n");
  3443. return ret;
  3444. }
  3445. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  3446. const struct ieee80211_tx_queue_params *params)
  3447. {
  3448. struct iwl_priv *priv = hw->priv;
  3449. unsigned long flags;
  3450. int q;
  3451. IWL_DEBUG_MAC80211(priv, "enter\n");
  3452. if (!iwl_is_ready_rf(priv)) {
  3453. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  3454. return -EIO;
  3455. }
  3456. if (queue >= AC_NUM) {
  3457. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  3458. return 0;
  3459. }
  3460. q = AC_NUM - 1 - queue;
  3461. spin_lock_irqsave(&priv->lock, flags);
  3462. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  3463. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  3464. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3465. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  3466. cpu_to_le16((params->txop * 32));
  3467. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3468. priv->qos_data.qos_active = 1;
  3469. spin_unlock_irqrestore(&priv->lock, flags);
  3470. mutex_lock(&priv->mutex);
  3471. if (priv->iw_mode == NL80211_IFTYPE_AP)
  3472. iwl_activate_qos(priv, 1);
  3473. else if (priv->assoc_id && iwl_is_associated(priv))
  3474. iwl_activate_qos(priv, 0);
  3475. mutex_unlock(&priv->mutex);
  3476. IWL_DEBUG_MAC80211(priv, "leave\n");
  3477. return 0;
  3478. }
  3479. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  3480. struct ieee80211_tx_queue_stats *stats)
  3481. {
  3482. struct iwl_priv *priv = hw->priv;
  3483. int i, avail;
  3484. struct iwl_tx_queue *txq;
  3485. struct iwl_queue *q;
  3486. unsigned long flags;
  3487. IWL_DEBUG_MAC80211(priv, "enter\n");
  3488. if (!iwl_is_ready_rf(priv)) {
  3489. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  3490. return -EIO;
  3491. }
  3492. spin_lock_irqsave(&priv->lock, flags);
  3493. for (i = 0; i < AC_NUM; i++) {
  3494. txq = &priv->txq[i];
  3495. q = &txq->q;
  3496. avail = iwl_queue_space(q);
  3497. stats[i].len = q->n_window - avail;
  3498. stats[i].limit = q->n_window - q->high_mark;
  3499. stats[i].count = q->n_window;
  3500. }
  3501. spin_unlock_irqrestore(&priv->lock, flags);
  3502. IWL_DEBUG_MAC80211(priv, "leave\n");
  3503. return 0;
  3504. }
  3505. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  3506. {
  3507. struct iwl_priv *priv = hw->priv;
  3508. unsigned long flags;
  3509. mutex_lock(&priv->mutex);
  3510. IWL_DEBUG_MAC80211(priv, "enter\n");
  3511. iwl_reset_qos(priv);
  3512. spin_lock_irqsave(&priv->lock, flags);
  3513. priv->assoc_id = 0;
  3514. priv->assoc_capability = 0;
  3515. /* new association get rid of ibss beacon skb */
  3516. if (priv->ibss_beacon)
  3517. dev_kfree_skb(priv->ibss_beacon);
  3518. priv->ibss_beacon = NULL;
  3519. priv->beacon_int = priv->hw->conf.beacon_int;
  3520. priv->timestamp = 0;
  3521. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  3522. priv->beacon_int = 0;
  3523. spin_unlock_irqrestore(&priv->lock, flags);
  3524. if (!iwl_is_ready_rf(priv)) {
  3525. IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
  3526. mutex_unlock(&priv->mutex);
  3527. return;
  3528. }
  3529. /* we are restarting association process
  3530. * clear RXON_FILTER_ASSOC_MSK bit
  3531. */
  3532. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  3533. iwl_scan_cancel_timeout(priv, 100);
  3534. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3535. iwl3945_commit_rxon(priv);
  3536. }
  3537. /* Per mac80211.h: This is only used in IBSS mode... */
  3538. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  3539. IWL_DEBUG_MAC80211(priv, "leave - not in IBSS\n");
  3540. mutex_unlock(&priv->mutex);
  3541. return;
  3542. }
  3543. iwl_set_rate(priv);
  3544. mutex_unlock(&priv->mutex);
  3545. IWL_DEBUG_MAC80211(priv, "leave\n");
  3546. }
  3547. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  3548. {
  3549. struct iwl_priv *priv = hw->priv;
  3550. unsigned long flags;
  3551. __le64 timestamp;
  3552. IWL_DEBUG_MAC80211(priv, "enter\n");
  3553. if (!iwl_is_ready_rf(priv)) {
  3554. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  3555. return -EIO;
  3556. }
  3557. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  3558. IWL_DEBUG_MAC80211(priv, "leave - not IBSS\n");
  3559. return -EIO;
  3560. }
  3561. spin_lock_irqsave(&priv->lock, flags);
  3562. if (priv->ibss_beacon)
  3563. dev_kfree_skb(priv->ibss_beacon);
  3564. priv->ibss_beacon = skb;
  3565. priv->assoc_id = 0;
  3566. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  3567. priv->timestamp = le64_to_cpu(timestamp);
  3568. IWL_DEBUG_MAC80211(priv, "leave\n");
  3569. spin_unlock_irqrestore(&priv->lock, flags);
  3570. iwl_reset_qos(priv);
  3571. iwl3945_post_associate(priv);
  3572. return 0;
  3573. }
  3574. /*****************************************************************************
  3575. *
  3576. * sysfs attributes
  3577. *
  3578. *****************************************************************************/
  3579. #ifdef CONFIG_IWLWIFI_DEBUG
  3580. /*
  3581. * The following adds a new attribute to the sysfs representation
  3582. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  3583. * used for controlling the debug level.
  3584. *
  3585. * See the level definitions in iwl for details.
  3586. */
  3587. static ssize_t show_debug_level(struct device *d,
  3588. struct device_attribute *attr, char *buf)
  3589. {
  3590. struct iwl_priv *priv = d->driver_data;
  3591. return sprintf(buf, "0x%08X\n", priv->debug_level);
  3592. }
  3593. static ssize_t store_debug_level(struct device *d,
  3594. struct device_attribute *attr,
  3595. const char *buf, size_t count)
  3596. {
  3597. struct iwl_priv *priv = d->driver_data;
  3598. unsigned long val;
  3599. int ret;
  3600. ret = strict_strtoul(buf, 0, &val);
  3601. if (ret)
  3602. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  3603. else
  3604. priv->debug_level = val;
  3605. return strnlen(buf, count);
  3606. }
  3607. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  3608. show_debug_level, store_debug_level);
  3609. #endif /* CONFIG_IWLWIFI_DEBUG */
  3610. static ssize_t show_temperature(struct device *d,
  3611. struct device_attribute *attr, char *buf)
  3612. {
  3613. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3614. if (!iwl_is_alive(priv))
  3615. return -EAGAIN;
  3616. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  3617. }
  3618. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  3619. static ssize_t show_tx_power(struct device *d,
  3620. struct device_attribute *attr, char *buf)
  3621. {
  3622. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3623. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  3624. }
  3625. static ssize_t store_tx_power(struct device *d,
  3626. struct device_attribute *attr,
  3627. const char *buf, size_t count)
  3628. {
  3629. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3630. char *p = (char *)buf;
  3631. u32 val;
  3632. val = simple_strtoul(p, &p, 10);
  3633. if (p == buf)
  3634. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  3635. else
  3636. iwl3945_hw_reg_set_txpower(priv, val);
  3637. return count;
  3638. }
  3639. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  3640. static ssize_t show_flags(struct device *d,
  3641. struct device_attribute *attr, char *buf)
  3642. {
  3643. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3644. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  3645. }
  3646. static ssize_t store_flags(struct device *d,
  3647. struct device_attribute *attr,
  3648. const char *buf, size_t count)
  3649. {
  3650. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3651. u32 flags = simple_strtoul(buf, NULL, 0);
  3652. mutex_lock(&priv->mutex);
  3653. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  3654. /* Cancel any currently running scans... */
  3655. if (iwl_scan_cancel_timeout(priv, 100))
  3656. IWL_WARN(priv, "Could not cancel scan.\n");
  3657. else {
  3658. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  3659. flags);
  3660. priv->staging_rxon.flags = cpu_to_le32(flags);
  3661. iwl3945_commit_rxon(priv);
  3662. }
  3663. }
  3664. mutex_unlock(&priv->mutex);
  3665. return count;
  3666. }
  3667. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  3668. static ssize_t show_filter_flags(struct device *d,
  3669. struct device_attribute *attr, char *buf)
  3670. {
  3671. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3672. return sprintf(buf, "0x%04X\n",
  3673. le32_to_cpu(priv->active_rxon.filter_flags));
  3674. }
  3675. static ssize_t store_filter_flags(struct device *d,
  3676. struct device_attribute *attr,
  3677. const char *buf, size_t count)
  3678. {
  3679. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3680. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  3681. mutex_lock(&priv->mutex);
  3682. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  3683. /* Cancel any currently running scans... */
  3684. if (iwl_scan_cancel_timeout(priv, 100))
  3685. IWL_WARN(priv, "Could not cancel scan.\n");
  3686. else {
  3687. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  3688. "0x%04X\n", filter_flags);
  3689. priv->staging_rxon.filter_flags =
  3690. cpu_to_le32(filter_flags);
  3691. iwl3945_commit_rxon(priv);
  3692. }
  3693. }
  3694. mutex_unlock(&priv->mutex);
  3695. return count;
  3696. }
  3697. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  3698. store_filter_flags);
  3699. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3700. static ssize_t show_measurement(struct device *d,
  3701. struct device_attribute *attr, char *buf)
  3702. {
  3703. struct iwl_priv *priv = dev_get_drvdata(d);
  3704. struct iwl_spectrum_notification measure_report;
  3705. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  3706. u8 *data = (u8 *)&measure_report;
  3707. unsigned long flags;
  3708. spin_lock_irqsave(&priv->lock, flags);
  3709. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  3710. spin_unlock_irqrestore(&priv->lock, flags);
  3711. return 0;
  3712. }
  3713. memcpy(&measure_report, &priv->measure_report, size);
  3714. priv->measurement_status = 0;
  3715. spin_unlock_irqrestore(&priv->lock, flags);
  3716. while (size && (PAGE_SIZE - len)) {
  3717. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3718. PAGE_SIZE - len, 1);
  3719. len = strlen(buf);
  3720. if (PAGE_SIZE - len)
  3721. buf[len++] = '\n';
  3722. ofs += 16;
  3723. size -= min(size, 16U);
  3724. }
  3725. return len;
  3726. }
  3727. static ssize_t store_measurement(struct device *d,
  3728. struct device_attribute *attr,
  3729. const char *buf, size_t count)
  3730. {
  3731. struct iwl_priv *priv = dev_get_drvdata(d);
  3732. struct ieee80211_measurement_params params = {
  3733. .channel = le16_to_cpu(priv->active_rxon.channel),
  3734. .start_time = cpu_to_le64(priv->last_tsf),
  3735. .duration = cpu_to_le16(1),
  3736. };
  3737. u8 type = IWL_MEASURE_BASIC;
  3738. u8 buffer[32];
  3739. u8 channel;
  3740. if (count) {
  3741. char *p = buffer;
  3742. strncpy(buffer, buf, min(sizeof(buffer), count));
  3743. channel = simple_strtoul(p, NULL, 0);
  3744. if (channel)
  3745. params.channel = channel;
  3746. p = buffer;
  3747. while (*p && *p != ' ')
  3748. p++;
  3749. if (*p)
  3750. type = simple_strtoul(p + 1, NULL, 0);
  3751. }
  3752. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3753. "channel %d (for '%s')\n", type, params.channel, buf);
  3754. iwl3945_get_measurement(priv, &params, type);
  3755. return count;
  3756. }
  3757. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3758. show_measurement, store_measurement);
  3759. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  3760. static ssize_t store_retry_rate(struct device *d,
  3761. struct device_attribute *attr,
  3762. const char *buf, size_t count)
  3763. {
  3764. struct iwl_priv *priv = dev_get_drvdata(d);
  3765. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3766. if (priv->retry_rate <= 0)
  3767. priv->retry_rate = 1;
  3768. return count;
  3769. }
  3770. static ssize_t show_retry_rate(struct device *d,
  3771. struct device_attribute *attr, char *buf)
  3772. {
  3773. struct iwl_priv *priv = dev_get_drvdata(d);
  3774. return sprintf(buf, "%d", priv->retry_rate);
  3775. }
  3776. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3777. store_retry_rate);
  3778. static ssize_t store_power_level(struct device *d,
  3779. struct device_attribute *attr,
  3780. const char *buf, size_t count)
  3781. {
  3782. struct iwl_priv *priv = dev_get_drvdata(d);
  3783. int ret;
  3784. unsigned long mode;
  3785. mutex_lock(&priv->mutex);
  3786. ret = strict_strtoul(buf, 10, &mode);
  3787. if (ret)
  3788. goto out;
  3789. ret = iwl_power_set_user_mode(priv, mode);
  3790. if (ret) {
  3791. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  3792. goto out;
  3793. }
  3794. ret = count;
  3795. out:
  3796. mutex_unlock(&priv->mutex);
  3797. return ret;
  3798. }
  3799. static ssize_t show_power_level(struct device *d,
  3800. struct device_attribute *attr, char *buf)
  3801. {
  3802. struct iwl_priv *priv = dev_get_drvdata(d);
  3803. int mode = priv->power_data.user_power_setting;
  3804. int system = priv->power_data.system_power_setting;
  3805. int level = priv->power_data.power_mode;
  3806. char *p = buf;
  3807. switch (system) {
  3808. case IWL_POWER_SYS_AUTO:
  3809. p += sprintf(p, "SYSTEM:auto");
  3810. break;
  3811. case IWL_POWER_SYS_AC:
  3812. p += sprintf(p, "SYSTEM:ac");
  3813. break;
  3814. case IWL_POWER_SYS_BATTERY:
  3815. p += sprintf(p, "SYSTEM:battery");
  3816. break;
  3817. }
  3818. p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
  3819. "fixed" : "auto");
  3820. p += sprintf(p, "\tINDEX:%d", level);
  3821. p += sprintf(p, "\n");
  3822. return p - buf + 1;
  3823. }
  3824. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  3825. show_power_level, store_power_level);
  3826. #define MAX_WX_STRING 80
  3827. /* Values are in microsecond */
  3828. static const s32 timeout_duration[] = {
  3829. 350000,
  3830. 250000,
  3831. 75000,
  3832. 37000,
  3833. 25000,
  3834. };
  3835. static const s32 period_duration[] = {
  3836. 400000,
  3837. 700000,
  3838. 1000000,
  3839. 1000000,
  3840. 1000000
  3841. };
  3842. static ssize_t show_channels(struct device *d,
  3843. struct device_attribute *attr, char *buf)
  3844. {
  3845. /* all this shit doesn't belong into sysfs anyway */
  3846. return 0;
  3847. }
  3848. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3849. static ssize_t show_statistics(struct device *d,
  3850. struct device_attribute *attr, char *buf)
  3851. {
  3852. struct iwl_priv *priv = dev_get_drvdata(d);
  3853. u32 size = sizeof(struct iwl3945_notif_statistics);
  3854. u32 len = 0, ofs = 0;
  3855. u8 *data = (u8 *)&priv->statistics_39;
  3856. int rc = 0;
  3857. if (!iwl_is_alive(priv))
  3858. return -EAGAIN;
  3859. mutex_lock(&priv->mutex);
  3860. rc = iwl_send_statistics_request(priv, 0);
  3861. mutex_unlock(&priv->mutex);
  3862. if (rc) {
  3863. len = sprintf(buf,
  3864. "Error sending statistics request: 0x%08X\n", rc);
  3865. return len;
  3866. }
  3867. while (size && (PAGE_SIZE - len)) {
  3868. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3869. PAGE_SIZE - len, 1);
  3870. len = strlen(buf);
  3871. if (PAGE_SIZE - len)
  3872. buf[len++] = '\n';
  3873. ofs += 16;
  3874. size -= min(size, 16U);
  3875. }
  3876. return len;
  3877. }
  3878. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3879. static ssize_t show_antenna(struct device *d,
  3880. struct device_attribute *attr, char *buf)
  3881. {
  3882. struct iwl_priv *priv = dev_get_drvdata(d);
  3883. if (!iwl_is_alive(priv))
  3884. return -EAGAIN;
  3885. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3886. }
  3887. static ssize_t store_antenna(struct device *d,
  3888. struct device_attribute *attr,
  3889. const char *buf, size_t count)
  3890. {
  3891. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3892. int ant;
  3893. if (count == 0)
  3894. return 0;
  3895. if (sscanf(buf, "%1i", &ant) != 1) {
  3896. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3897. return count;
  3898. }
  3899. if ((ant >= 0) && (ant <= 2)) {
  3900. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3901. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3902. } else
  3903. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3904. return count;
  3905. }
  3906. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3907. static ssize_t show_status(struct device *d,
  3908. struct device_attribute *attr, char *buf)
  3909. {
  3910. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3911. if (!iwl_is_alive(priv))
  3912. return -EAGAIN;
  3913. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3914. }
  3915. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3916. static ssize_t dump_error_log(struct device *d,
  3917. struct device_attribute *attr,
  3918. const char *buf, size_t count)
  3919. {
  3920. char *p = (char *)buf;
  3921. if (p[0] == '1')
  3922. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  3923. return strnlen(buf, count);
  3924. }
  3925. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3926. static ssize_t dump_event_log(struct device *d,
  3927. struct device_attribute *attr,
  3928. const char *buf, size_t count)
  3929. {
  3930. char *p = (char *)buf;
  3931. if (p[0] == '1')
  3932. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  3933. return strnlen(buf, count);
  3934. }
  3935. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3936. /*****************************************************************************
  3937. *
  3938. * driver setup and tear down
  3939. *
  3940. *****************************************************************************/
  3941. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3942. {
  3943. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3944. init_waitqueue_head(&priv->wait_command_queue);
  3945. INIT_WORK(&priv->up, iwl3945_bg_up);
  3946. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3947. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3948. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  3949. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3950. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3951. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3952. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3953. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3954. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3955. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3956. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3957. iwl3945_hw_setup_deferred_work(priv);
  3958. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3959. iwl3945_irq_tasklet, (unsigned long)priv);
  3960. }
  3961. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3962. {
  3963. iwl3945_hw_cancel_deferred_work(priv);
  3964. cancel_delayed_work_sync(&priv->init_alive_start);
  3965. cancel_delayed_work(&priv->scan_check);
  3966. cancel_delayed_work(&priv->alive_start);
  3967. cancel_work_sync(&priv->beacon_update);
  3968. }
  3969. static struct attribute *iwl3945_sysfs_entries[] = {
  3970. &dev_attr_antenna.attr,
  3971. &dev_attr_channels.attr,
  3972. &dev_attr_dump_errors.attr,
  3973. &dev_attr_dump_events.attr,
  3974. &dev_attr_flags.attr,
  3975. &dev_attr_filter_flags.attr,
  3976. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3977. &dev_attr_measurement.attr,
  3978. #endif
  3979. &dev_attr_power_level.attr,
  3980. &dev_attr_retry_rate.attr,
  3981. &dev_attr_statistics.attr,
  3982. &dev_attr_status.attr,
  3983. &dev_attr_temperature.attr,
  3984. &dev_attr_tx_power.attr,
  3985. #ifdef CONFIG_IWLWIFI_DEBUG
  3986. &dev_attr_debug_level.attr,
  3987. #endif
  3988. NULL
  3989. };
  3990. static struct attribute_group iwl3945_attribute_group = {
  3991. .name = NULL, /* put in device directory */
  3992. .attrs = iwl3945_sysfs_entries,
  3993. };
  3994. static struct ieee80211_ops iwl3945_hw_ops = {
  3995. .tx = iwl3945_mac_tx,
  3996. .start = iwl3945_mac_start,
  3997. .stop = iwl3945_mac_stop,
  3998. .add_interface = iwl3945_mac_add_interface,
  3999. .remove_interface = iwl3945_mac_remove_interface,
  4000. .config = iwl3945_mac_config,
  4001. .config_interface = iwl3945_mac_config_interface,
  4002. .configure_filter = iwl_configure_filter,
  4003. .set_key = iwl3945_mac_set_key,
  4004. .get_tx_stats = iwl3945_mac_get_tx_stats,
  4005. .conf_tx = iwl3945_mac_conf_tx,
  4006. .reset_tsf = iwl3945_mac_reset_tsf,
  4007. .bss_info_changed = iwl3945_bss_info_changed,
  4008. .hw_scan = iwl_mac_hw_scan
  4009. };
  4010. static int iwl3945_init_drv(struct iwl_priv *priv)
  4011. {
  4012. int ret;
  4013. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  4014. priv->retry_rate = 1;
  4015. priv->ibss_beacon = NULL;
  4016. spin_lock_init(&priv->lock);
  4017. spin_lock_init(&priv->power_data.lock);
  4018. spin_lock_init(&priv->sta_lock);
  4019. spin_lock_init(&priv->hcmd_lock);
  4020. INIT_LIST_HEAD(&priv->free_frames);
  4021. mutex_init(&priv->mutex);
  4022. /* Clear the driver's (not device's) station table */
  4023. iwl3945_clear_stations_table(priv);
  4024. priv->data_retry_limit = -1;
  4025. priv->ieee_channels = NULL;
  4026. priv->ieee_rates = NULL;
  4027. priv->band = IEEE80211_BAND_2GHZ;
  4028. priv->iw_mode = NL80211_IFTYPE_STATION;
  4029. iwl_reset_qos(priv);
  4030. priv->qos_data.qos_active = 0;
  4031. priv->qos_data.qos_cap.val = 0;
  4032. priv->rates_mask = IWL_RATES_MASK;
  4033. /* If power management is turned on, default to CAM mode */
  4034. priv->power_mode = IWL_POWER_MODE_CAM;
  4035. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  4036. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  4037. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  4038. eeprom->version);
  4039. ret = -EINVAL;
  4040. goto err;
  4041. }
  4042. ret = iwl_init_channel_map(priv);
  4043. if (ret) {
  4044. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  4045. goto err;
  4046. }
  4047. /* Set up txpower settings in driver for all channels */
  4048. if (iwl3945_txpower_set_from_eeprom(priv)) {
  4049. ret = -EIO;
  4050. goto err_free_channel_map;
  4051. }
  4052. ret = iwlcore_init_geos(priv);
  4053. if (ret) {
  4054. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  4055. goto err_free_channel_map;
  4056. }
  4057. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  4058. return 0;
  4059. err_free_channel_map:
  4060. iwl_free_channel_map(priv);
  4061. err:
  4062. return ret;
  4063. }
  4064. static int iwl3945_setup_mac(struct iwl_priv *priv)
  4065. {
  4066. int ret;
  4067. struct ieee80211_hw *hw = priv->hw;
  4068. hw->rate_control_algorithm = "iwl-3945-rs";
  4069. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  4070. /* Tell mac80211 our characteristics */
  4071. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  4072. IEEE80211_HW_NOISE_DBM |
  4073. IEEE80211_HW_SPECTRUM_MGMT;
  4074. hw->wiphy->interface_modes =
  4075. BIT(NL80211_IFTYPE_STATION) |
  4076. BIT(NL80211_IFTYPE_ADHOC);
  4077. hw->wiphy->custom_regulatory = true;
  4078. hw->wiphy->max_scan_ssids = 1; /* WILL FIX */
  4079. /* Default value; 4 EDCA QOS priorities */
  4080. hw->queues = 4;
  4081. hw->conf.beacon_int = 100;
  4082. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4083. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4084. &priv->bands[IEEE80211_BAND_2GHZ];
  4085. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4086. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4087. &priv->bands[IEEE80211_BAND_5GHZ];
  4088. ret = ieee80211_register_hw(priv->hw);
  4089. if (ret) {
  4090. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  4091. return ret;
  4092. }
  4093. priv->mac80211_registered = 1;
  4094. return 0;
  4095. }
  4096. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  4097. {
  4098. int err = 0;
  4099. struct iwl_priv *priv;
  4100. struct ieee80211_hw *hw;
  4101. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  4102. struct iwl3945_eeprom *eeprom;
  4103. unsigned long flags;
  4104. /***********************
  4105. * 1. Allocating HW data
  4106. * ********************/
  4107. /* mac80211 allocates memory for this device instance, including
  4108. * space for this driver's private structure */
  4109. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  4110. if (hw == NULL) {
  4111. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  4112. err = -ENOMEM;
  4113. goto out;
  4114. }
  4115. priv = hw->priv;
  4116. SET_IEEE80211_DEV(hw, &pdev->dev);
  4117. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  4118. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  4119. IWL_ERR(priv,
  4120. "invalid queues_num, should be between %d and %d\n",
  4121. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  4122. err = -EINVAL;
  4123. goto out_ieee80211_free_hw;
  4124. }
  4125. /*
  4126. * Disabling hardware scan means that mac80211 will perform scans
  4127. * "the hard way", rather than using device's scan.
  4128. */
  4129. if (iwl3945_mod_params.disable_hw_scan) {
  4130. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  4131. iwl3945_hw_ops.hw_scan = NULL;
  4132. }
  4133. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  4134. priv->cfg = cfg;
  4135. priv->pci_dev = pdev;
  4136. #ifdef CONFIG_IWLWIFI_DEBUG
  4137. priv->debug_level = iwl3945_mod_params.debug;
  4138. atomic_set(&priv->restrict_refcnt, 0);
  4139. #endif
  4140. /***************************
  4141. * 2. Initializing PCI bus
  4142. * *************************/
  4143. if (pci_enable_device(pdev)) {
  4144. err = -ENODEV;
  4145. goto out_ieee80211_free_hw;
  4146. }
  4147. pci_set_master(pdev);
  4148. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4149. if (!err)
  4150. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  4151. if (err) {
  4152. IWL_WARN(priv, "No suitable DMA available.\n");
  4153. goto out_pci_disable_device;
  4154. }
  4155. pci_set_drvdata(pdev, priv);
  4156. err = pci_request_regions(pdev, DRV_NAME);
  4157. if (err)
  4158. goto out_pci_disable_device;
  4159. /***********************
  4160. * 3. Read REV Register
  4161. * ********************/
  4162. priv->hw_base = pci_iomap(pdev, 0, 0);
  4163. if (!priv->hw_base) {
  4164. err = -ENODEV;
  4165. goto out_pci_release_regions;
  4166. }
  4167. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  4168. (unsigned long long) pci_resource_len(pdev, 0));
  4169. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  4170. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  4171. * PCI Tx retries from interfering with C3 CPU state */
  4172. pci_write_config_byte(pdev, 0x41, 0x00);
  4173. /* amp init */
  4174. err = priv->cfg->ops->lib->apm_ops.init(priv);
  4175. if (err < 0) {
  4176. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  4177. goto out_iounmap;
  4178. }
  4179. /***********************
  4180. * 4. Read EEPROM
  4181. * ********************/
  4182. /* Read the EEPROM */
  4183. err = iwl_eeprom_init(priv);
  4184. if (err) {
  4185. IWL_ERR(priv, "Unable to init EEPROM\n");
  4186. goto out_iounmap;
  4187. }
  4188. /* MAC Address location in EEPROM same for 3945/4965 */
  4189. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  4190. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  4191. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  4192. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  4193. /***********************
  4194. * 5. Setup HW Constants
  4195. * ********************/
  4196. /* Device-specific setup */
  4197. if (iwl3945_hw_set_hw_params(priv)) {
  4198. IWL_ERR(priv, "failed to set hw settings\n");
  4199. goto out_eeprom_free;
  4200. }
  4201. /***********************
  4202. * 6. Setup priv
  4203. * ********************/
  4204. err = iwl3945_init_drv(priv);
  4205. if (err) {
  4206. IWL_ERR(priv, "initializing driver failed\n");
  4207. goto out_unset_hw_params;
  4208. }
  4209. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  4210. priv->cfg->name);
  4211. /***********************************
  4212. * 7. Initialize Module Parameters
  4213. * **********************************/
  4214. /* Initialize module parameter values here */
  4215. /* Disable radio (SW RF KILL) via parameter when loading driver */
  4216. if (iwl3945_mod_params.disable) {
  4217. set_bit(STATUS_RF_KILL_SW, &priv->status);
  4218. IWL_DEBUG_INFO(priv, "Radio disabled.\n");
  4219. }
  4220. /***********************
  4221. * 8. Setup Services
  4222. * ********************/
  4223. spin_lock_irqsave(&priv->lock, flags);
  4224. iwl_disable_interrupts(priv);
  4225. spin_unlock_irqrestore(&priv->lock, flags);
  4226. pci_enable_msi(priv->pci_dev);
  4227. err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
  4228. DRV_NAME, priv);
  4229. if (err) {
  4230. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  4231. goto out_disable_msi;
  4232. }
  4233. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  4234. if (err) {
  4235. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  4236. goto out_release_irq;
  4237. }
  4238. iwl_set_rxon_channel(priv,
  4239. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  4240. iwl3945_setup_deferred_work(priv);
  4241. iwl3945_setup_rx_handlers(priv);
  4242. /*********************************
  4243. * 9. Setup and Register mac80211
  4244. * *******************************/
  4245. iwl_enable_interrupts(priv);
  4246. err = iwl3945_setup_mac(priv);
  4247. if (err)
  4248. goto out_remove_sysfs;
  4249. err = iwl_rfkill_init(priv);
  4250. if (err)
  4251. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  4252. "Ignoring error: %d\n", err);
  4253. else
  4254. iwl_rfkill_set_hw_state(priv);
  4255. /* Start monitoring the killswitch */
  4256. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4257. 2 * HZ);
  4258. return 0;
  4259. out_remove_sysfs:
  4260. destroy_workqueue(priv->workqueue);
  4261. priv->workqueue = NULL;
  4262. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  4263. out_release_irq:
  4264. free_irq(priv->pci_dev->irq, priv);
  4265. out_disable_msi:
  4266. pci_disable_msi(priv->pci_dev);
  4267. iwlcore_free_geos(priv);
  4268. iwl_free_channel_map(priv);
  4269. out_unset_hw_params:
  4270. iwl3945_unset_hw_params(priv);
  4271. out_eeprom_free:
  4272. iwl_eeprom_free(priv);
  4273. out_iounmap:
  4274. pci_iounmap(pdev, priv->hw_base);
  4275. out_pci_release_regions:
  4276. pci_release_regions(pdev);
  4277. out_pci_disable_device:
  4278. pci_set_drvdata(pdev, NULL);
  4279. pci_disable_device(pdev);
  4280. out_ieee80211_free_hw:
  4281. ieee80211_free_hw(priv->hw);
  4282. out:
  4283. return err;
  4284. }
  4285. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  4286. {
  4287. struct iwl_priv *priv = pci_get_drvdata(pdev);
  4288. unsigned long flags;
  4289. if (!priv)
  4290. return;
  4291. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  4292. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4293. if (priv->mac80211_registered) {
  4294. ieee80211_unregister_hw(priv->hw);
  4295. priv->mac80211_registered = 0;
  4296. } else {
  4297. iwl3945_down(priv);
  4298. }
  4299. /* make sure we flush any pending irq or
  4300. * tasklet for the driver
  4301. */
  4302. spin_lock_irqsave(&priv->lock, flags);
  4303. iwl_disable_interrupts(priv);
  4304. spin_unlock_irqrestore(&priv->lock, flags);
  4305. iwl_synchronize_irq(priv);
  4306. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  4307. iwl_rfkill_unregister(priv);
  4308. cancel_delayed_work_sync(&priv->rfkill_poll);
  4309. iwl3945_dealloc_ucode_pci(priv);
  4310. if (priv->rxq.bd)
  4311. iwl3945_rx_queue_free(priv, &priv->rxq);
  4312. iwl3945_hw_txq_ctx_free(priv);
  4313. iwl3945_unset_hw_params(priv);
  4314. iwl3945_clear_stations_table(priv);
  4315. /*netif_stop_queue(dev); */
  4316. flush_workqueue(priv->workqueue);
  4317. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  4318. * priv->workqueue... so we can't take down the workqueue
  4319. * until now... */
  4320. destroy_workqueue(priv->workqueue);
  4321. priv->workqueue = NULL;
  4322. free_irq(pdev->irq, priv);
  4323. pci_disable_msi(pdev);
  4324. pci_iounmap(pdev, priv->hw_base);
  4325. pci_release_regions(pdev);
  4326. pci_disable_device(pdev);
  4327. pci_set_drvdata(pdev, NULL);
  4328. iwl_free_channel_map(priv);
  4329. iwlcore_free_geos(priv);
  4330. kfree(priv->scan);
  4331. if (priv->ibss_beacon)
  4332. dev_kfree_skb(priv->ibss_beacon);
  4333. ieee80211_free_hw(priv->hw);
  4334. }
  4335. #ifdef CONFIG_PM
  4336. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  4337. {
  4338. struct iwl_priv *priv = pci_get_drvdata(pdev);
  4339. if (priv->is_open) {
  4340. set_bit(STATUS_IN_SUSPEND, &priv->status);
  4341. iwl3945_mac_stop(priv->hw);
  4342. priv->is_open = 1;
  4343. }
  4344. pci_save_state(pdev);
  4345. pci_disable_device(pdev);
  4346. pci_set_power_state(pdev, PCI_D3hot);
  4347. return 0;
  4348. }
  4349. static int iwl3945_pci_resume(struct pci_dev *pdev)
  4350. {
  4351. struct iwl_priv *priv = pci_get_drvdata(pdev);
  4352. int ret;
  4353. pci_set_power_state(pdev, PCI_D0);
  4354. ret = pci_enable_device(pdev);
  4355. if (ret)
  4356. return ret;
  4357. pci_restore_state(pdev);
  4358. if (priv->is_open)
  4359. iwl3945_mac_start(priv->hw);
  4360. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  4361. return 0;
  4362. }
  4363. #endif /* CONFIG_PM */
  4364. /*****************************************************************************
  4365. *
  4366. * driver and module entry point
  4367. *
  4368. *****************************************************************************/
  4369. static struct pci_driver iwl3945_driver = {
  4370. .name = DRV_NAME,
  4371. .id_table = iwl3945_hw_card_ids,
  4372. .probe = iwl3945_pci_probe,
  4373. .remove = __devexit_p(iwl3945_pci_remove),
  4374. #ifdef CONFIG_PM
  4375. .suspend = iwl3945_pci_suspend,
  4376. .resume = iwl3945_pci_resume,
  4377. #endif
  4378. };
  4379. static int __init iwl3945_init(void)
  4380. {
  4381. int ret;
  4382. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  4383. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  4384. ret = iwl3945_rate_control_register();
  4385. if (ret) {
  4386. printk(KERN_ERR DRV_NAME
  4387. "Unable to register rate control algorithm: %d\n", ret);
  4388. return ret;
  4389. }
  4390. ret = pci_register_driver(&iwl3945_driver);
  4391. if (ret) {
  4392. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  4393. goto error_register;
  4394. }
  4395. return ret;
  4396. error_register:
  4397. iwl3945_rate_control_unregister();
  4398. return ret;
  4399. }
  4400. static void __exit iwl3945_exit(void)
  4401. {
  4402. pci_unregister_driver(&iwl3945_driver);
  4403. iwl3945_rate_control_unregister();
  4404. }
  4405. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  4406. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  4407. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  4408. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  4409. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  4410. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  4411. MODULE_PARM_DESC(swcrypto,
  4412. "using software crypto (default 1 [software])\n");
  4413. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  4414. MODULE_PARM_DESC(debug, "debug output mask");
  4415. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  4416. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  4417. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  4418. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  4419. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  4420. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  4421. module_exit(iwl3945_exit);
  4422. module_init(iwl3945_init);