wm8400-core.c 13 KB

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  1. /*
  2. * Core driver for WM8400.
  3. *
  4. * Copyright 2008 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of the
  11. * License, or (at your option) any later version.
  12. *
  13. */
  14. #include <linux/bug.h>
  15. #include <linux/i2c.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mfd/core.h>
  18. #include <linux/mfd/wm8400-private.h>
  19. #include <linux/mfd/wm8400-audio.h>
  20. static struct {
  21. u16 readable; /* Mask of readable bits */
  22. u16 writable; /* Mask of writable bits */
  23. u16 vol; /* Mask of volatile bits */
  24. int is_codec; /* Register controlled by codec reset */
  25. u16 default_val; /* Value on reset */
  26. } reg_data[] = {
  27. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x6172 }, /* R0 */
  28. { 0x7000, 0x0000, 0x8000, 0, 0x0000 }, /* R1 */
  29. { 0xFF17, 0xFF17, 0x0000, 0, 0x0000 }, /* R2 */
  30. { 0xEBF3, 0xEBF3, 0x0000, 1, 0x6000 }, /* R3 */
  31. { 0x3CF3, 0x3CF3, 0x0000, 1, 0x0000 }, /* R4 */
  32. { 0xF1F8, 0xF1F8, 0x0000, 1, 0x4050 }, /* R5 */
  33. { 0xFC1F, 0xFC1F, 0x0000, 1, 0x4000 }, /* R6 */
  34. { 0xDFDE, 0xDFDE, 0x0000, 1, 0x01C8 }, /* R7 */
  35. { 0xFCFC, 0xFCFC, 0x0000, 1, 0x0000 }, /* R8 */
  36. { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R9 */
  37. { 0xEFFF, 0xEFFF, 0x0000, 1, 0x0040 }, /* R10 */
  38. { 0x27F7, 0x27F7, 0x0000, 1, 0x0004 }, /* R11 */
  39. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R12 */
  40. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R13 */
  41. { 0x1FEF, 0x1FEF, 0x0000, 1, 0x0000 }, /* R14 */
  42. { 0x0163, 0x0163, 0x0000, 1, 0x0100 }, /* R15 */
  43. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R16 */
  44. { 0x01FF, 0x01FF, 0x0000, 1, 0x00C0 }, /* R17 */
  45. { 0x1FFF, 0x0FFF, 0x0000, 1, 0x0000 }, /* R18 */
  46. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1000 }, /* R19 */
  47. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R20 */
  48. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x1010 }, /* R21 */
  49. { 0x0FDD, 0x0FDD, 0x0000, 1, 0x8000 }, /* R22 */
  50. { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0800 }, /* R23 */
  51. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R24 */
  52. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R25 */
  53. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R26 */
  54. { 0x0000, 0x01DF, 0x0000, 1, 0x008B }, /* R27 */
  55. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R28 */
  56. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R29 */
  57. { 0x0000, 0x0077, 0x0000, 1, 0x0066 }, /* R30 */
  58. { 0x0000, 0x0033, 0x0000, 1, 0x0022 }, /* R31 */
  59. { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R32 */
  60. { 0x0000, 0x01FF, 0x0000, 1, 0x0079 }, /* R33 */
  61. { 0x0000, 0x0003, 0x0000, 1, 0x0003 }, /* R34 */
  62. { 0x0000, 0x01FF, 0x0000, 1, 0x0003 }, /* R35 */
  63. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R36 */
  64. { 0x0000, 0x003F, 0x0000, 1, 0x0100 }, /* R37 */
  65. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R38 */
  66. { 0x0000, 0x000F, 0x0000, 0, 0x0000 }, /* R39 */
  67. { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R40 */
  68. { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R41 */
  69. { 0x0000, 0x01B7, 0x0000, 1, 0x0000 }, /* R42 */
  70. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R43 */
  71. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R44 */
  72. { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R45 */
  73. { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R46 */
  74. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R47 */
  75. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R48 */
  76. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R49 */
  77. { 0x0000, 0x01FF, 0x0000, 1, 0x0000 }, /* R50 */
  78. { 0x0000, 0x01B3, 0x0000, 1, 0x0180 }, /* R51 */
  79. { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R52 */
  80. { 0x0000, 0x0077, 0x0000, 1, 0x0000 }, /* R53 */
  81. { 0x0000, 0x00FF, 0x0000, 1, 0x0000 }, /* R54 */
  82. { 0x0000, 0x0001, 0x0000, 1, 0x0000 }, /* R55 */
  83. { 0x0000, 0x003F, 0x0000, 1, 0x0000 }, /* R56 */
  84. { 0x0000, 0x004F, 0x0000, 1, 0x0000 }, /* R57 */
  85. { 0x0000, 0x00FD, 0x0000, 1, 0x0000 }, /* R58 */
  86. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R59 */
  87. { 0x1FFF, 0x1FFF, 0x0000, 1, 0x0000 }, /* R60 */
  88. { 0xFFFF, 0xFFFF, 0x0000, 1, 0x0000 }, /* R61 */
  89. { 0x03FF, 0x03FF, 0x0000, 1, 0x0000 }, /* R62 */
  90. { 0x007F, 0x007F, 0x0000, 1, 0x0000 }, /* R63 */
  91. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R64 */
  92. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R65 */
  93. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R66 */
  94. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R67 */
  95. { 0xDFFF, 0xDFFF, 0x0000, 0, 0x0000 }, /* R68 */
  96. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R69 */
  97. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R70 */
  98. { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R71 */
  99. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x4400 }, /* R72 */
  100. { 0x23FF, 0x23FF, 0x0000, 0, 0x0000 }, /* R73 */
  101. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R74 */
  102. { 0x000E, 0x000E, 0x0000, 0, 0x0008 }, /* R75 */
  103. { 0xE00F, 0xE00F, 0x0000, 0, 0x0000 }, /* R76 */
  104. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R77 */
  105. { 0x03C0, 0x03C0, 0x0000, 0, 0x02C0 }, /* R78 */
  106. { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R79 */
  107. { 0xFFFF, 0xFFFF, 0x0000, 0, 0x0000 }, /* R80 */
  108. { 0xFFFF, 0x0000, 0xffff, 0, 0x0000 }, /* R81 */
  109. { 0x2BFF, 0x0000, 0xffff, 0, 0x0000 }, /* R82 */
  110. { 0x0000, 0x0000, 0x0000, 0, 0x0000 }, /* R83 */
  111. { 0x80FF, 0x80FF, 0x0000, 0, 0x00ff }, /* R84 */
  112. };
  113. static int wm8400_read(struct wm8400 *wm8400, u8 reg, int num_regs, u16 *dest)
  114. {
  115. int i, ret = 0;
  116. BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
  117. /* If there are any volatile reads then read back the entire block */
  118. for (i = reg; i < reg + num_regs; i++)
  119. if (reg_data[i].vol) {
  120. ret = wm8400->read_dev(wm8400->io_data, reg,
  121. num_regs, dest);
  122. if (ret != 0)
  123. return ret;
  124. for (i = 0; i < num_regs; i++)
  125. dest[i] = be16_to_cpu(dest[i]);
  126. return 0;
  127. }
  128. /* Otherwise use the cache */
  129. memcpy(dest, &wm8400->reg_cache[reg], num_regs * sizeof(u16));
  130. return 0;
  131. }
  132. static int wm8400_write(struct wm8400 *wm8400, u8 reg, int num_regs,
  133. u16 *src)
  134. {
  135. int ret, i;
  136. BUG_ON(reg + num_regs - 1 > ARRAY_SIZE(wm8400->reg_cache));
  137. for (i = 0; i < num_regs; i++) {
  138. BUG_ON(!reg_data[reg + i].writable);
  139. wm8400->reg_cache[reg + i] = src[i];
  140. src[i] = cpu_to_be16(src[i]);
  141. }
  142. /* Do the actual I/O */
  143. ret = wm8400->write_dev(wm8400->io_data, reg, num_regs, src);
  144. if (ret != 0)
  145. return -EIO;
  146. return 0;
  147. }
  148. /**
  149. * wm8400_reg_read - Single register read
  150. *
  151. * @wm8400: Pointer to wm8400 control structure
  152. * @reg: Register to read
  153. *
  154. * @return Read value
  155. */
  156. u16 wm8400_reg_read(struct wm8400 *wm8400, u8 reg)
  157. {
  158. u16 val;
  159. mutex_lock(&wm8400->io_lock);
  160. wm8400_read(wm8400, reg, 1, &val);
  161. mutex_unlock(&wm8400->io_lock);
  162. return val;
  163. }
  164. EXPORT_SYMBOL_GPL(wm8400_reg_read);
  165. int wm8400_block_read(struct wm8400 *wm8400, u8 reg, int count, u16 *data)
  166. {
  167. int ret;
  168. mutex_lock(&wm8400->io_lock);
  169. ret = wm8400_read(wm8400, reg, count, data);
  170. mutex_unlock(&wm8400->io_lock);
  171. return ret;
  172. }
  173. EXPORT_SYMBOL_GPL(wm8400_block_read);
  174. /**
  175. * wm8400_set_bits - Bitmask write
  176. *
  177. * @wm8400: Pointer to wm8400 control structure
  178. * @reg: Register to access
  179. * @mask: Mask of bits to change
  180. * @val: Value to set for masked bits
  181. */
  182. int wm8400_set_bits(struct wm8400 *wm8400, u8 reg, u16 mask, u16 val)
  183. {
  184. u16 tmp;
  185. int ret;
  186. mutex_lock(&wm8400->io_lock);
  187. ret = wm8400_read(wm8400, reg, 1, &tmp);
  188. tmp = (tmp & ~mask) | val;
  189. if (ret == 0)
  190. ret = wm8400_write(wm8400, reg, 1, &tmp);
  191. mutex_unlock(&wm8400->io_lock);
  192. return ret;
  193. }
  194. EXPORT_SYMBOL_GPL(wm8400_set_bits);
  195. /**
  196. * wm8400_reset_codec_reg_cache - Reset cached codec registers to
  197. * their default values.
  198. */
  199. void wm8400_reset_codec_reg_cache(struct wm8400 *wm8400)
  200. {
  201. int i;
  202. mutex_lock(&wm8400->io_lock);
  203. /* Reset all codec registers to their initial value */
  204. for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
  205. if (reg_data[i].is_codec)
  206. wm8400->reg_cache[i] = reg_data[i].default_val;
  207. mutex_unlock(&wm8400->io_lock);
  208. }
  209. EXPORT_SYMBOL_GPL(wm8400_reset_codec_reg_cache);
  210. static int wm8400_register_codec(struct wm8400 *wm8400)
  211. {
  212. struct mfd_cell cell = {
  213. .name = "wm8400-codec",
  214. .driver_data = wm8400,
  215. };
  216. return mfd_add_devices(wm8400->dev, -1, &cell, 1, NULL, 0);
  217. }
  218. /*
  219. * wm8400_init - Generic initialisation
  220. *
  221. * The WM8400 can be configured as either an I2C or SPI device. Probe
  222. * functions for each bus set up the accessors then call into this to
  223. * set up the device itself.
  224. */
  225. static int wm8400_init(struct wm8400 *wm8400,
  226. struct wm8400_platform_data *pdata)
  227. {
  228. u16 reg;
  229. int ret, i;
  230. mutex_init(&wm8400->io_lock);
  231. wm8400->dev->driver_data = wm8400;
  232. /* Check that this is actually a WM8400 */
  233. ret = wm8400->read_dev(wm8400->io_data, WM8400_RESET_ID, 1, &reg);
  234. if (ret != 0) {
  235. dev_err(wm8400->dev, "Chip ID register read failed\n");
  236. return -EIO;
  237. }
  238. if (be16_to_cpu(reg) != reg_data[WM8400_RESET_ID].default_val) {
  239. dev_err(wm8400->dev, "Device is not a WM8400, ID is %x\n",
  240. be16_to_cpu(reg));
  241. return -ENODEV;
  242. }
  243. /* We don't know what state the hardware is in and since this
  244. * is a PMIC we can't reset it safely so initialise the register
  245. * cache from the hardware.
  246. */
  247. ret = wm8400->read_dev(wm8400->io_data, 0,
  248. ARRAY_SIZE(wm8400->reg_cache),
  249. wm8400->reg_cache);
  250. if (ret != 0) {
  251. dev_err(wm8400->dev, "Register cache read failed\n");
  252. return -EIO;
  253. }
  254. for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
  255. wm8400->reg_cache[i] = be16_to_cpu(wm8400->reg_cache[i]);
  256. /* If the codec is in reset use hard coded values */
  257. if (!(wm8400->reg_cache[WM8400_POWER_MANAGEMENT_1] & WM8400_CODEC_ENA))
  258. for (i = 0; i < ARRAY_SIZE(wm8400->reg_cache); i++)
  259. if (reg_data[i].is_codec)
  260. wm8400->reg_cache[i] = reg_data[i].default_val;
  261. ret = wm8400_read(wm8400, WM8400_ID, 1, &reg);
  262. if (ret != 0) {
  263. dev_err(wm8400->dev, "ID register read failed: %d\n", ret);
  264. return ret;
  265. }
  266. reg = (reg & WM8400_CHIP_REV_MASK) >> WM8400_CHIP_REV_SHIFT;
  267. dev_info(wm8400->dev, "WM8400 revision %x\n", reg);
  268. ret = wm8400_register_codec(wm8400);
  269. if (ret != 0) {
  270. dev_err(wm8400->dev, "Failed to register codec\n");
  271. goto err_children;
  272. }
  273. if (pdata && pdata->platform_init) {
  274. ret = pdata->platform_init(wm8400->dev);
  275. if (ret != 0) {
  276. dev_err(wm8400->dev, "Platform init failed: %d\n",
  277. ret);
  278. goto err_children;
  279. }
  280. } else
  281. dev_warn(wm8400->dev, "No platform initialisation supplied\n");
  282. return 0;
  283. err_children:
  284. mfd_remove_devices(wm8400->dev);
  285. return ret;
  286. }
  287. static void wm8400_release(struct wm8400 *wm8400)
  288. {
  289. mfd_remove_devices(wm8400->dev);
  290. }
  291. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  292. static int wm8400_i2c_read(void *io_data, char reg, int count, u16 *dest)
  293. {
  294. struct i2c_client *i2c = io_data;
  295. struct i2c_msg xfer[2];
  296. int ret;
  297. /* Write register */
  298. xfer[0].addr = i2c->addr;
  299. xfer[0].flags = 0;
  300. xfer[0].len = 1;
  301. xfer[0].buf = &reg;
  302. /* Read data */
  303. xfer[1].addr = i2c->addr;
  304. xfer[1].flags = I2C_M_RD;
  305. xfer[1].len = count * sizeof(u16);
  306. xfer[1].buf = (u8 *)dest;
  307. ret = i2c_transfer(i2c->adapter, xfer, 2);
  308. if (ret == 2)
  309. ret = 0;
  310. else if (ret >= 0)
  311. ret = -EIO;
  312. return ret;
  313. }
  314. static int wm8400_i2c_write(void *io_data, char reg, int count, const u16 *src)
  315. {
  316. struct i2c_client *i2c = io_data;
  317. u8 *msg;
  318. int ret;
  319. /* We add 1 byte for device register - ideally I2C would gather. */
  320. msg = kmalloc((count * sizeof(u16)) + 1, GFP_KERNEL);
  321. if (msg == NULL)
  322. return -ENOMEM;
  323. msg[0] = reg;
  324. memcpy(&msg[1], src, count * sizeof(u16));
  325. ret = i2c_master_send(i2c, msg, (count * sizeof(u16)) + 1);
  326. if (ret == (count * 2) + 1)
  327. ret = 0;
  328. else if (ret >= 0)
  329. ret = -EIO;
  330. kfree(msg);
  331. return ret;
  332. }
  333. static int wm8400_i2c_probe(struct i2c_client *i2c,
  334. const struct i2c_device_id *id)
  335. {
  336. struct wm8400 *wm8400;
  337. int ret;
  338. wm8400 = kzalloc(sizeof(struct wm8400), GFP_KERNEL);
  339. if (wm8400 == NULL) {
  340. ret = -ENOMEM;
  341. goto err;
  342. }
  343. wm8400->io_data = i2c;
  344. wm8400->read_dev = wm8400_i2c_read;
  345. wm8400->write_dev = wm8400_i2c_write;
  346. wm8400->dev = &i2c->dev;
  347. i2c_set_clientdata(i2c, wm8400);
  348. ret = wm8400_init(wm8400, i2c->dev.platform_data);
  349. if (ret != 0)
  350. goto struct_err;
  351. return 0;
  352. struct_err:
  353. i2c_set_clientdata(i2c, NULL);
  354. kfree(wm8400);
  355. err:
  356. return ret;
  357. }
  358. static int wm8400_i2c_remove(struct i2c_client *i2c)
  359. {
  360. struct wm8400 *wm8400 = i2c_get_clientdata(i2c);
  361. wm8400_release(wm8400);
  362. i2c_set_clientdata(i2c, NULL);
  363. kfree(wm8400);
  364. return 0;
  365. }
  366. static const struct i2c_device_id wm8400_i2c_id[] = {
  367. { "wm8400", 0 },
  368. { }
  369. };
  370. MODULE_DEVICE_TABLE(i2c, wm8400_i2c_id);
  371. static struct i2c_driver wm8400_i2c_driver = {
  372. .driver = {
  373. .name = "WM8400",
  374. .owner = THIS_MODULE,
  375. },
  376. .probe = wm8400_i2c_probe,
  377. .remove = wm8400_i2c_remove,
  378. .id_table = wm8400_i2c_id,
  379. };
  380. #endif
  381. static int __init wm8400_module_init(void)
  382. {
  383. int ret = -ENODEV;
  384. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  385. ret = i2c_add_driver(&wm8400_i2c_driver);
  386. if (ret != 0)
  387. pr_err("Failed to register I2C driver: %d\n", ret);
  388. #endif
  389. return ret;
  390. }
  391. module_init(wm8400_module_init);
  392. static void __exit wm8400_module_exit(void)
  393. {
  394. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  395. i2c_del_driver(&wm8400_i2c_driver);
  396. #endif
  397. }
  398. module_exit(wm8400_module_exit);
  399. MODULE_LICENSE("GPL");
  400. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");