intel_crt.c 8.4 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/i2c.h>
  27. #include "drmP.h"
  28. #include "drm.h"
  29. #include "drm_crtc.h"
  30. #include "drm_crtc_helper.h"
  31. #include "intel_drv.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  35. {
  36. struct drm_device *dev = encoder->dev;
  37. struct drm_i915_private *dev_priv = dev->dev_private;
  38. u32 temp;
  39. temp = I915_READ(ADPA);
  40. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  41. temp |= ADPA_DAC_ENABLE;
  42. switch(mode) {
  43. case DRM_MODE_DPMS_ON:
  44. temp |= ADPA_DAC_ENABLE;
  45. break;
  46. case DRM_MODE_DPMS_STANDBY:
  47. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  48. break;
  49. case DRM_MODE_DPMS_SUSPEND:
  50. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  51. break;
  52. case DRM_MODE_DPMS_OFF:
  53. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  54. break;
  55. }
  56. I915_WRITE(ADPA, temp);
  57. }
  58. static int intel_crt_mode_valid(struct drm_connector *connector,
  59. struct drm_display_mode *mode)
  60. {
  61. struct drm_device *dev = connector->dev;
  62. int max_clock = 0;
  63. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  64. return MODE_NO_DBLESCAN;
  65. if (mode->clock < 25000)
  66. return MODE_CLOCK_LOW;
  67. if (!IS_I9XX(dev))
  68. max_clock = 350000;
  69. else
  70. max_clock = 400000;
  71. if (mode->clock > max_clock)
  72. return MODE_CLOCK_HIGH;
  73. return MODE_OK;
  74. }
  75. static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  76. struct drm_display_mode *mode,
  77. struct drm_display_mode *adjusted_mode)
  78. {
  79. return true;
  80. }
  81. static void intel_crt_mode_set(struct drm_encoder *encoder,
  82. struct drm_display_mode *mode,
  83. struct drm_display_mode *adjusted_mode)
  84. {
  85. struct drm_device *dev = encoder->dev;
  86. struct drm_crtc *crtc = encoder->crtc;
  87. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  88. struct drm_i915_private *dev_priv = dev->dev_private;
  89. int dpll_md_reg;
  90. u32 adpa, dpll_md;
  91. if (intel_crtc->pipe == 0)
  92. dpll_md_reg = DPLL_A_MD;
  93. else
  94. dpll_md_reg = DPLL_B_MD;
  95. /*
  96. * Disable separate mode multiplier used when cloning SDVO to CRT
  97. * XXX this needs to be adjusted when we really are cloning
  98. */
  99. if (IS_I965G(dev)) {
  100. dpll_md = I915_READ(dpll_md_reg);
  101. I915_WRITE(dpll_md_reg,
  102. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  103. }
  104. adpa = 0;
  105. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  106. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  107. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  108. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  109. if (intel_crtc->pipe == 0) {
  110. adpa |= ADPA_PIPE_A_SELECT;
  111. I915_WRITE(BCLRPAT_A, 0);
  112. } else {
  113. adpa |= ADPA_PIPE_B_SELECT;
  114. I915_WRITE(BCLRPAT_B, 0);
  115. }
  116. I915_WRITE(ADPA, adpa);
  117. }
  118. /**
  119. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  120. *
  121. * Not for i915G/i915GM
  122. *
  123. * \return true if CRT is connected.
  124. * \return false if CRT is disconnected.
  125. */
  126. static bool intel_crt_detect_hotplug(struct drm_connector *connector)
  127. {
  128. struct drm_device *dev = connector->dev;
  129. struct drm_i915_private *dev_priv = dev->dev_private;
  130. u32 hotplug_en;
  131. int i, tries = 0;
  132. /*
  133. * On 4 series desktop, CRT detect sequence need to be done twice
  134. * to get a reliable result.
  135. */
  136. if (IS_G4X(dev) && !IS_GM45(dev))
  137. tries = 2;
  138. else
  139. tries = 1;
  140. hotplug_en = I915_READ(PORT_HOTPLUG_EN);
  141. hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
  142. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  143. if (IS_G4X(dev))
  144. hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
  145. hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
  146. for (i = 0; i < tries ; i++) {
  147. unsigned long timeout;
  148. /* turn on the FORCE_DETECT */
  149. I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  150. timeout = jiffies + msecs_to_jiffies(1000);
  151. /* wait for FORCE_DETECT to go off */
  152. do {
  153. if (!(I915_READ(PORT_HOTPLUG_EN) &
  154. CRT_HOTPLUG_FORCE_DETECT))
  155. break;
  156. msleep(1);
  157. } while (time_after(timeout, jiffies));
  158. }
  159. if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
  160. CRT_HOTPLUG_MONITOR_COLOR)
  161. return true;
  162. return false;
  163. }
  164. static bool intel_crt_detect_ddc(struct drm_connector *connector)
  165. {
  166. struct intel_output *intel_output = to_intel_output(connector);
  167. /* CRT should always be at 0, but check anyway */
  168. if (intel_output->type != INTEL_OUTPUT_ANALOG)
  169. return false;
  170. return intel_ddc_probe(intel_output);
  171. }
  172. static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
  173. {
  174. struct drm_device *dev = connector->dev;
  175. if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
  176. if (intel_crt_detect_hotplug(connector))
  177. return connector_status_connected;
  178. else
  179. return connector_status_disconnected;
  180. }
  181. if (intel_crt_detect_ddc(connector))
  182. return connector_status_connected;
  183. /* TODO use load detect */
  184. return connector_status_unknown;
  185. }
  186. static void intel_crt_destroy(struct drm_connector *connector)
  187. {
  188. struct intel_output *intel_output = to_intel_output(connector);
  189. intel_i2c_destroy(intel_output->ddc_bus);
  190. drm_sysfs_connector_remove(connector);
  191. drm_connector_cleanup(connector);
  192. kfree(connector);
  193. }
  194. static int intel_crt_get_modes(struct drm_connector *connector)
  195. {
  196. struct intel_output *intel_output = to_intel_output(connector);
  197. return intel_ddc_get_modes(intel_output);
  198. }
  199. static int intel_crt_set_property(struct drm_connector *connector,
  200. struct drm_property *property,
  201. uint64_t value)
  202. {
  203. struct drm_device *dev = connector->dev;
  204. if (property == dev->mode_config.dpms_property && connector->encoder)
  205. intel_crt_dpms(connector->encoder, (uint32_t)(value & 0xf));
  206. return 0;
  207. }
  208. /*
  209. * Routines for controlling stuff on the analog port
  210. */
  211. static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
  212. .dpms = intel_crt_dpms,
  213. .mode_fixup = intel_crt_mode_fixup,
  214. .prepare = intel_encoder_prepare,
  215. .commit = intel_encoder_commit,
  216. .mode_set = intel_crt_mode_set,
  217. };
  218. static const struct drm_connector_funcs intel_crt_connector_funcs = {
  219. .detect = intel_crt_detect,
  220. .fill_modes = drm_helper_probe_single_connector_modes,
  221. .destroy = intel_crt_destroy,
  222. .set_property = intel_crt_set_property,
  223. };
  224. static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
  225. .mode_valid = intel_crt_mode_valid,
  226. .get_modes = intel_crt_get_modes,
  227. .best_encoder = intel_best_encoder,
  228. };
  229. static void intel_crt_enc_destroy(struct drm_encoder *encoder)
  230. {
  231. drm_encoder_cleanup(encoder);
  232. }
  233. static const struct drm_encoder_funcs intel_crt_enc_funcs = {
  234. .destroy = intel_crt_enc_destroy,
  235. };
  236. void intel_crt_init(struct drm_device *dev)
  237. {
  238. struct drm_connector *connector;
  239. struct intel_output *intel_output;
  240. intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
  241. if (!intel_output)
  242. return;
  243. connector = &intel_output->base;
  244. drm_connector_init(dev, &intel_output->base,
  245. &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  246. drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
  247. DRM_MODE_ENCODER_DAC);
  248. drm_mode_connector_attach_encoder(&intel_output->base,
  249. &intel_output->enc);
  250. /* Set up the DDC bus. */
  251. intel_output->ddc_bus = intel_i2c_create(dev, GPIOA, "CRTDDC_A");
  252. if (!intel_output->ddc_bus) {
  253. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  254. "failed.\n");
  255. return;
  256. }
  257. intel_output->type = INTEL_OUTPUT_ANALOG;
  258. connector->interlace_allowed = 0;
  259. connector->doublescan_allowed = 0;
  260. drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
  261. drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
  262. drm_sysfs_connector_add(connector);
  263. }