speedstep-ich.c 11 KB

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  1. /*
  2. * (C) 2001 Dave Jones, Arjan van de ven.
  3. * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
  4. *
  5. * Licensed under the terms of the GNU GPL License version 2.
  6. * Based upon reverse engineered information, and on Intel documentation
  7. * for chipsets ICH2-M and ICH3-M.
  8. *
  9. * Many thanks to Ducrot Bruno for finding and fixing the last
  10. * "missing link" for ICH2-M/ICH3-M support, and to Thomas Winkler
  11. * for extensive testing.
  12. *
  13. * BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  14. */
  15. /*********************************************************************
  16. * SPEEDSTEP - DEFINITIONS *
  17. *********************************************************************/
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/init.h>
  21. #include <linux/cpufreq.h>
  22. #include <linux/pci.h>
  23. #include <linux/slab.h>
  24. #include <linux/sched.h>
  25. #include "speedstep-lib.h"
  26. /* speedstep_chipset:
  27. * It is necessary to know which chipset is used. As accesses to
  28. * this device occur at various places in this module, we need a
  29. * static struct pci_dev * pointing to that device.
  30. */
  31. static struct pci_dev *speedstep_chipset_dev;
  32. /* speedstep_processor
  33. */
  34. static unsigned int speedstep_processor;
  35. static u32 pmbase;
  36. /*
  37. * There are only two frequency states for each processor. Values
  38. * are in kHz for the time being.
  39. */
  40. static struct cpufreq_frequency_table speedstep_freqs[] = {
  41. {SPEEDSTEP_HIGH, 0},
  42. {SPEEDSTEP_LOW, 0},
  43. {0, CPUFREQ_TABLE_END},
  44. };
  45. #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, \
  46. "speedstep-ich", msg)
  47. /**
  48. * speedstep_find_register - read the PMBASE address
  49. *
  50. * Returns: -ENODEV if no register could be found
  51. */
  52. static int speedstep_find_register(void)
  53. {
  54. if (!speedstep_chipset_dev)
  55. return -ENODEV;
  56. /* get PMBASE */
  57. pci_read_config_dword(speedstep_chipset_dev, 0x40, &pmbase);
  58. if (!(pmbase & 0x01)) {
  59. printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  60. return -ENODEV;
  61. }
  62. pmbase &= 0xFFFFFFFE;
  63. if (!pmbase) {
  64. printk(KERN_ERR "speedstep-ich: could not find speedstep register\n");
  65. return -ENODEV;
  66. }
  67. dprintk("pmbase is 0x%x\n", pmbase);
  68. return 0;
  69. }
  70. /**
  71. * speedstep_set_state - set the SpeedStep state
  72. * @state: new processor frequency state (SPEEDSTEP_LOW or SPEEDSTEP_HIGH)
  73. *
  74. * Tries to change the SpeedStep state.
  75. */
  76. static void speedstep_set_state(unsigned int state)
  77. {
  78. u8 pm2_blk;
  79. u8 value;
  80. unsigned long flags;
  81. if (state > 0x1)
  82. return;
  83. /* Disable IRQs */
  84. local_irq_save(flags);
  85. /* read state */
  86. value = inb(pmbase + 0x50);
  87. dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
  88. /* write new state */
  89. value &= 0xFE;
  90. value |= state;
  91. dprintk("writing 0x%x to pmbase 0x%x + 0x50\n", value, pmbase);
  92. /* Disable bus master arbitration */
  93. pm2_blk = inb(pmbase + 0x20);
  94. pm2_blk |= 0x01;
  95. outb(pm2_blk, (pmbase + 0x20));
  96. /* Actual transition */
  97. outb(value, (pmbase + 0x50));
  98. /* Restore bus master arbitration */
  99. pm2_blk &= 0xfe;
  100. outb(pm2_blk, (pmbase + 0x20));
  101. /* check if transition was successful */
  102. value = inb(pmbase + 0x50);
  103. /* Enable IRQs */
  104. local_irq_restore(flags);
  105. dprintk("read at pmbase 0x%x + 0x50 returned 0x%x\n", pmbase, value);
  106. if (state == (value & 0x1))
  107. dprintk("change to %u MHz succeeded\n",
  108. speedstep_get_frequency(speedstep_processor) / 1000);
  109. else
  110. printk(KERN_ERR "cpufreq: change failed - I/O error\n");
  111. return;
  112. }
  113. /**
  114. * speedstep_activate - activate SpeedStep control in the chipset
  115. *
  116. * Tries to activate the SpeedStep status and control registers.
  117. * Returns -EINVAL on an unsupported chipset, and zero on success.
  118. */
  119. static int speedstep_activate(void)
  120. {
  121. u16 value = 0;
  122. if (!speedstep_chipset_dev)
  123. return -EINVAL;
  124. pci_read_config_word(speedstep_chipset_dev, 0x00A0, &value);
  125. if (!(value & 0x08)) {
  126. value |= 0x08;
  127. dprintk("activating SpeedStep (TM) registers\n");
  128. pci_write_config_word(speedstep_chipset_dev, 0x00A0, value);
  129. }
  130. return 0;
  131. }
  132. /**
  133. * speedstep_detect_chipset - detect the Southbridge which contains SpeedStep logic
  134. *
  135. * Detects ICH2-M, ICH3-M and ICH4-M so far. The pci_dev points to
  136. * the LPC bridge / PM module which contains all power-management
  137. * functions. Returns the SPEEDSTEP_CHIPSET_-number for the detected
  138. * chipset, or zero on failure.
  139. */
  140. static unsigned int speedstep_detect_chipset(void)
  141. {
  142. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  143. PCI_DEVICE_ID_INTEL_82801DB_12,
  144. PCI_ANY_ID, PCI_ANY_ID,
  145. NULL);
  146. if (speedstep_chipset_dev)
  147. return 4; /* 4-M */
  148. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  149. PCI_DEVICE_ID_INTEL_82801CA_12,
  150. PCI_ANY_ID, PCI_ANY_ID,
  151. NULL);
  152. if (speedstep_chipset_dev)
  153. return 3; /* 3-M */
  154. speedstep_chipset_dev = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  155. PCI_DEVICE_ID_INTEL_82801BA_10,
  156. PCI_ANY_ID, PCI_ANY_ID,
  157. NULL);
  158. if (speedstep_chipset_dev) {
  159. /* speedstep.c causes lockups on Dell Inspirons 8000 and
  160. * 8100 which use a pretty old revision of the 82815
  161. * host brige. Abort on these systems.
  162. */
  163. static struct pci_dev *hostbridge;
  164. hostbridge = pci_get_subsys(PCI_VENDOR_ID_INTEL,
  165. PCI_DEVICE_ID_INTEL_82815_MC,
  166. PCI_ANY_ID, PCI_ANY_ID,
  167. NULL);
  168. if (!hostbridge)
  169. return 2; /* 2-M */
  170. if (hostbridge->revision < 5) {
  171. dprintk("hostbridge does not support speedstep\n");
  172. speedstep_chipset_dev = NULL;
  173. pci_dev_put(hostbridge);
  174. return 0;
  175. }
  176. pci_dev_put(hostbridge);
  177. return 2; /* 2-M */
  178. }
  179. return 0;
  180. }
  181. static unsigned int _speedstep_get(const struct cpumask *cpus)
  182. {
  183. unsigned int speed;
  184. cpumask_t cpus_allowed;
  185. cpus_allowed = current->cpus_allowed;
  186. set_cpus_allowed_ptr(current, cpus);
  187. speed = speedstep_get_frequency(speedstep_processor);
  188. set_cpus_allowed_ptr(current, &cpus_allowed);
  189. dprintk("detected %u kHz as current frequency\n", speed);
  190. return speed;
  191. }
  192. static unsigned int speedstep_get(unsigned int cpu)
  193. {
  194. return _speedstep_get(cpumask_of(cpu));
  195. }
  196. /**
  197. * speedstep_target - set a new CPUFreq policy
  198. * @policy: new policy
  199. * @target_freq: the target frequency
  200. * @relation: how that frequency relates to achieved frequency
  201. * (CPUFREQ_RELATION_L or CPUFREQ_RELATION_H)
  202. *
  203. * Sets a new CPUFreq policy.
  204. */
  205. static int speedstep_target(struct cpufreq_policy *policy,
  206. unsigned int target_freq,
  207. unsigned int relation)
  208. {
  209. unsigned int newstate = 0;
  210. struct cpufreq_freqs freqs;
  211. cpumask_t cpus_allowed;
  212. int i;
  213. if (cpufreq_frequency_table_target(policy, &speedstep_freqs[0],
  214. target_freq, relation, &newstate))
  215. return -EINVAL;
  216. freqs.old = _speedstep_get(policy->cpus);
  217. freqs.new = speedstep_freqs[newstate].frequency;
  218. freqs.cpu = policy->cpu;
  219. dprintk("transiting from %u to %u kHz\n", freqs.old, freqs.new);
  220. /* no transition necessary */
  221. if (freqs.old == freqs.new)
  222. return 0;
  223. cpus_allowed = current->cpus_allowed;
  224. for_each_cpu(i, policy->cpus) {
  225. freqs.cpu = i;
  226. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  227. }
  228. /* switch to physical CPU where state is to be changed */
  229. set_cpus_allowed_ptr(current, policy->cpus);
  230. speedstep_set_state(newstate);
  231. /* allow to be run on all CPUs */
  232. set_cpus_allowed_ptr(current, &cpus_allowed);
  233. for_each_cpu(i, policy->cpus) {
  234. freqs.cpu = i;
  235. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  236. }
  237. return 0;
  238. }
  239. /**
  240. * speedstep_verify - verifies a new CPUFreq policy
  241. * @policy: new policy
  242. *
  243. * Limit must be within speedstep_low_freq and speedstep_high_freq, with
  244. * at least one border included.
  245. */
  246. static int speedstep_verify(struct cpufreq_policy *policy)
  247. {
  248. return cpufreq_frequency_table_verify(policy, &speedstep_freqs[0]);
  249. }
  250. static int speedstep_cpu_init(struct cpufreq_policy *policy)
  251. {
  252. int result = 0;
  253. unsigned int speed;
  254. cpumask_t cpus_allowed;
  255. /* only run on CPU to be set, or on its sibling */
  256. #ifdef CONFIG_SMP
  257. cpumask_copy(policy->cpus, cpu_sibling_mask(policy->cpu));
  258. #endif
  259. cpus_allowed = current->cpus_allowed;
  260. set_cpus_allowed_ptr(current, policy->cpus);
  261. /* detect low and high frequency and transition latency */
  262. result = speedstep_get_freqs(speedstep_processor,
  263. &speedstep_freqs[SPEEDSTEP_LOW].frequency,
  264. &speedstep_freqs[SPEEDSTEP_HIGH].frequency,
  265. &policy->cpuinfo.transition_latency,
  266. &speedstep_set_state);
  267. set_cpus_allowed_ptr(current, &cpus_allowed);
  268. if (result)
  269. return result;
  270. /* get current speed setting */
  271. speed = _speedstep_get(policy->cpus);
  272. if (!speed)
  273. return -EIO;
  274. dprintk("currently at %s speed setting - %i MHz\n",
  275. (speed == speedstep_freqs[SPEEDSTEP_LOW].frequency)
  276. ? "low" : "high",
  277. (speed / 1000));
  278. /* cpuinfo and default policy values */
  279. policy->cur = speed;
  280. result = cpufreq_frequency_table_cpuinfo(policy, speedstep_freqs);
  281. if (result)
  282. return result;
  283. cpufreq_frequency_table_get_attr(speedstep_freqs, policy->cpu);
  284. return 0;
  285. }
  286. static int speedstep_cpu_exit(struct cpufreq_policy *policy)
  287. {
  288. cpufreq_frequency_table_put_attr(policy->cpu);
  289. return 0;
  290. }
  291. static struct freq_attr *speedstep_attr[] = {
  292. &cpufreq_freq_attr_scaling_available_freqs,
  293. NULL,
  294. };
  295. static struct cpufreq_driver speedstep_driver = {
  296. .name = "speedstep-ich",
  297. .verify = speedstep_verify,
  298. .target = speedstep_target,
  299. .init = speedstep_cpu_init,
  300. .exit = speedstep_cpu_exit,
  301. .get = speedstep_get,
  302. .owner = THIS_MODULE,
  303. .attr = speedstep_attr,
  304. };
  305. /**
  306. * speedstep_init - initializes the SpeedStep CPUFreq driver
  307. *
  308. * Initializes the SpeedStep support. Returns -ENODEV on unsupported
  309. * devices, -EINVAL on problems during initiatization, and zero on
  310. * success.
  311. */
  312. static int __init speedstep_init(void)
  313. {
  314. /* detect processor */
  315. speedstep_processor = speedstep_detect_processor();
  316. if (!speedstep_processor) {
  317. dprintk("Intel(R) SpeedStep(TM) capable processor "
  318. "not found\n");
  319. return -ENODEV;
  320. }
  321. /* detect chipset */
  322. if (!speedstep_detect_chipset()) {
  323. dprintk("Intel(R) SpeedStep(TM) for this chipset not "
  324. "(yet) available.\n");
  325. return -ENODEV;
  326. }
  327. /* activate speedstep support */
  328. if (speedstep_activate()) {
  329. pci_dev_put(speedstep_chipset_dev);
  330. return -EINVAL;
  331. }
  332. if (speedstep_find_register())
  333. return -ENODEV;
  334. return cpufreq_register_driver(&speedstep_driver);
  335. }
  336. /**
  337. * speedstep_exit - unregisters SpeedStep support
  338. *
  339. * Unregisters SpeedStep support.
  340. */
  341. static void __exit speedstep_exit(void)
  342. {
  343. pci_dev_put(speedstep_chipset_dev);
  344. cpufreq_unregister_driver(&speedstep_driver);
  345. }
  346. MODULE_AUTHOR("Dave Jones <davej@redhat.com>, "
  347. "Dominik Brodowski <linux@brodo.de>");
  348. MODULE_DESCRIPTION("Speedstep driver for Intel mobile processors on chipsets "
  349. "with ICH-M southbridges.");
  350. MODULE_LICENSE("GPL");
  351. module_init(speedstep_init);
  352. module_exit(speedstep_exit);