bigsmp_32.c 6.3 KB

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  1. /*
  2. * APIC driver for "bigsmp" xAPIC machines with more than 8 virtual CPUs.
  3. *
  4. * Drives the local APIC in "clustered mode".
  5. */
  6. #include <linux/threads.h>
  7. #include <linux/cpumask.h>
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <linux/smp.h>
  12. #include <asm/apicdef.h>
  13. #include <asm/fixmap.h>
  14. #include <asm/mpspec.h>
  15. #include <asm/apic.h>
  16. #include <asm/ipi.h>
  17. static unsigned bigsmp_get_apic_id(unsigned long x)
  18. {
  19. return (x >> 24) & 0xFF;
  20. }
  21. static int bigsmp_apic_id_registered(void)
  22. {
  23. return 1;
  24. }
  25. static const struct cpumask *bigsmp_target_cpus(void)
  26. {
  27. #ifdef CONFIG_SMP
  28. return cpu_online_mask;
  29. #else
  30. return cpumask_of(0);
  31. #endif
  32. }
  33. static unsigned long bigsmp_check_apicid_used(physid_mask_t bitmap, int apicid)
  34. {
  35. return 0;
  36. }
  37. static unsigned long bigsmp_check_apicid_present(int bit)
  38. {
  39. return 1;
  40. }
  41. static inline unsigned long calculate_ldr(int cpu)
  42. {
  43. unsigned long val, id;
  44. val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  45. id = per_cpu(x86_bios_cpu_apicid, cpu);
  46. val |= SET_APIC_LOGICAL_ID(id);
  47. return val;
  48. }
  49. /*
  50. * Set up the logical destination ID.
  51. *
  52. * Intel recommends to set DFR, LDR and TPR before enabling
  53. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  54. * document number 292116). So here it goes...
  55. */
  56. static void bigsmp_init_apic_ldr(void)
  57. {
  58. unsigned long val;
  59. int cpu = smp_processor_id();
  60. apic_write(APIC_DFR, APIC_DFR_FLAT);
  61. val = calculate_ldr(cpu);
  62. apic_write(APIC_LDR, val);
  63. }
  64. static void bigsmp_setup_apic_routing(void)
  65. {
  66. printk(KERN_INFO
  67. "Enabling APIC mode: Physflat. Using %d I/O APICs\n",
  68. nr_ioapics);
  69. }
  70. static int bigsmp_apicid_to_node(int logical_apicid)
  71. {
  72. return apicid_2_node[hard_smp_processor_id()];
  73. }
  74. static int bigsmp_cpu_present_to_apicid(int mps_cpu)
  75. {
  76. if (mps_cpu < nr_cpu_ids)
  77. return (int) per_cpu(x86_bios_cpu_apicid, mps_cpu);
  78. return BAD_APICID;
  79. }
  80. static physid_mask_t bigsmp_apicid_to_cpu_present(int phys_apicid)
  81. {
  82. return physid_mask_of_physid(phys_apicid);
  83. }
  84. /* Mapping from cpu number to logical apicid */
  85. static inline int bigsmp_cpu_to_logical_apicid(int cpu)
  86. {
  87. if (cpu >= nr_cpu_ids)
  88. return BAD_APICID;
  89. return cpu_physical_id(cpu);
  90. }
  91. static physid_mask_t bigsmp_ioapic_phys_id_map(physid_mask_t phys_map)
  92. {
  93. /* For clustered we don't have a good way to do this yet - hack */
  94. return physids_promote(0xFFL);
  95. }
  96. static int bigsmp_check_phys_apicid_present(int boot_cpu_physical_apicid)
  97. {
  98. return 1;
  99. }
  100. /* As we are using single CPU as destination, pick only one CPU here */
  101. static unsigned int bigsmp_cpu_mask_to_apicid(const struct cpumask *cpumask)
  102. {
  103. return bigsmp_cpu_to_logical_apicid(cpumask_first(cpumask));
  104. }
  105. static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  106. const struct cpumask *andmask)
  107. {
  108. int cpu;
  109. /*
  110. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  111. * May as well be the first.
  112. */
  113. for_each_cpu_and(cpu, cpumask, andmask) {
  114. if (cpumask_test_cpu(cpu, cpu_online_mask))
  115. break;
  116. }
  117. if (cpu < nr_cpu_ids)
  118. return bigsmp_cpu_to_logical_apicid(cpu);
  119. return BAD_APICID;
  120. }
  121. static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb)
  122. {
  123. return cpuid_apic >> index_msb;
  124. }
  125. static inline void bigsmp_send_IPI_mask(const struct cpumask *mask, int vector)
  126. {
  127. default_send_IPI_mask_sequence_phys(mask, vector);
  128. }
  129. static void bigsmp_send_IPI_allbutself(int vector)
  130. {
  131. default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
  132. }
  133. static void bigsmp_send_IPI_all(int vector)
  134. {
  135. bigsmp_send_IPI_mask(cpu_online_mask, vector);
  136. }
  137. static int dmi_bigsmp; /* can be set by dmi scanners */
  138. static int hp_ht_bigsmp(const struct dmi_system_id *d)
  139. {
  140. printk(KERN_NOTICE "%s detected: force use of apic=bigsmp\n", d->ident);
  141. dmi_bigsmp = 1;
  142. return 0;
  143. }
  144. static const struct dmi_system_id bigsmp_dmi_table[] = {
  145. { hp_ht_bigsmp, "HP ProLiant DL760 G2",
  146. { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
  147. DMI_MATCH(DMI_BIOS_VERSION, "P44-"),
  148. }
  149. },
  150. { hp_ht_bigsmp, "HP ProLiant DL740",
  151. { DMI_MATCH(DMI_BIOS_VENDOR, "HP"),
  152. DMI_MATCH(DMI_BIOS_VERSION, "P47-"),
  153. }
  154. },
  155. { } /* NULL entry stops DMI scanning */
  156. };
  157. static void bigsmp_vector_allocation_domain(int cpu, struct cpumask *retmask)
  158. {
  159. cpumask_clear(retmask);
  160. cpumask_set_cpu(cpu, retmask);
  161. }
  162. static int probe_bigsmp(void)
  163. {
  164. if (def_to_bigsmp)
  165. dmi_bigsmp = 1;
  166. else
  167. dmi_check_system(bigsmp_dmi_table);
  168. return dmi_bigsmp;
  169. }
  170. struct apic apic_bigsmp = {
  171. .name = "bigsmp",
  172. .probe = probe_bigsmp,
  173. .acpi_madt_oem_check = NULL,
  174. .apic_id_registered = bigsmp_apic_id_registered,
  175. .irq_delivery_mode = dest_Fixed,
  176. /* phys delivery to target CPU: */
  177. .irq_dest_mode = 0,
  178. .target_cpus = bigsmp_target_cpus,
  179. .disable_esr = 1,
  180. .dest_logical = 0,
  181. .check_apicid_used = bigsmp_check_apicid_used,
  182. .check_apicid_present = bigsmp_check_apicid_present,
  183. .vector_allocation_domain = bigsmp_vector_allocation_domain,
  184. .init_apic_ldr = bigsmp_init_apic_ldr,
  185. .ioapic_phys_id_map = bigsmp_ioapic_phys_id_map,
  186. .setup_apic_routing = bigsmp_setup_apic_routing,
  187. .multi_timer_check = NULL,
  188. .apicid_to_node = bigsmp_apicid_to_node,
  189. .cpu_to_logical_apicid = bigsmp_cpu_to_logical_apicid,
  190. .cpu_present_to_apicid = bigsmp_cpu_present_to_apicid,
  191. .apicid_to_cpu_present = bigsmp_apicid_to_cpu_present,
  192. .setup_portio_remap = NULL,
  193. .check_phys_apicid_present = bigsmp_check_phys_apicid_present,
  194. .enable_apic_mode = NULL,
  195. .phys_pkg_id = bigsmp_phys_pkg_id,
  196. .mps_oem_check = NULL,
  197. .get_apic_id = bigsmp_get_apic_id,
  198. .set_apic_id = NULL,
  199. .apic_id_mask = 0xFF << 24,
  200. .cpu_mask_to_apicid = bigsmp_cpu_mask_to_apicid,
  201. .cpu_mask_to_apicid_and = bigsmp_cpu_mask_to_apicid_and,
  202. .send_IPI_mask = bigsmp_send_IPI_mask,
  203. .send_IPI_mask_allbutself = NULL,
  204. .send_IPI_allbutself = bigsmp_send_IPI_allbutself,
  205. .send_IPI_all = bigsmp_send_IPI_all,
  206. .send_IPI_self = default_send_IPI_self,
  207. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  208. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  209. .wait_for_init_deassert = default_wait_for_init_deassert,
  210. .smp_callin_clear_local_apic = NULL,
  211. .inquire_remote_apic = default_inquire_remote_apic,
  212. .read = native_apic_mem_read,
  213. .write = native_apic_mem_write,
  214. .icr_read = native_apic_icr_read,
  215. .icr_write = native_apic_icr_write,
  216. .wait_icr_idle = native_apic_wait_icr_idle,
  217. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  218. };