board-urquell.c 4.6 KB

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  1. /*
  2. * Renesas Technology Corp. SH7786 Urquell Support.
  3. *
  4. * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * Based on board-sh7785lcr.c
  7. * Copyright (C) 2008 Yoshihiro Shimoda
  8. *
  9. * This file is subject to the terms and conditions of the GNU General Public
  10. * License. See the file "COPYING" in the main directory of this archive
  11. * for more details.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/fb.h>
  16. #include <linux/smc91x.h>
  17. #include <linux/mtd/physmap.h>
  18. #include <linux/delay.h>
  19. #include <linux/gpio.h>
  20. #include <linux/irq.h>
  21. #include <mach/urquell.h>
  22. #include <cpu/sh7786.h>
  23. #include <asm/heartbeat.h>
  24. #include <asm/sizes.h>
  25. /*
  26. * bit 1234 5678
  27. *----------------------------
  28. * SW1 0101 0010 -> Pck 33MHz version
  29. * (1101 0010) Pck 66MHz version
  30. * SW2 0x1x xxxx -> little endian
  31. * 29bit mode
  32. * SW47 0001 1000 -> CS0 : on-board flash
  33. * CS1 : SRAM, registers, LAN, PCMCIA
  34. * 38400 bps for SCIF1
  35. *
  36. * Address
  37. * 0x00000000 - 0x04000000 (CS0) Nor Flash
  38. * 0x04000000 - 0x04200000 (CS1) SRAM
  39. * 0x05000000 - 0x05800000 (CS1) on board register
  40. * 0x05800000 - 0x06000000 (CS1) LAN91C111
  41. * 0x06000000 - 0x06400000 (CS1) PCMCIA
  42. * 0x08000000 - 0x10000000 (CS2-CS3) DDR3
  43. * 0x10000000 - 0x14000000 (CS4) PCIe
  44. * 0x14000000 - 0x14800000 (CS5) Core0 LRAM/URAM
  45. * 0x14800000 - 0x15000000 (CS5) Core1 LRAM/URAM
  46. * 0x18000000 - 0x1C000000 (CS6) ATA/NAND-Flash
  47. * 0x1C000000 - (CS7) SH7786 Control register
  48. */
  49. /* HeartBeat */
  50. static struct resource heartbeat_resources[] = {
  51. [0] = {
  52. .start = BOARDREG(SLEDR),
  53. .end = BOARDREG(SLEDR),
  54. .flags = IORESOURCE_MEM,
  55. },
  56. };
  57. static struct heartbeat_data heartbeat_data = {
  58. .regsize = 16,
  59. };
  60. static struct platform_device heartbeat_device = {
  61. .name = "heartbeat",
  62. .id = -1,
  63. .dev = {
  64. .platform_data = &heartbeat_data,
  65. },
  66. .num_resources = ARRAY_SIZE(heartbeat_resources),
  67. .resource = heartbeat_resources,
  68. };
  69. /* LAN91C111 */
  70. static struct smc91x_platdata smc91x_info = {
  71. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  72. };
  73. static struct resource smc91x_eth_resources[] = {
  74. [0] = {
  75. .name = "SMC91C111" ,
  76. .start = 0x05800300,
  77. .end = 0x0580030f,
  78. .flags = IORESOURCE_MEM,
  79. },
  80. [1] = {
  81. .start = 11,
  82. .flags = IORESOURCE_IRQ,
  83. },
  84. };
  85. static struct platform_device smc91x_eth_device = {
  86. .name = "smc91x",
  87. .num_resources = ARRAY_SIZE(smc91x_eth_resources),
  88. .resource = smc91x_eth_resources,
  89. .dev = {
  90. .platform_data = &smc91x_info,
  91. },
  92. };
  93. /* Nor Flash */
  94. static struct mtd_partition nor_flash_partitions[] = {
  95. {
  96. .name = "loader",
  97. .offset = 0x00000000,
  98. .size = SZ_512K,
  99. .mask_flags = MTD_WRITEABLE, /* Read-only */
  100. },
  101. {
  102. .name = "bootenv",
  103. .offset = MTDPART_OFS_APPEND,
  104. .size = SZ_512K,
  105. .mask_flags = MTD_WRITEABLE, /* Read-only */
  106. },
  107. {
  108. .name = "kernel",
  109. .offset = MTDPART_OFS_APPEND,
  110. .size = SZ_4M,
  111. },
  112. {
  113. .name = "data",
  114. .offset = MTDPART_OFS_APPEND,
  115. .size = MTDPART_SIZ_FULL,
  116. },
  117. };
  118. static struct physmap_flash_data nor_flash_data = {
  119. .width = 2,
  120. .parts = nor_flash_partitions,
  121. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  122. };
  123. static struct resource nor_flash_resources[] = {
  124. [0] = {
  125. .start = NOR_FLASH_ADDR,
  126. .end = NOR_FLASH_ADDR + NOR_FLASH_SIZE - 1,
  127. .flags = IORESOURCE_MEM,
  128. }
  129. };
  130. static struct platform_device nor_flash_device = {
  131. .name = "physmap-flash",
  132. .dev = {
  133. .platform_data = &nor_flash_data,
  134. },
  135. .num_resources = ARRAY_SIZE(nor_flash_resources),
  136. .resource = nor_flash_resources,
  137. };
  138. static struct platform_device *urquell_devices[] __initdata = {
  139. &heartbeat_device,
  140. &smc91x_eth_device,
  141. &nor_flash_device,
  142. };
  143. static int __init urquell_devices_setup(void)
  144. {
  145. /* USB */
  146. gpio_request(GPIO_FN_USB_OVC0, NULL);
  147. gpio_request(GPIO_FN_USB_PENC0, NULL);
  148. /* enable LAN */
  149. __raw_writew(__raw_readw(UBOARDREG(IRL2MSKR)) & ~0x00000001,
  150. UBOARDREG(IRL2MSKR));
  151. return platform_add_devices(urquell_devices,
  152. ARRAY_SIZE(urquell_devices));
  153. }
  154. device_initcall(urquell_devices_setup);
  155. static void urquell_power_off(void)
  156. {
  157. __raw_writew(0xa5a5, UBOARDREG(SRSTR));
  158. }
  159. static void __init urquell_init_irq(void)
  160. {
  161. plat_irq_setup_pins(IRQ_MODE_IRL3210_MASK);
  162. }
  163. /* Initialize the board */
  164. static void __init urquell_setup(char **cmdline_p)
  165. {
  166. printk(KERN_INFO "Renesas Technology Corp. Urquell support.\n");
  167. pm_power_off = urquell_power_off;
  168. }
  169. /*
  170. * The Machine Vector
  171. */
  172. static struct sh_machine_vector mv_urquell __initmv = {
  173. .mv_name = "Urquell",
  174. .mv_setup = urquell_setup,
  175. .mv_init_irq = urquell_init_irq,
  176. };