time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/bootmem.h>
  38. #include <asm/uaccess.h>
  39. #include <asm/delay.h>
  40. #include <asm/s390_ext.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/timer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. /* change this if you have some constant time drift */
  49. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  50. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  51. /*
  52. * Create a small time difference between the timer interrupts
  53. * on the different cpus to avoid lock contention.
  54. */
  55. #define CPU_DEVIATION (smp_processor_id() << 12)
  56. #define TICK_SIZE tick
  57. u64 sched_clock_base_cc = -1; /* Force to data section. */
  58. static ext_int_info_t ext_int_info_cc;
  59. static ext_int_info_t ext_int_etr_cc;
  60. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  61. /*
  62. * Scheduler clock - returns current time in nanosec units.
  63. */
  64. unsigned long long sched_clock(void)
  65. {
  66. return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
  67. }
  68. /*
  69. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  70. */
  71. unsigned long long monotonic_clock(void)
  72. {
  73. return sched_clock();
  74. }
  75. EXPORT_SYMBOL(monotonic_clock);
  76. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  77. {
  78. unsigned long long sec;
  79. sec = todval >> 12;
  80. do_div(sec, 1000000);
  81. xtime->tv_sec = sec;
  82. todval -= (sec * 1000000) << 12;
  83. xtime->tv_nsec = ((todval * 1000) >> 12);
  84. }
  85. #ifdef CONFIG_PROFILING
  86. #define s390_do_profile() profile_tick(CPU_PROFILING)
  87. #else
  88. #define s390_do_profile() do { ; } while(0)
  89. #endif /* CONFIG_PROFILING */
  90. void clock_comparator_work(void)
  91. {
  92. struct clock_event_device *cd;
  93. S390_lowcore.clock_comparator = -1ULL;
  94. set_clock_comparator(S390_lowcore.clock_comparator);
  95. cd = &__get_cpu_var(comparators);
  96. cd->event_handler(cd);
  97. s390_do_profile();
  98. }
  99. /*
  100. * Fixup the clock comparator.
  101. */
  102. static void fixup_clock_comparator(unsigned long long delta)
  103. {
  104. /* If nobody is waiting there's nothing to fix. */
  105. if (S390_lowcore.clock_comparator == -1ULL)
  106. return;
  107. S390_lowcore.clock_comparator += delta;
  108. set_clock_comparator(S390_lowcore.clock_comparator);
  109. }
  110. static int s390_next_event(unsigned long delta,
  111. struct clock_event_device *evt)
  112. {
  113. S390_lowcore.clock_comparator = get_clock() + delta;
  114. set_clock_comparator(S390_lowcore.clock_comparator);
  115. return 0;
  116. }
  117. static void s390_set_mode(enum clock_event_mode mode,
  118. struct clock_event_device *evt)
  119. {
  120. }
  121. /*
  122. * Set up lowcore and control register of the current cpu to
  123. * enable TOD clock and clock comparator interrupts.
  124. */
  125. void init_cpu_timer(void)
  126. {
  127. struct clock_event_device *cd;
  128. int cpu;
  129. S390_lowcore.clock_comparator = -1ULL;
  130. set_clock_comparator(S390_lowcore.clock_comparator);
  131. cpu = smp_processor_id();
  132. cd = &per_cpu(comparators, cpu);
  133. cd->name = "comparator";
  134. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  135. cd->mult = 16777;
  136. cd->shift = 12;
  137. cd->min_delta_ns = 1;
  138. cd->max_delta_ns = LONG_MAX;
  139. cd->rating = 400;
  140. cd->cpumask = cpumask_of(cpu);
  141. cd->set_next_event = s390_next_event;
  142. cd->set_mode = s390_set_mode;
  143. clockevents_register_device(cd);
  144. /* Enable clock comparator timer interrupt. */
  145. __ctl_set_bit(0,11);
  146. /* Always allow the timing alert external interrupt. */
  147. __ctl_set_bit(0, 4);
  148. }
  149. static void clock_comparator_interrupt(__u16 code)
  150. {
  151. if (S390_lowcore.clock_comparator == -1ULL)
  152. set_clock_comparator(S390_lowcore.clock_comparator);
  153. }
  154. static void etr_timing_alert(struct etr_irq_parm *);
  155. static void stp_timing_alert(struct stp_irq_parm *);
  156. static void timing_alert_interrupt(__u16 code)
  157. {
  158. if (S390_lowcore.ext_params & 0x00c40000)
  159. etr_timing_alert((struct etr_irq_parm *)
  160. &S390_lowcore.ext_params);
  161. if (S390_lowcore.ext_params & 0x00038000)
  162. stp_timing_alert((struct stp_irq_parm *)
  163. &S390_lowcore.ext_params);
  164. }
  165. static void etr_reset(void);
  166. static void stp_reset(void);
  167. unsigned long read_persistent_clock(void)
  168. {
  169. struct timespec ts;
  170. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
  171. return ts.tv_sec;
  172. }
  173. static cycle_t read_tod_clock(struct clocksource *cs)
  174. {
  175. return get_clock();
  176. }
  177. static struct clocksource clocksource_tod = {
  178. .name = "tod",
  179. .rating = 400,
  180. .read = read_tod_clock,
  181. .mask = -1ULL,
  182. .mult = 1000,
  183. .shift = 12,
  184. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  185. };
  186. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  187. {
  188. if (clock != &clocksource_tod)
  189. return;
  190. /* Make userspace gettimeofday spin until we're done. */
  191. ++vdso_data->tb_update_count;
  192. smp_wmb();
  193. vdso_data->xtime_tod_stamp = clock->cycle_last;
  194. vdso_data->xtime_clock_sec = xtime.tv_sec;
  195. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  196. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  197. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  198. smp_wmb();
  199. ++vdso_data->tb_update_count;
  200. }
  201. extern struct timezone sys_tz;
  202. void update_vsyscall_tz(void)
  203. {
  204. /* Make userspace gettimeofday spin until we're done. */
  205. ++vdso_data->tb_update_count;
  206. smp_wmb();
  207. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  208. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  209. smp_wmb();
  210. ++vdso_data->tb_update_count;
  211. }
  212. /*
  213. * Initialize the TOD clock and the CPU timer of
  214. * the boot cpu.
  215. */
  216. void __init time_init(void)
  217. {
  218. struct timespec ts;
  219. unsigned long flags;
  220. cycle_t now;
  221. /* Reset time synchronization interfaces. */
  222. etr_reset();
  223. stp_reset();
  224. /* request the clock comparator external interrupt */
  225. if (register_early_external_interrupt(0x1004,
  226. clock_comparator_interrupt,
  227. &ext_int_info_cc) != 0)
  228. panic("Couldn't request external interrupt 0x1004");
  229. /* request the timing alert external interrupt */
  230. if (register_early_external_interrupt(0x1406,
  231. timing_alert_interrupt,
  232. &ext_int_etr_cc) != 0)
  233. panic("Couldn't request external interrupt 0x1406");
  234. if (clocksource_register(&clocksource_tod) != 0)
  235. panic("Could not register TOD clock source");
  236. /*
  237. * The TOD clock is an accurate clock. The xtime should be
  238. * initialized in a way that the difference between TOD and
  239. * xtime is reasonably small. Too bad that timekeeping_init
  240. * sets xtime.tv_nsec to zero. In addition the clock source
  241. * change from the jiffies clock source to the TOD clock
  242. * source add another error of up to 1/HZ second. The same
  243. * function sets wall_to_monotonic to a value that is too
  244. * small for /proc/uptime to be accurate.
  245. * Reset xtime and wall_to_monotonic to sane values.
  246. */
  247. write_seqlock_irqsave(&xtime_lock, flags);
  248. now = get_clock();
  249. tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
  250. clocksource_tod.cycle_last = now;
  251. clocksource_tod.raw_time = xtime;
  252. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
  253. set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
  254. write_sequnlock_irqrestore(&xtime_lock, flags);
  255. /* Enable TOD clock interrupts on the boot cpu. */
  256. init_cpu_timer();
  257. /* Enable cpu timer interrupts on the boot cpu. */
  258. vtime_init();
  259. }
  260. /*
  261. * The time is "clock". old is what we think the time is.
  262. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  263. * "delay" is an approximation how long the synchronization took. If
  264. * the time correction is positive, then "delay" is subtracted from
  265. * the time difference and only the remaining part is passed to ntp.
  266. */
  267. static unsigned long long adjust_time(unsigned long long old,
  268. unsigned long long clock,
  269. unsigned long long delay)
  270. {
  271. unsigned long long delta, ticks;
  272. struct timex adjust;
  273. if (clock > old) {
  274. /* It is later than we thought. */
  275. delta = ticks = clock - old;
  276. delta = ticks = (delta < delay) ? 0 : delta - delay;
  277. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  278. adjust.offset = ticks * (1000000 / HZ);
  279. } else {
  280. /* It is earlier than we thought. */
  281. delta = ticks = old - clock;
  282. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  283. delta = -delta;
  284. adjust.offset = -ticks * (1000000 / HZ);
  285. }
  286. sched_clock_base_cc += delta;
  287. if (adjust.offset != 0) {
  288. pr_notice("The ETR interface has adjusted the clock "
  289. "by %li microseconds\n", adjust.offset);
  290. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  291. do_adjtimex(&adjust);
  292. }
  293. return delta;
  294. }
  295. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  296. static DEFINE_MUTEX(clock_sync_mutex);
  297. static unsigned long clock_sync_flags;
  298. #define CLOCK_SYNC_HAS_ETR 0
  299. #define CLOCK_SYNC_HAS_STP 1
  300. #define CLOCK_SYNC_ETR 2
  301. #define CLOCK_SYNC_STP 3
  302. /*
  303. * The synchronous get_clock function. It will write the current clock
  304. * value to the clock pointer and return 0 if the clock is in sync with
  305. * the external time source. If the clock mode is local it will return
  306. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  307. * reference.
  308. */
  309. int get_sync_clock(unsigned long long *clock)
  310. {
  311. atomic_t *sw_ptr;
  312. unsigned int sw0, sw1;
  313. sw_ptr = &get_cpu_var(clock_sync_word);
  314. sw0 = atomic_read(sw_ptr);
  315. *clock = get_clock();
  316. sw1 = atomic_read(sw_ptr);
  317. put_cpu_var(clock_sync_sync);
  318. if (sw0 == sw1 && (sw0 & 0x80000000U))
  319. /* Success: time is in sync. */
  320. return 0;
  321. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  322. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  323. return -ENOSYS;
  324. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  325. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  326. return -EACCES;
  327. return -EAGAIN;
  328. }
  329. EXPORT_SYMBOL(get_sync_clock);
  330. /*
  331. * Make get_sync_clock return -EAGAIN.
  332. */
  333. static void disable_sync_clock(void *dummy)
  334. {
  335. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  336. /*
  337. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  338. * fail until the sync bit is turned back on. In addition
  339. * increase the "sequence" counter to avoid the race of an
  340. * etr event and the complete recovery against get_sync_clock.
  341. */
  342. atomic_clear_mask(0x80000000, sw_ptr);
  343. atomic_inc(sw_ptr);
  344. }
  345. /*
  346. * Make get_sync_clock return 0 again.
  347. * Needs to be called from a context disabled for preemption.
  348. */
  349. static void enable_sync_clock(void)
  350. {
  351. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  352. atomic_set_mask(0x80000000, sw_ptr);
  353. }
  354. /*
  355. * Function to check if the clock is in sync.
  356. */
  357. static inline int check_sync_clock(void)
  358. {
  359. atomic_t *sw_ptr;
  360. int rc;
  361. sw_ptr = &get_cpu_var(clock_sync_word);
  362. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  363. put_cpu_var(clock_sync_sync);
  364. return rc;
  365. }
  366. /* Single threaded workqueue used for etr and stp sync events */
  367. static struct workqueue_struct *time_sync_wq;
  368. static void __init time_init_wq(void)
  369. {
  370. if (time_sync_wq)
  371. return;
  372. time_sync_wq = create_singlethread_workqueue("timesync");
  373. stop_machine_create();
  374. }
  375. /*
  376. * External Time Reference (ETR) code.
  377. */
  378. static int etr_port0_online;
  379. static int etr_port1_online;
  380. static int etr_steai_available;
  381. static int __init early_parse_etr(char *p)
  382. {
  383. if (strncmp(p, "off", 3) == 0)
  384. etr_port0_online = etr_port1_online = 0;
  385. else if (strncmp(p, "port0", 5) == 0)
  386. etr_port0_online = 1;
  387. else if (strncmp(p, "port1", 5) == 0)
  388. etr_port1_online = 1;
  389. else if (strncmp(p, "on", 2) == 0)
  390. etr_port0_online = etr_port1_online = 1;
  391. return 0;
  392. }
  393. early_param("etr", early_parse_etr);
  394. enum etr_event {
  395. ETR_EVENT_PORT0_CHANGE,
  396. ETR_EVENT_PORT1_CHANGE,
  397. ETR_EVENT_PORT_ALERT,
  398. ETR_EVENT_SYNC_CHECK,
  399. ETR_EVENT_SWITCH_LOCAL,
  400. ETR_EVENT_UPDATE,
  401. };
  402. /*
  403. * Valid bit combinations of the eacr register are (x = don't care):
  404. * e0 e1 dp p0 p1 ea es sl
  405. * 0 0 x 0 0 0 0 0 initial, disabled state
  406. * 0 0 x 0 1 1 0 0 port 1 online
  407. * 0 0 x 1 0 1 0 0 port 0 online
  408. * 0 0 x 1 1 1 0 0 both ports online
  409. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  410. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  411. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  412. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  413. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  414. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  415. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  416. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  417. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  418. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  419. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  420. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  421. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  422. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  423. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  424. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  425. */
  426. static struct etr_eacr etr_eacr;
  427. static u64 etr_tolec; /* time of last eacr update */
  428. static struct etr_aib etr_port0;
  429. static int etr_port0_uptodate;
  430. static struct etr_aib etr_port1;
  431. static int etr_port1_uptodate;
  432. static unsigned long etr_events;
  433. static struct timer_list etr_timer;
  434. static void etr_timeout(unsigned long dummy);
  435. static void etr_work_fn(struct work_struct *work);
  436. static DEFINE_MUTEX(etr_work_mutex);
  437. static DECLARE_WORK(etr_work, etr_work_fn);
  438. /*
  439. * Reset ETR attachment.
  440. */
  441. static void etr_reset(void)
  442. {
  443. etr_eacr = (struct etr_eacr) {
  444. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  445. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  446. .es = 0, .sl = 0 };
  447. if (etr_setr(&etr_eacr) == 0) {
  448. etr_tolec = get_clock();
  449. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  450. if (etr_port0_online && etr_port1_online)
  451. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  452. } else if (etr_port0_online || etr_port1_online) {
  453. pr_warning("The real or virtual hardware system does "
  454. "not provide an ETR interface\n");
  455. etr_port0_online = etr_port1_online = 0;
  456. }
  457. }
  458. static int __init etr_init(void)
  459. {
  460. struct etr_aib aib;
  461. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  462. return 0;
  463. time_init_wq();
  464. /* Check if this machine has the steai instruction. */
  465. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  466. etr_steai_available = 1;
  467. setup_timer(&etr_timer, etr_timeout, 0UL);
  468. if (etr_port0_online) {
  469. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  470. queue_work(time_sync_wq, &etr_work);
  471. }
  472. if (etr_port1_online) {
  473. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  474. queue_work(time_sync_wq, &etr_work);
  475. }
  476. return 0;
  477. }
  478. arch_initcall(etr_init);
  479. /*
  480. * Two sorts of ETR machine checks. The architecture reads:
  481. * "When a machine-check niterruption occurs and if a switch-to-local or
  482. * ETR-sync-check interrupt request is pending but disabled, this pending
  483. * disabled interruption request is indicated and is cleared".
  484. * Which means that we can get etr_switch_to_local events from the machine
  485. * check handler although the interruption condition is disabled. Lovely..
  486. */
  487. /*
  488. * Switch to local machine check. This is called when the last usable
  489. * ETR port goes inactive. After switch to local the clock is not in sync.
  490. */
  491. void etr_switch_to_local(void)
  492. {
  493. if (!etr_eacr.sl)
  494. return;
  495. disable_sync_clock(NULL);
  496. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  497. queue_work(time_sync_wq, &etr_work);
  498. }
  499. /*
  500. * ETR sync check machine check. This is called when the ETR OTE and the
  501. * local clock OTE are farther apart than the ETR sync check tolerance.
  502. * After a ETR sync check the clock is not in sync. The machine check
  503. * is broadcasted to all cpus at the same time.
  504. */
  505. void etr_sync_check(void)
  506. {
  507. if (!etr_eacr.es)
  508. return;
  509. disable_sync_clock(NULL);
  510. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  511. queue_work(time_sync_wq, &etr_work);
  512. }
  513. /*
  514. * ETR timing alert. There are two causes:
  515. * 1) port state change, check the usability of the port
  516. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  517. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  518. * or ETR-data word 4 (edf4) has changed.
  519. */
  520. static void etr_timing_alert(struct etr_irq_parm *intparm)
  521. {
  522. if (intparm->pc0)
  523. /* ETR port 0 state change. */
  524. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  525. if (intparm->pc1)
  526. /* ETR port 1 state change. */
  527. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  528. if (intparm->eai)
  529. /*
  530. * ETR port alert on either port 0, 1 or both.
  531. * Both ports are not up-to-date now.
  532. */
  533. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  534. queue_work(time_sync_wq, &etr_work);
  535. }
  536. static void etr_timeout(unsigned long dummy)
  537. {
  538. set_bit(ETR_EVENT_UPDATE, &etr_events);
  539. queue_work(time_sync_wq, &etr_work);
  540. }
  541. /*
  542. * Check if the etr mode is pss.
  543. */
  544. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  545. {
  546. return eacr.es && !eacr.sl;
  547. }
  548. /*
  549. * Check if the etr mode is etr.
  550. */
  551. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  552. {
  553. return eacr.es && eacr.sl;
  554. }
  555. /*
  556. * Check if the port can be used for TOD synchronization.
  557. * For PPS mode the port has to receive OTEs. For ETR mode
  558. * the port has to receive OTEs, the ETR stepping bit has to
  559. * be zero and the validity bits for data frame 1, 2, and 3
  560. * have to be 1.
  561. */
  562. static int etr_port_valid(struct etr_aib *aib, int port)
  563. {
  564. unsigned int psc;
  565. /* Check that this port is receiving OTEs. */
  566. if (aib->tsp == 0)
  567. return 0;
  568. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  569. if (psc == etr_lpsc_pps_mode)
  570. return 1;
  571. if (psc == etr_lpsc_operational_step)
  572. return !aib->esw.y && aib->slsw.v1 &&
  573. aib->slsw.v2 && aib->slsw.v3;
  574. return 0;
  575. }
  576. /*
  577. * Check if two ports are on the same network.
  578. */
  579. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  580. {
  581. // FIXME: any other fields we have to compare?
  582. return aib1->edf1.net_id == aib2->edf1.net_id;
  583. }
  584. /*
  585. * Wrapper for etr_stei that converts physical port states
  586. * to logical port states to be consistent with the output
  587. * of stetr (see etr_psc vs. etr_lpsc).
  588. */
  589. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  590. {
  591. BUG_ON(etr_steai(aib, func) != 0);
  592. /* Convert port state to logical port state. */
  593. if (aib->esw.psc0 == 1)
  594. aib->esw.psc0 = 2;
  595. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  596. aib->esw.psc0 = 1;
  597. if (aib->esw.psc1 == 1)
  598. aib->esw.psc1 = 2;
  599. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  600. aib->esw.psc1 = 1;
  601. }
  602. /*
  603. * Check if the aib a2 is still connected to the same attachment as
  604. * aib a1, the etv values differ by one and a2 is valid.
  605. */
  606. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  607. {
  608. int state_a1, state_a2;
  609. /* Paranoia check: e0/e1 should better be the same. */
  610. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  611. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  612. return 0;
  613. /* Still connected to the same etr ? */
  614. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  615. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  616. if (state_a1 == etr_lpsc_operational_step) {
  617. if (state_a2 != etr_lpsc_operational_step ||
  618. a1->edf1.net_id != a2->edf1.net_id ||
  619. a1->edf1.etr_id != a2->edf1.etr_id ||
  620. a1->edf1.etr_pn != a2->edf1.etr_pn)
  621. return 0;
  622. } else if (state_a2 != etr_lpsc_pps_mode)
  623. return 0;
  624. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  625. if (a1->edf2.etv + 1 != a2->edf2.etv)
  626. return 0;
  627. if (!etr_port_valid(a2, p))
  628. return 0;
  629. return 1;
  630. }
  631. struct clock_sync_data {
  632. atomic_t cpus;
  633. int in_sync;
  634. unsigned long long fixup_cc;
  635. int etr_port;
  636. struct etr_aib *etr_aib;
  637. };
  638. static void clock_sync_cpu(struct clock_sync_data *sync)
  639. {
  640. atomic_dec(&sync->cpus);
  641. enable_sync_clock();
  642. /*
  643. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  644. * is called on all other cpus while the TOD clocks is stopped.
  645. * __udelay will stop the cpu on an enabled wait psw until the
  646. * TOD is running again.
  647. */
  648. while (sync->in_sync == 0) {
  649. __udelay(1);
  650. /*
  651. * A different cpu changes *in_sync. Therefore use
  652. * barrier() to force memory access.
  653. */
  654. barrier();
  655. }
  656. if (sync->in_sync != 1)
  657. /* Didn't work. Clear per-cpu in sync bit again. */
  658. disable_sync_clock(NULL);
  659. /*
  660. * This round of TOD syncing is done. Set the clock comparator
  661. * to the next tick and let the processor continue.
  662. */
  663. fixup_clock_comparator(sync->fixup_cc);
  664. }
  665. /*
  666. * Sync the TOD clock using the port refered to by aibp. This port
  667. * has to be enabled and the other port has to be disabled. The
  668. * last eacr update has to be more than 1.6 seconds in the past.
  669. */
  670. static int etr_sync_clock(void *data)
  671. {
  672. static int first;
  673. unsigned long long clock, old_clock, delay, delta;
  674. struct clock_sync_data *etr_sync;
  675. struct etr_aib *sync_port, *aib;
  676. int port;
  677. int rc;
  678. etr_sync = data;
  679. if (xchg(&first, 1) == 1) {
  680. /* Slave */
  681. clock_sync_cpu(etr_sync);
  682. return 0;
  683. }
  684. /* Wait until all other cpus entered the sync function. */
  685. while (atomic_read(&etr_sync->cpus) != 0)
  686. cpu_relax();
  687. port = etr_sync->etr_port;
  688. aib = etr_sync->etr_aib;
  689. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  690. enable_sync_clock();
  691. /* Set clock to next OTE. */
  692. __ctl_set_bit(14, 21);
  693. __ctl_set_bit(0, 29);
  694. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  695. old_clock = get_clock();
  696. if (set_clock(clock) == 0) {
  697. __udelay(1); /* Wait for the clock to start. */
  698. __ctl_clear_bit(0, 29);
  699. __ctl_clear_bit(14, 21);
  700. etr_stetr(aib);
  701. /* Adjust Linux timing variables. */
  702. delay = (unsigned long long)
  703. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  704. delta = adjust_time(old_clock, clock, delay);
  705. etr_sync->fixup_cc = delta;
  706. fixup_clock_comparator(delta);
  707. /* Verify that the clock is properly set. */
  708. if (!etr_aib_follows(sync_port, aib, port)) {
  709. /* Didn't work. */
  710. disable_sync_clock(NULL);
  711. etr_sync->in_sync = -EAGAIN;
  712. rc = -EAGAIN;
  713. } else {
  714. etr_sync->in_sync = 1;
  715. rc = 0;
  716. }
  717. } else {
  718. /* Could not set the clock ?!? */
  719. __ctl_clear_bit(0, 29);
  720. __ctl_clear_bit(14, 21);
  721. disable_sync_clock(NULL);
  722. etr_sync->in_sync = -EAGAIN;
  723. rc = -EAGAIN;
  724. }
  725. xchg(&first, 0);
  726. return rc;
  727. }
  728. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  729. {
  730. struct clock_sync_data etr_sync;
  731. struct etr_aib *sync_port;
  732. int follows;
  733. int rc;
  734. /* Check if the current aib is adjacent to the sync port aib. */
  735. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  736. follows = etr_aib_follows(sync_port, aib, port);
  737. memcpy(sync_port, aib, sizeof(*aib));
  738. if (!follows)
  739. return -EAGAIN;
  740. memset(&etr_sync, 0, sizeof(etr_sync));
  741. etr_sync.etr_aib = aib;
  742. etr_sync.etr_port = port;
  743. get_online_cpus();
  744. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  745. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  746. put_online_cpus();
  747. return rc;
  748. }
  749. /*
  750. * Handle the immediate effects of the different events.
  751. * The port change event is used for online/offline changes.
  752. */
  753. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  754. {
  755. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  756. eacr.es = 0;
  757. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  758. eacr.es = eacr.sl = 0;
  759. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  760. etr_port0_uptodate = etr_port1_uptodate = 0;
  761. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  762. if (eacr.e0)
  763. /*
  764. * Port change of an enabled port. We have to
  765. * assume that this can have caused an stepping
  766. * port switch.
  767. */
  768. etr_tolec = get_clock();
  769. eacr.p0 = etr_port0_online;
  770. if (!eacr.p0)
  771. eacr.e0 = 0;
  772. etr_port0_uptodate = 0;
  773. }
  774. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  775. if (eacr.e1)
  776. /*
  777. * Port change of an enabled port. We have to
  778. * assume that this can have caused an stepping
  779. * port switch.
  780. */
  781. etr_tolec = get_clock();
  782. eacr.p1 = etr_port1_online;
  783. if (!eacr.p1)
  784. eacr.e1 = 0;
  785. etr_port1_uptodate = 0;
  786. }
  787. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  788. return eacr;
  789. }
  790. /*
  791. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  792. * one of the ports needs an update.
  793. */
  794. static void etr_set_tolec_timeout(unsigned long long now)
  795. {
  796. unsigned long micros;
  797. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  798. (!etr_eacr.p1 || etr_port1_uptodate))
  799. return;
  800. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  801. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  802. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  803. }
  804. /*
  805. * Set up a time that expires after 1/2 second.
  806. */
  807. static void etr_set_sync_timeout(void)
  808. {
  809. mod_timer(&etr_timer, jiffies + HZ/2);
  810. }
  811. /*
  812. * Update the aib information for one or both ports.
  813. */
  814. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  815. struct etr_eacr eacr)
  816. {
  817. /* With both ports disabled the aib information is useless. */
  818. if (!eacr.e0 && !eacr.e1)
  819. return eacr;
  820. /* Update port0 or port1 with aib stored in etr_work_fn. */
  821. if (aib->esw.q == 0) {
  822. /* Information for port 0 stored. */
  823. if (eacr.p0 && !etr_port0_uptodate) {
  824. etr_port0 = *aib;
  825. if (etr_port0_online)
  826. etr_port0_uptodate = 1;
  827. }
  828. } else {
  829. /* Information for port 1 stored. */
  830. if (eacr.p1 && !etr_port1_uptodate) {
  831. etr_port1 = *aib;
  832. if (etr_port0_online)
  833. etr_port1_uptodate = 1;
  834. }
  835. }
  836. /*
  837. * Do not try to get the alternate port aib if the clock
  838. * is not in sync yet.
  839. */
  840. if (!check_sync_clock())
  841. return eacr;
  842. /*
  843. * If steai is available we can get the information about
  844. * the other port immediately. If only stetr is available the
  845. * data-port bit toggle has to be used.
  846. */
  847. if (etr_steai_available) {
  848. if (eacr.p0 && !etr_port0_uptodate) {
  849. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  850. etr_port0_uptodate = 1;
  851. }
  852. if (eacr.p1 && !etr_port1_uptodate) {
  853. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  854. etr_port1_uptodate = 1;
  855. }
  856. } else {
  857. /*
  858. * One port was updated above, if the other
  859. * port is not uptodate toggle dp bit.
  860. */
  861. if ((eacr.p0 && !etr_port0_uptodate) ||
  862. (eacr.p1 && !etr_port1_uptodate))
  863. eacr.dp ^= 1;
  864. else
  865. eacr.dp = 0;
  866. }
  867. return eacr;
  868. }
  869. /*
  870. * Write new etr control register if it differs from the current one.
  871. * Return 1 if etr_tolec has been updated as well.
  872. */
  873. static void etr_update_eacr(struct etr_eacr eacr)
  874. {
  875. int dp_changed;
  876. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  877. /* No change, return. */
  878. return;
  879. /*
  880. * The disable of an active port of the change of the data port
  881. * bit can/will cause a change in the data port.
  882. */
  883. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  884. (etr_eacr.dp ^ eacr.dp) != 0;
  885. etr_eacr = eacr;
  886. etr_setr(&etr_eacr);
  887. if (dp_changed)
  888. etr_tolec = get_clock();
  889. }
  890. /*
  891. * ETR work. In this function you'll find the main logic. In
  892. * particular this is the only function that calls etr_update_eacr(),
  893. * it "controls" the etr control register.
  894. */
  895. static void etr_work_fn(struct work_struct *work)
  896. {
  897. unsigned long long now;
  898. struct etr_eacr eacr;
  899. struct etr_aib aib;
  900. int sync_port;
  901. /* prevent multiple execution. */
  902. mutex_lock(&etr_work_mutex);
  903. /* Create working copy of etr_eacr. */
  904. eacr = etr_eacr;
  905. /* Check for the different events and their immediate effects. */
  906. eacr = etr_handle_events(eacr);
  907. /* Check if ETR is supposed to be active. */
  908. eacr.ea = eacr.p0 || eacr.p1;
  909. if (!eacr.ea) {
  910. /* Both ports offline. Reset everything. */
  911. eacr.dp = eacr.es = eacr.sl = 0;
  912. on_each_cpu(disable_sync_clock, NULL, 1);
  913. del_timer_sync(&etr_timer);
  914. etr_update_eacr(eacr);
  915. goto out_unlock;
  916. }
  917. /* Store aib to get the current ETR status word. */
  918. BUG_ON(etr_stetr(&aib) != 0);
  919. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  920. now = get_clock();
  921. /*
  922. * Update the port information if the last stepping port change
  923. * or data port change is older than 1.6 seconds.
  924. */
  925. if (now >= etr_tolec + (1600000 << 12))
  926. eacr = etr_handle_update(&aib, eacr);
  927. /*
  928. * Select ports to enable. The prefered synchronization mode is PPS.
  929. * If a port can be enabled depends on a number of things:
  930. * 1) The port needs to be online and uptodate. A port is not
  931. * disabled just because it is not uptodate, but it is only
  932. * enabled if it is uptodate.
  933. * 2) The port needs to have the same mode (pps / etr).
  934. * 3) The port needs to be usable -> etr_port_valid() == 1
  935. * 4) To enable the second port the clock needs to be in sync.
  936. * 5) If both ports are useable and are ETR ports, the network id
  937. * has to be the same.
  938. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  939. */
  940. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  941. eacr.sl = 0;
  942. eacr.e0 = 1;
  943. if (!etr_mode_is_pps(etr_eacr))
  944. eacr.es = 0;
  945. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  946. eacr.e1 = 0;
  947. // FIXME: uptodate checks ?
  948. else if (etr_port0_uptodate && etr_port1_uptodate)
  949. eacr.e1 = 1;
  950. sync_port = (etr_port0_uptodate &&
  951. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  952. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  953. eacr.sl = 0;
  954. eacr.e0 = 0;
  955. eacr.e1 = 1;
  956. if (!etr_mode_is_pps(etr_eacr))
  957. eacr.es = 0;
  958. sync_port = (etr_port1_uptodate &&
  959. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  960. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  961. eacr.sl = 1;
  962. eacr.e0 = 1;
  963. if (!etr_mode_is_etr(etr_eacr))
  964. eacr.es = 0;
  965. if (!eacr.es || !eacr.p1 ||
  966. aib.esw.psc1 != etr_lpsc_operational_alt)
  967. eacr.e1 = 0;
  968. else if (etr_port0_uptodate && etr_port1_uptodate &&
  969. etr_compare_network(&etr_port0, &etr_port1))
  970. eacr.e1 = 1;
  971. sync_port = (etr_port0_uptodate &&
  972. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  973. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  974. eacr.sl = 1;
  975. eacr.e0 = 0;
  976. eacr.e1 = 1;
  977. if (!etr_mode_is_etr(etr_eacr))
  978. eacr.es = 0;
  979. sync_port = (etr_port1_uptodate &&
  980. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  981. } else {
  982. /* Both ports not usable. */
  983. eacr.es = eacr.sl = 0;
  984. sync_port = -1;
  985. }
  986. /*
  987. * If the clock is in sync just update the eacr and return.
  988. * If there is no valid sync port wait for a port update.
  989. */
  990. if (check_sync_clock() || sync_port < 0) {
  991. etr_update_eacr(eacr);
  992. etr_set_tolec_timeout(now);
  993. goto out_unlock;
  994. }
  995. /*
  996. * Prepare control register for clock syncing
  997. * (reset data port bit, set sync check control.
  998. */
  999. eacr.dp = 0;
  1000. eacr.es = 1;
  1001. /*
  1002. * Update eacr and try to synchronize the clock. If the update
  1003. * of eacr caused a stepping port switch (or if we have to
  1004. * assume that a stepping port switch has occured) or the
  1005. * clock syncing failed, reset the sync check control bit
  1006. * and set up a timer to try again after 0.5 seconds
  1007. */
  1008. etr_update_eacr(eacr);
  1009. if (now < etr_tolec + (1600000 << 12) ||
  1010. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1011. /* Sync failed. Try again in 1/2 second. */
  1012. eacr.es = 0;
  1013. etr_update_eacr(eacr);
  1014. etr_set_sync_timeout();
  1015. } else
  1016. etr_set_tolec_timeout(now);
  1017. out_unlock:
  1018. mutex_unlock(&etr_work_mutex);
  1019. }
  1020. /*
  1021. * Sysfs interface functions
  1022. */
  1023. static struct sysdev_class etr_sysclass = {
  1024. .name = "etr",
  1025. };
  1026. static struct sys_device etr_port0_dev = {
  1027. .id = 0,
  1028. .cls = &etr_sysclass,
  1029. };
  1030. static struct sys_device etr_port1_dev = {
  1031. .id = 1,
  1032. .cls = &etr_sysclass,
  1033. };
  1034. /*
  1035. * ETR class attributes
  1036. */
  1037. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1038. {
  1039. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1040. }
  1041. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1042. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1043. {
  1044. char *mode_str;
  1045. if (etr_mode_is_pps(etr_eacr))
  1046. mode_str = "pps";
  1047. else if (etr_mode_is_etr(etr_eacr))
  1048. mode_str = "etr";
  1049. else
  1050. mode_str = "local";
  1051. return sprintf(buf, "%s\n", mode_str);
  1052. }
  1053. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1054. /*
  1055. * ETR port attributes
  1056. */
  1057. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1058. {
  1059. if (dev == &etr_port0_dev)
  1060. return etr_port0_online ? &etr_port0 : NULL;
  1061. else
  1062. return etr_port1_online ? &etr_port1 : NULL;
  1063. }
  1064. static ssize_t etr_online_show(struct sys_device *dev,
  1065. struct sysdev_attribute *attr,
  1066. char *buf)
  1067. {
  1068. unsigned int online;
  1069. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1070. return sprintf(buf, "%i\n", online);
  1071. }
  1072. static ssize_t etr_online_store(struct sys_device *dev,
  1073. struct sysdev_attribute *attr,
  1074. const char *buf, size_t count)
  1075. {
  1076. unsigned int value;
  1077. value = simple_strtoul(buf, NULL, 0);
  1078. if (value != 0 && value != 1)
  1079. return -EINVAL;
  1080. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1081. return -EOPNOTSUPP;
  1082. mutex_lock(&clock_sync_mutex);
  1083. if (dev == &etr_port0_dev) {
  1084. if (etr_port0_online == value)
  1085. goto out; /* Nothing to do. */
  1086. etr_port0_online = value;
  1087. if (etr_port0_online && etr_port1_online)
  1088. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1089. else
  1090. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1091. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1092. queue_work(time_sync_wq, &etr_work);
  1093. } else {
  1094. if (etr_port1_online == value)
  1095. goto out; /* Nothing to do. */
  1096. etr_port1_online = value;
  1097. if (etr_port0_online && etr_port1_online)
  1098. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1099. else
  1100. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1101. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1102. queue_work(time_sync_wq, &etr_work);
  1103. }
  1104. out:
  1105. mutex_unlock(&clock_sync_mutex);
  1106. return count;
  1107. }
  1108. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1109. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1110. struct sysdev_attribute *attr,
  1111. char *buf)
  1112. {
  1113. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1114. etr_eacr.e0 : etr_eacr.e1);
  1115. }
  1116. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1117. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1118. struct sysdev_attribute *attr, char *buf)
  1119. {
  1120. if (!etr_port0_online && !etr_port1_online)
  1121. /* Status word is not uptodate if both ports are offline. */
  1122. return -ENODATA;
  1123. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1124. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1125. }
  1126. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1127. static ssize_t etr_untuned_show(struct sys_device *dev,
  1128. struct sysdev_attribute *attr, char *buf)
  1129. {
  1130. struct etr_aib *aib = etr_aib_from_dev(dev);
  1131. if (!aib || !aib->slsw.v1)
  1132. return -ENODATA;
  1133. return sprintf(buf, "%i\n", aib->edf1.u);
  1134. }
  1135. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1136. static ssize_t etr_network_id_show(struct sys_device *dev,
  1137. struct sysdev_attribute *attr, char *buf)
  1138. {
  1139. struct etr_aib *aib = etr_aib_from_dev(dev);
  1140. if (!aib || !aib->slsw.v1)
  1141. return -ENODATA;
  1142. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1143. }
  1144. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1145. static ssize_t etr_id_show(struct sys_device *dev,
  1146. struct sysdev_attribute *attr, char *buf)
  1147. {
  1148. struct etr_aib *aib = etr_aib_from_dev(dev);
  1149. if (!aib || !aib->slsw.v1)
  1150. return -ENODATA;
  1151. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1152. }
  1153. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1154. static ssize_t etr_port_number_show(struct sys_device *dev,
  1155. struct sysdev_attribute *attr, char *buf)
  1156. {
  1157. struct etr_aib *aib = etr_aib_from_dev(dev);
  1158. if (!aib || !aib->slsw.v1)
  1159. return -ENODATA;
  1160. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1161. }
  1162. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1163. static ssize_t etr_coupled_show(struct sys_device *dev,
  1164. struct sysdev_attribute *attr, char *buf)
  1165. {
  1166. struct etr_aib *aib = etr_aib_from_dev(dev);
  1167. if (!aib || !aib->slsw.v3)
  1168. return -ENODATA;
  1169. return sprintf(buf, "%i\n", aib->edf3.c);
  1170. }
  1171. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1172. static ssize_t etr_local_time_show(struct sys_device *dev,
  1173. struct sysdev_attribute *attr, char *buf)
  1174. {
  1175. struct etr_aib *aib = etr_aib_from_dev(dev);
  1176. if (!aib || !aib->slsw.v3)
  1177. return -ENODATA;
  1178. return sprintf(buf, "%i\n", aib->edf3.blto);
  1179. }
  1180. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1181. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1182. struct sysdev_attribute *attr, char *buf)
  1183. {
  1184. struct etr_aib *aib = etr_aib_from_dev(dev);
  1185. if (!aib || !aib->slsw.v3)
  1186. return -ENODATA;
  1187. return sprintf(buf, "%i\n", aib->edf3.buo);
  1188. }
  1189. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1190. static struct sysdev_attribute *etr_port_attributes[] = {
  1191. &attr_online,
  1192. &attr_stepping_control,
  1193. &attr_state_code,
  1194. &attr_untuned,
  1195. &attr_network,
  1196. &attr_id,
  1197. &attr_port,
  1198. &attr_coupled,
  1199. &attr_local_time,
  1200. &attr_utc_offset,
  1201. NULL
  1202. };
  1203. static int __init etr_register_port(struct sys_device *dev)
  1204. {
  1205. struct sysdev_attribute **attr;
  1206. int rc;
  1207. rc = sysdev_register(dev);
  1208. if (rc)
  1209. goto out;
  1210. for (attr = etr_port_attributes; *attr; attr++) {
  1211. rc = sysdev_create_file(dev, *attr);
  1212. if (rc)
  1213. goto out_unreg;
  1214. }
  1215. return 0;
  1216. out_unreg:
  1217. for (; attr >= etr_port_attributes; attr--)
  1218. sysdev_remove_file(dev, *attr);
  1219. sysdev_unregister(dev);
  1220. out:
  1221. return rc;
  1222. }
  1223. static void __init etr_unregister_port(struct sys_device *dev)
  1224. {
  1225. struct sysdev_attribute **attr;
  1226. for (attr = etr_port_attributes; *attr; attr++)
  1227. sysdev_remove_file(dev, *attr);
  1228. sysdev_unregister(dev);
  1229. }
  1230. static int __init etr_init_sysfs(void)
  1231. {
  1232. int rc;
  1233. rc = sysdev_class_register(&etr_sysclass);
  1234. if (rc)
  1235. goto out;
  1236. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1237. if (rc)
  1238. goto out_unreg_class;
  1239. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1240. if (rc)
  1241. goto out_remove_stepping_port;
  1242. rc = etr_register_port(&etr_port0_dev);
  1243. if (rc)
  1244. goto out_remove_stepping_mode;
  1245. rc = etr_register_port(&etr_port1_dev);
  1246. if (rc)
  1247. goto out_remove_port0;
  1248. return 0;
  1249. out_remove_port0:
  1250. etr_unregister_port(&etr_port0_dev);
  1251. out_remove_stepping_mode:
  1252. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1253. out_remove_stepping_port:
  1254. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1255. out_unreg_class:
  1256. sysdev_class_unregister(&etr_sysclass);
  1257. out:
  1258. return rc;
  1259. }
  1260. device_initcall(etr_init_sysfs);
  1261. /*
  1262. * Server Time Protocol (STP) code.
  1263. */
  1264. static int stp_online;
  1265. static struct stp_sstpi stp_info;
  1266. static void *stp_page;
  1267. static void stp_work_fn(struct work_struct *work);
  1268. static DEFINE_MUTEX(stp_work_mutex);
  1269. static DECLARE_WORK(stp_work, stp_work_fn);
  1270. static struct timer_list stp_timer;
  1271. static int __init early_parse_stp(char *p)
  1272. {
  1273. if (strncmp(p, "off", 3) == 0)
  1274. stp_online = 0;
  1275. else if (strncmp(p, "on", 2) == 0)
  1276. stp_online = 1;
  1277. return 0;
  1278. }
  1279. early_param("stp", early_parse_stp);
  1280. /*
  1281. * Reset STP attachment.
  1282. */
  1283. static void __init stp_reset(void)
  1284. {
  1285. int rc;
  1286. stp_page = alloc_bootmem_pages(PAGE_SIZE);
  1287. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1288. if (rc == 0)
  1289. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1290. else if (stp_online) {
  1291. pr_warning("The real or virtual hardware system does "
  1292. "not provide an STP interface\n");
  1293. free_bootmem((unsigned long) stp_page, PAGE_SIZE);
  1294. stp_page = NULL;
  1295. stp_online = 0;
  1296. }
  1297. }
  1298. static void stp_timeout(unsigned long dummy)
  1299. {
  1300. queue_work(time_sync_wq, &stp_work);
  1301. }
  1302. static int __init stp_init(void)
  1303. {
  1304. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1305. return 0;
  1306. setup_timer(&stp_timer, stp_timeout, 0UL);
  1307. time_init_wq();
  1308. if (!stp_online)
  1309. return 0;
  1310. queue_work(time_sync_wq, &stp_work);
  1311. return 0;
  1312. }
  1313. arch_initcall(stp_init);
  1314. /*
  1315. * STP timing alert. There are three causes:
  1316. * 1) timing status change
  1317. * 2) link availability change
  1318. * 3) time control parameter change
  1319. * In all three cases we are only interested in the clock source state.
  1320. * If a STP clock source is now available use it.
  1321. */
  1322. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1323. {
  1324. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1325. queue_work(time_sync_wq, &stp_work);
  1326. }
  1327. /*
  1328. * STP sync check machine check. This is called when the timing state
  1329. * changes from the synchronized state to the unsynchronized state.
  1330. * After a STP sync check the clock is not in sync. The machine check
  1331. * is broadcasted to all cpus at the same time.
  1332. */
  1333. void stp_sync_check(void)
  1334. {
  1335. disable_sync_clock(NULL);
  1336. queue_work(time_sync_wq, &stp_work);
  1337. }
  1338. /*
  1339. * STP island condition machine check. This is called when an attached
  1340. * server attempts to communicate over an STP link and the servers
  1341. * have matching CTN ids and have a valid stratum-1 configuration
  1342. * but the configurations do not match.
  1343. */
  1344. void stp_island_check(void)
  1345. {
  1346. disable_sync_clock(NULL);
  1347. queue_work(time_sync_wq, &stp_work);
  1348. }
  1349. static int stp_sync_clock(void *data)
  1350. {
  1351. static int first;
  1352. unsigned long long old_clock, delta;
  1353. struct clock_sync_data *stp_sync;
  1354. int rc;
  1355. stp_sync = data;
  1356. if (xchg(&first, 1) == 1) {
  1357. /* Slave */
  1358. clock_sync_cpu(stp_sync);
  1359. return 0;
  1360. }
  1361. /* Wait until all other cpus entered the sync function. */
  1362. while (atomic_read(&stp_sync->cpus) != 0)
  1363. cpu_relax();
  1364. enable_sync_clock();
  1365. rc = 0;
  1366. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1367. stp_info.todoff[2] || stp_info.todoff[3] ||
  1368. stp_info.tmd != 2) {
  1369. old_clock = get_clock();
  1370. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1371. if (rc == 0) {
  1372. delta = adjust_time(old_clock, get_clock(), 0);
  1373. fixup_clock_comparator(delta);
  1374. rc = chsc_sstpi(stp_page, &stp_info,
  1375. sizeof(struct stp_sstpi));
  1376. if (rc == 0 && stp_info.tmd != 2)
  1377. rc = -EAGAIN;
  1378. }
  1379. }
  1380. if (rc) {
  1381. disable_sync_clock(NULL);
  1382. stp_sync->in_sync = -EAGAIN;
  1383. } else
  1384. stp_sync->in_sync = 1;
  1385. xchg(&first, 0);
  1386. return 0;
  1387. }
  1388. /*
  1389. * STP work. Check for the STP state and take over the clock
  1390. * synchronization if the STP clock source is usable.
  1391. */
  1392. static void stp_work_fn(struct work_struct *work)
  1393. {
  1394. struct clock_sync_data stp_sync;
  1395. int rc;
  1396. /* prevent multiple execution. */
  1397. mutex_lock(&stp_work_mutex);
  1398. if (!stp_online) {
  1399. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1400. del_timer_sync(&stp_timer);
  1401. goto out_unlock;
  1402. }
  1403. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1404. if (rc)
  1405. goto out_unlock;
  1406. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1407. if (rc || stp_info.c == 0)
  1408. goto out_unlock;
  1409. /* Skip synchronization if the clock is already in sync. */
  1410. if (check_sync_clock())
  1411. goto out_unlock;
  1412. memset(&stp_sync, 0, sizeof(stp_sync));
  1413. get_online_cpus();
  1414. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1415. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1416. put_online_cpus();
  1417. if (!check_sync_clock())
  1418. /*
  1419. * There is a usable clock but the synchonization failed.
  1420. * Retry after a second.
  1421. */
  1422. mod_timer(&stp_timer, jiffies + HZ);
  1423. out_unlock:
  1424. mutex_unlock(&stp_work_mutex);
  1425. }
  1426. /*
  1427. * STP class sysfs interface functions
  1428. */
  1429. static struct sysdev_class stp_sysclass = {
  1430. .name = "stp",
  1431. };
  1432. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1433. {
  1434. if (!stp_online)
  1435. return -ENODATA;
  1436. return sprintf(buf, "%016llx\n",
  1437. *(unsigned long long *) stp_info.ctnid);
  1438. }
  1439. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1440. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1441. {
  1442. if (!stp_online)
  1443. return -ENODATA;
  1444. return sprintf(buf, "%i\n", stp_info.ctn);
  1445. }
  1446. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1447. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1448. {
  1449. if (!stp_online || !(stp_info.vbits & 0x2000))
  1450. return -ENODATA;
  1451. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1452. }
  1453. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1454. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1455. {
  1456. if (!stp_online || !(stp_info.vbits & 0x8000))
  1457. return -ENODATA;
  1458. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1459. }
  1460. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1461. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1462. {
  1463. if (!stp_online)
  1464. return -ENODATA;
  1465. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1466. }
  1467. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1468. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1469. {
  1470. if (!stp_online || !(stp_info.vbits & 0x0800))
  1471. return -ENODATA;
  1472. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1473. }
  1474. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1475. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1476. {
  1477. if (!stp_online || !(stp_info.vbits & 0x4000))
  1478. return -ENODATA;
  1479. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1480. }
  1481. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1482. stp_time_zone_offset_show, NULL);
  1483. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1484. {
  1485. if (!stp_online)
  1486. return -ENODATA;
  1487. return sprintf(buf, "%i\n", stp_info.tmd);
  1488. }
  1489. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1490. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1491. {
  1492. if (!stp_online)
  1493. return -ENODATA;
  1494. return sprintf(buf, "%i\n", stp_info.tst);
  1495. }
  1496. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1497. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1498. {
  1499. return sprintf(buf, "%i\n", stp_online);
  1500. }
  1501. static ssize_t stp_online_store(struct sysdev_class *class,
  1502. const char *buf, size_t count)
  1503. {
  1504. unsigned int value;
  1505. value = simple_strtoul(buf, NULL, 0);
  1506. if (value != 0 && value != 1)
  1507. return -EINVAL;
  1508. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1509. return -EOPNOTSUPP;
  1510. mutex_lock(&clock_sync_mutex);
  1511. stp_online = value;
  1512. if (stp_online)
  1513. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1514. else
  1515. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1516. queue_work(time_sync_wq, &stp_work);
  1517. mutex_unlock(&clock_sync_mutex);
  1518. return count;
  1519. }
  1520. /*
  1521. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1522. * stp/online but attr_online already exists in this file ..
  1523. */
  1524. static struct sysdev_class_attribute attr_stp_online = {
  1525. .attr = { .name = "online", .mode = 0600 },
  1526. .show = stp_online_show,
  1527. .store = stp_online_store,
  1528. };
  1529. static struct sysdev_class_attribute *stp_attributes[] = {
  1530. &attr_ctn_id,
  1531. &attr_ctn_type,
  1532. &attr_dst_offset,
  1533. &attr_leap_seconds,
  1534. &attr_stp_online,
  1535. &attr_stratum,
  1536. &attr_time_offset,
  1537. &attr_time_zone_offset,
  1538. &attr_timing_mode,
  1539. &attr_timing_state,
  1540. NULL
  1541. };
  1542. static int __init stp_init_sysfs(void)
  1543. {
  1544. struct sysdev_class_attribute **attr;
  1545. int rc;
  1546. rc = sysdev_class_register(&stp_sysclass);
  1547. if (rc)
  1548. goto out;
  1549. for (attr = stp_attributes; *attr; attr++) {
  1550. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1551. if (rc)
  1552. goto out_unreg;
  1553. }
  1554. return 0;
  1555. out_unreg:
  1556. for (; attr >= stp_attributes; attr--)
  1557. sysdev_class_remove_file(&stp_sysclass, *attr);
  1558. sysdev_class_unregister(&stp_sysclass);
  1559. out:
  1560. return rc;
  1561. }
  1562. device_initcall(stp_init_sysfs);