beat_htab.c 12 KB

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  1. /*
  2. * "Cell Reference Set" HTAB support.
  3. *
  4. * (C) Copyright 2006-2007 TOSHIBA CORPORATION
  5. *
  6. * This code is based on arch/powerpc/platforms/pseries/lpar.c:
  7. * Copyright (C) 2001 Todd Inglett, IBM Corporation
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along
  20. * with this program; if not, write to the Free Software Foundation, Inc.,
  21. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  22. */
  23. #undef DEBUG_LOW
  24. #include <linux/kernel.h>
  25. #include <linux/spinlock.h>
  26. #include <asm/mmu.h>
  27. #include <asm/page.h>
  28. #include <asm/pgtable.h>
  29. #include <asm/machdep.h>
  30. #include <asm/udbg.h>
  31. #include "beat_wrapper.h"
  32. #ifdef DEBUG_LOW
  33. #define DBG_LOW(fmt...) do { udbg_printf(fmt); } while (0)
  34. #else
  35. #define DBG_LOW(fmt...) do { } while (0)
  36. #endif
  37. static DEFINE_SPINLOCK(beat_htab_lock);
  38. static inline unsigned int beat_read_mask(unsigned hpte_group)
  39. {
  40. unsigned long rmask = 0;
  41. u64 hpte_v[5];
  42. beat_read_htab_entries(0, hpte_group + 0, hpte_v);
  43. if (!(hpte_v[0] & HPTE_V_BOLTED))
  44. rmask |= 0x8000;
  45. if (!(hpte_v[1] & HPTE_V_BOLTED))
  46. rmask |= 0x4000;
  47. if (!(hpte_v[2] & HPTE_V_BOLTED))
  48. rmask |= 0x2000;
  49. if (!(hpte_v[3] & HPTE_V_BOLTED))
  50. rmask |= 0x1000;
  51. beat_read_htab_entries(0, hpte_group + 4, hpte_v);
  52. if (!(hpte_v[0] & HPTE_V_BOLTED))
  53. rmask |= 0x0800;
  54. if (!(hpte_v[1] & HPTE_V_BOLTED))
  55. rmask |= 0x0400;
  56. if (!(hpte_v[2] & HPTE_V_BOLTED))
  57. rmask |= 0x0200;
  58. if (!(hpte_v[3] & HPTE_V_BOLTED))
  59. rmask |= 0x0100;
  60. hpte_group = ~hpte_group & (htab_hash_mask * HPTES_PER_GROUP);
  61. beat_read_htab_entries(0, hpte_group + 0, hpte_v);
  62. if (!(hpte_v[0] & HPTE_V_BOLTED))
  63. rmask |= 0x80;
  64. if (!(hpte_v[1] & HPTE_V_BOLTED))
  65. rmask |= 0x40;
  66. if (!(hpte_v[2] & HPTE_V_BOLTED))
  67. rmask |= 0x20;
  68. if (!(hpte_v[3] & HPTE_V_BOLTED))
  69. rmask |= 0x10;
  70. beat_read_htab_entries(0, hpte_group + 4, hpte_v);
  71. if (!(hpte_v[0] & HPTE_V_BOLTED))
  72. rmask |= 0x08;
  73. if (!(hpte_v[1] & HPTE_V_BOLTED))
  74. rmask |= 0x04;
  75. if (!(hpte_v[2] & HPTE_V_BOLTED))
  76. rmask |= 0x02;
  77. if (!(hpte_v[3] & HPTE_V_BOLTED))
  78. rmask |= 0x01;
  79. return rmask;
  80. }
  81. static long beat_lpar_hpte_insert(unsigned long hpte_group,
  82. unsigned long va, unsigned long pa,
  83. unsigned long rflags, unsigned long vflags,
  84. int psize, int ssize)
  85. {
  86. unsigned long lpar_rc;
  87. u64 hpte_v, hpte_r, slot;
  88. /* same as iseries */
  89. if (vflags & HPTE_V_SECONDARY)
  90. return -1;
  91. if (!(vflags & HPTE_V_BOLTED))
  92. DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
  93. "rflags=%lx, vflags=%lx, psize=%d)\n",
  94. hpte_group, va, pa, rflags, vflags, psize);
  95. hpte_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M) |
  96. vflags | HPTE_V_VALID;
  97. hpte_r = hpte_encode_r(pa, psize) | rflags;
  98. if (!(vflags & HPTE_V_BOLTED))
  99. DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
  100. if (rflags & _PAGE_NO_CACHE)
  101. hpte_r &= ~_PAGE_COHERENT;
  102. spin_lock(&beat_htab_lock);
  103. lpar_rc = beat_read_mask(hpte_group);
  104. if (lpar_rc == 0) {
  105. if (!(vflags & HPTE_V_BOLTED))
  106. DBG_LOW(" full\n");
  107. spin_unlock(&beat_htab_lock);
  108. return -1;
  109. }
  110. lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48,
  111. hpte_v, hpte_r, &slot);
  112. spin_unlock(&beat_htab_lock);
  113. /*
  114. * Since we try and ioremap PHBs we don't own, the pte insert
  115. * will fail. However we must catch the failure in hash_page
  116. * or we will loop forever, so return -2 in this case.
  117. */
  118. if (unlikely(lpar_rc != 0)) {
  119. if (!(vflags & HPTE_V_BOLTED))
  120. DBG_LOW(" lpar err %lx\n", lpar_rc);
  121. return -2;
  122. }
  123. if (!(vflags & HPTE_V_BOLTED))
  124. DBG_LOW(" -> slot: %lx\n", slot);
  125. /* We have to pass down the secondary bucket bit here as well */
  126. return (slot ^ hpte_group) & 15;
  127. }
  128. static long beat_lpar_hpte_remove(unsigned long hpte_group)
  129. {
  130. DBG_LOW("hpte_remove(group=%lx)\n", hpte_group);
  131. return -1;
  132. }
  133. static unsigned long beat_lpar_hpte_getword0(unsigned long slot)
  134. {
  135. unsigned long dword0;
  136. unsigned long lpar_rc;
  137. u64 dword[5];
  138. lpar_rc = beat_read_htab_entries(0, slot & ~3UL, dword);
  139. dword0 = dword[slot&3];
  140. BUG_ON(lpar_rc != 0);
  141. return dword0;
  142. }
  143. static void beat_lpar_hptab_clear(void)
  144. {
  145. unsigned long size_bytes = 1UL << ppc64_pft_size;
  146. unsigned long hpte_count = size_bytes >> 4;
  147. int i;
  148. u64 dummy0, dummy1;
  149. /* TODO: Use bulk call */
  150. for (i = 0; i < hpte_count; i++)
  151. beat_write_htab_entry(0, i, 0, 0, -1UL, -1UL, &dummy0, &dummy1);
  152. }
  153. /*
  154. * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
  155. * the low 3 bits of flags happen to line up. So no transform is needed.
  156. * We can probably optimize here and assume the high bits of newpp are
  157. * already zero. For now I am paranoid.
  158. */
  159. static long beat_lpar_hpte_updatepp(unsigned long slot,
  160. unsigned long newpp,
  161. unsigned long va,
  162. int psize, int ssize, int local)
  163. {
  164. unsigned long lpar_rc;
  165. u64 dummy0, dummy1;
  166. unsigned long want_v;
  167. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  168. DBG_LOW(" update: "
  169. "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
  170. want_v & HPTE_V_AVPN, slot, psize, newpp);
  171. spin_lock(&beat_htab_lock);
  172. dummy0 = beat_lpar_hpte_getword0(slot);
  173. if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) {
  174. DBG_LOW("not found !\n");
  175. spin_unlock(&beat_htab_lock);
  176. return -1;
  177. }
  178. lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0,
  179. &dummy1);
  180. spin_unlock(&beat_htab_lock);
  181. if (lpar_rc != 0 || dummy0 == 0) {
  182. DBG_LOW("not found !\n");
  183. return -1;
  184. }
  185. DBG_LOW("ok %lx %lx\n", dummy0, dummy1);
  186. BUG_ON(lpar_rc != 0);
  187. return 0;
  188. }
  189. static long beat_lpar_hpte_find(unsigned long va, int psize)
  190. {
  191. unsigned long hash;
  192. unsigned long i, j;
  193. long slot;
  194. unsigned long want_v, hpte_v;
  195. hash = hpt_hash(va, mmu_psize_defs[psize].shift, MMU_SEGSIZE_256M);
  196. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  197. for (j = 0; j < 2; j++) {
  198. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  199. for (i = 0; i < HPTES_PER_GROUP; i++) {
  200. hpte_v = beat_lpar_hpte_getword0(slot);
  201. if (HPTE_V_COMPARE(hpte_v, want_v)
  202. && (hpte_v & HPTE_V_VALID)
  203. && (!!(hpte_v & HPTE_V_SECONDARY) == j)) {
  204. /* HPTE matches */
  205. if (j)
  206. slot = -slot;
  207. return slot;
  208. }
  209. ++slot;
  210. }
  211. hash = ~hash;
  212. }
  213. return -1;
  214. }
  215. static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
  216. unsigned long ea,
  217. int psize, int ssize)
  218. {
  219. unsigned long lpar_rc, slot, vsid, va;
  220. u64 dummy0, dummy1;
  221. vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
  222. va = (vsid << 28) | (ea & 0x0fffffff);
  223. spin_lock(&beat_htab_lock);
  224. slot = beat_lpar_hpte_find(va, psize);
  225. BUG_ON(slot == -1);
  226. lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7,
  227. &dummy0, &dummy1);
  228. spin_unlock(&beat_htab_lock);
  229. BUG_ON(lpar_rc != 0);
  230. }
  231. static void beat_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
  232. int psize, int ssize, int local)
  233. {
  234. unsigned long want_v;
  235. unsigned long lpar_rc;
  236. u64 dummy1, dummy2;
  237. unsigned long flags;
  238. DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
  239. slot, va, psize, local);
  240. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  241. spin_lock_irqsave(&beat_htab_lock, flags);
  242. dummy1 = beat_lpar_hpte_getword0(slot);
  243. if ((dummy1 & ~0x7FUL) != (want_v & ~0x7FUL)) {
  244. DBG_LOW("not found !\n");
  245. spin_unlock_irqrestore(&beat_htab_lock, flags);
  246. return;
  247. }
  248. lpar_rc = beat_write_htab_entry(0, slot, 0, 0, HPTE_V_VALID, 0,
  249. &dummy1, &dummy2);
  250. spin_unlock_irqrestore(&beat_htab_lock, flags);
  251. BUG_ON(lpar_rc != 0);
  252. }
  253. void __init hpte_init_beat(void)
  254. {
  255. ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
  256. ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
  257. ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
  258. ppc_md.hpte_insert = beat_lpar_hpte_insert;
  259. ppc_md.hpte_remove = beat_lpar_hpte_remove;
  260. ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
  261. }
  262. static long beat_lpar_hpte_insert_v3(unsigned long hpte_group,
  263. unsigned long va, unsigned long pa,
  264. unsigned long rflags, unsigned long vflags,
  265. int psize, int ssize)
  266. {
  267. unsigned long lpar_rc;
  268. u64 hpte_v, hpte_r, slot;
  269. /* same as iseries */
  270. if (vflags & HPTE_V_SECONDARY)
  271. return -1;
  272. if (!(vflags & HPTE_V_BOLTED))
  273. DBG_LOW("hpte_insert(group=%lx, va=%016lx, pa=%016lx, "
  274. "rflags=%lx, vflags=%lx, psize=%d)\n",
  275. hpte_group, va, pa, rflags, vflags, psize);
  276. hpte_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M) |
  277. vflags | HPTE_V_VALID;
  278. hpte_r = hpte_encode_r(pa, psize) | rflags;
  279. if (!(vflags & HPTE_V_BOLTED))
  280. DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
  281. if (rflags & _PAGE_NO_CACHE)
  282. hpte_r &= ~_PAGE_COHERENT;
  283. /* insert into not-volted entry */
  284. lpar_rc = beat_insert_htab_entry3(0, hpte_group, hpte_v, hpte_r,
  285. HPTE_V_BOLTED, 0, &slot);
  286. /*
  287. * Since we try and ioremap PHBs we don't own, the pte insert
  288. * will fail. However we must catch the failure in hash_page
  289. * or we will loop forever, so return -2 in this case.
  290. */
  291. if (unlikely(lpar_rc != 0)) {
  292. if (!(vflags & HPTE_V_BOLTED))
  293. DBG_LOW(" lpar err %lx\n", lpar_rc);
  294. return -2;
  295. }
  296. if (!(vflags & HPTE_V_BOLTED))
  297. DBG_LOW(" -> slot: %lx\n", slot);
  298. /* We have to pass down the secondary bucket bit here as well */
  299. return (slot ^ hpte_group) & 15;
  300. }
  301. /*
  302. * NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
  303. * the low 3 bits of flags happen to line up. So no transform is needed.
  304. * We can probably optimize here and assume the high bits of newpp are
  305. * already zero. For now I am paranoid.
  306. */
  307. static long beat_lpar_hpte_updatepp_v3(unsigned long slot,
  308. unsigned long newpp,
  309. unsigned long va,
  310. int psize, int ssize, int local)
  311. {
  312. unsigned long lpar_rc;
  313. unsigned long want_v;
  314. unsigned long pss;
  315. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  316. pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
  317. DBG_LOW(" update: "
  318. "avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
  319. want_v & HPTE_V_AVPN, slot, psize, newpp);
  320. lpar_rc = beat_update_htab_permission3(0, slot, want_v, pss, 7, newpp);
  321. if (lpar_rc == 0xfffffff7) {
  322. DBG_LOW("not found !\n");
  323. return -1;
  324. }
  325. DBG_LOW("ok\n");
  326. BUG_ON(lpar_rc != 0);
  327. return 0;
  328. }
  329. static void beat_lpar_hpte_invalidate_v3(unsigned long slot, unsigned long va,
  330. int psize, int ssize, int local)
  331. {
  332. unsigned long want_v;
  333. unsigned long lpar_rc;
  334. unsigned long pss;
  335. DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d\n",
  336. slot, va, psize, local);
  337. want_v = hpte_encode_v(va, psize, MMU_SEGSIZE_256M);
  338. pss = (psize == MMU_PAGE_4K) ? -1UL : mmu_psize_defs[psize].penc;
  339. lpar_rc = beat_invalidate_htab_entry3(0, slot, want_v, pss);
  340. /* E_busy can be valid output: page may be already replaced */
  341. BUG_ON(lpar_rc != 0 && lpar_rc != 0xfffffff7);
  342. }
  343. static int64_t _beat_lpar_hptab_clear_v3(void)
  344. {
  345. return beat_clear_htab3(0);
  346. }
  347. static void beat_lpar_hptab_clear_v3(void)
  348. {
  349. _beat_lpar_hptab_clear_v3();
  350. }
  351. void __init hpte_init_beat_v3(void)
  352. {
  353. if (_beat_lpar_hptab_clear_v3() == 0) {
  354. ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate_v3;
  355. ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp_v3;
  356. ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
  357. ppc_md.hpte_insert = beat_lpar_hpte_insert_v3;
  358. ppc_md.hpte_remove = beat_lpar_hpte_remove;
  359. ppc_md.hpte_clear_all = beat_lpar_hptab_clear_v3;
  360. } else {
  361. ppc_md.hpte_invalidate = beat_lpar_hpte_invalidate;
  362. ppc_md.hpte_updatepp = beat_lpar_hpte_updatepp;
  363. ppc_md.hpte_updateboltedpp = beat_lpar_hpte_updateboltedpp;
  364. ppc_md.hpte_insert = beat_lpar_hpte_insert;
  365. ppc_md.hpte_remove = beat_lpar_hpte_remove;
  366. ppc_md.hpte_clear_all = beat_lpar_hptab_clear;
  367. }
  368. }