smp.c 3.0 KB

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  1. /*
  2. * Author: Andy Fleming <afleming@freescale.com>
  3. * Kumar Gala <galak@kernel.crashing.org>
  4. *
  5. * Copyright 2006-2008 Freescale Semiconductor Inc.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. */
  12. #include <linux/stddef.h>
  13. #include <linux/kernel.h>
  14. #include <linux/init.h>
  15. #include <linux/delay.h>
  16. #include <linux/of.h>
  17. #include <asm/machdep.h>
  18. #include <asm/pgtable.h>
  19. #include <asm/page.h>
  20. #include <asm/mpic.h>
  21. #include <asm/cacheflush.h>
  22. #include <asm/dbell.h>
  23. #include <sysdev/fsl_soc.h>
  24. extern volatile unsigned long __secondary_hold_acknowledge;
  25. extern void __early_start(void);
  26. #define BOOT_ENTRY_ADDR_UPPER 0
  27. #define BOOT_ENTRY_ADDR_LOWER 1
  28. #define BOOT_ENTRY_R3_UPPER 2
  29. #define BOOT_ENTRY_R3_LOWER 3
  30. #define BOOT_ENTRY_RESV 4
  31. #define BOOT_ENTRY_PIR 5
  32. #define BOOT_ENTRY_R6_UPPER 6
  33. #define BOOT_ENTRY_R6_LOWER 7
  34. #define NUM_BOOT_ENTRY 8
  35. #define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32))
  36. static void __init
  37. smp_85xx_kick_cpu(int nr)
  38. {
  39. unsigned long flags;
  40. const u64 *cpu_rel_addr;
  41. __iomem u32 *bptr_vaddr;
  42. struct device_node *np;
  43. int n = 0;
  44. WARN_ON (nr < 0 || nr >= NR_CPUS);
  45. pr_debug("smp_85xx_kick_cpu: kick CPU #%d\n", nr);
  46. local_irq_save(flags);
  47. np = of_get_cpu_node(nr, NULL);
  48. cpu_rel_addr = of_get_property(np, "cpu-release-addr", NULL);
  49. if (cpu_rel_addr == NULL) {
  50. printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr);
  51. local_irq_restore(flags);
  52. return;
  53. }
  54. /* Map the spin table */
  55. bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
  56. out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
  57. out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
  58. /* Wait a bit for the CPU to ack. */
  59. while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
  60. mdelay(1);
  61. iounmap(bptr_vaddr);
  62. local_irq_restore(flags);
  63. pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
  64. }
  65. static void __init
  66. smp_85xx_basic_setup(int cpu_nr)
  67. {
  68. /* Clear any pending timer interrupts */
  69. mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
  70. /* Enable decrementer interrupt */
  71. mtspr(SPRN_TCR, TCR_DIE);
  72. }
  73. static void __init
  74. smp_85xx_setup_cpu(int cpu_nr)
  75. {
  76. mpic_setup_this_cpu();
  77. smp_85xx_basic_setup(cpu_nr);
  78. }
  79. struct smp_ops_t smp_85xx_ops = {
  80. .kick_cpu = smp_85xx_kick_cpu,
  81. };
  82. static int __init smp_dummy_probe(void)
  83. {
  84. return NR_CPUS;
  85. }
  86. void __init mpc85xx_smp_init(void)
  87. {
  88. struct device_node *np;
  89. smp_85xx_ops.message_pass = NULL;
  90. np = of_find_node_by_type(NULL, "open-pic");
  91. if (np) {
  92. smp_85xx_ops.probe = smp_mpic_probe;
  93. smp_85xx_ops.setup_cpu = smp_85xx_setup_cpu;
  94. smp_85xx_ops.message_pass = smp_mpic_message_pass;
  95. } else {
  96. smp_85xx_ops.probe = smp_dummy_probe;
  97. smp_85xx_ops.setup_cpu = smp_85xx_basic_setup;
  98. }
  99. if (cpu_has_feature(CPU_FTR_DBELL))
  100. smp_85xx_ops.message_pass = smp_dbell_message_pass;
  101. BUG_ON(!smp_85xx_ops.message_pass);
  102. smp_ops = &smp_85xx_ops;
  103. }