mpc85xx_ds.c 5.9 KB

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  1. /*
  2. * MPC85xx DS Board Setup
  3. *
  4. * Author Xianghua Xiao (x.xiao@freescale.com)
  5. * Roy Zang <tie-fei.zang@freescale.com>
  6. * - Add PCI/PCI Exprees support
  7. * Copyright 2007 Freescale Semiconductor Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/pci.h>
  17. #include <linux/kdev_t.h>
  18. #include <linux/delay.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/of_platform.h>
  22. #include <asm/system.h>
  23. #include <asm/time.h>
  24. #include <asm/machdep.h>
  25. #include <asm/pci-bridge.h>
  26. #include <mm/mmu_decl.h>
  27. #include <asm/prom.h>
  28. #include <asm/udbg.h>
  29. #include <asm/mpic.h>
  30. #include <asm/i8259.h>
  31. #include <sysdev/fsl_soc.h>
  32. #include <sysdev/fsl_pci.h>
  33. #undef DEBUG
  34. #ifdef DEBUG
  35. #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
  36. #else
  37. #define DBG(fmt, args...)
  38. #endif
  39. #ifdef CONFIG_PPC_I8259
  40. static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
  41. {
  42. unsigned int cascade_irq = i8259_irq();
  43. if (cascade_irq != NO_IRQ) {
  44. generic_handle_irq(cascade_irq);
  45. }
  46. desc->chip->eoi(irq);
  47. }
  48. #endif /* CONFIG_PPC_I8259 */
  49. void __init mpc85xx_ds_pic_init(void)
  50. {
  51. struct mpic *mpic;
  52. struct resource r;
  53. struct device_node *np;
  54. #ifdef CONFIG_PPC_I8259
  55. struct device_node *cascade_node = NULL;
  56. int cascade_irq;
  57. #endif
  58. unsigned long root = of_get_flat_dt_root();
  59. np = of_find_node_by_type(NULL, "open-pic");
  60. if (np == NULL) {
  61. printk(KERN_ERR "Could not find open-pic node\n");
  62. return;
  63. }
  64. if (of_address_to_resource(np, 0, &r)) {
  65. printk(KERN_ERR "Failed to map mpic register space\n");
  66. of_node_put(np);
  67. return;
  68. }
  69. if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
  70. mpic = mpic_alloc(np, r.start,
  71. MPIC_PRIMARY |
  72. MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
  73. 0, 256, " OpenPIC ");
  74. } else {
  75. mpic = mpic_alloc(np, r.start,
  76. MPIC_PRIMARY | MPIC_WANTS_RESET |
  77. MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS |
  78. MPIC_SINGLE_DEST_CPU,
  79. 0, 256, " OpenPIC ");
  80. }
  81. BUG_ON(mpic == NULL);
  82. of_node_put(np);
  83. mpic_init(mpic);
  84. #ifdef CONFIG_PPC_I8259
  85. /* Initialize the i8259 controller */
  86. for_each_node_by_type(np, "interrupt-controller")
  87. if (of_device_is_compatible(np, "chrp,iic")) {
  88. cascade_node = np;
  89. break;
  90. }
  91. if (cascade_node == NULL) {
  92. printk(KERN_DEBUG "Could not find i8259 PIC\n");
  93. return;
  94. }
  95. cascade_irq = irq_of_parse_and_map(cascade_node, 0);
  96. if (cascade_irq == NO_IRQ) {
  97. printk(KERN_ERR "Failed to map cascade interrupt\n");
  98. return;
  99. }
  100. DBG("mpc85xxds: cascade mapped to irq %d\n", cascade_irq);
  101. i8259_init(cascade_node, 0);
  102. of_node_put(cascade_node);
  103. set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
  104. #endif /* CONFIG_PPC_I8259 */
  105. }
  106. #ifdef CONFIG_PCI
  107. static int primary_phb_addr;
  108. extern int uli_exclude_device(struct pci_controller *hose,
  109. u_char bus, u_char devfn);
  110. static int mpc85xx_exclude_device(struct pci_controller *hose,
  111. u_char bus, u_char devfn)
  112. {
  113. struct device_node* node;
  114. struct resource rsrc;
  115. node = hose->dn;
  116. of_address_to_resource(node, 0, &rsrc);
  117. if ((rsrc.start & 0xfffff) == primary_phb_addr) {
  118. return uli_exclude_device(hose, bus, devfn);
  119. }
  120. return PCIBIOS_SUCCESSFUL;
  121. }
  122. #endif /* CONFIG_PCI */
  123. /*
  124. * Setup the architecture
  125. */
  126. #ifdef CONFIG_SMP
  127. extern void __init mpc85xx_smp_init(void);
  128. #endif
  129. static void __init mpc85xx_ds_setup_arch(void)
  130. {
  131. #ifdef CONFIG_PCI
  132. struct device_node *np;
  133. #endif
  134. if (ppc_md.progress)
  135. ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
  136. #ifdef CONFIG_PCI
  137. for_each_node_by_type(np, "pci") {
  138. if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
  139. of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
  140. struct resource rsrc;
  141. of_address_to_resource(np, 0, &rsrc);
  142. if ((rsrc.start & 0xfffff) == primary_phb_addr)
  143. fsl_add_bridge(np, 1);
  144. else
  145. fsl_add_bridge(np, 0);
  146. }
  147. }
  148. ppc_md.pci_exclude_device = mpc85xx_exclude_device;
  149. #endif
  150. #ifdef CONFIG_SMP
  151. mpc85xx_smp_init();
  152. #endif
  153. printk("MPC85xx DS board from Freescale Semiconductor\n");
  154. }
  155. /*
  156. * Called very early, device-tree isn't unflattened
  157. */
  158. static int __init mpc8544_ds_probe(void)
  159. {
  160. unsigned long root = of_get_flat_dt_root();
  161. if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
  162. #ifdef CONFIG_PCI
  163. primary_phb_addr = 0xb000;
  164. #endif
  165. return 1;
  166. } else {
  167. return 0;
  168. }
  169. }
  170. static struct of_device_id __initdata mpc85xxds_ids[] = {
  171. { .type = "soc", },
  172. { .compatible = "soc", },
  173. { .compatible = "simple-bus", },
  174. { .compatible = "gianfar", },
  175. {},
  176. };
  177. static int __init mpc85xxds_publish_devices(void)
  178. {
  179. return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
  180. }
  181. machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
  182. machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
  183. /*
  184. * Called very early, device-tree isn't unflattened
  185. */
  186. static int __init mpc8572_ds_probe(void)
  187. {
  188. unsigned long root = of_get_flat_dt_root();
  189. if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
  190. #ifdef CONFIG_PCI
  191. primary_phb_addr = 0x8000;
  192. #endif
  193. return 1;
  194. } else {
  195. return 0;
  196. }
  197. }
  198. define_machine(mpc8544_ds) {
  199. .name = "MPC8544 DS",
  200. .probe = mpc8544_ds_probe,
  201. .setup_arch = mpc85xx_ds_setup_arch,
  202. .init_IRQ = mpc85xx_ds_pic_init,
  203. #ifdef CONFIG_PCI
  204. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  205. #endif
  206. .get_irq = mpic_get_irq,
  207. .restart = fsl_rstcr_restart,
  208. .calibrate_decr = generic_calibrate_decr,
  209. .progress = udbg_progress,
  210. };
  211. define_machine(mpc8572_ds) {
  212. .name = "MPC8572 DS",
  213. .probe = mpc8572_ds_probe,
  214. .setup_arch = mpc85xx_ds_setup_arch,
  215. .init_IRQ = mpc85xx_ds_pic_init,
  216. #ifdef CONFIG_PCI
  217. .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
  218. #endif
  219. .get_irq = mpic_get_irq,
  220. .restart = fsl_rstcr_restart,
  221. .calibrate_decr = generic_calibrate_decr,
  222. .progress = udbg_progress,
  223. };