hugetlbpage.c 20 KB

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  1. /*
  2. * PPC64 (POWER4) Huge TLB Page Support for Kernel.
  3. *
  4. * Copyright (C) 2003 David Gibson, IBM Corporation.
  5. *
  6. * Based on the IA-32 version:
  7. * Copyright (C) 2002, Rohit Seth <rohit.seth@intel.com>
  8. */
  9. #include <linux/init.h>
  10. #include <linux/fs.h>
  11. #include <linux/mm.h>
  12. #include <linux/hugetlb.h>
  13. #include <linux/pagemap.h>
  14. #include <linux/slab.h>
  15. #include <linux/err.h>
  16. #include <linux/sysctl.h>
  17. #include <asm/mman.h>
  18. #include <asm/pgalloc.h>
  19. #include <asm/tlb.h>
  20. #include <asm/tlbflush.h>
  21. #include <asm/mmu_context.h>
  22. #include <asm/machdep.h>
  23. #include <asm/cputable.h>
  24. #include <asm/spu.h>
  25. #define PAGE_SHIFT_64K 16
  26. #define PAGE_SHIFT_16M 24
  27. #define PAGE_SHIFT_16G 34
  28. #define NUM_LOW_AREAS (0x100000000UL >> SID_SHIFT)
  29. #define NUM_HIGH_AREAS (PGTABLE_RANGE >> HTLB_AREA_SHIFT)
  30. #define MAX_NUMBER_GPAGES 1024
  31. /* Tracks the 16G pages after the device tree is scanned and before the
  32. * huge_boot_pages list is ready. */
  33. static unsigned long gpage_freearray[MAX_NUMBER_GPAGES];
  34. static unsigned nr_gpages;
  35. /* Array of valid huge page sizes - non-zero value(hugepte_shift) is
  36. * stored for the huge page sizes that are valid.
  37. */
  38. unsigned int mmu_huge_psizes[MMU_PAGE_COUNT] = { }; /* initialize all to 0 */
  39. #define hugepte_shift mmu_huge_psizes
  40. #define PTRS_PER_HUGEPTE(psize) (1 << hugepte_shift[psize])
  41. #define HUGEPTE_TABLE_SIZE(psize) (sizeof(pte_t) << hugepte_shift[psize])
  42. #define HUGEPD_SHIFT(psize) (mmu_psize_to_shift(psize) \
  43. + hugepte_shift[psize])
  44. #define HUGEPD_SIZE(psize) (1UL << HUGEPD_SHIFT(psize))
  45. #define HUGEPD_MASK(psize) (~(HUGEPD_SIZE(psize)-1))
  46. /* Subtract one from array size because we don't need a cache for 4K since
  47. * is not a huge page size */
  48. #define HUGE_PGTABLE_INDEX(psize) (HUGEPTE_CACHE_NUM + psize - 1)
  49. #define HUGEPTE_CACHE_NAME(psize) (huge_pgtable_cache_name[psize])
  50. static const char *huge_pgtable_cache_name[MMU_PAGE_COUNT] = {
  51. "unused_4K", "hugepte_cache_64K", "unused_64K_AP",
  52. "hugepte_cache_1M", "hugepte_cache_16M", "hugepte_cache_16G"
  53. };
  54. /* Flag to mark huge PD pointers. This means pmd_bad() and pud_bad()
  55. * will choke on pointers to hugepte tables, which is handy for
  56. * catching screwups early. */
  57. #define HUGEPD_OK 0x1
  58. typedef struct { unsigned long pd; } hugepd_t;
  59. #define hugepd_none(hpd) ((hpd).pd == 0)
  60. static inline int shift_to_mmu_psize(unsigned int shift)
  61. {
  62. switch (shift) {
  63. #ifndef CONFIG_PPC_64K_PAGES
  64. case PAGE_SHIFT_64K:
  65. return MMU_PAGE_64K;
  66. #endif
  67. case PAGE_SHIFT_16M:
  68. return MMU_PAGE_16M;
  69. case PAGE_SHIFT_16G:
  70. return MMU_PAGE_16G;
  71. }
  72. return -1;
  73. }
  74. static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
  75. {
  76. if (mmu_psize_defs[mmu_psize].shift)
  77. return mmu_psize_defs[mmu_psize].shift;
  78. BUG();
  79. }
  80. static inline pte_t *hugepd_page(hugepd_t hpd)
  81. {
  82. BUG_ON(!(hpd.pd & HUGEPD_OK));
  83. return (pte_t *)(hpd.pd & ~HUGEPD_OK);
  84. }
  85. static inline pte_t *hugepte_offset(hugepd_t *hpdp, unsigned long addr,
  86. struct hstate *hstate)
  87. {
  88. unsigned int shift = huge_page_shift(hstate);
  89. int psize = shift_to_mmu_psize(shift);
  90. unsigned long idx = ((addr >> shift) & (PTRS_PER_HUGEPTE(psize)-1));
  91. pte_t *dir = hugepd_page(*hpdp);
  92. return dir + idx;
  93. }
  94. static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
  95. unsigned long address, unsigned int psize)
  96. {
  97. pte_t *new = kmem_cache_zalloc(pgtable_cache[HUGE_PGTABLE_INDEX(psize)],
  98. GFP_KERNEL|__GFP_REPEAT);
  99. if (! new)
  100. return -ENOMEM;
  101. spin_lock(&mm->page_table_lock);
  102. if (!hugepd_none(*hpdp))
  103. kmem_cache_free(pgtable_cache[HUGE_PGTABLE_INDEX(psize)], new);
  104. else
  105. hpdp->pd = (unsigned long)new | HUGEPD_OK;
  106. spin_unlock(&mm->page_table_lock);
  107. return 0;
  108. }
  109. static pud_t *hpud_offset(pgd_t *pgd, unsigned long addr, struct hstate *hstate)
  110. {
  111. if (huge_page_shift(hstate) < PUD_SHIFT)
  112. return pud_offset(pgd, addr);
  113. else
  114. return (pud_t *) pgd;
  115. }
  116. static pud_t *hpud_alloc(struct mm_struct *mm, pgd_t *pgd, unsigned long addr,
  117. struct hstate *hstate)
  118. {
  119. if (huge_page_shift(hstate) < PUD_SHIFT)
  120. return pud_alloc(mm, pgd, addr);
  121. else
  122. return (pud_t *) pgd;
  123. }
  124. static pmd_t *hpmd_offset(pud_t *pud, unsigned long addr, struct hstate *hstate)
  125. {
  126. if (huge_page_shift(hstate) < PMD_SHIFT)
  127. return pmd_offset(pud, addr);
  128. else
  129. return (pmd_t *) pud;
  130. }
  131. static pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr,
  132. struct hstate *hstate)
  133. {
  134. if (huge_page_shift(hstate) < PMD_SHIFT)
  135. return pmd_alloc(mm, pud, addr);
  136. else
  137. return (pmd_t *) pud;
  138. }
  139. /* Build list of addresses of gigantic pages. This function is used in early
  140. * boot before the buddy or bootmem allocator is setup.
  141. */
  142. void add_gpage(unsigned long addr, unsigned long page_size,
  143. unsigned long number_of_pages)
  144. {
  145. if (!addr)
  146. return;
  147. while (number_of_pages > 0) {
  148. gpage_freearray[nr_gpages] = addr;
  149. nr_gpages++;
  150. number_of_pages--;
  151. addr += page_size;
  152. }
  153. }
  154. /* Moves the gigantic page addresses from the temporary list to the
  155. * huge_boot_pages list.
  156. */
  157. int alloc_bootmem_huge_page(struct hstate *hstate)
  158. {
  159. struct huge_bootmem_page *m;
  160. if (nr_gpages == 0)
  161. return 0;
  162. m = phys_to_virt(gpage_freearray[--nr_gpages]);
  163. gpage_freearray[nr_gpages] = 0;
  164. list_add(&m->list, &huge_boot_pages);
  165. m->hstate = hstate;
  166. return 1;
  167. }
  168. /* Modelled after find_linux_pte() */
  169. pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
  170. {
  171. pgd_t *pg;
  172. pud_t *pu;
  173. pmd_t *pm;
  174. unsigned int psize;
  175. unsigned int shift;
  176. unsigned long sz;
  177. struct hstate *hstate;
  178. psize = get_slice_psize(mm, addr);
  179. shift = mmu_psize_to_shift(psize);
  180. sz = ((1UL) << shift);
  181. hstate = size_to_hstate(sz);
  182. addr &= hstate->mask;
  183. pg = pgd_offset(mm, addr);
  184. if (!pgd_none(*pg)) {
  185. pu = hpud_offset(pg, addr, hstate);
  186. if (!pud_none(*pu)) {
  187. pm = hpmd_offset(pu, addr, hstate);
  188. if (!pmd_none(*pm))
  189. return hugepte_offset((hugepd_t *)pm, addr,
  190. hstate);
  191. }
  192. }
  193. return NULL;
  194. }
  195. pte_t *huge_pte_alloc(struct mm_struct *mm,
  196. unsigned long addr, unsigned long sz)
  197. {
  198. pgd_t *pg;
  199. pud_t *pu;
  200. pmd_t *pm;
  201. hugepd_t *hpdp = NULL;
  202. struct hstate *hstate;
  203. unsigned int psize;
  204. hstate = size_to_hstate(sz);
  205. psize = get_slice_psize(mm, addr);
  206. BUG_ON(!mmu_huge_psizes[psize]);
  207. addr &= hstate->mask;
  208. pg = pgd_offset(mm, addr);
  209. pu = hpud_alloc(mm, pg, addr, hstate);
  210. if (pu) {
  211. pm = hpmd_alloc(mm, pu, addr, hstate);
  212. if (pm)
  213. hpdp = (hugepd_t *)pm;
  214. }
  215. if (! hpdp)
  216. return NULL;
  217. if (hugepd_none(*hpdp) && __hugepte_alloc(mm, hpdp, addr, psize))
  218. return NULL;
  219. return hugepte_offset(hpdp, addr, hstate);
  220. }
  221. int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
  222. {
  223. return 0;
  224. }
  225. static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp,
  226. unsigned int psize)
  227. {
  228. pte_t *hugepte = hugepd_page(*hpdp);
  229. hpdp->pd = 0;
  230. tlb->need_flush = 1;
  231. pgtable_free_tlb(tlb, pgtable_free_cache(hugepte,
  232. HUGEPTE_CACHE_NUM+psize-1,
  233. PGF_CACHENUM_MASK));
  234. }
  235. static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
  236. unsigned long addr, unsigned long end,
  237. unsigned long floor, unsigned long ceiling,
  238. unsigned int psize)
  239. {
  240. pmd_t *pmd;
  241. unsigned long next;
  242. unsigned long start;
  243. start = addr;
  244. pmd = pmd_offset(pud, addr);
  245. do {
  246. next = pmd_addr_end(addr, end);
  247. if (pmd_none(*pmd))
  248. continue;
  249. free_hugepte_range(tlb, (hugepd_t *)pmd, psize);
  250. } while (pmd++, addr = next, addr != end);
  251. start &= PUD_MASK;
  252. if (start < floor)
  253. return;
  254. if (ceiling) {
  255. ceiling &= PUD_MASK;
  256. if (!ceiling)
  257. return;
  258. }
  259. if (end - 1 > ceiling - 1)
  260. return;
  261. pmd = pmd_offset(pud, start);
  262. pud_clear(pud);
  263. pmd_free_tlb(tlb, pmd);
  264. }
  265. static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
  266. unsigned long addr, unsigned long end,
  267. unsigned long floor, unsigned long ceiling)
  268. {
  269. pud_t *pud;
  270. unsigned long next;
  271. unsigned long start;
  272. unsigned int shift;
  273. unsigned int psize = get_slice_psize(tlb->mm, addr);
  274. shift = mmu_psize_to_shift(psize);
  275. start = addr;
  276. pud = pud_offset(pgd, addr);
  277. do {
  278. next = pud_addr_end(addr, end);
  279. if (shift < PMD_SHIFT) {
  280. if (pud_none_or_clear_bad(pud))
  281. continue;
  282. hugetlb_free_pmd_range(tlb, pud, addr, next, floor,
  283. ceiling, psize);
  284. } else {
  285. if (pud_none(*pud))
  286. continue;
  287. free_hugepte_range(tlb, (hugepd_t *)pud, psize);
  288. }
  289. } while (pud++, addr = next, addr != end);
  290. start &= PGDIR_MASK;
  291. if (start < floor)
  292. return;
  293. if (ceiling) {
  294. ceiling &= PGDIR_MASK;
  295. if (!ceiling)
  296. return;
  297. }
  298. if (end - 1 > ceiling - 1)
  299. return;
  300. pud = pud_offset(pgd, start);
  301. pgd_clear(pgd);
  302. pud_free_tlb(tlb, pud);
  303. }
  304. /*
  305. * This function frees user-level page tables of a process.
  306. *
  307. * Must be called with pagetable lock held.
  308. */
  309. void hugetlb_free_pgd_range(struct mmu_gather *tlb,
  310. unsigned long addr, unsigned long end,
  311. unsigned long floor, unsigned long ceiling)
  312. {
  313. pgd_t *pgd;
  314. unsigned long next;
  315. unsigned long start;
  316. /*
  317. * Comments below take from the normal free_pgd_range(). They
  318. * apply here too. The tests against HUGEPD_MASK below are
  319. * essential, because we *don't* test for this at the bottom
  320. * level. Without them we'll attempt to free a hugepte table
  321. * when we unmap just part of it, even if there are other
  322. * active mappings using it.
  323. *
  324. * The next few lines have given us lots of grief...
  325. *
  326. * Why are we testing HUGEPD* at this top level? Because
  327. * often there will be no work to do at all, and we'd prefer
  328. * not to go all the way down to the bottom just to discover
  329. * that.
  330. *
  331. * Why all these "- 1"s? Because 0 represents both the bottom
  332. * of the address space and the top of it (using -1 for the
  333. * top wouldn't help much: the masks would do the wrong thing).
  334. * The rule is that addr 0 and floor 0 refer to the bottom of
  335. * the address space, but end 0 and ceiling 0 refer to the top
  336. * Comparisons need to use "end - 1" and "ceiling - 1" (though
  337. * that end 0 case should be mythical).
  338. *
  339. * Wherever addr is brought up or ceiling brought down, we
  340. * must be careful to reject "the opposite 0" before it
  341. * confuses the subsequent tests. But what about where end is
  342. * brought down by HUGEPD_SIZE below? no, end can't go down to
  343. * 0 there.
  344. *
  345. * Whereas we round start (addr) and ceiling down, by different
  346. * masks at different levels, in order to test whether a table
  347. * now has no other vmas using it, so can be freed, we don't
  348. * bother to round floor or end up - the tests don't need that.
  349. */
  350. unsigned int psize = get_slice_psize(tlb->mm, addr);
  351. addr &= HUGEPD_MASK(psize);
  352. if (addr < floor) {
  353. addr += HUGEPD_SIZE(psize);
  354. if (!addr)
  355. return;
  356. }
  357. if (ceiling) {
  358. ceiling &= HUGEPD_MASK(psize);
  359. if (!ceiling)
  360. return;
  361. }
  362. if (end - 1 > ceiling - 1)
  363. end -= HUGEPD_SIZE(psize);
  364. if (addr > end - 1)
  365. return;
  366. start = addr;
  367. pgd = pgd_offset(tlb->mm, addr);
  368. do {
  369. psize = get_slice_psize(tlb->mm, addr);
  370. BUG_ON(!mmu_huge_psizes[psize]);
  371. next = pgd_addr_end(addr, end);
  372. if (mmu_psize_to_shift(psize) < PUD_SHIFT) {
  373. if (pgd_none_or_clear_bad(pgd))
  374. continue;
  375. hugetlb_free_pud_range(tlb, pgd, addr, next, floor, ceiling);
  376. } else {
  377. if (pgd_none(*pgd))
  378. continue;
  379. free_hugepte_range(tlb, (hugepd_t *)pgd, psize);
  380. }
  381. } while (pgd++, addr = next, addr != end);
  382. }
  383. void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
  384. pte_t *ptep, pte_t pte)
  385. {
  386. if (pte_present(*ptep)) {
  387. /* We open-code pte_clear because we need to pass the right
  388. * argument to hpte_need_flush (huge / !huge). Might not be
  389. * necessary anymore if we make hpte_need_flush() get the
  390. * page size from the slices
  391. */
  392. unsigned int psize = get_slice_psize(mm, addr);
  393. unsigned int shift = mmu_psize_to_shift(psize);
  394. unsigned long sz = ((1UL) << shift);
  395. struct hstate *hstate = size_to_hstate(sz);
  396. pte_update(mm, addr & hstate->mask, ptep, ~0UL, 1);
  397. }
  398. *ptep = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS);
  399. }
  400. pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
  401. pte_t *ptep)
  402. {
  403. unsigned long old = pte_update(mm, addr, ptep, ~0UL, 1);
  404. return __pte(old);
  405. }
  406. struct page *
  407. follow_huge_addr(struct mm_struct *mm, unsigned long address, int write)
  408. {
  409. pte_t *ptep;
  410. struct page *page;
  411. unsigned int mmu_psize = get_slice_psize(mm, address);
  412. /* Verify it is a huge page else bail. */
  413. if (!mmu_huge_psizes[mmu_psize])
  414. return ERR_PTR(-EINVAL);
  415. ptep = huge_pte_offset(mm, address);
  416. page = pte_page(*ptep);
  417. if (page) {
  418. unsigned int shift = mmu_psize_to_shift(mmu_psize);
  419. unsigned long sz = ((1UL) << shift);
  420. page += (address % sz) / PAGE_SIZE;
  421. }
  422. return page;
  423. }
  424. int pmd_huge(pmd_t pmd)
  425. {
  426. return 0;
  427. }
  428. int pud_huge(pud_t pud)
  429. {
  430. return 0;
  431. }
  432. struct page *
  433. follow_huge_pmd(struct mm_struct *mm, unsigned long address,
  434. pmd_t *pmd, int write)
  435. {
  436. BUG();
  437. return NULL;
  438. }
  439. unsigned long hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
  440. unsigned long len, unsigned long pgoff,
  441. unsigned long flags)
  442. {
  443. struct hstate *hstate = hstate_file(file);
  444. int mmu_psize = shift_to_mmu_psize(huge_page_shift(hstate));
  445. if (!mmu_huge_psizes[mmu_psize])
  446. return -EINVAL;
  447. return slice_get_unmapped_area(addr, len, flags, mmu_psize, 1, 0);
  448. }
  449. unsigned long vma_mmu_pagesize(struct vm_area_struct *vma)
  450. {
  451. unsigned int psize = get_slice_psize(vma->vm_mm, vma->vm_start);
  452. return 1UL << mmu_psize_to_shift(psize);
  453. }
  454. /*
  455. * Called by asm hashtable.S for doing lazy icache flush
  456. */
  457. static unsigned int hash_huge_page_do_lazy_icache(unsigned long rflags,
  458. pte_t pte, int trap, unsigned long sz)
  459. {
  460. struct page *page;
  461. int i;
  462. if (!pfn_valid(pte_pfn(pte)))
  463. return rflags;
  464. page = pte_page(pte);
  465. /* page is dirty */
  466. if (!test_bit(PG_arch_1, &page->flags) && !PageReserved(page)) {
  467. if (trap == 0x400) {
  468. for (i = 0; i < (sz / PAGE_SIZE); i++)
  469. __flush_dcache_icache(page_address(page+i));
  470. set_bit(PG_arch_1, &page->flags);
  471. } else {
  472. rflags |= HPTE_R_N;
  473. }
  474. }
  475. return rflags;
  476. }
  477. int hash_huge_page(struct mm_struct *mm, unsigned long access,
  478. unsigned long ea, unsigned long vsid, int local,
  479. unsigned long trap)
  480. {
  481. pte_t *ptep;
  482. unsigned long old_pte, new_pte;
  483. unsigned long va, rflags, pa, sz;
  484. long slot;
  485. int err = 1;
  486. int ssize = user_segment_size(ea);
  487. unsigned int mmu_psize;
  488. int shift;
  489. mmu_psize = get_slice_psize(mm, ea);
  490. if (!mmu_huge_psizes[mmu_psize])
  491. goto out;
  492. ptep = huge_pte_offset(mm, ea);
  493. /* Search the Linux page table for a match with va */
  494. va = hpt_va(ea, vsid, ssize);
  495. /*
  496. * If no pte found or not present, send the problem up to
  497. * do_page_fault
  498. */
  499. if (unlikely(!ptep || pte_none(*ptep)))
  500. goto out;
  501. /*
  502. * Check the user's access rights to the page. If access should be
  503. * prevented then send the problem up to do_page_fault.
  504. */
  505. if (unlikely(access & ~pte_val(*ptep)))
  506. goto out;
  507. /*
  508. * At this point, we have a pte (old_pte) which can be used to build
  509. * or update an HPTE. There are 2 cases:
  510. *
  511. * 1. There is a valid (present) pte with no associated HPTE (this is
  512. * the most common case)
  513. * 2. There is a valid (present) pte with an associated HPTE. The
  514. * current values of the pp bits in the HPTE prevent access
  515. * because we are doing software DIRTY bit management and the
  516. * page is currently not DIRTY.
  517. */
  518. do {
  519. old_pte = pte_val(*ptep);
  520. if (old_pte & _PAGE_BUSY)
  521. goto out;
  522. new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
  523. } while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
  524. old_pte, new_pte));
  525. rflags = 0x2 | (!(new_pte & _PAGE_RW));
  526. /* _PAGE_EXEC -> HW_NO_EXEC since it's inverted */
  527. rflags |= ((new_pte & _PAGE_EXEC) ? 0 : HPTE_R_N);
  528. shift = mmu_psize_to_shift(mmu_psize);
  529. sz = ((1UL) << shift);
  530. if (!cpu_has_feature(CPU_FTR_COHERENT_ICACHE))
  531. /* No CPU has hugepages but lacks no execute, so we
  532. * don't need to worry about that case */
  533. rflags = hash_huge_page_do_lazy_icache(rflags, __pte(old_pte),
  534. trap, sz);
  535. /* Check if pte already has an hpte (case 2) */
  536. if (unlikely(old_pte & _PAGE_HASHPTE)) {
  537. /* There MIGHT be an HPTE for this pte */
  538. unsigned long hash, slot;
  539. hash = hpt_hash(va, shift, ssize);
  540. if (old_pte & _PAGE_F_SECOND)
  541. hash = ~hash;
  542. slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
  543. slot += (old_pte & _PAGE_F_GIX) >> 12;
  544. if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_psize,
  545. ssize, local) == -1)
  546. old_pte &= ~_PAGE_HPTEFLAGS;
  547. }
  548. if (likely(!(old_pte & _PAGE_HASHPTE))) {
  549. unsigned long hash = hpt_hash(va, shift, ssize);
  550. unsigned long hpte_group;
  551. pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
  552. repeat:
  553. hpte_group = ((hash & htab_hash_mask) *
  554. HPTES_PER_GROUP) & ~0x7UL;
  555. /* clear HPTE slot informations in new PTE */
  556. #ifdef CONFIG_PPC_64K_PAGES
  557. new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
  558. #else
  559. new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
  560. #endif
  561. /* Add in WIMG bits */
  562. rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
  563. _PAGE_COHERENT | _PAGE_GUARDED));
  564. /* Insert into the hash table, primary slot */
  565. slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
  566. mmu_psize, ssize);
  567. /* Primary is full, try the secondary */
  568. if (unlikely(slot == -1)) {
  569. hpte_group = ((~hash & htab_hash_mask) *
  570. HPTES_PER_GROUP) & ~0x7UL;
  571. slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags,
  572. HPTE_V_SECONDARY,
  573. mmu_psize, ssize);
  574. if (slot == -1) {
  575. if (mftb() & 0x1)
  576. hpte_group = ((hash & htab_hash_mask) *
  577. HPTES_PER_GROUP)&~0x7UL;
  578. ppc_md.hpte_remove(hpte_group);
  579. goto repeat;
  580. }
  581. }
  582. if (unlikely(slot == -2))
  583. panic("hash_huge_page: pte_insert failed\n");
  584. new_pte |= (slot << 12) & (_PAGE_F_SECOND | _PAGE_F_GIX);
  585. }
  586. /*
  587. * No need to use ldarx/stdcx here
  588. */
  589. *ptep = __pte(new_pte & ~_PAGE_BUSY);
  590. err = 0;
  591. out:
  592. return err;
  593. }
  594. static void __init set_huge_psize(int psize)
  595. {
  596. /* Check that it is a page size supported by the hardware and
  597. * that it fits within pagetable limits. */
  598. if (mmu_psize_defs[psize].shift &&
  599. mmu_psize_defs[psize].shift < SID_SHIFT_1T &&
  600. (mmu_psize_defs[psize].shift > MIN_HUGEPTE_SHIFT ||
  601. mmu_psize_defs[psize].shift == PAGE_SHIFT_64K ||
  602. mmu_psize_defs[psize].shift == PAGE_SHIFT_16G)) {
  603. /* Return if huge page size has already been setup or is the
  604. * same as the base page size. */
  605. if (mmu_huge_psizes[psize] ||
  606. mmu_psize_defs[psize].shift == PAGE_SHIFT)
  607. return;
  608. hugetlb_add_hstate(mmu_psize_defs[psize].shift - PAGE_SHIFT);
  609. switch (mmu_psize_defs[psize].shift) {
  610. case PAGE_SHIFT_64K:
  611. /* We only allow 64k hpages with 4k base page,
  612. * which was checked above, and always put them
  613. * at the PMD */
  614. hugepte_shift[psize] = PMD_SHIFT;
  615. break;
  616. case PAGE_SHIFT_16M:
  617. /* 16M pages can be at two different levels
  618. * of pagestables based on base page size */
  619. if (PAGE_SHIFT == PAGE_SHIFT_64K)
  620. hugepte_shift[psize] = PMD_SHIFT;
  621. else /* 4k base page */
  622. hugepte_shift[psize] = PUD_SHIFT;
  623. break;
  624. case PAGE_SHIFT_16G:
  625. /* 16G pages are always at PGD level */
  626. hugepte_shift[psize] = PGDIR_SHIFT;
  627. break;
  628. }
  629. hugepte_shift[psize] -= mmu_psize_defs[psize].shift;
  630. } else
  631. hugepte_shift[psize] = 0;
  632. }
  633. static int __init hugepage_setup_sz(char *str)
  634. {
  635. unsigned long long size;
  636. int mmu_psize;
  637. int shift;
  638. size = memparse(str, &str);
  639. shift = __ffs(size);
  640. mmu_psize = shift_to_mmu_psize(shift);
  641. if (mmu_psize >= 0 && mmu_psize_defs[mmu_psize].shift)
  642. set_huge_psize(mmu_psize);
  643. else
  644. printk(KERN_WARNING "Invalid huge page size specified(%llu)\n", size);
  645. return 1;
  646. }
  647. __setup("hugepagesz=", hugepage_setup_sz);
  648. static int __init hugetlbpage_init(void)
  649. {
  650. unsigned int psize;
  651. if (!cpu_has_feature(CPU_FTR_16M_PAGE))
  652. return -ENODEV;
  653. /* Add supported huge page sizes. Need to change HUGE_MAX_HSTATE
  654. * and adjust PTE_NONCACHE_NUM if the number of supported huge page
  655. * sizes changes.
  656. */
  657. set_huge_psize(MMU_PAGE_16M);
  658. set_huge_psize(MMU_PAGE_16G);
  659. /* Temporarily disable support for 64K huge pages when 64K SPU local
  660. * store support is enabled as the current implementation conflicts.
  661. */
  662. #ifndef CONFIG_SPU_FS_64K_LS
  663. set_huge_psize(MMU_PAGE_64K);
  664. #endif
  665. for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
  666. if (mmu_huge_psizes[psize]) {
  667. pgtable_cache[HUGE_PGTABLE_INDEX(psize)] =
  668. kmem_cache_create(
  669. HUGEPTE_CACHE_NAME(psize),
  670. HUGEPTE_TABLE_SIZE(psize),
  671. HUGEPTE_TABLE_SIZE(psize),
  672. 0,
  673. NULL);
  674. if (!pgtable_cache[HUGE_PGTABLE_INDEX(psize)])
  675. panic("hugetlbpage_init(): could not create %s"\
  676. "\n", HUGEPTE_CACHE_NAME(psize));
  677. }
  678. }
  679. return 0;
  680. }
  681. module_init(hugetlbpage_init);