ptrace.c 26 KB

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  1. /*
  2. * PowerPC version
  3. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  4. *
  5. * Derived from "arch/m68k/kernel/ptrace.c"
  6. * Copyright (C) 1994 by Hamish Macdonald
  7. * Taken from linux/kernel/ptrace.c and modified for M680x0.
  8. * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
  9. *
  10. * Modified by Cort Dougan (cort@hq.fsmlabs.com)
  11. * and Paul Mackerras (paulus@samba.org).
  12. *
  13. * This file is subject to the terms and conditions of the GNU General
  14. * Public License. See the file README.legal in the main directory of
  15. * this archive for more details.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/sched.h>
  19. #include <linux/mm.h>
  20. #include <linux/smp.h>
  21. #include <linux/errno.h>
  22. #include <linux/ptrace.h>
  23. #include <linux/regset.h>
  24. #include <linux/tracehook.h>
  25. #include <linux/elf.h>
  26. #include <linux/user.h>
  27. #include <linux/security.h>
  28. #include <linux/signal.h>
  29. #include <linux/seccomp.h>
  30. #include <linux/audit.h>
  31. #ifdef CONFIG_PPC32
  32. #include <linux/module.h>
  33. #endif
  34. #include <asm/uaccess.h>
  35. #include <asm/page.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/system.h>
  38. /*
  39. * does not yet catch signals sent when the child dies.
  40. * in exit.c or in signal.c.
  41. */
  42. /*
  43. * Set of msr bits that gdb can change on behalf of a process.
  44. */
  45. #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
  46. #define MSR_DEBUGCHANGE 0
  47. #else
  48. #define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
  49. #endif
  50. /*
  51. * Max register writeable via put_reg
  52. */
  53. #ifdef CONFIG_PPC32
  54. #define PT_MAX_PUT_REG PT_MQ
  55. #else
  56. #define PT_MAX_PUT_REG PT_CCR
  57. #endif
  58. static unsigned long get_user_msr(struct task_struct *task)
  59. {
  60. return task->thread.regs->msr | task->thread.fpexc_mode;
  61. }
  62. static int set_user_msr(struct task_struct *task, unsigned long msr)
  63. {
  64. task->thread.regs->msr &= ~MSR_DEBUGCHANGE;
  65. task->thread.regs->msr |= msr & MSR_DEBUGCHANGE;
  66. return 0;
  67. }
  68. /*
  69. * We prevent mucking around with the reserved area of trap
  70. * which are used internally by the kernel.
  71. */
  72. static int set_user_trap(struct task_struct *task, unsigned long trap)
  73. {
  74. task->thread.regs->trap = trap & 0xfff0;
  75. return 0;
  76. }
  77. /*
  78. * Get contents of register REGNO in task TASK.
  79. */
  80. unsigned long ptrace_get_reg(struct task_struct *task, int regno)
  81. {
  82. if (task->thread.regs == NULL)
  83. return -EIO;
  84. if (regno == PT_MSR)
  85. return get_user_msr(task);
  86. if (regno < (sizeof(struct pt_regs) / sizeof(unsigned long)))
  87. return ((unsigned long *)task->thread.regs)[regno];
  88. return -EIO;
  89. }
  90. /*
  91. * Write contents of register REGNO in task TASK.
  92. */
  93. int ptrace_put_reg(struct task_struct *task, int regno, unsigned long data)
  94. {
  95. if (task->thread.regs == NULL)
  96. return -EIO;
  97. if (regno == PT_MSR)
  98. return set_user_msr(task, data);
  99. if (regno == PT_TRAP)
  100. return set_user_trap(task, data);
  101. if (regno <= PT_MAX_PUT_REG) {
  102. ((unsigned long *)task->thread.regs)[regno] = data;
  103. return 0;
  104. }
  105. return -EIO;
  106. }
  107. static int gpr_get(struct task_struct *target, const struct user_regset *regset,
  108. unsigned int pos, unsigned int count,
  109. void *kbuf, void __user *ubuf)
  110. {
  111. int ret;
  112. if (target->thread.regs == NULL)
  113. return -EIO;
  114. CHECK_FULL_REGS(target->thread.regs);
  115. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  116. target->thread.regs,
  117. 0, offsetof(struct pt_regs, msr));
  118. if (!ret) {
  119. unsigned long msr = get_user_msr(target);
  120. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &msr,
  121. offsetof(struct pt_regs, msr),
  122. offsetof(struct pt_regs, msr) +
  123. sizeof(msr));
  124. }
  125. BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
  126. offsetof(struct pt_regs, msr) + sizeof(long));
  127. if (!ret)
  128. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  129. &target->thread.regs->orig_gpr3,
  130. offsetof(struct pt_regs, orig_gpr3),
  131. sizeof(struct pt_regs));
  132. if (!ret)
  133. ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
  134. sizeof(struct pt_regs), -1);
  135. return ret;
  136. }
  137. static int gpr_set(struct task_struct *target, const struct user_regset *regset,
  138. unsigned int pos, unsigned int count,
  139. const void *kbuf, const void __user *ubuf)
  140. {
  141. unsigned long reg;
  142. int ret;
  143. if (target->thread.regs == NULL)
  144. return -EIO;
  145. CHECK_FULL_REGS(target->thread.regs);
  146. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  147. target->thread.regs,
  148. 0, PT_MSR * sizeof(reg));
  149. if (!ret && count > 0) {
  150. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
  151. PT_MSR * sizeof(reg),
  152. (PT_MSR + 1) * sizeof(reg));
  153. if (!ret)
  154. ret = set_user_msr(target, reg);
  155. }
  156. BUILD_BUG_ON(offsetof(struct pt_regs, orig_gpr3) !=
  157. offsetof(struct pt_regs, msr) + sizeof(long));
  158. if (!ret)
  159. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  160. &target->thread.regs->orig_gpr3,
  161. PT_ORIG_R3 * sizeof(reg),
  162. (PT_MAX_PUT_REG + 1) * sizeof(reg));
  163. if (PT_MAX_PUT_REG + 1 < PT_TRAP && !ret)
  164. ret = user_regset_copyin_ignore(
  165. &pos, &count, &kbuf, &ubuf,
  166. (PT_MAX_PUT_REG + 1) * sizeof(reg),
  167. PT_TRAP * sizeof(reg));
  168. if (!ret && count > 0) {
  169. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &reg,
  170. PT_TRAP * sizeof(reg),
  171. (PT_TRAP + 1) * sizeof(reg));
  172. if (!ret)
  173. ret = set_user_trap(target, reg);
  174. }
  175. if (!ret)
  176. ret = user_regset_copyin_ignore(
  177. &pos, &count, &kbuf, &ubuf,
  178. (PT_TRAP + 1) * sizeof(reg), -1);
  179. return ret;
  180. }
  181. static int fpr_get(struct task_struct *target, const struct user_regset *regset,
  182. unsigned int pos, unsigned int count,
  183. void *kbuf, void __user *ubuf)
  184. {
  185. #ifdef CONFIG_VSX
  186. double buf[33];
  187. int i;
  188. #endif
  189. flush_fp_to_thread(target);
  190. #ifdef CONFIG_VSX
  191. /* copy to local buffer then write that out */
  192. for (i = 0; i < 32 ; i++)
  193. buf[i] = target->thread.TS_FPR(i);
  194. memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
  195. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
  196. #else
  197. BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
  198. offsetof(struct thread_struct, TS_FPR(32)));
  199. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  200. &target->thread.fpr, 0, -1);
  201. #endif
  202. }
  203. static int fpr_set(struct task_struct *target, const struct user_regset *regset,
  204. unsigned int pos, unsigned int count,
  205. const void *kbuf, const void __user *ubuf)
  206. {
  207. #ifdef CONFIG_VSX
  208. double buf[33];
  209. int i;
  210. #endif
  211. flush_fp_to_thread(target);
  212. #ifdef CONFIG_VSX
  213. /* copy to local buffer then write that out */
  214. i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
  215. if (i)
  216. return i;
  217. for (i = 0; i < 32 ; i++)
  218. target->thread.TS_FPR(i) = buf[i];
  219. memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
  220. return 0;
  221. #else
  222. BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
  223. offsetof(struct thread_struct, TS_FPR(32)));
  224. return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  225. &target->thread.fpr, 0, -1);
  226. #endif
  227. }
  228. #ifdef CONFIG_ALTIVEC
  229. /*
  230. * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
  231. * The transfer totals 34 quadword. Quadwords 0-31 contain the
  232. * corresponding vector registers. Quadword 32 contains the vscr as the
  233. * last word (offset 12) within that quadword. Quadword 33 contains the
  234. * vrsave as the first word (offset 0) within the quadword.
  235. *
  236. * This definition of the VMX state is compatible with the current PPC32
  237. * ptrace interface. This allows signal handling and ptrace to use the
  238. * same structures. This also simplifies the implementation of a bi-arch
  239. * (combined (32- and 64-bit) gdb.
  240. */
  241. static int vr_active(struct task_struct *target,
  242. const struct user_regset *regset)
  243. {
  244. flush_altivec_to_thread(target);
  245. return target->thread.used_vr ? regset->n : 0;
  246. }
  247. static int vr_get(struct task_struct *target, const struct user_regset *regset,
  248. unsigned int pos, unsigned int count,
  249. void *kbuf, void __user *ubuf)
  250. {
  251. int ret;
  252. flush_altivec_to_thread(target);
  253. BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
  254. offsetof(struct thread_struct, vr[32]));
  255. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  256. &target->thread.vr, 0,
  257. 33 * sizeof(vector128));
  258. if (!ret) {
  259. /*
  260. * Copy out only the low-order word of vrsave.
  261. */
  262. union {
  263. elf_vrreg_t reg;
  264. u32 word;
  265. } vrsave;
  266. memset(&vrsave, 0, sizeof(vrsave));
  267. vrsave.word = target->thread.vrsave;
  268. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &vrsave,
  269. 33 * sizeof(vector128), -1);
  270. }
  271. return ret;
  272. }
  273. static int vr_set(struct task_struct *target, const struct user_regset *regset,
  274. unsigned int pos, unsigned int count,
  275. const void *kbuf, const void __user *ubuf)
  276. {
  277. int ret;
  278. flush_altivec_to_thread(target);
  279. BUILD_BUG_ON(offsetof(struct thread_struct, vscr) !=
  280. offsetof(struct thread_struct, vr[32]));
  281. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  282. &target->thread.vr, 0, 33 * sizeof(vector128));
  283. if (!ret && count > 0) {
  284. /*
  285. * We use only the first word of vrsave.
  286. */
  287. union {
  288. elf_vrreg_t reg;
  289. u32 word;
  290. } vrsave;
  291. memset(&vrsave, 0, sizeof(vrsave));
  292. vrsave.word = target->thread.vrsave;
  293. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &vrsave,
  294. 33 * sizeof(vector128), -1);
  295. if (!ret)
  296. target->thread.vrsave = vrsave.word;
  297. }
  298. return ret;
  299. }
  300. #endif /* CONFIG_ALTIVEC */
  301. #ifdef CONFIG_VSX
  302. /*
  303. * Currently to set and and get all the vsx state, you need to call
  304. * the fp and VMX calls aswell. This only get/sets the lower 32
  305. * 128bit VSX registers.
  306. */
  307. static int vsr_active(struct task_struct *target,
  308. const struct user_regset *regset)
  309. {
  310. flush_vsx_to_thread(target);
  311. return target->thread.used_vsr ? regset->n : 0;
  312. }
  313. static int vsr_get(struct task_struct *target, const struct user_regset *regset,
  314. unsigned int pos, unsigned int count,
  315. void *kbuf, void __user *ubuf)
  316. {
  317. double buf[32];
  318. int ret, i;
  319. flush_vsx_to_thread(target);
  320. for (i = 0; i < 32 ; i++)
  321. buf[i] = target->thread.fpr[i][TS_VSRLOWOFFSET];
  322. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  323. buf, 0, 32 * sizeof(double));
  324. return ret;
  325. }
  326. static int vsr_set(struct task_struct *target, const struct user_regset *regset,
  327. unsigned int pos, unsigned int count,
  328. const void *kbuf, const void __user *ubuf)
  329. {
  330. double buf[32];
  331. int ret,i;
  332. flush_vsx_to_thread(target);
  333. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  334. buf, 0, 32 * sizeof(double));
  335. for (i = 0; i < 32 ; i++)
  336. target->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
  337. return ret;
  338. }
  339. #endif /* CONFIG_VSX */
  340. #ifdef CONFIG_SPE
  341. /*
  342. * For get_evrregs/set_evrregs functions 'data' has the following layout:
  343. *
  344. * struct {
  345. * u32 evr[32];
  346. * u64 acc;
  347. * u32 spefscr;
  348. * }
  349. */
  350. static int evr_active(struct task_struct *target,
  351. const struct user_regset *regset)
  352. {
  353. flush_spe_to_thread(target);
  354. return target->thread.used_spe ? regset->n : 0;
  355. }
  356. static int evr_get(struct task_struct *target, const struct user_regset *regset,
  357. unsigned int pos, unsigned int count,
  358. void *kbuf, void __user *ubuf)
  359. {
  360. int ret;
  361. flush_spe_to_thread(target);
  362. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  363. &target->thread.evr,
  364. 0, sizeof(target->thread.evr));
  365. BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
  366. offsetof(struct thread_struct, spefscr));
  367. if (!ret)
  368. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  369. &target->thread.acc,
  370. sizeof(target->thread.evr), -1);
  371. return ret;
  372. }
  373. static int evr_set(struct task_struct *target, const struct user_regset *regset,
  374. unsigned int pos, unsigned int count,
  375. const void *kbuf, const void __user *ubuf)
  376. {
  377. int ret;
  378. flush_spe_to_thread(target);
  379. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  380. &target->thread.evr,
  381. 0, sizeof(target->thread.evr));
  382. BUILD_BUG_ON(offsetof(struct thread_struct, acc) + sizeof(u64) !=
  383. offsetof(struct thread_struct, spefscr));
  384. if (!ret)
  385. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
  386. &target->thread.acc,
  387. sizeof(target->thread.evr), -1);
  388. return ret;
  389. }
  390. #endif /* CONFIG_SPE */
  391. /*
  392. * These are our native regset flavors.
  393. */
  394. enum powerpc_regset {
  395. REGSET_GPR,
  396. REGSET_FPR,
  397. #ifdef CONFIG_ALTIVEC
  398. REGSET_VMX,
  399. #endif
  400. #ifdef CONFIG_VSX
  401. REGSET_VSX,
  402. #endif
  403. #ifdef CONFIG_SPE
  404. REGSET_SPE,
  405. #endif
  406. };
  407. static const struct user_regset native_regsets[] = {
  408. [REGSET_GPR] = {
  409. .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
  410. .size = sizeof(long), .align = sizeof(long),
  411. .get = gpr_get, .set = gpr_set
  412. },
  413. [REGSET_FPR] = {
  414. .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
  415. .size = sizeof(double), .align = sizeof(double),
  416. .get = fpr_get, .set = fpr_set
  417. },
  418. #ifdef CONFIG_ALTIVEC
  419. [REGSET_VMX] = {
  420. .core_note_type = NT_PPC_VMX, .n = 34,
  421. .size = sizeof(vector128), .align = sizeof(vector128),
  422. .active = vr_active, .get = vr_get, .set = vr_set
  423. },
  424. #endif
  425. #ifdef CONFIG_VSX
  426. [REGSET_VSX] = {
  427. .core_note_type = NT_PPC_VSX, .n = 32,
  428. .size = sizeof(double), .align = sizeof(double),
  429. .active = vsr_active, .get = vsr_get, .set = vsr_set
  430. },
  431. #endif
  432. #ifdef CONFIG_SPE
  433. [REGSET_SPE] = {
  434. .n = 35,
  435. .size = sizeof(u32), .align = sizeof(u32),
  436. .active = evr_active, .get = evr_get, .set = evr_set
  437. },
  438. #endif
  439. };
  440. static const struct user_regset_view user_ppc_native_view = {
  441. .name = UTS_MACHINE, .e_machine = ELF_ARCH, .ei_osabi = ELF_OSABI,
  442. .regsets = native_regsets, .n = ARRAY_SIZE(native_regsets)
  443. };
  444. #ifdef CONFIG_PPC64
  445. #include <linux/compat.h>
  446. static int gpr32_get(struct task_struct *target,
  447. const struct user_regset *regset,
  448. unsigned int pos, unsigned int count,
  449. void *kbuf, void __user *ubuf)
  450. {
  451. const unsigned long *regs = &target->thread.regs->gpr[0];
  452. compat_ulong_t *k = kbuf;
  453. compat_ulong_t __user *u = ubuf;
  454. compat_ulong_t reg;
  455. if (target->thread.regs == NULL)
  456. return -EIO;
  457. CHECK_FULL_REGS(target->thread.regs);
  458. pos /= sizeof(reg);
  459. count /= sizeof(reg);
  460. if (kbuf)
  461. for (; count > 0 && pos < PT_MSR; --count)
  462. *k++ = regs[pos++];
  463. else
  464. for (; count > 0 && pos < PT_MSR; --count)
  465. if (__put_user((compat_ulong_t) regs[pos++], u++))
  466. return -EFAULT;
  467. if (count > 0 && pos == PT_MSR) {
  468. reg = get_user_msr(target);
  469. if (kbuf)
  470. *k++ = reg;
  471. else if (__put_user(reg, u++))
  472. return -EFAULT;
  473. ++pos;
  474. --count;
  475. }
  476. if (kbuf)
  477. for (; count > 0 && pos < PT_REGS_COUNT; --count)
  478. *k++ = regs[pos++];
  479. else
  480. for (; count > 0 && pos < PT_REGS_COUNT; --count)
  481. if (__put_user((compat_ulong_t) regs[pos++], u++))
  482. return -EFAULT;
  483. kbuf = k;
  484. ubuf = u;
  485. pos *= sizeof(reg);
  486. count *= sizeof(reg);
  487. return user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
  488. PT_REGS_COUNT * sizeof(reg), -1);
  489. }
  490. static int gpr32_set(struct task_struct *target,
  491. const struct user_regset *regset,
  492. unsigned int pos, unsigned int count,
  493. const void *kbuf, const void __user *ubuf)
  494. {
  495. unsigned long *regs = &target->thread.regs->gpr[0];
  496. const compat_ulong_t *k = kbuf;
  497. const compat_ulong_t __user *u = ubuf;
  498. compat_ulong_t reg;
  499. if (target->thread.regs == NULL)
  500. return -EIO;
  501. CHECK_FULL_REGS(target->thread.regs);
  502. pos /= sizeof(reg);
  503. count /= sizeof(reg);
  504. if (kbuf)
  505. for (; count > 0 && pos < PT_MSR; --count)
  506. regs[pos++] = *k++;
  507. else
  508. for (; count > 0 && pos < PT_MSR; --count) {
  509. if (__get_user(reg, u++))
  510. return -EFAULT;
  511. regs[pos++] = reg;
  512. }
  513. if (count > 0 && pos == PT_MSR) {
  514. if (kbuf)
  515. reg = *k++;
  516. else if (__get_user(reg, u++))
  517. return -EFAULT;
  518. set_user_msr(target, reg);
  519. ++pos;
  520. --count;
  521. }
  522. if (kbuf) {
  523. for (; count > 0 && pos <= PT_MAX_PUT_REG; --count)
  524. regs[pos++] = *k++;
  525. for (; count > 0 && pos < PT_TRAP; --count, ++pos)
  526. ++k;
  527. } else {
  528. for (; count > 0 && pos <= PT_MAX_PUT_REG; --count) {
  529. if (__get_user(reg, u++))
  530. return -EFAULT;
  531. regs[pos++] = reg;
  532. }
  533. for (; count > 0 && pos < PT_TRAP; --count, ++pos)
  534. if (__get_user(reg, u++))
  535. return -EFAULT;
  536. }
  537. if (count > 0 && pos == PT_TRAP) {
  538. if (kbuf)
  539. reg = *k++;
  540. else if (__get_user(reg, u++))
  541. return -EFAULT;
  542. set_user_trap(target, reg);
  543. ++pos;
  544. --count;
  545. }
  546. kbuf = k;
  547. ubuf = u;
  548. pos *= sizeof(reg);
  549. count *= sizeof(reg);
  550. return user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
  551. (PT_TRAP + 1) * sizeof(reg), -1);
  552. }
  553. /*
  554. * These are the regset flavors matching the CONFIG_PPC32 native set.
  555. */
  556. static const struct user_regset compat_regsets[] = {
  557. [REGSET_GPR] = {
  558. .core_note_type = NT_PRSTATUS, .n = ELF_NGREG,
  559. .size = sizeof(compat_long_t), .align = sizeof(compat_long_t),
  560. .get = gpr32_get, .set = gpr32_set
  561. },
  562. [REGSET_FPR] = {
  563. .core_note_type = NT_PRFPREG, .n = ELF_NFPREG,
  564. .size = sizeof(double), .align = sizeof(double),
  565. .get = fpr_get, .set = fpr_set
  566. },
  567. #ifdef CONFIG_ALTIVEC
  568. [REGSET_VMX] = {
  569. .core_note_type = NT_PPC_VMX, .n = 34,
  570. .size = sizeof(vector128), .align = sizeof(vector128),
  571. .active = vr_active, .get = vr_get, .set = vr_set
  572. },
  573. #endif
  574. #ifdef CONFIG_SPE
  575. [REGSET_SPE] = {
  576. .core_note_type = NT_PPC_SPE, .n = 35,
  577. .size = sizeof(u32), .align = sizeof(u32),
  578. .active = evr_active, .get = evr_get, .set = evr_set
  579. },
  580. #endif
  581. };
  582. static const struct user_regset_view user_ppc_compat_view = {
  583. .name = "ppc", .e_machine = EM_PPC, .ei_osabi = ELF_OSABI,
  584. .regsets = compat_regsets, .n = ARRAY_SIZE(compat_regsets)
  585. };
  586. #endif /* CONFIG_PPC64 */
  587. const struct user_regset_view *task_user_regset_view(struct task_struct *task)
  588. {
  589. #ifdef CONFIG_PPC64
  590. if (test_tsk_thread_flag(task, TIF_32BIT))
  591. return &user_ppc_compat_view;
  592. #endif
  593. return &user_ppc_native_view;
  594. }
  595. void user_enable_single_step(struct task_struct *task)
  596. {
  597. struct pt_regs *regs = task->thread.regs;
  598. if (regs != NULL) {
  599. #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
  600. task->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
  601. regs->msr |= MSR_DE;
  602. #else
  603. regs->msr |= MSR_SE;
  604. #endif
  605. }
  606. set_tsk_thread_flag(task, TIF_SINGLESTEP);
  607. }
  608. void user_disable_single_step(struct task_struct *task)
  609. {
  610. struct pt_regs *regs = task->thread.regs;
  611. #if defined(CONFIG_BOOKE)
  612. /* If DAC then do not single step, skip */
  613. if (task->thread.dabr)
  614. return;
  615. #endif
  616. if (regs != NULL) {
  617. #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
  618. task->thread.dbcr0 &= ~(DBCR0_IC | DBCR0_IDM);
  619. regs->msr &= ~MSR_DE;
  620. #else
  621. regs->msr &= ~MSR_SE;
  622. #endif
  623. }
  624. clear_tsk_thread_flag(task, TIF_SINGLESTEP);
  625. }
  626. int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
  627. unsigned long data)
  628. {
  629. /* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
  630. * For embedded processors we support one DAC and no IAC's at the
  631. * moment.
  632. */
  633. if (addr > 0)
  634. return -EINVAL;
  635. /* The bottom 3 bits in dabr are flags */
  636. if ((data & ~0x7UL) >= TASK_SIZE)
  637. return -EIO;
  638. #ifndef CONFIG_BOOKE
  639. /* For processors using DABR (i.e. 970), the bottom 3 bits are flags.
  640. * It was assumed, on previous implementations, that 3 bits were
  641. * passed together with the data address, fitting the design of the
  642. * DABR register, as follows:
  643. *
  644. * bit 0: Read flag
  645. * bit 1: Write flag
  646. * bit 2: Breakpoint translation
  647. *
  648. * Thus, we use them here as so.
  649. */
  650. /* Ensure breakpoint translation bit is set */
  651. if (data && !(data & DABR_TRANSLATION))
  652. return -EIO;
  653. /* Move contents to the DABR register */
  654. task->thread.dabr = data;
  655. #endif
  656. #if defined(CONFIG_BOOKE)
  657. /* As described above, it was assumed 3 bits were passed with the data
  658. * address, but we will assume only the mode bits will be passed
  659. * as to not cause alignment restrictions for DAC-based processors.
  660. */
  661. /* DAC's hold the whole address without any mode flags */
  662. task->thread.dabr = data & ~0x3UL;
  663. if (task->thread.dabr == 0) {
  664. task->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W | DBCR0_IDM);
  665. task->thread.regs->msr &= ~MSR_DE;
  666. return 0;
  667. }
  668. /* Read or Write bits must be set */
  669. if (!(data & 0x3UL))
  670. return -EINVAL;
  671. /* Set the Internal Debugging flag (IDM bit 1) for the DBCR0
  672. register */
  673. task->thread.dbcr0 = DBCR0_IDM;
  674. /* Check for write and read flags and set DBCR0
  675. accordingly */
  676. if (data & 0x1UL)
  677. task->thread.dbcr0 |= DBSR_DAC1R;
  678. if (data & 0x2UL)
  679. task->thread.dbcr0 |= DBSR_DAC1W;
  680. task->thread.regs->msr |= MSR_DE;
  681. #endif
  682. return 0;
  683. }
  684. /*
  685. * Called by kernel/ptrace.c when detaching..
  686. *
  687. * Make sure single step bits etc are not set.
  688. */
  689. void ptrace_disable(struct task_struct *child)
  690. {
  691. /* make sure the single step bit is not set. */
  692. user_disable_single_step(child);
  693. }
  694. /*
  695. * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
  696. * we mark them as obsolete now, they will be removed in a future version
  697. */
  698. static long arch_ptrace_old(struct task_struct *child, long request, long addr,
  699. long data)
  700. {
  701. switch (request) {
  702. case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
  703. return copy_regset_to_user(child, &user_ppc_native_view,
  704. REGSET_GPR, 0, 32 * sizeof(long),
  705. (void __user *) data);
  706. case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
  707. return copy_regset_from_user(child, &user_ppc_native_view,
  708. REGSET_GPR, 0, 32 * sizeof(long),
  709. (const void __user *) data);
  710. case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
  711. return copy_regset_to_user(child, &user_ppc_native_view,
  712. REGSET_FPR, 0, 32 * sizeof(double),
  713. (void __user *) data);
  714. case PPC_PTRACE_SETFPREGS: /* Set FPRs 0 - 31. */
  715. return copy_regset_from_user(child, &user_ppc_native_view,
  716. REGSET_FPR, 0, 32 * sizeof(double),
  717. (const void __user *) data);
  718. }
  719. return -EPERM;
  720. }
  721. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  722. {
  723. int ret = -EPERM;
  724. switch (request) {
  725. /* read the word at location addr in the USER area. */
  726. case PTRACE_PEEKUSR: {
  727. unsigned long index, tmp;
  728. ret = -EIO;
  729. /* convert to index and check */
  730. #ifdef CONFIG_PPC32
  731. index = (unsigned long) addr >> 2;
  732. if ((addr & 3) || (index > PT_FPSCR)
  733. || (child->thread.regs == NULL))
  734. #else
  735. index = (unsigned long) addr >> 3;
  736. if ((addr & 7) || (index > PT_FPSCR))
  737. #endif
  738. break;
  739. CHECK_FULL_REGS(child->thread.regs);
  740. if (index < PT_FPR0) {
  741. tmp = ptrace_get_reg(child, (int) index);
  742. } else {
  743. flush_fp_to_thread(child);
  744. tmp = ((unsigned long *)child->thread.fpr)
  745. [TS_FPRWIDTH * (index - PT_FPR0)];
  746. }
  747. ret = put_user(tmp,(unsigned long __user *) data);
  748. break;
  749. }
  750. /* write the word at location addr in the USER area */
  751. case PTRACE_POKEUSR: {
  752. unsigned long index;
  753. ret = -EIO;
  754. /* convert to index and check */
  755. #ifdef CONFIG_PPC32
  756. index = (unsigned long) addr >> 2;
  757. if ((addr & 3) || (index > PT_FPSCR)
  758. || (child->thread.regs == NULL))
  759. #else
  760. index = (unsigned long) addr >> 3;
  761. if ((addr & 7) || (index > PT_FPSCR))
  762. #endif
  763. break;
  764. CHECK_FULL_REGS(child->thread.regs);
  765. if (index < PT_FPR0) {
  766. ret = ptrace_put_reg(child, index, data);
  767. } else {
  768. flush_fp_to_thread(child);
  769. ((unsigned long *)child->thread.fpr)
  770. [TS_FPRWIDTH * (index - PT_FPR0)] = data;
  771. ret = 0;
  772. }
  773. break;
  774. }
  775. case PTRACE_GET_DEBUGREG: {
  776. ret = -EINVAL;
  777. /* We only support one DABR and no IABRS at the moment */
  778. if (addr > 0)
  779. break;
  780. ret = put_user(child->thread.dabr,
  781. (unsigned long __user *)data);
  782. break;
  783. }
  784. case PTRACE_SET_DEBUGREG:
  785. ret = ptrace_set_debugreg(child, addr, data);
  786. break;
  787. #ifdef CONFIG_PPC64
  788. case PTRACE_GETREGS64:
  789. #endif
  790. case PTRACE_GETREGS: /* Get all pt_regs from the child. */
  791. return copy_regset_to_user(child, &user_ppc_native_view,
  792. REGSET_GPR,
  793. 0, sizeof(struct pt_regs),
  794. (void __user *) data);
  795. #ifdef CONFIG_PPC64
  796. case PTRACE_SETREGS64:
  797. #endif
  798. case PTRACE_SETREGS: /* Set all gp regs in the child. */
  799. return copy_regset_from_user(child, &user_ppc_native_view,
  800. REGSET_GPR,
  801. 0, sizeof(struct pt_regs),
  802. (const void __user *) data);
  803. case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
  804. return copy_regset_to_user(child, &user_ppc_native_view,
  805. REGSET_FPR,
  806. 0, sizeof(elf_fpregset_t),
  807. (void __user *) data);
  808. case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
  809. return copy_regset_from_user(child, &user_ppc_native_view,
  810. REGSET_FPR,
  811. 0, sizeof(elf_fpregset_t),
  812. (const void __user *) data);
  813. #ifdef CONFIG_ALTIVEC
  814. case PTRACE_GETVRREGS:
  815. return copy_regset_to_user(child, &user_ppc_native_view,
  816. REGSET_VMX,
  817. 0, (33 * sizeof(vector128) +
  818. sizeof(u32)),
  819. (void __user *) data);
  820. case PTRACE_SETVRREGS:
  821. return copy_regset_from_user(child, &user_ppc_native_view,
  822. REGSET_VMX,
  823. 0, (33 * sizeof(vector128) +
  824. sizeof(u32)),
  825. (const void __user *) data);
  826. #endif
  827. #ifdef CONFIG_VSX
  828. case PTRACE_GETVSRREGS:
  829. return copy_regset_to_user(child, &user_ppc_native_view,
  830. REGSET_VSX,
  831. 0, 32 * sizeof(double),
  832. (void __user *) data);
  833. case PTRACE_SETVSRREGS:
  834. return copy_regset_from_user(child, &user_ppc_native_view,
  835. REGSET_VSX,
  836. 0, 32 * sizeof(double),
  837. (const void __user *) data);
  838. #endif
  839. #ifdef CONFIG_SPE
  840. case PTRACE_GETEVRREGS:
  841. /* Get the child spe register state. */
  842. return copy_regset_to_user(child, &user_ppc_native_view,
  843. REGSET_SPE, 0, 35 * sizeof(u32),
  844. (void __user *) data);
  845. case PTRACE_SETEVRREGS:
  846. /* Set the child spe register state. */
  847. return copy_regset_from_user(child, &user_ppc_native_view,
  848. REGSET_SPE, 0, 35 * sizeof(u32),
  849. (const void __user *) data);
  850. #endif
  851. /* Old reverse args ptrace callss */
  852. case PPC_PTRACE_GETREGS: /* Get GPRs 0 - 31. */
  853. case PPC_PTRACE_SETREGS: /* Set GPRs 0 - 31. */
  854. case PPC_PTRACE_GETFPREGS: /* Get FPRs 0 - 31. */
  855. case PPC_PTRACE_SETFPREGS: /* Get FPRs 0 - 31. */
  856. ret = arch_ptrace_old(child, request, addr, data);
  857. break;
  858. default:
  859. ret = ptrace_request(child, request, addr, data);
  860. break;
  861. }
  862. return ret;
  863. }
  864. /*
  865. * We must return the syscall number to actually look up in the table.
  866. * This can be -1L to skip running any syscall at all.
  867. */
  868. long do_syscall_trace_enter(struct pt_regs *regs)
  869. {
  870. long ret = 0;
  871. secure_computing(regs->gpr[0]);
  872. if (test_thread_flag(TIF_SYSCALL_TRACE) &&
  873. tracehook_report_syscall_entry(regs))
  874. /*
  875. * Tracing decided this syscall should not happen.
  876. * We'll return a bogus call number to get an ENOSYS
  877. * error, but leave the original number in regs->gpr[0].
  878. */
  879. ret = -1L;
  880. if (unlikely(current->audit_context)) {
  881. #ifdef CONFIG_PPC64
  882. if (!test_thread_flag(TIF_32BIT))
  883. audit_syscall_entry(AUDIT_ARCH_PPC64,
  884. regs->gpr[0],
  885. regs->gpr[3], regs->gpr[4],
  886. regs->gpr[5], regs->gpr[6]);
  887. else
  888. #endif
  889. audit_syscall_entry(AUDIT_ARCH_PPC,
  890. regs->gpr[0],
  891. regs->gpr[3] & 0xffffffff,
  892. regs->gpr[4] & 0xffffffff,
  893. regs->gpr[5] & 0xffffffff,
  894. regs->gpr[6] & 0xffffffff);
  895. }
  896. return ret ?: regs->gpr[0];
  897. }
  898. void do_syscall_trace_leave(struct pt_regs *regs)
  899. {
  900. int step;
  901. if (unlikely(current->audit_context))
  902. audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
  903. regs->result);
  904. step = test_thread_flag(TIF_SINGLESTEP);
  905. if (step || test_thread_flag(TIF_SYSCALL_TRACE))
  906. tracehook_report_syscall_exit(regs, step);
  907. }