mpc8272ads.dts 6.2 KB

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  1. /*
  2. * MPC8272 ADS Device Tree Source
  3. *
  4. * Copyright 2005,2008 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. /dts-v1/;
  12. / {
  13. model = "MPC8272ADS";
  14. compatible = "fsl,mpc8272ads";
  15. #address-cells = <1>;
  16. #size-cells = <1>;
  17. cpus {
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. PowerPC,8272@0 {
  21. device_type = "cpu";
  22. reg = <0x0>;
  23. d-cache-line-size = <32>;
  24. i-cache-line-size = <32>;
  25. d-cache-size = <16384>;
  26. i-cache-size = <16384>;
  27. timebase-frequency = <0>;
  28. bus-frequency = <0>;
  29. clock-frequency = <0>;
  30. };
  31. };
  32. memory {
  33. device_type = "memory";
  34. reg = <0x0 0x0>;
  35. };
  36. localbus@f0010100 {
  37. compatible = "fsl,mpc8272-localbus",
  38. "fsl,pq2-localbus";
  39. #address-cells = <2>;
  40. #size-cells = <1>;
  41. reg = <0xf0010100 0x40>;
  42. ranges = <0x0 0x0 0xfe000000 0x2000000
  43. 0x1 0x0 0xf4500000 0x8000
  44. 0x3 0x0 0xf8200000 0x8000>;
  45. flash@0,0 {
  46. compatible = "jedec-flash";
  47. reg = <0x0 0x0 0x2000000>;
  48. bank-width = <4>;
  49. device-width = <1>;
  50. };
  51. board-control@1,0 {
  52. reg = <0x1 0x0 0x20>;
  53. compatible = "fsl,mpc8272ads-bcsr";
  54. };
  55. PCI_PIC: interrupt-controller@3,0 {
  56. compatible = "fsl,mpc8272ads-pci-pic",
  57. "fsl,pq2ads-pci-pic";
  58. #interrupt-cells = <1>;
  59. interrupt-controller;
  60. reg = <0x3 0x0 0x8>;
  61. interrupt-parent = <&PIC>;
  62. interrupts = <20 8>;
  63. };
  64. };
  65. pci@f0010800 {
  66. device_type = "pci";
  67. reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
  68. compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
  69. #interrupt-cells = <1>;
  70. #size-cells = <2>;
  71. #address-cells = <3>;
  72. clock-frequency = <66666666>;
  73. interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  74. interrupt-map = <
  75. /* IDSEL 0x16 */
  76. 0xb000 0x0 0x0 0x1 &PCI_PIC 0
  77. 0xb000 0x0 0x0 0x2 &PCI_PIC 1
  78. 0xb000 0x0 0x0 0x3 &PCI_PIC 2
  79. 0xb000 0x0 0x0 0x4 &PCI_PIC 3
  80. /* IDSEL 0x17 */
  81. 0xb800 0x0 0x0 0x1 &PCI_PIC 4
  82. 0xb800 0x0 0x0 0x2 &PCI_PIC 5
  83. 0xb800 0x0 0x0 0x3 &PCI_PIC 6
  84. 0xb800 0x0 0x0 0x4 &PCI_PIC 7
  85. /* IDSEL 0x18 */
  86. 0xc000 0x0 0x0 0x1 &PCI_PIC 8
  87. 0xc000 0x0 0x0 0x2 &PCI_PIC 9
  88. 0xc000 0x0 0x0 0x3 &PCI_PIC 10
  89. 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
  90. interrupt-parent = <&PIC>;
  91. interrupts = <18 8>;
  92. ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
  93. 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
  94. 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
  95. };
  96. soc@f0000000 {
  97. #address-cells = <1>;
  98. #size-cells = <1>;
  99. device_type = "soc";
  100. compatible = "fsl,mpc8272", "fsl,pq2-soc";
  101. ranges = <0x0 0xf0000000 0x53000>;
  102. // Temporary -- will go away once kernel uses ranges for get_immrbase().
  103. reg = <0xf0000000 0x53000>;
  104. cpm@119c0 {
  105. #address-cells = <1>;
  106. #size-cells = <1>;
  107. compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
  108. reg = <0x119c0 0x30>;
  109. ranges;
  110. muram@0 {
  111. #address-cells = <1>;
  112. #size-cells = <1>;
  113. ranges = <0x0 0x0 0x10000>;
  114. data@0 {
  115. compatible = "fsl,cpm-muram-data";
  116. reg = <0x0 0x2000 0x9800 0x800>;
  117. };
  118. };
  119. brg@119f0 {
  120. compatible = "fsl,mpc8272-brg",
  121. "fsl,cpm2-brg",
  122. "fsl,cpm-brg";
  123. reg = <0x119f0 0x10 0x115f0 0x10>;
  124. };
  125. serial@11a00 {
  126. device_type = "serial";
  127. compatible = "fsl,mpc8272-scc-uart",
  128. "fsl,cpm2-scc-uart";
  129. reg = <0x11a00 0x20 0x8000 0x100>;
  130. interrupts = <40 8>;
  131. interrupt-parent = <&PIC>;
  132. fsl,cpm-brg = <1>;
  133. fsl,cpm-command = <0x800000>;
  134. };
  135. serial@11a60 {
  136. device_type = "serial";
  137. compatible = "fsl,mpc8272-scc-uart",
  138. "fsl,cpm2-scc-uart";
  139. reg = <0x11a60 0x20 0x8300 0x100>;
  140. interrupts = <43 8>;
  141. interrupt-parent = <&PIC>;
  142. fsl,cpm-brg = <4>;
  143. fsl,cpm-command = <0xce00000>;
  144. };
  145. mdio@10d40 {
  146. device_type = "mdio";
  147. compatible = "fsl,mpc8272ads-mdio-bitbang",
  148. "fsl,mpc8272-mdio-bitbang",
  149. "fsl,cpm2-mdio-bitbang";
  150. reg = <0x10d40 0x14>;
  151. #address-cells = <1>;
  152. #size-cells = <0>;
  153. fsl,mdio-pin = <18>;
  154. fsl,mdc-pin = <19>;
  155. PHY0: ethernet-phy@0 {
  156. interrupt-parent = <&PIC>;
  157. interrupts = <23 8>;
  158. reg = <0x0>;
  159. device_type = "ethernet-phy";
  160. };
  161. PHY1: ethernet-phy@1 {
  162. interrupt-parent = <&PIC>;
  163. interrupts = <23 8>;
  164. reg = <0x3>;
  165. device_type = "ethernet-phy";
  166. };
  167. };
  168. ethernet@11300 {
  169. device_type = "network";
  170. compatible = "fsl,mpc8272-fcc-enet",
  171. "fsl,cpm2-fcc-enet";
  172. reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
  173. local-mac-address = [ 00 00 00 00 00 00 ];
  174. interrupts = <32 8>;
  175. interrupt-parent = <&PIC>;
  176. phy-handle = <&PHY0>;
  177. linux,network-index = <0>;
  178. fsl,cpm-command = <0x12000300>;
  179. };
  180. ethernet@11320 {
  181. device_type = "network";
  182. compatible = "fsl,mpc8272-fcc-enet",
  183. "fsl,cpm2-fcc-enet";
  184. reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
  185. local-mac-address = [ 00 00 00 00 00 00 ];
  186. interrupts = <33 8>;
  187. interrupt-parent = <&PIC>;
  188. phy-handle = <&PHY1>;
  189. linux,network-index = <1>;
  190. fsl,cpm-command = <0x16200300>;
  191. };
  192. i2c@11860 {
  193. compatible = "fsl,mpc8272-i2c",
  194. "fsl,cpm2-i2c";
  195. reg = <0x11860 0x20 0x8afc 0x2>;
  196. interrupts = <1 8>;
  197. interrupt-parent = <&PIC>;
  198. fsl,cpm-command = <0x29600000>;
  199. #address-cells = <1>;
  200. #size-cells = <0>;
  201. };
  202. };
  203. PIC: interrupt-controller@10c00 {
  204. #interrupt-cells = <2>;
  205. interrupt-controller;
  206. reg = <0x10c00 0x80>;
  207. compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
  208. };
  209. crypto@30000 {
  210. compatible = "fsl,sec1.0";
  211. reg = <0x40000 0x13000>;
  212. interrupts = <47 0x8>;
  213. interrupt-parent = <&PIC>;
  214. fsl,num-channels = <4>;
  215. fsl,channel-fifo-len = <24>;
  216. fsl,exec-units-mask = <0x7e>;
  217. fsl,descriptor-types-mask = <0x1010415>;
  218. };
  219. };
  220. chosen {
  221. linux,stdout-path = "/soc/cpm/serial@11a00";
  222. };
  223. };