makalu.dts 9.6 KB

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  1. /*
  2. * Device Tree Source for AMCC Makalu (405EX)
  3. *
  4. * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without
  8. * any warranty of any kind, whether express or implied.
  9. */
  10. /dts-v1/;
  11. / {
  12. #address-cells = <1>;
  13. #size-cells = <1>;
  14. model = "amcc,makalu";
  15. compatible = "amcc,makalu";
  16. dcr-parent = <&{/cpus/cpu@0}>;
  17. aliases {
  18. ethernet0 = &EMAC0;
  19. ethernet1 = &EMAC1;
  20. serial0 = &UART0;
  21. serial1 = &UART1;
  22. };
  23. cpus {
  24. #address-cells = <1>;
  25. #size-cells = <0>;
  26. cpu@0 {
  27. device_type = "cpu";
  28. model = "PowerPC,405EX";
  29. reg = <0x00000000>;
  30. clock-frequency = <0>; /* Filled in by U-Boot */
  31. timebase-frequency = <0>; /* Filled in by U-Boot */
  32. i-cache-line-size = <32>;
  33. d-cache-line-size = <32>;
  34. i-cache-size = <16384>; /* 16 kB */
  35. d-cache-size = <16384>; /* 16 kB */
  36. dcr-controller;
  37. dcr-access-method = "native";
  38. };
  39. };
  40. memory {
  41. device_type = "memory";
  42. reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
  43. };
  44. UIC0: interrupt-controller {
  45. compatible = "ibm,uic-405ex", "ibm,uic";
  46. interrupt-controller;
  47. cell-index = <0>;
  48. dcr-reg = <0x0c0 0x009>;
  49. #address-cells = <0>;
  50. #size-cells = <0>;
  51. #interrupt-cells = <2>;
  52. };
  53. UIC1: interrupt-controller1 {
  54. compatible = "ibm,uic-405ex","ibm,uic";
  55. interrupt-controller;
  56. cell-index = <1>;
  57. dcr-reg = <0x0d0 0x009>;
  58. #address-cells = <0>;
  59. #size-cells = <0>;
  60. #interrupt-cells = <2>;
  61. interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
  62. interrupt-parent = <&UIC0>;
  63. };
  64. UIC2: interrupt-controller2 {
  65. compatible = "ibm,uic-405ex","ibm,uic";
  66. interrupt-controller;
  67. cell-index = <2>;
  68. dcr-reg = <0x0e0 0x009>;
  69. #address-cells = <0>;
  70. #size-cells = <0>;
  71. #interrupt-cells = <2>;
  72. interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
  73. interrupt-parent = <&UIC0>;
  74. };
  75. plb {
  76. compatible = "ibm,plb-405ex", "ibm,plb4";
  77. #address-cells = <1>;
  78. #size-cells = <1>;
  79. ranges;
  80. clock-frequency = <0>; /* Filled in by U-Boot */
  81. SDRAM0: memory-controller {
  82. compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2";
  83. dcr-reg = <0x010 0x002>;
  84. interrupt-parent = <&UIC2>;
  85. interrupts = <0x5 0x4 /* ECC DED Error */
  86. 0x6 0x4 /* ECC SEC Error */ >;
  87. };
  88. MAL0: mcmal {
  89. compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
  90. dcr-reg = <0x180 0x062>;
  91. num-tx-chans = <2>;
  92. num-rx-chans = <2>;
  93. interrupt-parent = <&MAL0>;
  94. interrupts = <0x0 0x1 0x2 0x3 0x4>;
  95. #interrupt-cells = <1>;
  96. #address-cells = <0>;
  97. #size-cells = <0>;
  98. interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
  99. /*RXEOB*/ 0x1 &UIC0 0xb 0x4
  100. /*SERR*/ 0x2 &UIC1 0x0 0x4
  101. /*TXDE*/ 0x3 &UIC1 0x1 0x4
  102. /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
  103. interrupt-map-mask = <0xffffffff>;
  104. };
  105. POB0: opb {
  106. compatible = "ibm,opb-405ex", "ibm,opb";
  107. #address-cells = <1>;
  108. #size-cells = <1>;
  109. ranges = <0x80000000 0x80000000 0x10000000
  110. 0xef600000 0xef600000 0x00a00000
  111. 0xf0000000 0xf0000000 0x10000000>;
  112. dcr-reg = <0x0a0 0x005>;
  113. clock-frequency = <0>; /* Filled in by U-Boot */
  114. EBC0: ebc {
  115. compatible = "ibm,ebc-405ex", "ibm,ebc";
  116. dcr-reg = <0x012 0x002>;
  117. #address-cells = <2>;
  118. #size-cells = <1>;
  119. clock-frequency = <0>; /* Filled in by U-Boot */
  120. /* ranges property is supplied by U-Boot */
  121. interrupts = <0x5 0x1>;
  122. interrupt-parent = <&UIC1>;
  123. nor_flash@0,0 {
  124. compatible = "amd,s29gl512n", "cfi-flash";
  125. bank-width = <2>;
  126. reg = <0x00000000 0x00000000 0x04000000>;
  127. #address-cells = <1>;
  128. #size-cells = <1>;
  129. partition@0 {
  130. label = "kernel";
  131. reg = <0x00000000 0x00200000>;
  132. };
  133. partition@200000 {
  134. label = "root";
  135. reg = <0x00200000 0x00200000>;
  136. };
  137. partition@400000 {
  138. label = "user";
  139. reg = <0x00400000 0x03b60000>;
  140. };
  141. partition@3f60000 {
  142. label = "env";
  143. reg = <0x03f60000 0x00040000>;
  144. };
  145. partition@3fa0000 {
  146. label = "u-boot";
  147. reg = <0x03fa0000 0x00060000>;
  148. };
  149. };
  150. };
  151. UART0: serial@ef600200 {
  152. device_type = "serial";
  153. compatible = "ns16550";
  154. reg = <0xef600200 0x00000008>;
  155. virtual-reg = <0xef600200>;
  156. clock-frequency = <0>; /* Filled in by U-Boot */
  157. current-speed = <0>;
  158. interrupt-parent = <&UIC0>;
  159. interrupts = <0x1a 0x4>;
  160. };
  161. UART1: serial@ef600300 {
  162. device_type = "serial";
  163. compatible = "ns16550";
  164. reg = <0xef600300 0x00000008>;
  165. virtual-reg = <0xef600300>;
  166. clock-frequency = <0>; /* Filled in by U-Boot */
  167. current-speed = <0>;
  168. interrupt-parent = <&UIC0>;
  169. interrupts = <0x1 0x4>;
  170. };
  171. IIC0: i2c@ef600400 {
  172. compatible = "ibm,iic-405ex", "ibm,iic";
  173. reg = <0xef600400 0x00000014>;
  174. interrupt-parent = <&UIC0>;
  175. interrupts = <0x2 0x4>;
  176. };
  177. IIC1: i2c@ef600500 {
  178. compatible = "ibm,iic-405ex", "ibm,iic";
  179. reg = <0xef600500 0x00000014>;
  180. interrupt-parent = <&UIC0>;
  181. interrupts = <0x7 0x4>;
  182. };
  183. RGMII0: emac-rgmii@ef600b00 {
  184. compatible = "ibm,rgmii-405ex", "ibm,rgmii";
  185. reg = <0xef600b00 0x00000104>;
  186. has-mdio;
  187. };
  188. EMAC0: ethernet@ef600900 {
  189. linux,network-index = <0x0>;
  190. device_type = "network";
  191. compatible = "ibm,emac-405ex", "ibm,emac4sync";
  192. interrupt-parent = <&EMAC0>;
  193. interrupts = <0x0 0x1>;
  194. #interrupt-cells = <1>;
  195. #address-cells = <0>;
  196. #size-cells = <0>;
  197. interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
  198. /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
  199. reg = <0xef600900 0x000000c4>;
  200. local-mac-address = [000000000000]; /* Filled in by U-Boot */
  201. mal-device = <&MAL0>;
  202. mal-tx-channel = <0>;
  203. mal-rx-channel = <0>;
  204. cell-index = <0>;
  205. max-frame-size = <9000>;
  206. rx-fifo-size = <4096>;
  207. tx-fifo-size = <2048>;
  208. phy-mode = "rgmii";
  209. phy-map = <0x0000003f>; /* Start at 6 */
  210. rgmii-device = <&RGMII0>;
  211. rgmii-channel = <0>;
  212. has-inverted-stacr-oc;
  213. has-new-stacr-staopc;
  214. };
  215. EMAC1: ethernet@ef600a00 {
  216. linux,network-index = <0x1>;
  217. device_type = "network";
  218. compatible = "ibm,emac-405ex", "ibm,emac4sync";
  219. interrupt-parent = <&EMAC1>;
  220. interrupts = <0x0 0x1>;
  221. #interrupt-cells = <1>;
  222. #address-cells = <0>;
  223. #size-cells = <0>;
  224. interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
  225. /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
  226. reg = <0xef600a00 0x000000c4>;
  227. local-mac-address = [000000000000]; /* Filled in by U-Boot */
  228. mal-device = <&MAL0>;
  229. mal-tx-channel = <1>;
  230. mal-rx-channel = <1>;
  231. cell-index = <1>;
  232. max-frame-size = <9000>;
  233. rx-fifo-size = <4096>;
  234. tx-fifo-size = <2048>;
  235. phy-mode = "rgmii";
  236. phy-map = <0x00000000>;
  237. rgmii-device = <&RGMII0>;
  238. rgmii-channel = <1>;
  239. has-inverted-stacr-oc;
  240. has-new-stacr-staopc;
  241. };
  242. };
  243. PCIE0: pciex@0a0000000 {
  244. device_type = "pci";
  245. #interrupt-cells = <1>;
  246. #size-cells = <2>;
  247. #address-cells = <3>;
  248. compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
  249. primary;
  250. port = <0x0>; /* port number */
  251. reg = <0xa0000000 0x20000000 /* Config space access */
  252. 0xef000000 0x00001000>; /* Registers */
  253. dcr-reg = <0x040 0x020>;
  254. sdr-base = <0x400>;
  255. /* Outbound ranges, one memory and one IO,
  256. * later cannot be changed
  257. */
  258. ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
  259. 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
  260. /* Inbound 2GB range starting at 0 */
  261. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
  262. /* This drives busses 0x00 to 0x3f */
  263. bus-range = <0x0 0x3f>;
  264. /* Legacy interrupts (note the weird polarity, the bridge seems
  265. * to invert PCIe legacy interrupts).
  266. * We are de-swizzling here because the numbers are actually for
  267. * port of the root complex virtual P2P bridge. But I want
  268. * to avoid putting a node for it in the tree, so the numbers
  269. * below are basically de-swizzled numbers.
  270. * The real slot is on idsel 0, so the swizzling is 1:1
  271. */
  272. interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  273. interrupt-map = <
  274. 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
  275. 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
  276. 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
  277. 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
  278. };
  279. PCIE1: pciex@0c0000000 {
  280. device_type = "pci";
  281. #interrupt-cells = <1>;
  282. #size-cells = <2>;
  283. #address-cells = <3>;
  284. compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
  285. primary;
  286. port = <0x1>; /* port number */
  287. reg = <0xc0000000 0x20000000 /* Config space access */
  288. 0xef001000 0x00001000>; /* Registers */
  289. dcr-reg = <0x060 0x020>;
  290. sdr-base = <0x440>;
  291. /* Outbound ranges, one memory and one IO,
  292. * later cannot be changed
  293. */
  294. ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
  295. 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
  296. /* Inbound 2GB range starting at 0 */
  297. dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
  298. /* This drives busses 0x40 to 0x7f */
  299. bus-range = <0x40 0x7f>;
  300. /* Legacy interrupts (note the weird polarity, the bridge seems
  301. * to invert PCIe legacy interrupts).
  302. * We are de-swizzling here because the numbers are actually for
  303. * port of the root complex virtual P2P bridge. But I want
  304. * to avoid putting a node for it in the tree, so the numbers
  305. * below are basically de-swizzled numbers.
  306. * The real slot is on idsel 0, so the swizzling is 1:1
  307. */
  308. interrupt-map-mask = <0x0 0x0 0x0 0x7>;
  309. interrupt-map = <
  310. 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
  311. 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
  312. 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
  313. 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
  314. };
  315. };
  316. };