pci-tx4938.c 4.1 KB

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  1. /*
  2. * linux/arch/mips/pci/pci-tx4938.c
  3. *
  4. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  5. * and RBTX49xx patch from CELF patch archive.
  6. *
  7. * Copyright 2001, 2003-2005 MontaVista Software Inc.
  8. * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org)
  9. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  10. *
  11. * This file is subject to the terms and conditions of the GNU General Public
  12. * License. See the file "COPYING" in the main directory of this archive
  13. * for more details.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/pci.h>
  17. #include <linux/kernel.h>
  18. #include <linux/interrupt.h>
  19. #include <asm/txx9/generic.h>
  20. #include <asm/txx9/tx4938.h>
  21. int __init tx4938_report_pciclk(void)
  22. {
  23. int pciclk = 0;
  24. printk(KERN_INFO "PCIC --%s PCICLK:",
  25. (__raw_readq(&tx4938_ccfgptr->ccfg) & TX4938_CCFG_PCI66) ?
  26. " PCI66" : "");
  27. if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
  28. u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
  29. switch ((unsigned long)ccfg &
  30. TX4938_CCFG_PCIDIVMODE_MASK) {
  31. case TX4938_CCFG_PCIDIVMODE_4:
  32. pciclk = txx9_cpu_clock / 4; break;
  33. case TX4938_CCFG_PCIDIVMODE_4_5:
  34. pciclk = txx9_cpu_clock * 2 / 9; break;
  35. case TX4938_CCFG_PCIDIVMODE_5:
  36. pciclk = txx9_cpu_clock / 5; break;
  37. case TX4938_CCFG_PCIDIVMODE_5_5:
  38. pciclk = txx9_cpu_clock * 2 / 11; break;
  39. case TX4938_CCFG_PCIDIVMODE_8:
  40. pciclk = txx9_cpu_clock / 8; break;
  41. case TX4938_CCFG_PCIDIVMODE_9:
  42. pciclk = txx9_cpu_clock / 9; break;
  43. case TX4938_CCFG_PCIDIVMODE_10:
  44. pciclk = txx9_cpu_clock / 10; break;
  45. case TX4938_CCFG_PCIDIVMODE_11:
  46. pciclk = txx9_cpu_clock / 11; break;
  47. }
  48. printk("Internal(%u.%uMHz)",
  49. (pciclk + 50000) / 1000000,
  50. ((pciclk + 50000) / 100000) % 10);
  51. } else {
  52. printk("External");
  53. pciclk = -1;
  54. }
  55. printk("\n");
  56. return pciclk;
  57. }
  58. void __init tx4938_report_pci1clk(void)
  59. {
  60. __u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
  61. unsigned int pciclk =
  62. txx9_gbus_clock / ((ccfg & TX4938_CCFG_PCI1DMD) ? 4 : 2);
  63. printk(KERN_INFO "PCIC1 -- %sPCICLK:%u.%uMHz\n",
  64. (ccfg & TX4938_CCFG_PCI1_66) ? "PCI66 " : "",
  65. (pciclk + 50000) / 1000000,
  66. ((pciclk + 50000) / 100000) % 10);
  67. }
  68. int __init tx4938_pciclk66_setup(void)
  69. {
  70. int pciclk;
  71. /* Assert M66EN */
  72. tx4938_ccfg_set(TX4938_CCFG_PCI66);
  73. /* Double PCICLK (if possible) */
  74. if (__raw_readq(&tx4938_ccfgptr->pcfg) & TX4938_PCFG_PCICLKEN_ALL) {
  75. unsigned int pcidivmode = 0;
  76. u64 ccfg = __raw_readq(&tx4938_ccfgptr->ccfg);
  77. pcidivmode = (unsigned long)ccfg &
  78. TX4938_CCFG_PCIDIVMODE_MASK;
  79. switch (pcidivmode) {
  80. case TX4938_CCFG_PCIDIVMODE_8:
  81. case TX4938_CCFG_PCIDIVMODE_4:
  82. pcidivmode = TX4938_CCFG_PCIDIVMODE_4;
  83. pciclk = txx9_cpu_clock / 4;
  84. break;
  85. case TX4938_CCFG_PCIDIVMODE_9:
  86. case TX4938_CCFG_PCIDIVMODE_4_5:
  87. pcidivmode = TX4938_CCFG_PCIDIVMODE_4_5;
  88. pciclk = txx9_cpu_clock * 2 / 9;
  89. break;
  90. case TX4938_CCFG_PCIDIVMODE_10:
  91. case TX4938_CCFG_PCIDIVMODE_5:
  92. pcidivmode = TX4938_CCFG_PCIDIVMODE_5;
  93. pciclk = txx9_cpu_clock / 5;
  94. break;
  95. case TX4938_CCFG_PCIDIVMODE_11:
  96. case TX4938_CCFG_PCIDIVMODE_5_5:
  97. default:
  98. pcidivmode = TX4938_CCFG_PCIDIVMODE_5_5;
  99. pciclk = txx9_cpu_clock * 2 / 11;
  100. break;
  101. }
  102. tx4938_ccfg_change(TX4938_CCFG_PCIDIVMODE_MASK,
  103. pcidivmode);
  104. printk(KERN_DEBUG "PCICLK: ccfg:%08lx\n",
  105. (unsigned long)__raw_readq(&tx4938_ccfgptr->ccfg));
  106. } else
  107. pciclk = -1;
  108. return pciclk;
  109. }
  110. int __init tx4938_pcic1_map_irq(const struct pci_dev *dev, u8 slot)
  111. {
  112. if (get_tx4927_pcicptr(dev->bus->sysdata) == tx4938_pcic1ptr) {
  113. switch (slot) {
  114. case TX4927_PCIC_IDSEL_AD_TO_SLOT(31):
  115. if (__raw_readq(&tx4938_ccfgptr->pcfg) &
  116. TX4938_PCFG_ETH0_SEL)
  117. return TXX9_IRQ_BASE + TX4938_IR_ETH0;
  118. break;
  119. case TX4927_PCIC_IDSEL_AD_TO_SLOT(30):
  120. if (__raw_readq(&tx4938_ccfgptr->pcfg) &
  121. TX4938_PCFG_ETH1_SEL)
  122. return TXX9_IRQ_BASE + TX4938_IR_ETH1;
  123. break;
  124. }
  125. return 0;
  126. }
  127. return -1;
  128. }
  129. void __init tx4938_setup_pcierr_irq(void)
  130. {
  131. if (request_irq(TXX9_IRQ_BASE + TX4938_IR_PCIERR,
  132. tx4927_pcierr_interrupt,
  133. IRQF_DISABLED, "PCI error",
  134. (void *)TX4927_PCIC_REG))
  135. printk(KERN_WARNING "Failed to request irq for PCIERR\n");
  136. }