dma_v.h 1.1 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152
  1. /*
  2. * Copyright 2002 Integrated Device Technology, Inc.
  3. * All rights reserved.
  4. *
  5. * DMA register definition.
  6. *
  7. * Author : ryan.holmQVist@idt.com
  8. * Date : 20011005
  9. */
  10. #ifndef _ASM_RC32434_DMA_V_H_
  11. #define _ASM_RC32434_DMA_V_H_
  12. #include <asm/mach-rc32434/dma.h>
  13. #include <asm/mach-rc32434/rc32434.h>
  14. #define DMA_CHAN_OFFSET 0x14
  15. #define IS_DMA_USED(X) (((X) & \
  16. (DMA_DESC_FINI | DMA_DESC_DONE | DMA_DESC_TERM)) \
  17. != 0)
  18. #define DMA_COUNT(count) ((count) & DMA_DESC_COUNT_MSK)
  19. #define DMA_HALT_TIMEOUT 500
  20. static inline int rc32434_halt_dma(struct dma_reg *ch)
  21. {
  22. int timeout = 1;
  23. if (__raw_readl(&ch->dmac) & DMA_CHAN_RUN_BIT) {
  24. __raw_writel(0, &ch->dmac);
  25. for (timeout = DMA_HALT_TIMEOUT; timeout > 0; timeout--) {
  26. if (__raw_readl(&ch->dmas) & DMA_STAT_HALT) {
  27. __raw_writel(0, &ch->dmas);
  28. break;
  29. }
  30. }
  31. }
  32. return timeout ? 0 : 1;
  33. }
  34. static inline void rc32434_start_dma(struct dma_reg *ch, u32 dma_addr)
  35. {
  36. __raw_writel(0, &ch->dmandptr);
  37. __raw_writel(dma_addr, &ch->dmadptr);
  38. }
  39. static inline void rc32434_chain_dma(struct dma_reg *ch, u32 dma_addr)
  40. {
  41. __raw_writel(dma_addr, &ch->dmandptr);
  42. }
  43. #endif /* _ASM_RC32434_DMA_V_H_ */