config.c 4.6 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/520x/config.c
  4. *
  5. * Copyright (C) 2005, Freescale (www.freescale.com)
  6. * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com)
  7. * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
  8. * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
  9. */
  10. /***************************************************************************/
  11. #include <linux/kernel.h>
  12. #include <linux/param.h>
  13. #include <linux/init.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <asm/machdep.h>
  17. #include <asm/coldfire.h>
  18. #include <asm/mcfsim.h>
  19. #include <asm/mcfuart.h>
  20. /***************************************************************************/
  21. void coldfire_reset(void);
  22. /***************************************************************************/
  23. static struct mcf_platform_uart m520x_uart_platform[] = {
  24. {
  25. .mapbase = MCF_MBAR + MCFUART_BASE1,
  26. .irq = MCFINT_VECBASE + MCFINT_UART0,
  27. },
  28. {
  29. .mapbase = MCF_MBAR + MCFUART_BASE2,
  30. .irq = MCFINT_VECBASE + MCFINT_UART1,
  31. },
  32. {
  33. .mapbase = MCF_MBAR + MCFUART_BASE3,
  34. .irq = MCFINT_VECBASE + MCFINT_UART2,
  35. },
  36. { },
  37. };
  38. static struct platform_device m520x_uart = {
  39. .name = "mcfuart",
  40. .id = 0,
  41. .dev.platform_data = m520x_uart_platform,
  42. };
  43. static struct resource m520x_fec_resources[] = {
  44. {
  45. .start = MCF_MBAR + 0x30000,
  46. .end = MCF_MBAR + 0x30000 + 0x7ff,
  47. .flags = IORESOURCE_MEM,
  48. },
  49. {
  50. .start = 64 + 36,
  51. .end = 64 + 36,
  52. .flags = IORESOURCE_IRQ,
  53. },
  54. {
  55. .start = 64 + 40,
  56. .end = 64 + 40,
  57. .flags = IORESOURCE_IRQ,
  58. },
  59. {
  60. .start = 64 + 42,
  61. .end = 64 + 42,
  62. .flags = IORESOURCE_IRQ,
  63. },
  64. };
  65. static struct platform_device m520x_fec = {
  66. .name = "fec",
  67. .id = 0,
  68. .num_resources = ARRAY_SIZE(m520x_fec_resources),
  69. .resource = m520x_fec_resources,
  70. };
  71. static struct platform_device *m520x_devices[] __initdata = {
  72. &m520x_uart,
  73. &m520x_fec,
  74. };
  75. /***************************************************************************/
  76. #define INTC0 (MCF_MBAR + MCFICM_INTC0)
  77. static void __init m520x_uart_init_line(int line, int irq)
  78. {
  79. u32 imr;
  80. u16 par;
  81. u8 par2;
  82. writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
  83. imr = readl(INTC0 + MCFINTC_IMRL);
  84. imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
  85. writel(imr, INTC0 + MCFINTC_IMRL);
  86. switch (line) {
  87. case 0:
  88. par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
  89. par |= MCF_GPIO_PAR_UART_PAR_UTXD0 |
  90. MCF_GPIO_PAR_UART_PAR_URXD0;
  91. writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
  92. break;
  93. case 1:
  94. par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
  95. par |= MCF_GPIO_PAR_UART_PAR_UTXD1 |
  96. MCF_GPIO_PAR_UART_PAR_URXD1;
  97. writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
  98. break;
  99. case 2:
  100. par2 = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  101. par2 &= ~0x0F;
  102. par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
  103. MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
  104. writeb(par2, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  105. break;
  106. }
  107. }
  108. static void __init m520x_uarts_init(void)
  109. {
  110. const int nrlines = ARRAY_SIZE(m520x_uart_platform);
  111. int line;
  112. for (line = 0; (line < nrlines); line++)
  113. m520x_uart_init_line(line, m520x_uart_platform[line].irq);
  114. }
  115. /***************************************************************************/
  116. static void __init m520x_fec_init(void)
  117. {
  118. u32 imr;
  119. u8 v;
  120. /* Unmask FEC interrupts at ColdFire interrupt controller */
  121. writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 36);
  122. writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
  123. writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);
  124. imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
  125. imr &= ~0x0001FFF0;
  126. writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
  127. /* Set multi-function pins to ethernet mode */
  128. v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
  129. writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);
  130. v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  131. writeb(v | 0x0f, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  132. }
  133. /***************************************************************************/
  134. /*
  135. * Program the vector to be an auto-vectored.
  136. */
  137. void mcf_autovector(unsigned int vec)
  138. {
  139. /* Everything is auto-vectored on the 520x devices */
  140. }
  141. /***************************************************************************/
  142. void __init config_BSP(char *commandp, int size)
  143. {
  144. mach_reset = coldfire_reset;
  145. m520x_uarts_init();
  146. m520x_fec_init();
  147. }
  148. /***************************************************************************/
  149. static int __init init_BSP(void)
  150. {
  151. platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
  152. return 0;
  153. }
  154. arch_initcall(init_BSP);
  155. /***************************************************************************/