macints.h 4.0 KB

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  1. /*
  2. ** macints.h -- Macintosh Linux interrupt handling structs and prototypes
  3. **
  4. ** Copyright 1997 by Michael Schmitz
  5. **
  6. ** This file is subject to the terms and conditions of the GNU General Public
  7. ** License. See the file COPYING in the main directory of this archive
  8. ** for more details.
  9. **
  10. */
  11. #ifndef _ASM_MACINTS_H_
  12. #define _ASM_MACINTS_H_
  13. #include <asm/irq.h>
  14. /* Setting this prints debugging info for unclaimed interrupts */
  15. #define DEBUG_SPURIOUS
  16. /* Setting this prints debugging info on each autovector interrupt */
  17. /* #define DEBUG_IRQS */
  18. /* Setting this prints debugging info on each Nubus interrupt */
  19. /* #define DEBUG_NUBUS_INT */
  20. /* Setting this prints debugging info on irqs as they enabled and disabled. */
  21. /* #define DEBUG_IRQUSE */
  22. /*
  23. * Base IRQ number for all Mac68K interrupt sources. Each source
  24. * has eight indexes (base -> base+7).
  25. */
  26. #define VIA1_SOURCE_BASE 8
  27. #define VIA2_SOURCE_BASE 16
  28. #define MAC_SCC_SOURCE_BASE 24
  29. #define PSC3_SOURCE_BASE 24
  30. #define PSC4_SOURCE_BASE 32
  31. #define PSC5_SOURCE_BASE 40
  32. #define PSC6_SOURCE_BASE 48
  33. #define NUBUS_SOURCE_BASE 56
  34. #define BABOON_SOURCE_BASE 64
  35. /*
  36. * Maximum IRQ number is BABOON_SOURCE_BASE + 7,
  37. * giving us IRQs up through 71
  38. */
  39. #define NUM_MAC_SOURCES 72
  40. /*
  41. * clean way to separate IRQ into its source and index
  42. */
  43. #define IRQ_SRC(irq) (irq >> 3)
  44. #define IRQ_IDX(irq) (irq & 7)
  45. /* VIA1 interrupts */
  46. #define IRQ_VIA1_0 (8) /* one second int. */
  47. #define IRQ_VIA1_1 (9) /* VBlank int. */
  48. #define IRQ_MAC_VBL IRQ_VIA1_1
  49. #define IRQ_VIA1_2 (10) /* ADB SR shifts complete */
  50. #define IRQ_MAC_ADB IRQ_VIA1_2
  51. #define IRQ_MAC_ADB_SR IRQ_VIA1_2
  52. #define IRQ_VIA1_3 (11) /* ADB SR CB2 ?? */
  53. #define IRQ_MAC_ADB_SD IRQ_VIA1_3
  54. #define IRQ_VIA1_4 (12) /* ADB SR ext. clock pulse */
  55. #define IRQ_MAC_ADB_CL IRQ_VIA1_4
  56. #define IRQ_VIA1_5 (13)
  57. #define IRQ_MAC_TIMER_2 IRQ_VIA1_5
  58. #define IRQ_VIA1_6 (14)
  59. #define IRQ_MAC_TIMER_1 IRQ_VIA1_6
  60. #define IRQ_VIA1_7 (15)
  61. /* VIA2/RBV interrupts */
  62. #define IRQ_VIA2_0 (16)
  63. #define IRQ_MAC_SCSIDRQ IRQ_VIA2_0
  64. #define IRQ_VIA2_1 (17)
  65. #define IRQ_MAC_NUBUS IRQ_VIA2_1
  66. #define IRQ_VIA2_2 (18)
  67. #define IRQ_VIA2_3 (19)
  68. #define IRQ_MAC_SCSI IRQ_VIA2_3
  69. #define IRQ_VIA2_4 (20)
  70. #define IRQ_VIA2_5 (21)
  71. #define IRQ_VIA2_6 (22)
  72. #define IRQ_VIA2_7 (23)
  73. /* Level 3 (PSC, AV Macs only) interrupts */
  74. #define IRQ_PSC3_0 (24)
  75. #define IRQ_MAC_MACE IRQ_PSC3_0
  76. #define IRQ_PSC3_1 (25)
  77. #define IRQ_PSC3_2 (26)
  78. #define IRQ_PSC3_3 (27)
  79. /* Level 4 (SCC) interrupts */
  80. #define IRQ_SCC (32)
  81. #define IRQ_SCCA (33)
  82. #define IRQ_SCCB (34)
  83. #if 0 /* FIXME: are there multiple interrupt conditions on the SCC ?? */
  84. /* SCC interrupts */
  85. #define IRQ_SCCB_TX (32)
  86. #define IRQ_SCCB_STAT (33)
  87. #define IRQ_SCCB_RX (34)
  88. #define IRQ_SCCB_SPCOND (35)
  89. #define IRQ_SCCA_TX (36)
  90. #define IRQ_SCCA_STAT (37)
  91. #define IRQ_SCCA_RX (38)
  92. #define IRQ_SCCA_SPCOND (39)
  93. #endif
  94. /* Level 4 (PSC, AV Macs only) interrupts */
  95. #define IRQ_PSC4_0 (32)
  96. #define IRQ_PSC4_1 (33)
  97. #define IRQ_PSC4_2 (34)
  98. #define IRQ_PSC4_3 (35)
  99. #define IRQ_MAC_MACE_DMA IRQ_PSC4_3
  100. /* Level 5 (PSC, AV Macs only) interrupts */
  101. #define IRQ_PSC5_0 (40)
  102. #define IRQ_PSC5_1 (41)
  103. #define IRQ_PSC5_2 (42)
  104. #define IRQ_PSC5_3 (43)
  105. /* Level 6 (PSC, AV Macs only) interrupts */
  106. #define IRQ_PSC6_0 (48)
  107. #define IRQ_PSC6_1 (49)
  108. #define IRQ_PSC6_2 (50)
  109. #define IRQ_PSC6_3 (51)
  110. /* Nubus interrupts (cascaded to VIA2) */
  111. #define IRQ_NUBUS_9 (56)
  112. #define IRQ_NUBUS_A (57)
  113. #define IRQ_NUBUS_B (58)
  114. #define IRQ_NUBUS_C (59)
  115. #define IRQ_NUBUS_D (60)
  116. #define IRQ_NUBUS_E (61)
  117. #define IRQ_NUBUS_F (62)
  118. /* Baboon interrupts (cascaded to nubus slot $C) */
  119. #define IRQ_BABOON_0 (64)
  120. #define IRQ_BABOON_1 (65)
  121. #define IRQ_BABOON_2 (66)
  122. #define IRQ_BABOON_3 (67)
  123. #define SLOT2IRQ(x) (x + 47)
  124. #define IRQ2SLOT(x) (x - 47)
  125. #define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */
  126. #define INT_TICKS 246 /* to make sched_time = 99.902... HZ */
  127. #endif /* asm/macints.h */