setup.c 6.5 KB

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  1. /*
  2. * linux/arch/m32r/platforms/mappi3/setup.c
  3. *
  4. * Setup routines for Renesas MAPPI-III(M3A-2170) Board
  5. *
  6. * Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
  7. * Hitoshi Yamamoto, Mamoru Sakugawa
  8. */
  9. #include <linux/irq.h>
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <asm/system.h>
  14. #include <asm/m32r.h>
  15. #include <asm/io.h>
  16. #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
  17. icu_data_t icu_data[NR_IRQS];
  18. static void disable_mappi3_irq(unsigned int irq)
  19. {
  20. unsigned long port, data;
  21. if ((irq == 0) ||(irq >= NR_IRQS)) {
  22. printk("bad irq 0x%08x\n", irq);
  23. return;
  24. }
  25. port = irq2port(irq);
  26. data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
  27. outl(data, port);
  28. }
  29. static void enable_mappi3_irq(unsigned int irq)
  30. {
  31. unsigned long port, data;
  32. if ((irq == 0) ||(irq >= NR_IRQS)) {
  33. printk("bad irq 0x%08x\n", irq);
  34. return;
  35. }
  36. port = irq2port(irq);
  37. data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
  38. outl(data, port);
  39. }
  40. static void mask_and_ack_mappi3(unsigned int irq)
  41. {
  42. disable_mappi3_irq(irq);
  43. }
  44. static void end_mappi3_irq(unsigned int irq)
  45. {
  46. enable_mappi3_irq(irq);
  47. }
  48. static unsigned int startup_mappi3_irq(unsigned int irq)
  49. {
  50. enable_mappi3_irq(irq);
  51. return (0);
  52. }
  53. static void shutdown_mappi3_irq(unsigned int irq)
  54. {
  55. unsigned long port;
  56. port = irq2port(irq);
  57. outl(M32R_ICUCR_ILEVEL7, port);
  58. }
  59. static struct hw_interrupt_type mappi3_irq_type =
  60. {
  61. .typename = "MAPPI3-IRQ",
  62. .startup = startup_mappi3_irq,
  63. .shutdown = shutdown_mappi3_irq,
  64. .enable = enable_mappi3_irq,
  65. .disable = disable_mappi3_irq,
  66. .ack = mask_and_ack_mappi3,
  67. .end = end_mappi3_irq
  68. };
  69. void __init init_IRQ(void)
  70. {
  71. #if defined(CONFIG_SMC91X)
  72. /* INT0 : LAN controller (SMC91111) */
  73. irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
  74. irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
  75. irq_desc[M32R_IRQ_INT0].action = 0;
  76. irq_desc[M32R_IRQ_INT0].depth = 1;
  77. icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
  78. disable_mappi3_irq(M32R_IRQ_INT0);
  79. #endif /* CONFIG_SMC91X */
  80. /* MFT2 : system timer */
  81. irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
  82. irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
  83. irq_desc[M32R_IRQ_MFT2].action = 0;
  84. irq_desc[M32R_IRQ_MFT2].depth = 1;
  85. icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
  86. disable_mappi3_irq(M32R_IRQ_MFT2);
  87. #ifdef CONFIG_SERIAL_M32R_SIO
  88. /* SIO0_R : uart receive data */
  89. irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
  90. irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
  91. irq_desc[M32R_IRQ_SIO0_R].action = 0;
  92. irq_desc[M32R_IRQ_SIO0_R].depth = 1;
  93. icu_data[M32R_IRQ_SIO0_R].icucr = 0;
  94. disable_mappi3_irq(M32R_IRQ_SIO0_R);
  95. /* SIO0_S : uart send data */
  96. irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
  97. irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
  98. irq_desc[M32R_IRQ_SIO0_S].action = 0;
  99. irq_desc[M32R_IRQ_SIO0_S].depth = 1;
  100. icu_data[M32R_IRQ_SIO0_S].icucr = 0;
  101. disable_mappi3_irq(M32R_IRQ_SIO0_S);
  102. /* SIO1_R : uart receive data */
  103. irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
  104. irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
  105. irq_desc[M32R_IRQ_SIO1_R].action = 0;
  106. irq_desc[M32R_IRQ_SIO1_R].depth = 1;
  107. icu_data[M32R_IRQ_SIO1_R].icucr = 0;
  108. disable_mappi3_irq(M32R_IRQ_SIO1_R);
  109. /* SIO1_S : uart send data */
  110. irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
  111. irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
  112. irq_desc[M32R_IRQ_SIO1_S].action = 0;
  113. irq_desc[M32R_IRQ_SIO1_S].depth = 1;
  114. icu_data[M32R_IRQ_SIO1_S].icucr = 0;
  115. disable_mappi3_irq(M32R_IRQ_SIO1_S);
  116. #endif /* CONFIG_M32R_USE_DBG_CONSOLE */
  117. #if defined(CONFIG_USB)
  118. /* INT1 : USB Host controller interrupt */
  119. irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
  120. irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
  121. irq_desc[M32R_IRQ_INT1].action = 0;
  122. irq_desc[M32R_IRQ_INT1].depth = 1;
  123. icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
  124. disable_mappi3_irq(M32R_IRQ_INT1);
  125. #endif /* CONFIG_USB */
  126. /* CFC IREQ */
  127. irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
  128. irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
  129. irq_desc[PLD_IRQ_CFIREQ].action = 0;
  130. irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
  131. icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
  132. disable_mappi3_irq(PLD_IRQ_CFIREQ);
  133. #if defined(CONFIG_M32R_CFC)
  134. /* ICUCR41: CFC Insert & eject */
  135. irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
  136. irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
  137. irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
  138. irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
  139. icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
  140. disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
  141. #endif /* CONFIG_M32R_CFC */
  142. /* IDE IREQ */
  143. irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
  144. irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
  145. irq_desc[PLD_IRQ_IDEIREQ].action = 0;
  146. irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
  147. icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
  148. disable_mappi3_irq(PLD_IRQ_IDEIREQ);
  149. }
  150. #if defined(CONFIG_SMC91X)
  151. #define LAN_IOSTART 0x300
  152. #define LAN_IOEND 0x320
  153. static struct resource smc91x_resources[] = {
  154. [0] = {
  155. .start = (LAN_IOSTART),
  156. .end = (LAN_IOEND),
  157. .flags = IORESOURCE_MEM,
  158. },
  159. [1] = {
  160. .start = M32R_IRQ_INT0,
  161. .end = M32R_IRQ_INT0,
  162. .flags = IORESOURCE_IRQ,
  163. }
  164. };
  165. static struct platform_device smc91x_device = {
  166. .name = "smc91x",
  167. .id = 0,
  168. .num_resources = ARRAY_SIZE(smc91x_resources),
  169. .resource = smc91x_resources,
  170. };
  171. #endif
  172. #if defined(CONFIG_FB_S1D13XXX)
  173. #include <video/s1d13xxxfb.h>
  174. #include <asm/s1d13806.h>
  175. static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
  176. .initregs = s1d13xxxfb_initregs,
  177. .initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
  178. .platform_init_video = NULL,
  179. #ifdef CONFIG_PM
  180. .platform_suspend_video = NULL,
  181. .platform_resume_video = NULL,
  182. #endif
  183. };
  184. static struct resource s1d13xxxfb_resources[] = {
  185. [0] = {
  186. .start = 0x1d600000UL,
  187. .end = 0x1d73FFFFUL,
  188. .flags = IORESOURCE_MEM,
  189. },
  190. [1] = {
  191. .start = 0x1d400000UL,
  192. .end = 0x1d4001FFUL,
  193. .flags = IORESOURCE_MEM,
  194. }
  195. };
  196. static struct platform_device s1d13xxxfb_device = {
  197. .name = S1D_DEVICENAME,
  198. .id = 0,
  199. .dev = {
  200. .platform_data = &s1d13xxxfb_data,
  201. },
  202. .num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
  203. .resource = s1d13xxxfb_resources,
  204. };
  205. #endif
  206. static int __init platform_init(void)
  207. {
  208. #if defined(CONFIG_SMC91X)
  209. platform_device_register(&smc91x_device);
  210. #endif
  211. #if defined(CONFIG_FB_S1D13XXX)
  212. platform_device_register(&s1d13xxxfb_device);
  213. #endif
  214. return 0;
  215. }
  216. arch_initcall(platform_init);