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linux-vybrid_pu...
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arch
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ia64
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kvm
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asm-offsets.c

asm-offsets.c 9.4 KB
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  1. /*
    2. 

  2.  * asm-offsets.c Generate definitions needed by assembly language modules.
    3. 

  3.  * This code generates raw asm output which is post-processed
    4. 

  4.  * to extract and format the required data.
    5. 

  5.  *
    6. 

  6.  * Anthony Xu    <anthony.xu@intel.com>
    7. 

  7.  * Xiantao Zhang <xiantao.zhang@intel.com>
    8. 

  8.  * Copyright (c) 2007 Intel Corporation  KVM support.
    9. 

  9.  *
    10. 

  10.  * This program is free software; you can redistribute it and/or modify it
    11. 

  11.  * under the terms and conditions of the GNU General Public License,
    12. 

  12.  * version 2, as published by the Free Software Foundation.
    13. 

  13.  *
    14. 

  14.  * This program is distributed in the hope it will be useful, but WITHOUT
    15. 

  15.  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
    16. 

  16.  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
    17. 

  17.  * more details.
    18. 

  18.  *
    19. 

  19.  * You should have received a copy of the GNU General Public License along with
    20. 

  20.  * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
    21. 

  21.  * Place - Suite 330, Boston, MA 02111-1307 USA.
    22. 

  22.  *
    23. 

  23.  */
    24. 

  24. 

  25. #include <linux/autoconf.h>
    26. 

  26. #include <linux/kvm_host.h>
    27. 

  27. #include <linux/kbuild.h>
    28. 

  28. 

  29. #include "vcpu.h"
    30. 

  30. 

  31. void foo(void)
    32. 

  32. {
    33. 

  33. 	DEFINE(VMM_TASK_SIZE, sizeof(struct kvm_vcpu));
    34. 

  34. 	DEFINE(VMM_PT_REGS_SIZE, sizeof(struct kvm_pt_regs));
    35. 

  35. 

  36. 	BLANK();
    37. 

  37. 

  38. 	DEFINE(VMM_VCPU_META_RR0_OFFSET,
    39. 

  39. 			offsetof(struct kvm_vcpu, arch.metaphysical_rr0));
    40. 

  40. 	DEFINE(VMM_VCPU_META_SAVED_RR0_OFFSET,
    41. 

  41. 			offsetof(struct kvm_vcpu,
    42. 

  42. 				arch.metaphysical_saved_rr0));
    43. 

  43. 	DEFINE(VMM_VCPU_VRR0_OFFSET,
    44. 

  44. 			offsetof(struct kvm_vcpu, arch.vrr[0]));
    45. 

  45. 	DEFINE(VMM_VPD_IRR0_OFFSET,
    46. 

  46. 			offsetof(struct vpd, irr[0]));
    47. 

  47. 	DEFINE(VMM_VCPU_ITC_CHECK_OFFSET,
    48. 

  48. 			offsetof(struct kvm_vcpu, arch.itc_check));
    49. 

  49. 	DEFINE(VMM_VCPU_IRQ_CHECK_OFFSET,
    50. 

  50. 			offsetof(struct kvm_vcpu, arch.irq_check));
    51. 

  51. 	DEFINE(VMM_VPD_VHPI_OFFSET,
    52. 

  52. 			offsetof(struct vpd, vhpi));
    53. 

  53. 	DEFINE(VMM_VCPU_VSA_BASE_OFFSET,
    54. 

  54. 			offsetof(struct kvm_vcpu, arch.vsa_base));
    55. 

  55. 	DEFINE(VMM_VCPU_VPD_OFFSET,
    56. 

  56. 			offsetof(struct kvm_vcpu, arch.vpd));
    57. 

  57. 	DEFINE(VMM_VCPU_IRQ_CHECK,
    58. 

  58. 			offsetof(struct kvm_vcpu, arch.irq_check));
    59. 

  59. 	DEFINE(VMM_VCPU_TIMER_PENDING,
    60. 

  60. 			offsetof(struct kvm_vcpu, arch.timer_pending));
    61. 

  61. 	DEFINE(VMM_VCPU_META_SAVED_RR0_OFFSET,
    62. 

  62. 			offsetof(struct kvm_vcpu, arch.metaphysical_saved_rr0));
    63. 

  63. 	DEFINE(VMM_VCPU_MODE_FLAGS_OFFSET,
    64. 

  64. 			offsetof(struct kvm_vcpu, arch.mode_flags));
    65. 

  65. 	DEFINE(VMM_VCPU_ITC_OFS_OFFSET,
    66. 

  66. 			offsetof(struct kvm_vcpu, arch.itc_offset));
    67. 

  67. 	DEFINE(VMM_VCPU_LAST_ITC_OFFSET,
    68. 

  68. 			offsetof(struct kvm_vcpu, arch.last_itc));
    69. 

  69. 	DEFINE(VMM_VCPU_SAVED_GP_OFFSET,
    70. 

  70. 			offsetof(struct kvm_vcpu, arch.saved_gp));
    71. 

  71. 

  72. 	BLANK();
    73. 

  73. 

  74. 	DEFINE(VMM_PT_REGS_B6_OFFSET,
    75. 

  75. 				offsetof(struct kvm_pt_regs, b6));
    76. 

  76. 	DEFINE(VMM_PT_REGS_B7_OFFSET,
    77. 

  77. 				offsetof(struct kvm_pt_regs, b7));
    78. 

  78. 	DEFINE(VMM_PT_REGS_AR_CSD_OFFSET,
    79. 

  79. 				offsetof(struct kvm_pt_regs, ar_csd));
    80. 

  80. 	DEFINE(VMM_PT_REGS_AR_SSD_OFFSET,
    81. 

  81. 				offsetof(struct kvm_pt_regs, ar_ssd));
    82. 

  82. 	DEFINE(VMM_PT_REGS_R8_OFFSET,
    83. 

  83. 				offsetof(struct kvm_pt_regs, r8));
    84. 

  84. 	DEFINE(VMM_PT_REGS_R9_OFFSET,
    85. 

  85. 				offsetof(struct kvm_pt_regs, r9));
    86. 

  86. 	DEFINE(VMM_PT_REGS_R10_OFFSET,
    87. 

  87. 				offsetof(struct kvm_pt_regs, r10));
    88. 

  88. 	DEFINE(VMM_PT_REGS_R11_OFFSET,
    89. 

  89. 				offsetof(struct kvm_pt_regs, r11));
    90. 

  90. 	DEFINE(VMM_PT_REGS_CR_IPSR_OFFSET,
    91. 

  91. 				offsetof(struct kvm_pt_regs, cr_ipsr));
    92. 

  92. 	DEFINE(VMM_PT_REGS_CR_IIP_OFFSET,
    93. 

  93. 				offsetof(struct kvm_pt_regs, cr_iip));
    94. 

  94. 	DEFINE(VMM_PT_REGS_CR_IFS_OFFSET,
    95. 

  95. 				offsetof(struct kvm_pt_regs, cr_ifs));
    96. 

  96. 	DEFINE(VMM_PT_REGS_AR_UNAT_OFFSET,
    97. 

  97. 				offsetof(struct kvm_pt_regs, ar_unat));
    98. 

  98. 	DEFINE(VMM_PT_REGS_AR_PFS_OFFSET,
    99. 

  99. 				offsetof(struct kvm_pt_regs, ar_pfs));
    100. 

  100. 	DEFINE(VMM_PT_REGS_AR_RSC_OFFSET,
    101. 

  101. 				offsetof(struct kvm_pt_regs, ar_rsc));
    102. 

  102. 	DEFINE(VMM_PT_REGS_AR_RNAT_OFFSET,
    103. 

  103. 				offsetof(struct kvm_pt_regs, ar_rnat));
    104. 

  104. 

  105. 	DEFINE(VMM_PT_REGS_AR_BSPSTORE_OFFSET,
    106. 

  106. 				offsetof(struct kvm_pt_regs, ar_bspstore));
    107. 

  107. 	DEFINE(VMM_PT_REGS_PR_OFFSET,
    108. 

  108. 				offsetof(struct kvm_pt_regs, pr));
    109. 

  109. 	DEFINE(VMM_PT_REGS_B0_OFFSET,
    110. 

  110. 				offsetof(struct kvm_pt_regs, b0));
    111. 

  111. 	DEFINE(VMM_PT_REGS_LOADRS_OFFSET,
    112. 

  112. 				offsetof(struct kvm_pt_regs, loadrs));
    113. 

  113. 	DEFINE(VMM_PT_REGS_R1_OFFSET,
    114. 

  114. 				offsetof(struct kvm_pt_regs, r1));
    115. 

  115. 	DEFINE(VMM_PT_REGS_R12_OFFSET,
    116. 

  116. 				offsetof(struct kvm_pt_regs, r12));
    117. 

  117. 	DEFINE(VMM_PT_REGS_R13_OFFSET,
    118. 

  118. 				offsetof(struct kvm_pt_regs, r13));
    119. 

  119. 	DEFINE(VMM_PT_REGS_AR_FPSR_OFFSET,
    120. 

  120. 				offsetof(struct kvm_pt_regs, ar_fpsr));
    121. 

  121. 	DEFINE(VMM_PT_REGS_R15_OFFSET,
    122. 

  122. 				offsetof(struct kvm_pt_regs, r15));
    123. 

  123. 	DEFINE(VMM_PT_REGS_R14_OFFSET,
    124. 

  124. 				offsetof(struct kvm_pt_regs, r14));
    125. 

  125. 	DEFINE(VMM_PT_REGS_R2_OFFSET,
    126. 

  126. 				offsetof(struct kvm_pt_regs, r2));
    127. 

  127. 	DEFINE(VMM_PT_REGS_R3_OFFSET,
    128. 

  128. 				offsetof(struct kvm_pt_regs, r3));
    129. 

  129. 	DEFINE(VMM_PT_REGS_R16_OFFSET,
    130. 

  130. 				offsetof(struct kvm_pt_regs, r16));
    131. 

  131. 	DEFINE(VMM_PT_REGS_R17_OFFSET,
    132. 

  132. 				offsetof(struct kvm_pt_regs, r17));
    133. 

  133. 	DEFINE(VMM_PT_REGS_R18_OFFSET,
    134. 

  134. 				offsetof(struct kvm_pt_regs, r18));
    135. 

  135. 	DEFINE(VMM_PT_REGS_R19_OFFSET,
    136. 

  136. 				offsetof(struct kvm_pt_regs, r19));
    137. 

  137. 	DEFINE(VMM_PT_REGS_R20_OFFSET,
    138. 

  138. 				offsetof(struct kvm_pt_regs, r20));
    139. 

  139. 	DEFINE(VMM_PT_REGS_R21_OFFSET,
    140. 

  140. 				offsetof(struct kvm_pt_regs, r21));
    141. 

  141. 	DEFINE(VMM_PT_REGS_R22_OFFSET,
    142. 

  142. 				offsetof(struct kvm_pt_regs, r22));
    143. 

  143. 	DEFINE(VMM_PT_REGS_R23_OFFSET,
    144. 

  144. 				offsetof(struct kvm_pt_regs, r23));
    145. 

  145. 	DEFINE(VMM_PT_REGS_R24_OFFSET,
    146. 

  146. 				offsetof(struct kvm_pt_regs, r24));
    147. 

  147. 	DEFINE(VMM_PT_REGS_R25_OFFSET,
    148. 

  148. 				offsetof(struct kvm_pt_regs, r25));
    149. 

  149. 	DEFINE(VMM_PT_REGS_R26_OFFSET,
    150. 

  150. 				offsetof(struct kvm_pt_regs, r26));
    151. 

  151. 	DEFINE(VMM_PT_REGS_R27_OFFSET,
    152. 

  152. 				offsetof(struct kvm_pt_regs, r27));
    153. 

  153. 	DEFINE(VMM_PT_REGS_R28_OFFSET,
    154. 

  154. 				offsetof(struct kvm_pt_regs, r28));
    155. 

  155. 	DEFINE(VMM_PT_REGS_R29_OFFSET,
    156. 

  156. 				offsetof(struct kvm_pt_regs, r29));
    157. 

  157. 	DEFINE(VMM_PT_REGS_R30_OFFSET,
    158. 

  158. 				offsetof(struct kvm_pt_regs, r30));
    159. 

  159. 	DEFINE(VMM_PT_REGS_R31_OFFSET,
    160. 

  160. 				offsetof(struct kvm_pt_regs, r31));
    161. 

  161. 	DEFINE(VMM_PT_REGS_AR_CCV_OFFSET,
    162. 

  162. 				offsetof(struct kvm_pt_regs, ar_ccv));
    163. 

  163. 	DEFINE(VMM_PT_REGS_F6_OFFSET,
    164. 

  164. 				offsetof(struct kvm_pt_regs, f6));
    165. 

  165. 	DEFINE(VMM_PT_REGS_F7_OFFSET,
    166. 

  166. 				offsetof(struct kvm_pt_regs, f7));
    167. 

  167. 	DEFINE(VMM_PT_REGS_F8_OFFSET,
    168. 

  168. 				offsetof(struct kvm_pt_regs, f8));
    169. 

  169. 	DEFINE(VMM_PT_REGS_F9_OFFSET,
    170. 

  170. 				offsetof(struct kvm_pt_regs, f9));
    171. 

  171. 	DEFINE(VMM_PT_REGS_F10_OFFSET,
    172. 

  172. 				offsetof(struct kvm_pt_regs, f10));
    173. 

  173. 	DEFINE(VMM_PT_REGS_F11_OFFSET,
    174. 

  174. 				offsetof(struct kvm_pt_regs, f11));
    175. 

  175. 	DEFINE(VMM_PT_REGS_R4_OFFSET,
    176. 

  176. 				offsetof(struct kvm_pt_regs, r4));
    177. 

  177. 	DEFINE(VMM_PT_REGS_R5_OFFSET,
    178. 

  178. 				offsetof(struct kvm_pt_regs, r5));
    179. 

  179. 	DEFINE(VMM_PT_REGS_R6_OFFSET,
    180. 

  180. 				offsetof(struct kvm_pt_regs, r6));
    181. 

  181. 	DEFINE(VMM_PT_REGS_R7_OFFSET,
    182. 

  182. 				offsetof(struct kvm_pt_regs, r7));
    183. 

  183. 	DEFINE(VMM_PT_REGS_EML_UNAT_OFFSET,
    184. 

  184. 				offsetof(struct kvm_pt_regs, eml_unat));
    185. 

  185. 	DEFINE(VMM_VCPU_IIPA_OFFSET,
    186. 

  186. 				offsetof(struct kvm_vcpu, arch.cr_iipa));
    187. 

  187. 	DEFINE(VMM_VCPU_OPCODE_OFFSET,
    188. 

  188. 				offsetof(struct kvm_vcpu, arch.opcode));
    189. 

  189. 	DEFINE(VMM_VCPU_CAUSE_OFFSET, offsetof(struct kvm_vcpu, arch.cause));
    190. 

  190. 	DEFINE(VMM_VCPU_ISR_OFFSET,
    191. 

  191. 				offsetof(struct kvm_vcpu, arch.cr_isr));
    192. 

  192. 	DEFINE(VMM_PT_REGS_R16_SLOT,
    193. 

  193. 				(((offsetof(struct kvm_pt_regs, r16)
    194. 

  194. 				- sizeof(struct kvm_pt_regs)) >> 3) & 0x3f));
    195. 

  195. 	DEFINE(VMM_VCPU_MODE_FLAGS_OFFSET,
    196. 

  196. 				offsetof(struct kvm_vcpu, arch.mode_flags));
    197. 

  197. 	DEFINE(VMM_VCPU_GP_OFFSET, offsetof(struct kvm_vcpu, arch.__gp));
    198. 

  198. 	BLANK();
    199. 

  199. 

  200. 	DEFINE(VMM_VPD_BASE_OFFSET, offsetof(struct kvm_vcpu, arch.vpd));
    201. 

  201. 	DEFINE(VMM_VPD_VIFS_OFFSET, offsetof(struct vpd, ifs));
    202. 

  202. 	DEFINE(VMM_VLSAPIC_INSVC_BASE_OFFSET,
    203. 

  203. 			offsetof(struct kvm_vcpu, arch.insvc[0]));
    204. 

  204. 	DEFINE(VMM_VPD_VPTA_OFFSET, offsetof(struct vpd, pta));
    205. 

  205. 	DEFINE(VMM_VPD_VPSR_OFFSET, offsetof(struct vpd, vpsr));
    206. 

  206. 

  207. 	DEFINE(VMM_CTX_R4_OFFSET, offsetof(union context, gr[4]));
    208. 

  208. 	DEFINE(VMM_CTX_R5_OFFSET, offsetof(union context, gr[5]));
    209. 

  209. 	DEFINE(VMM_CTX_R12_OFFSET, offsetof(union context, gr[12]));
    210. 

  210. 	DEFINE(VMM_CTX_R13_OFFSET, offsetof(union context, gr[13]));
    211. 

  211. 	DEFINE(VMM_CTX_KR0_OFFSET, offsetof(union context, ar[0]));
    212. 

  212. 	DEFINE(VMM_CTX_KR1_OFFSET, offsetof(union context, ar[1]));
    213. 

  213. 	DEFINE(VMM_CTX_B0_OFFSET, offsetof(union context, br[0]));
    214. 

  214. 	DEFINE(VMM_CTX_B1_OFFSET, offsetof(union context, br[1]));
    215. 

  215. 	DEFINE(VMM_CTX_B2_OFFSET, offsetof(union context, br[2]));
    216. 

  216. 	DEFINE(VMM_CTX_RR0_OFFSET, offsetof(union context, rr[0]));
    217. 

  217. 	DEFINE(VMM_CTX_RSC_OFFSET, offsetof(union context, ar[16]));
    218. 

  218. 	DEFINE(VMM_CTX_BSPSTORE_OFFSET, offsetof(union context, ar[18]));
    219. 

  219. 	DEFINE(VMM_CTX_RNAT_OFFSET, offsetof(union context, ar[19]));
    220. 

  220. 	DEFINE(VMM_CTX_FCR_OFFSET, offsetof(union context, ar[21]));
    221. 

  221. 	DEFINE(VMM_CTX_EFLAG_OFFSET, offsetof(union context, ar[24]));
    222. 

  222. 	DEFINE(VMM_CTX_CFLG_OFFSET, offsetof(union context, ar[27]));
    223. 

  223. 	DEFINE(VMM_CTX_FSR_OFFSET, offsetof(union context, ar[28]));
    224. 

  224. 	DEFINE(VMM_CTX_FIR_OFFSET, offsetof(union context, ar[29]));
    225. 

  225. 	DEFINE(VMM_CTX_FDR_OFFSET, offsetof(union context, ar[30]));
    226. 

  226. 	DEFINE(VMM_CTX_UNAT_OFFSET, offsetof(union context, ar[36]));
    227. 

  227. 	DEFINE(VMM_CTX_FPSR_OFFSET, offsetof(union context, ar[40]));
    228. 

  228. 	DEFINE(VMM_CTX_PFS_OFFSET, offsetof(union context, ar[64]));
    229. 

  229. 	DEFINE(VMM_CTX_LC_OFFSET, offsetof(union context, ar[65]));
    230. 

  230. 	DEFINE(VMM_CTX_DCR_OFFSET, offsetof(union context, cr[0]));
    231. 

  231. 	DEFINE(VMM_CTX_IVA_OFFSET, offsetof(union context, cr[2]));
    232. 

  232. 	DEFINE(VMM_CTX_PTA_OFFSET, offsetof(union context, cr[8]));
    233. 

  233. 	DEFINE(VMM_CTX_IBR0_OFFSET, offsetof(union context, ibr[0]));
    234. 

  234. 	DEFINE(VMM_CTX_DBR0_OFFSET, offsetof(union context, dbr[0]));
    235. 

  235. 	DEFINE(VMM_CTX_F2_OFFSET, offsetof(union context, fr[2]));
    236. 

  236. 	DEFINE(VMM_CTX_F3_OFFSET, offsetof(union context, fr[3]));
    237. 

  237. 	DEFINE(VMM_CTX_F32_OFFSET, offsetof(union context, fr[32]));
    238. 

  238. 	DEFINE(VMM_CTX_F33_OFFSET, offsetof(union context, fr[33]));
    239. 

  239. 	DEFINE(VMM_CTX_PKR0_OFFSET, offsetof(union context, pkr[0]));
    240. 

  240. 	DEFINE(VMM_CTX_PSR_OFFSET, offsetof(union context, psr));
    241. 

  241. 	BLANK();
    242. 

  242. }
    243.