intrinsics.h 7.5 KB

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  1. #ifndef _ASM_IA64_INTRINSICS_H
  2. #define _ASM_IA64_INTRINSICS_H
  3. /*
  4. * Compiler-dependent intrinsics.
  5. *
  6. * Copyright (C) 2002-2003 Hewlett-Packard Co
  7. * David Mosberger-Tang <davidm@hpl.hp.com>
  8. */
  9. #ifndef __ASSEMBLY__
  10. #include <linux/types.h>
  11. /* include compiler specific intrinsics */
  12. #include <asm/ia64regs.h>
  13. #ifdef __INTEL_COMPILER
  14. # include <asm/intel_intrin.h>
  15. #else
  16. # include <asm/gcc_intrin.h>
  17. #endif
  18. #define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
  19. #define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
  20. do { \
  21. ia64_native_set_rr(0x0000000000000000UL, (val0)); \
  22. ia64_native_set_rr(0x2000000000000000UL, (val1)); \
  23. ia64_native_set_rr(0x4000000000000000UL, (val2)); \
  24. ia64_native_set_rr(0x6000000000000000UL, (val3)); \
  25. ia64_native_set_rr(0x8000000000000000UL, (val4)); \
  26. } while (0)
  27. /*
  28. * Force an unresolved reference if someone tries to use
  29. * ia64_fetch_and_add() with a bad value.
  30. */
  31. extern unsigned long __bad_size_for_ia64_fetch_and_add (void);
  32. extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
  33. #define IA64_FETCHADD(tmp,v,n,sz,sem) \
  34. ({ \
  35. switch (sz) { \
  36. case 4: \
  37. tmp = ia64_fetchadd4_##sem((unsigned int *) v, n); \
  38. break; \
  39. \
  40. case 8: \
  41. tmp = ia64_fetchadd8_##sem((unsigned long *) v, n); \
  42. break; \
  43. \
  44. default: \
  45. __bad_size_for_ia64_fetch_and_add(); \
  46. } \
  47. })
  48. #define ia64_fetchadd(i,v,sem) \
  49. ({ \
  50. __u64 _tmp; \
  51. volatile __typeof__(*(v)) *_v = (v); \
  52. /* Can't use a switch () here: gcc isn't always smart enough for that... */ \
  53. if ((i) == -16) \
  54. IA64_FETCHADD(_tmp, _v, -16, sizeof(*(v)), sem); \
  55. else if ((i) == -8) \
  56. IA64_FETCHADD(_tmp, _v, -8, sizeof(*(v)), sem); \
  57. else if ((i) == -4) \
  58. IA64_FETCHADD(_tmp, _v, -4, sizeof(*(v)), sem); \
  59. else if ((i) == -1) \
  60. IA64_FETCHADD(_tmp, _v, -1, sizeof(*(v)), sem); \
  61. else if ((i) == 1) \
  62. IA64_FETCHADD(_tmp, _v, 1, sizeof(*(v)), sem); \
  63. else if ((i) == 4) \
  64. IA64_FETCHADD(_tmp, _v, 4, sizeof(*(v)), sem); \
  65. else if ((i) == 8) \
  66. IA64_FETCHADD(_tmp, _v, 8, sizeof(*(v)), sem); \
  67. else if ((i) == 16) \
  68. IA64_FETCHADD(_tmp, _v, 16, sizeof(*(v)), sem); \
  69. else \
  70. _tmp = __bad_increment_for_ia64_fetch_and_add(); \
  71. (__typeof__(*(v))) (_tmp); /* return old value */ \
  72. })
  73. #define ia64_fetch_and_add(i,v) (ia64_fetchadd(i, v, rel) + (i)) /* return new value */
  74. /*
  75. * This function doesn't exist, so you'll get a linker error if
  76. * something tries to do an invalid xchg().
  77. */
  78. extern void ia64_xchg_called_with_bad_pointer (void);
  79. #define __xchg(x,ptr,size) \
  80. ({ \
  81. unsigned long __xchg_result; \
  82. \
  83. switch (size) { \
  84. case 1: \
  85. __xchg_result = ia64_xchg1((__u8 *)ptr, x); \
  86. break; \
  87. \
  88. case 2: \
  89. __xchg_result = ia64_xchg2((__u16 *)ptr, x); \
  90. break; \
  91. \
  92. case 4: \
  93. __xchg_result = ia64_xchg4((__u32 *)ptr, x); \
  94. break; \
  95. \
  96. case 8: \
  97. __xchg_result = ia64_xchg8((__u64 *)ptr, x); \
  98. break; \
  99. default: \
  100. ia64_xchg_called_with_bad_pointer(); \
  101. } \
  102. __xchg_result; \
  103. })
  104. #define xchg(ptr,x) \
  105. ((__typeof__(*(ptr))) __xchg ((unsigned long) (x), (ptr), sizeof(*(ptr))))
  106. /*
  107. * Atomic compare and exchange. Compare OLD with MEM, if identical,
  108. * store NEW in MEM. Return the initial value in MEM. Success is
  109. * indicated by comparing RETURN with OLD.
  110. */
  111. #define __HAVE_ARCH_CMPXCHG 1
  112. /*
  113. * This function doesn't exist, so you'll get a linker error
  114. * if something tries to do an invalid cmpxchg().
  115. */
  116. extern long ia64_cmpxchg_called_with_bad_pointer (void);
  117. #define ia64_cmpxchg(sem,ptr,old,new,size) \
  118. ({ \
  119. __u64 _o_, _r_; \
  120. \
  121. switch (size) { \
  122. case 1: _o_ = (__u8 ) (long) (old); break; \
  123. case 2: _o_ = (__u16) (long) (old); break; \
  124. case 4: _o_ = (__u32) (long) (old); break; \
  125. case 8: _o_ = (__u64) (long) (old); break; \
  126. default: break; \
  127. } \
  128. switch (size) { \
  129. case 1: \
  130. _r_ = ia64_cmpxchg1_##sem((__u8 *) ptr, new, _o_); \
  131. break; \
  132. \
  133. case 2: \
  134. _r_ = ia64_cmpxchg2_##sem((__u16 *) ptr, new, _o_); \
  135. break; \
  136. \
  137. case 4: \
  138. _r_ = ia64_cmpxchg4_##sem((__u32 *) ptr, new, _o_); \
  139. break; \
  140. \
  141. case 8: \
  142. _r_ = ia64_cmpxchg8_##sem((__u64 *) ptr, new, _o_); \
  143. break; \
  144. \
  145. default: \
  146. _r_ = ia64_cmpxchg_called_with_bad_pointer(); \
  147. break; \
  148. } \
  149. (__typeof__(old)) _r_; \
  150. })
  151. #define cmpxchg_acq(ptr, o, n) \
  152. ia64_cmpxchg(acq, (ptr), (o), (n), sizeof(*(ptr)))
  153. #define cmpxchg_rel(ptr, o, n) \
  154. ia64_cmpxchg(rel, (ptr), (o), (n), sizeof(*(ptr)))
  155. /* for compatibility with other platforms: */
  156. #define cmpxchg(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
  157. #define cmpxchg64(ptr, o, n) cmpxchg_acq((ptr), (o), (n))
  158. #define cmpxchg_local cmpxchg
  159. #define cmpxchg64_local cmpxchg64
  160. #ifdef CONFIG_IA64_DEBUG_CMPXCHG
  161. # define CMPXCHG_BUGCHECK_DECL int _cmpxchg_bugcheck_count = 128;
  162. # define CMPXCHG_BUGCHECK(v) \
  163. do { \
  164. if (_cmpxchg_bugcheck_count-- <= 0) { \
  165. void *ip; \
  166. extern int printk(const char *fmt, ...); \
  167. ip = (void *) ia64_getreg(_IA64_REG_IP); \
  168. printk("CMPXCHG_BUGCHECK: stuck at %p on word %p\n", ip, (v)); \
  169. break; \
  170. } \
  171. } while (0)
  172. #else /* !CONFIG_IA64_DEBUG_CMPXCHG */
  173. # define CMPXCHG_BUGCHECK_DECL
  174. # define CMPXCHG_BUGCHECK(v)
  175. #endif /* !CONFIG_IA64_DEBUG_CMPXCHG */
  176. #endif
  177. #ifdef __KERNEL__
  178. #include <asm/paravirt_privop.h>
  179. #endif
  180. #ifndef __ASSEMBLY__
  181. #if defined(CONFIG_PARAVIRT) && defined(__KERNEL__)
  182. #ifdef ASM_SUPPORTED
  183. # define IA64_INTRINSIC_API(name) paravirt_ ## name
  184. #else
  185. # define IA64_INTRINSIC_API(name) pv_cpu_ops.name
  186. #endif
  187. #define IA64_INTRINSIC_MACRO(name) paravirt_ ## name
  188. #else
  189. #define IA64_INTRINSIC_API(name) ia64_native_ ## name
  190. #define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
  191. #endif
  192. /************************************************/
  193. /* Instructions paravirtualized for correctness */
  194. /************************************************/
  195. /* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
  196. /* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
  197. * is not currently used (though it may be in a long-format VHPT system!)
  198. */
  199. #define ia64_fc IA64_INTRINSIC_API(fc)
  200. #define ia64_thash IA64_INTRINSIC_API(thash)
  201. #define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
  202. #define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
  203. /************************************************/
  204. /* Instructions paravirtualized for performance */
  205. /************************************************/
  206. #define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
  207. #define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
  208. #define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
  209. #define ia64_setreg IA64_INTRINSIC_API(setreg)
  210. #define ia64_set_rr IA64_INTRINSIC_API(set_rr)
  211. #define ia64_get_rr IA64_INTRINSIC_API(get_rr)
  212. #define ia64_ptcga IA64_INTRINSIC_API(ptcga)
  213. #define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
  214. #define ia64_intrin_local_irq_restore \
  215. IA64_INTRINSIC_API(intrin_local_irq_restore)
  216. #define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
  217. #endif /* !__ASSEMBLY__ */
  218. #endif /* _ASM_IA64_INTRINSICS_H */