mfp.c 7.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278
  1. /*
  2. * linux/arch/arm/plat-pxa/mfp.c
  3. *
  4. * Multi-Function Pin Support
  5. *
  6. * Copyright (C) 2007 Marvell Internation Ltd.
  7. *
  8. * 2007-08-21: eric miao <eric.miao@marvell.com>
  9. * initial version
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/module.h>
  16. #include <linux/kernel.h>
  17. #include <linux/init.h>
  18. #include <linux/io.h>
  19. #include <linux/sysdev.h>
  20. #include <plat/mfp.h>
  21. #define MFPR_SIZE (PAGE_SIZE)
  22. /* MFPR register bit definitions */
  23. #define MFPR_PULL_SEL (0x1 << 15)
  24. #define MFPR_PULLUP_EN (0x1 << 14)
  25. #define MFPR_PULLDOWN_EN (0x1 << 13)
  26. #define MFPR_SLEEP_SEL (0x1 << 9)
  27. #define MFPR_SLEEP_OE_N (0x1 << 7)
  28. #define MFPR_EDGE_CLEAR (0x1 << 6)
  29. #define MFPR_EDGE_FALL_EN (0x1 << 5)
  30. #define MFPR_EDGE_RISE_EN (0x1 << 4)
  31. #define MFPR_SLEEP_DATA(x) ((x) << 8)
  32. #define MFPR_DRIVE(x) (((x) & 0x7) << 10)
  33. #define MFPR_AF_SEL(x) (((x) & 0x7) << 0)
  34. #define MFPR_EDGE_NONE (0)
  35. #define MFPR_EDGE_RISE (MFPR_EDGE_RISE_EN)
  36. #define MFPR_EDGE_FALL (MFPR_EDGE_FALL_EN)
  37. #define MFPR_EDGE_BOTH (MFPR_EDGE_RISE | MFPR_EDGE_FALL)
  38. /*
  39. * Table that determines the low power modes outputs, with actual settings
  40. * used in parentheses for don't-care values. Except for the float output,
  41. * the configured driven and pulled levels match, so if there is a need for
  42. * non-LPM pulled output, the same configuration could probably be used.
  43. *
  44. * Output value sleep_oe_n sleep_data pullup_en pulldown_en pull_sel
  45. * (bit 7) (bit 8) (bit 14) (bit 13) (bit 15)
  46. *
  47. * Input 0 X(0) X(0) X(0) 0
  48. * Drive 0 0 0 0 X(1) 0
  49. * Drive 1 0 1 X(1) 0 0
  50. * Pull hi (1) 1 X(1) 1 0 0
  51. * Pull lo (0) 1 X(0) 0 1 0
  52. * Z (float) 1 X(0) 0 0 0
  53. */
  54. #define MFPR_LPM_INPUT (0)
  55. #define MFPR_LPM_DRIVE_LOW (MFPR_SLEEP_DATA(0) | MFPR_PULLDOWN_EN)
  56. #define MFPR_LPM_DRIVE_HIGH (MFPR_SLEEP_DATA(1) | MFPR_PULLUP_EN)
  57. #define MFPR_LPM_PULL_LOW (MFPR_LPM_DRIVE_LOW | MFPR_SLEEP_OE_N)
  58. #define MFPR_LPM_PULL_HIGH (MFPR_LPM_DRIVE_HIGH | MFPR_SLEEP_OE_N)
  59. #define MFPR_LPM_FLOAT (MFPR_SLEEP_OE_N)
  60. #define MFPR_LPM_MASK (0xe080)
  61. /*
  62. * The pullup and pulldown state of the MFP pin at run mode is by default
  63. * determined by the selected alternate function. In case that some buggy
  64. * devices need to override this default behavior, the definitions below
  65. * indicates the setting of corresponding MFPR bits
  66. *
  67. * Definition pull_sel pullup_en pulldown_en
  68. * MFPR_PULL_NONE 0 0 0
  69. * MFPR_PULL_LOW 1 0 1
  70. * MFPR_PULL_HIGH 1 1 0
  71. * MFPR_PULL_BOTH 1 1 1
  72. */
  73. #define MFPR_PULL_NONE (0)
  74. #define MFPR_PULL_LOW (MFPR_PULL_SEL | MFPR_PULLDOWN_EN)
  75. #define MFPR_PULL_BOTH (MFPR_PULL_LOW | MFPR_PULLUP_EN)
  76. #define MFPR_PULL_HIGH (MFPR_PULL_SEL | MFPR_PULLUP_EN)
  77. /* mfp_spin_lock is used to ensure that MFP register configuration
  78. * (most likely a read-modify-write operation) is atomic, and that
  79. * mfp_table[] is consistent
  80. */
  81. static DEFINE_SPINLOCK(mfp_spin_lock);
  82. static void __iomem *mfpr_mmio_base;
  83. struct mfp_pin {
  84. unsigned long config; /* -1 for not configured */
  85. unsigned long mfpr_off; /* MFPRxx Register offset */
  86. unsigned long mfpr_run; /* Run-Mode Register Value */
  87. unsigned long mfpr_lpm; /* Low Power Mode Register Value */
  88. };
  89. static struct mfp_pin mfp_table[MFP_PIN_MAX];
  90. /* mapping of MFP_LPM_* definitions to MFPR_LPM_* register bits */
  91. static const unsigned long mfpr_lpm[] = {
  92. MFPR_LPM_INPUT,
  93. MFPR_LPM_DRIVE_LOW,
  94. MFPR_LPM_DRIVE_HIGH,
  95. MFPR_LPM_PULL_LOW,
  96. MFPR_LPM_PULL_HIGH,
  97. MFPR_LPM_FLOAT,
  98. };
  99. /* mapping of MFP_PULL_* definitions to MFPR_PULL_* register bits */
  100. static const unsigned long mfpr_pull[] = {
  101. MFPR_PULL_NONE,
  102. MFPR_PULL_LOW,
  103. MFPR_PULL_HIGH,
  104. MFPR_PULL_BOTH,
  105. };
  106. /* mapping of MFP_LPM_EDGE_* definitions to MFPR_EDGE_* register bits */
  107. static const unsigned long mfpr_edge[] = {
  108. MFPR_EDGE_NONE,
  109. MFPR_EDGE_RISE,
  110. MFPR_EDGE_FALL,
  111. MFPR_EDGE_BOTH,
  112. };
  113. #define mfpr_readl(off) \
  114. __raw_readl(mfpr_mmio_base + (off))
  115. #define mfpr_writel(off, val) \
  116. __raw_writel(val, mfpr_mmio_base + (off))
  117. #define mfp_configured(p) ((p)->config != -1)
  118. /*
  119. * perform a read-back of any MFPR register to make sure the
  120. * previous writings are finished
  121. */
  122. #define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
  123. static inline void __mfp_config_run(struct mfp_pin *p)
  124. {
  125. if (mfp_configured(p))
  126. mfpr_writel(p->mfpr_off, p->mfpr_run);
  127. }
  128. static inline void __mfp_config_lpm(struct mfp_pin *p)
  129. {
  130. if (mfp_configured(p)) {
  131. unsigned long mfpr_clr = (p->mfpr_run & ~MFPR_EDGE_BOTH) | MFPR_EDGE_CLEAR;
  132. if (mfpr_clr != p->mfpr_run)
  133. mfpr_writel(p->mfpr_off, mfpr_clr);
  134. if (p->mfpr_lpm != mfpr_clr)
  135. mfpr_writel(p->mfpr_off, p->mfpr_lpm);
  136. }
  137. }
  138. void mfp_config(unsigned long *mfp_cfgs, int num)
  139. {
  140. unsigned long flags;
  141. int i;
  142. spin_lock_irqsave(&mfp_spin_lock, flags);
  143. for (i = 0; i < num; i++, mfp_cfgs++) {
  144. unsigned long tmp, c = *mfp_cfgs;
  145. struct mfp_pin *p;
  146. int pin, af, drv, lpm, edge, pull;
  147. pin = MFP_PIN(c);
  148. BUG_ON(pin >= MFP_PIN_MAX);
  149. p = &mfp_table[pin];
  150. af = MFP_AF(c);
  151. drv = MFP_DS(c);
  152. lpm = MFP_LPM_STATE(c);
  153. edge = MFP_LPM_EDGE(c);
  154. pull = MFP_PULL(c);
  155. /* run-mode pull settings will conflict with MFPR bits of
  156. * low power mode state, calculate mfpr_run and mfpr_lpm
  157. * individually if pull != MFP_PULL_NONE
  158. */
  159. tmp = MFPR_AF_SEL(af) | MFPR_DRIVE(drv);
  160. if (likely(pull == MFP_PULL_NONE)) {
  161. p->mfpr_run = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
  162. p->mfpr_lpm = p->mfpr_run;
  163. } else {
  164. p->mfpr_lpm = tmp | mfpr_lpm[lpm] | mfpr_edge[edge];
  165. p->mfpr_run = tmp | mfpr_pull[pull];
  166. }
  167. p->config = c; __mfp_config_run(p);
  168. }
  169. mfpr_sync();
  170. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  171. }
  172. unsigned long mfp_read(int mfp)
  173. {
  174. unsigned long val, flags;
  175. BUG_ON(mfp >= MFP_PIN_MAX);
  176. spin_lock_irqsave(&mfp_spin_lock, flags);
  177. val = mfpr_readl(mfp_table[mfp].mfpr_off);
  178. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  179. return val;
  180. }
  181. void mfp_write(int mfp, unsigned long val)
  182. {
  183. unsigned long flags;
  184. BUG_ON(mfp >= MFP_PIN_MAX);
  185. spin_lock_irqsave(&mfp_spin_lock, flags);
  186. mfpr_writel(mfp_table[mfp].mfpr_off, val);
  187. mfpr_sync();
  188. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  189. }
  190. void __init mfp_init_base(unsigned long mfpr_base)
  191. {
  192. int i;
  193. /* initialize the table with default - unconfigured */
  194. for (i = 0; i < ARRAY_SIZE(mfp_table); i++)
  195. mfp_table[i].config = -1;
  196. mfpr_mmio_base = (void __iomem *)mfpr_base;
  197. }
  198. void __init mfp_init_addr(struct mfp_addr_map *map)
  199. {
  200. struct mfp_addr_map *p;
  201. unsigned long offset, flags;
  202. int i;
  203. spin_lock_irqsave(&mfp_spin_lock, flags);
  204. for (p = map; p->start != MFP_PIN_INVALID; p++) {
  205. offset = p->offset;
  206. i = p->start;
  207. do {
  208. mfp_table[i].mfpr_off = offset;
  209. mfp_table[i].mfpr_run = 0;
  210. mfp_table[i].mfpr_lpm = 0;
  211. offset += 4; i++;
  212. } while ((i <= p->end) && (p->end != -1));
  213. }
  214. spin_unlock_irqrestore(&mfp_spin_lock, flags);
  215. }
  216. void mfp_config_lpm(void)
  217. {
  218. struct mfp_pin *p = &mfp_table[0];
  219. int pin;
  220. for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
  221. __mfp_config_lpm(p);
  222. }
  223. void mfp_config_run(void)
  224. {
  225. struct mfp_pin *p = &mfp_table[0];
  226. int pin;
  227. for (pin = 0; pin < ARRAY_SIZE(mfp_table); pin++, p++)
  228. __mfp_config_run(p);
  229. }