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arch
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arm
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mach-versatile
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include
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mach
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irqs.h

irqs.h 5.1 KB
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  1. /*
    2. 

  2.  *  arch/arm/mach-versatile/include/mach/irqs.h
    3. 

  3.  *
    4. 

  4.  *  Copyright (C) 2003 ARM Limited
    5. 

  5.  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
    6. 

  6.  *
    7. 

  7.  * This program is free software; you can redistribute it and/or modify
    8. 

  8.  * it under the terms of the GNU General Public License as published by
    9. 

  9.  * the Free Software Foundation; either version 2 of the License, or
    10. 

  10.  * (at your option) any later version.
    11. 

  11.  *
    12. 

  12.  * This program is distributed in the hope that it will be useful,
    13. 

  13.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    14. 

  14.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    15. 

  15.  * GNU General Public License for more details.
    16. 

  16.  *
    17. 

  17.  * You should have received a copy of the GNU General Public License
    18. 

  18.  * along with this program; if not, write to the Free Software
    19. 

  19.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
    20. 

  20.  */
    21. 

  21. 

  22. #include <mach/platform.h>
    23. 

  23. 

  24. /* 
    25. 

  25.  *  IRQ interrupts definitions are the same as the INT definitions
    26. 

  26.  *  held within platform.h
    27. 

  27.  */
    28. 

  28. #define IRQ_VIC_START		0
    29. 

  29. #define IRQ_WDOGINT		(IRQ_VIC_START + INT_WDOGINT)
    30. 

  30. #define IRQ_SOFTINT		(IRQ_VIC_START + INT_SOFTINT)
    31. 

  31. #define IRQ_COMMRx		(IRQ_VIC_START + INT_COMMRx)
    32. 

  32. #define IRQ_COMMTx		(IRQ_VIC_START + INT_COMMTx)
    33. 

  33. #define IRQ_TIMERINT0_1		(IRQ_VIC_START + INT_TIMERINT0_1)
    34. 

  34. #define IRQ_TIMERINT2_3		(IRQ_VIC_START + INT_TIMERINT2_3)
    35. 

  35. #define IRQ_GPIOINT0		(IRQ_VIC_START + INT_GPIOINT0)
    36. 

  36. #define IRQ_GPIOINT1		(IRQ_VIC_START + INT_GPIOINT1)
    37. 

  37. #define IRQ_GPIOINT2		(IRQ_VIC_START + INT_GPIOINT2)
    38. 

  38. #define IRQ_GPIOINT3		(IRQ_VIC_START + INT_GPIOINT3)
    39. 

  39. #define IRQ_RTCINT		(IRQ_VIC_START + INT_RTCINT)
    40. 

  40. #define IRQ_SSPINT		(IRQ_VIC_START + INT_SSPINT)
    41. 

  41. #define IRQ_UARTINT0		(IRQ_VIC_START + INT_UARTINT0)
    42. 

  42. #define IRQ_UARTINT1		(IRQ_VIC_START + INT_UARTINT1)
    43. 

  43. #define IRQ_UARTINT2		(IRQ_VIC_START + INT_UARTINT2)
    44. 

  44. #define IRQ_SCIINT		(IRQ_VIC_START + INT_SCIINT)
    45. 

  45. #define IRQ_CLCDINT		(IRQ_VIC_START + INT_CLCDINT)
    46. 

  46. #define IRQ_DMAINT		(IRQ_VIC_START + INT_DMAINT)
    47. 

  47. #define IRQ_PWRFAILINT 		(IRQ_VIC_START + INT_PWRFAILINT)
    48. 

  48. #define IRQ_MBXINT		(IRQ_VIC_START + INT_MBXINT)
    49. 

  49. #define IRQ_GNDINT		(IRQ_VIC_START + INT_GNDINT)
    50. 

  50. #define IRQ_VICSOURCE21		(IRQ_VIC_START + INT_VICSOURCE21)
    51. 

  51. #define IRQ_VICSOURCE22		(IRQ_VIC_START + INT_VICSOURCE22)
    52. 

  52. #define IRQ_VICSOURCE23		(IRQ_VIC_START + INT_VICSOURCE23)
    53. 

  53. #define IRQ_VICSOURCE24		(IRQ_VIC_START + INT_VICSOURCE24)
    54. 

  54. #define IRQ_VICSOURCE25		(IRQ_VIC_START + INT_VICSOURCE25)
    55. 

  55. #define IRQ_VICSOURCE26		(IRQ_VIC_START + INT_VICSOURCE26)
    56. 

  56. #define IRQ_VICSOURCE27		(IRQ_VIC_START + INT_VICSOURCE27)
    57. 

  57. #define IRQ_VICSOURCE28		(IRQ_VIC_START + INT_VICSOURCE28)
    58. 

  58. #define IRQ_VICSOURCE29		(IRQ_VIC_START + INT_VICSOURCE29)
    59. 

  59. #define IRQ_VICSOURCE30		(IRQ_VIC_START + INT_VICSOURCE30)
    60. 

  60. #define IRQ_VICSOURCE31		(IRQ_VIC_START + INT_VICSOURCE31)
    61. 

  61. #define IRQ_VIC_END		(IRQ_VIC_START + 31)
    62. 

  62. 

  63. /* 
    64. 

  64.  *  FIQ interrupts definitions are the same as the INT definitions.
    65. 

  65.  */
    66. 

  66. #define FIQ_WDOGINT		INT_WDOGINT
    67. 

  67. #define FIQ_SOFTINT		INT_SOFTINT
    68. 

  68. #define FIQ_COMMRx		INT_COMMRx
    69. 

  69. #define FIQ_COMMTx		INT_COMMTx
    70. 

  70. #define FIQ_TIMERINT0_1		INT_TIMERINT0_1
    71. 

  71. #define FIQ_TIMERINT2_3		INT_TIMERINT2_3
    72. 

  72. #define FIQ_GPIOINT0		INT_GPIOINT0
    73. 

  73. #define FIQ_GPIOINT1		INT_GPIOINT1
    74. 

  74. #define FIQ_GPIOINT2		INT_GPIOINT2
    75. 

  75. #define FIQ_GPIOINT3		INT_GPIOINT3
    76. 

  76. #define FIQ_RTCINT		INT_RTCINT
    77. 

  77. #define FIQ_SSPINT		INT_SSPINT
    78. 

  78. #define FIQ_UARTINT0		INT_UARTINT0
    79. 

  79. #define FIQ_UARTINT1		INT_UARTINT1
    80. 

  80. #define FIQ_UARTINT2		INT_UARTINT2
    81. 

  81. #define FIQ_SCIINT		INT_SCIINT
    82. 

  82. #define FIQ_CLCDINT		INT_CLCDINT
    83. 

  83. #define FIQ_DMAINT		INT_DMAINT
    84. 

  84. #define FIQ_PWRFAILINT 		INT_PWRFAILINT
    85. 

  85. #define FIQ_MBXINT		INT_MBXINT
    86. 

  86. #define FIQ_GNDINT		INT_GNDINT
    87. 

  87. #define FIQ_VICSOURCE21		INT_VICSOURCE21
    88. 

  88. #define FIQ_VICSOURCE22		INT_VICSOURCE22
    89. 

  89. #define FIQ_VICSOURCE23		INT_VICSOURCE23
    90. 

  90. #define FIQ_VICSOURCE24		INT_VICSOURCE24
    91. 

  91. #define FIQ_VICSOURCE25		INT_VICSOURCE25
    92. 

  92. #define FIQ_VICSOURCE26		INT_VICSOURCE26
    93. 

  93. #define FIQ_VICSOURCE27		INT_VICSOURCE27
    94. 

  94. #define FIQ_VICSOURCE28		INT_VICSOURCE28
    95. 

  95. #define FIQ_VICSOURCE29		INT_VICSOURCE29
    96. 

  96. #define FIQ_VICSOURCE30		INT_VICSOURCE30
    97. 

  97. #define FIQ_VICSOURCE31		INT_VICSOURCE31
    98. 

  98. 

  99. 

  100. /*
    101. 

  101.  * Secondary interrupt controller
    102. 

  102.  */
    103. 

  103. #define IRQ_SIC_START		32
    104. 

  104. #define IRQ_SIC_MMCI0B 		(IRQ_SIC_START + SIC_INT_MMCI0B)
    105. 

  105. #define IRQ_SIC_MMCI1B 		(IRQ_SIC_START + SIC_INT_MMCI1B)
    106. 

  106. #define IRQ_SIC_KMI0		(IRQ_SIC_START + SIC_INT_KMI0)
    107. 

  107. #define IRQ_SIC_KMI1		(IRQ_SIC_START + SIC_INT_KMI1)
    108. 

  108. #define IRQ_SIC_SCI3		(IRQ_SIC_START + SIC_INT_SCI3)
    109. 

  109. #define IRQ_SIC_UART3		(IRQ_SIC_START + SIC_INT_UART3)
    110. 

  110. #define IRQ_SIC_CLCD		(IRQ_SIC_START + SIC_INT_CLCD)
    111. 

  111. #define IRQ_SIC_TOUCH		(IRQ_SIC_START + SIC_INT_TOUCH)
    112. 

  112. #define IRQ_SIC_KEYPAD 		(IRQ_SIC_START + SIC_INT_KEYPAD)
    113. 

  113. #define IRQ_SIC_DoC		(IRQ_SIC_START + SIC_INT_DoC)
    114. 

  114. #define IRQ_SIC_MMCI0A 		(IRQ_SIC_START + SIC_INT_MMCI0A)
    115. 

  115. #define IRQ_SIC_MMCI1A 		(IRQ_SIC_START + SIC_INT_MMCI1A)
    116. 

  116. #define IRQ_SIC_AACI		(IRQ_SIC_START + SIC_INT_AACI)
    117. 

  117. #define IRQ_SIC_ETH		(IRQ_SIC_START + SIC_INT_ETH)
    118. 

  118. #define IRQ_SIC_USB		(IRQ_SIC_START + SIC_INT_USB)
    119. 

  119. #define IRQ_SIC_PCI0		(IRQ_SIC_START + SIC_INT_PCI0)
    120. 

  120. #define IRQ_SIC_PCI1		(IRQ_SIC_START + SIC_INT_PCI1)
    121. 

  121. #define IRQ_SIC_PCI2		(IRQ_SIC_START + SIC_INT_PCI2)
    122. 

  122. #define IRQ_SIC_PCI3		(IRQ_SIC_START + SIC_INT_PCI3)
    123. 

  123. #define IRQ_SIC_END		63
    124. 

  124. 

  125. #define NR_IRQS			64
    126.