mach-vr1000.c 9.3 KB

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  1. /* linux/arch/arm/mach-s3c2410/mach-vr1000.c
  2. *
  3. * Copyright (c) 2003-2005,2008 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Machine support for Thorcom VR1000 board. Designed for Thorcom by
  7. * Simtec Electronics, http://www.simtec.co.uk/
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/list.h>
  18. #include <linux/timer.h>
  19. #include <linux/init.h>
  20. #include <linux/dm9000.h>
  21. #include <linux/i2c.h>
  22. #include <linux/serial.h>
  23. #include <linux/tty.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/serial_reg.h>
  26. #include <linux/io.h>
  27. #include <asm/mach/arch.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/mach/irq.h>
  30. #include <mach/bast-map.h>
  31. #include <mach/vr1000-map.h>
  32. #include <mach/vr1000-irq.h>
  33. #include <mach/vr1000-cpld.h>
  34. #include <mach/hardware.h>
  35. #include <asm/irq.h>
  36. #include <asm/mach-types.h>
  37. #include <plat/regs-serial.h>
  38. #include <mach/regs-gpio.h>
  39. #include <mach/leds-gpio.h>
  40. #include <plat/clock.h>
  41. #include <plat/devs.h>
  42. #include <plat/cpu.h>
  43. #include <plat/iic.h>
  44. #include "usb-simtec.h"
  45. #include "nor-simtec.h"
  46. /* macros for virtual address mods for the io space entries */
  47. #define VA_C5(item) ((unsigned long)(item) + BAST_VAM_CS5)
  48. #define VA_C4(item) ((unsigned long)(item) + BAST_VAM_CS4)
  49. #define VA_C3(item) ((unsigned long)(item) + BAST_VAM_CS3)
  50. #define VA_C2(item) ((unsigned long)(item) + BAST_VAM_CS2)
  51. /* macros to modify the physical addresses for io space */
  52. #define PA_CS2(item) (__phys_to_pfn((item) + S3C2410_CS2))
  53. #define PA_CS3(item) (__phys_to_pfn((item) + S3C2410_CS3))
  54. #define PA_CS4(item) (__phys_to_pfn((item) + S3C2410_CS4))
  55. #define PA_CS5(item) (__phys_to_pfn((item) + S3C2410_CS5))
  56. static struct map_desc vr1000_iodesc[] __initdata = {
  57. /* ISA IO areas */
  58. {
  59. .virtual = (u32)S3C24XX_VA_ISA_BYTE,
  60. .pfn = PA_CS2(BAST_PA_ISAIO),
  61. .length = SZ_16M,
  62. .type = MT_DEVICE,
  63. }, {
  64. .virtual = (u32)S3C24XX_VA_ISA_WORD,
  65. .pfn = PA_CS3(BAST_PA_ISAIO),
  66. .length = SZ_16M,
  67. .type = MT_DEVICE,
  68. },
  69. /* CPLD control registers, and external interrupt controls */
  70. {
  71. .virtual = (u32)VR1000_VA_CTRL1,
  72. .pfn = __phys_to_pfn(VR1000_PA_CTRL1),
  73. .length = SZ_1M,
  74. .type = MT_DEVICE,
  75. }, {
  76. .virtual = (u32)VR1000_VA_CTRL2,
  77. .pfn = __phys_to_pfn(VR1000_PA_CTRL2),
  78. .length = SZ_1M,
  79. .type = MT_DEVICE,
  80. }, {
  81. .virtual = (u32)VR1000_VA_CTRL3,
  82. .pfn = __phys_to_pfn(VR1000_PA_CTRL3),
  83. .length = SZ_1M,
  84. .type = MT_DEVICE,
  85. }, {
  86. .virtual = (u32)VR1000_VA_CTRL4,
  87. .pfn = __phys_to_pfn(VR1000_PA_CTRL4),
  88. .length = SZ_1M,
  89. .type = MT_DEVICE,
  90. },
  91. };
  92. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  93. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  94. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  95. /* uart clock source(s) */
  96. static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
  97. [0] = {
  98. .name = "uclk",
  99. .divisor = 1,
  100. .min_baud = 0,
  101. .max_baud = 0,
  102. },
  103. [1] = {
  104. .name = "pclk",
  105. .divisor = 1,
  106. .min_baud = 0,
  107. .max_baud = 0.
  108. }
  109. };
  110. static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
  111. [0] = {
  112. .hwport = 0,
  113. .flags = 0,
  114. .ucon = UCON,
  115. .ulcon = ULCON,
  116. .ufcon = UFCON,
  117. .clocks = vr1000_serial_clocks,
  118. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  119. },
  120. [1] = {
  121. .hwport = 1,
  122. .flags = 0,
  123. .ucon = UCON,
  124. .ulcon = ULCON,
  125. .ufcon = UFCON,
  126. .clocks = vr1000_serial_clocks,
  127. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  128. },
  129. /* port 2 is not actually used */
  130. [2] = {
  131. .hwport = 2,
  132. .flags = 0,
  133. .ucon = UCON,
  134. .ulcon = ULCON,
  135. .ufcon = UFCON,
  136. .clocks = vr1000_serial_clocks,
  137. .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
  138. }
  139. };
  140. /* definitions for the vr1000 extra 16550 serial ports */
  141. #define VR1000_BAUDBASE (3692307)
  142. #define VR1000_SERIAL_MAPBASE(x) (VR1000_PA_SERIAL + 0x80 + ((x) << 5))
  143. static struct plat_serial8250_port serial_platform_data[] = {
  144. [0] = {
  145. .mapbase = VR1000_SERIAL_MAPBASE(0),
  146. .irq = IRQ_VR1000_SERIAL + 0,
  147. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  148. .iotype = UPIO_MEM,
  149. .regshift = 0,
  150. .uartclk = VR1000_BAUDBASE,
  151. },
  152. [1] = {
  153. .mapbase = VR1000_SERIAL_MAPBASE(1),
  154. .irq = IRQ_VR1000_SERIAL + 1,
  155. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  156. .iotype = UPIO_MEM,
  157. .regshift = 0,
  158. .uartclk = VR1000_BAUDBASE,
  159. },
  160. [2] = {
  161. .mapbase = VR1000_SERIAL_MAPBASE(2),
  162. .irq = IRQ_VR1000_SERIAL + 2,
  163. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  164. .iotype = UPIO_MEM,
  165. .regshift = 0,
  166. .uartclk = VR1000_BAUDBASE,
  167. },
  168. [3] = {
  169. .mapbase = VR1000_SERIAL_MAPBASE(3),
  170. .irq = IRQ_VR1000_SERIAL + 3,
  171. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  172. .iotype = UPIO_MEM,
  173. .regshift = 0,
  174. .uartclk = VR1000_BAUDBASE,
  175. },
  176. { },
  177. };
  178. static struct platform_device serial_device = {
  179. .name = "serial8250",
  180. .id = PLAT8250_DEV_PLATFORM,
  181. .dev = {
  182. .platform_data = serial_platform_data,
  183. },
  184. };
  185. /* DM9000 ethernet devices */
  186. static struct resource vr1000_dm9k0_resource[] = {
  187. [0] = {
  188. .start = S3C2410_CS5 + VR1000_PA_DM9000,
  189. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 3,
  190. .flags = IORESOURCE_MEM
  191. },
  192. [1] = {
  193. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x40,
  194. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x7f,
  195. .flags = IORESOURCE_MEM
  196. },
  197. [2] = {
  198. .start = IRQ_VR1000_DM9000A,
  199. .end = IRQ_VR1000_DM9000A,
  200. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  201. }
  202. };
  203. static struct resource vr1000_dm9k1_resource[] = {
  204. [0] = {
  205. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0x80,
  206. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0x83,
  207. .flags = IORESOURCE_MEM
  208. },
  209. [1] = {
  210. .start = S3C2410_CS5 + VR1000_PA_DM9000 + 0xC0,
  211. .end = S3C2410_CS5 + VR1000_PA_DM9000 + 0xFF,
  212. .flags = IORESOURCE_MEM
  213. },
  214. [2] = {
  215. .start = IRQ_VR1000_DM9000N,
  216. .end = IRQ_VR1000_DM9000N,
  217. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  218. }
  219. };
  220. /* for the moment we limit ourselves to 16bit IO until some
  221. * better IO routines can be written and tested
  222. */
  223. static struct dm9000_plat_data vr1000_dm9k_platdata = {
  224. .flags = DM9000_PLATF_16BITONLY,
  225. };
  226. static struct platform_device vr1000_dm9k0 = {
  227. .name = "dm9000",
  228. .id = 0,
  229. .num_resources = ARRAY_SIZE(vr1000_dm9k0_resource),
  230. .resource = vr1000_dm9k0_resource,
  231. .dev = {
  232. .platform_data = &vr1000_dm9k_platdata,
  233. }
  234. };
  235. static struct platform_device vr1000_dm9k1 = {
  236. .name = "dm9000",
  237. .id = 1,
  238. .num_resources = ARRAY_SIZE(vr1000_dm9k1_resource),
  239. .resource = vr1000_dm9k1_resource,
  240. .dev = {
  241. .platform_data = &vr1000_dm9k_platdata,
  242. }
  243. };
  244. /* LEDS */
  245. static struct s3c24xx_led_platdata vr1000_led1_pdata = {
  246. .name = "led1",
  247. .gpio = S3C2410_GPB0,
  248. .def_trigger = "",
  249. };
  250. static struct s3c24xx_led_platdata vr1000_led2_pdata = {
  251. .name = "led2",
  252. .gpio = S3C2410_GPB1,
  253. .def_trigger = "",
  254. };
  255. static struct s3c24xx_led_platdata vr1000_led3_pdata = {
  256. .name = "led3",
  257. .gpio = S3C2410_GPB2,
  258. .def_trigger = "",
  259. };
  260. static struct platform_device vr1000_led1 = {
  261. .name = "s3c24xx_led",
  262. .id = 1,
  263. .dev = {
  264. .platform_data = &vr1000_led1_pdata,
  265. },
  266. };
  267. static struct platform_device vr1000_led2 = {
  268. .name = "s3c24xx_led",
  269. .id = 2,
  270. .dev = {
  271. .platform_data = &vr1000_led2_pdata,
  272. },
  273. };
  274. static struct platform_device vr1000_led3 = {
  275. .name = "s3c24xx_led",
  276. .id = 3,
  277. .dev = {
  278. .platform_data = &vr1000_led3_pdata,
  279. },
  280. };
  281. /* I2C devices. */
  282. static struct i2c_board_info vr1000_i2c_devs[] __initdata = {
  283. {
  284. I2C_BOARD_INFO("tlv320aic23", 0x1a),
  285. }, {
  286. I2C_BOARD_INFO("tmp101", 0x48),
  287. }, {
  288. I2C_BOARD_INFO("m41st87", 0x68),
  289. },
  290. };
  291. /* devices for this board */
  292. static struct platform_device *vr1000_devices[] __initdata = {
  293. &s3c_device_usb,
  294. &s3c_device_lcd,
  295. &s3c_device_wdt,
  296. &s3c_device_i2c0,
  297. &s3c_device_adc,
  298. &serial_device,
  299. &vr1000_dm9k0,
  300. &vr1000_dm9k1,
  301. &vr1000_led1,
  302. &vr1000_led2,
  303. &vr1000_led3,
  304. };
  305. static struct clk *vr1000_clocks[] __initdata = {
  306. &s3c24xx_dclk0,
  307. &s3c24xx_dclk1,
  308. &s3c24xx_clkout0,
  309. &s3c24xx_clkout1,
  310. &s3c24xx_uclk,
  311. };
  312. static void vr1000_power_off(void)
  313. {
  314. s3c2410_gpio_cfgpin(S3C2410_GPB9, S3C2410_GPB9_OUTP);
  315. s3c2410_gpio_setpin(S3C2410_GPB9, 1);
  316. }
  317. static void __init vr1000_map_io(void)
  318. {
  319. /* initialise clock sources */
  320. s3c24xx_dclk0.parent = &clk_upll;
  321. s3c24xx_dclk0.rate = 12*1000*1000;
  322. s3c24xx_dclk1.parent = NULL;
  323. s3c24xx_dclk1.rate = 3692307;
  324. s3c24xx_clkout0.parent = &s3c24xx_dclk0;
  325. s3c24xx_clkout1.parent = &s3c24xx_dclk1;
  326. s3c24xx_uclk.parent = &s3c24xx_clkout1;
  327. s3c24xx_register_clocks(vr1000_clocks, ARRAY_SIZE(vr1000_clocks));
  328. pm_power_off = vr1000_power_off;
  329. s3c24xx_init_io(vr1000_iodesc, ARRAY_SIZE(vr1000_iodesc));
  330. s3c24xx_init_clocks(0);
  331. s3c24xx_init_uarts(vr1000_uartcfgs, ARRAY_SIZE(vr1000_uartcfgs));
  332. }
  333. static void __init vr1000_init(void)
  334. {
  335. s3c_i2c0_set_platdata(NULL);
  336. platform_add_devices(vr1000_devices, ARRAY_SIZE(vr1000_devices));
  337. i2c_register_board_info(0, vr1000_i2c_devs,
  338. ARRAY_SIZE(vr1000_i2c_devs));
  339. nor_simtec_init();
  340. }
  341. MACHINE_START(VR1000, "Thorcom-VR1000")
  342. /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
  343. .phys_io = S3C2410_PA_UART,
  344. .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
  345. .boot_params = S3C2410_SDRAM_PA + 0x100,
  346. .map_io = vr1000_map_io,
  347. .init_machine = vr1000_init,
  348. .init_irq = s3c24xx_init_irq,
  349. .timer = &s3c24xx_timer,
  350. MACHINE_END