system-reset.h 1.6 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364
  1. /* arch/arm/mach-s3c2410/include/mach/system-reset.h
  2. *
  3. * Copyright (c) 2008 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 - System define for arch_reset() function
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <mach/hardware.h>
  13. #include <linux/io.h>
  14. #include <plat/regs-watchdog.h>
  15. #include <mach/regs-clock.h>
  16. #include <linux/clk.h>
  17. #include <linux/err.h>
  18. extern void (*s3c24xx_reset_hook)(void);
  19. static void
  20. arch_reset(char mode, const char *cmd)
  21. {
  22. struct clk *wdtclk;
  23. if (mode == 's') {
  24. cpu_reset(0);
  25. }
  26. if (s3c24xx_reset_hook)
  27. s3c24xx_reset_hook();
  28. printk("arch_reset: attempting watchdog reset\n");
  29. __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */
  30. wdtclk = clk_get(NULL, "watchdog");
  31. if (!IS_ERR(wdtclk)) {
  32. clk_enable(wdtclk);
  33. } else
  34. printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
  35. /* put initial values into count and data */
  36. __raw_writel(0x80, S3C2410_WTCNT);
  37. __raw_writel(0x80, S3C2410_WTDAT);
  38. /* set the watchdog to go and reset... */
  39. __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN |
  40. S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON);
  41. /* wait for reset to assert... */
  42. mdelay(500);
  43. printk(KERN_ERR "Watchdog reset failed to assert reset\n");
  44. /* delay to allow the serial port to show the message */
  45. mdelay(50);
  46. /* we'll take a jump through zero as a poor second */
  47. cpu_reset(0);
  48. }