hardware.h 2.1 KB

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  1. /*
  2. * arch/arm/mach-rpc/include/mach/hardware.h
  3. *
  4. * Copyright (C) 1996-1999 Russell King.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This file contains the hardware definitions of the RiscPC series machines.
  11. */
  12. #ifndef __ASM_ARCH_HARDWARE_H
  13. #define __ASM_ARCH_HARDWARE_H
  14. #include <mach/memory.h>
  15. #ifndef __ASSEMBLY__
  16. #define IOMEM(x) ((void __iomem *)(unsigned long)(x))
  17. #else
  18. #define IOMEM(x) x
  19. #endif /* __ASSEMBLY__ */
  20. /*
  21. * What hardware must be present
  22. */
  23. #define HAS_IOMD
  24. #define HAS_VIDC20
  25. /* Hardware addresses of major areas.
  26. * *_START is the physical address
  27. * *_SIZE is the size of the region
  28. * *_BASE is the virtual address
  29. */
  30. #define RAM_SIZE 0x10000000
  31. #define RAM_START 0x10000000
  32. #define EASI_SIZE 0x08000000 /* EASI I/O */
  33. #define EASI_START 0x08000000
  34. #define EASI_BASE 0xe5000000
  35. #define IO_START 0x03000000 /* I/O */
  36. #define IO_SIZE 0x01000000
  37. #define IO_BASE IOMEM(0xe0000000)
  38. #define SCREEN_START 0x02000000 /* VRAM */
  39. #define SCREEN_END 0xdfc00000
  40. #define SCREEN_BASE 0xdf800000
  41. #define UNCACHEABLE_ADDR 0xdf010000
  42. /*
  43. * IO Addresses
  44. */
  45. #define VIDC_BASE IOMEM(0xe0400000)
  46. #define EXPMASK_BASE 0xe0360000
  47. #define IOMD_BASE IOMEM(0xe0200000)
  48. #define IOC_BASE IOMEM(0xe0200000)
  49. #define PCIO_BASE IOMEM(0xe0010000)
  50. #define FLOPPYDMA_BASE IOMEM(0xe002a000)
  51. #define vidc_writel(val) __raw_writel(val, VIDC_BASE)
  52. #define IO_EC_EASI_BASE 0x81400000
  53. #define IO_EC_IOC4_BASE 0x8009c000
  54. #define IO_EC_IOC_BASE 0x80090000
  55. #define IO_EC_MEMC8_BASE 0x8000ac00
  56. #define IO_EC_MEMC_BASE 0x80000000
  57. #define NETSLOT_BASE 0x0302b000
  58. #define NETSLOT_SIZE 0x00001000
  59. #define PODSLOT_IOC0_BASE 0x03240000
  60. #define PODSLOT_IOC4_BASE 0x03270000
  61. #define PODSLOT_IOC_SIZE (1 << 14)
  62. #define PODSLOT_MEMC_BASE 0x03000000
  63. #define PODSLOT_MEMC_SIZE (1 << 14)
  64. #define PODSLOT_EASI_BASE 0x08000000
  65. #define PODSLOT_EASI_SIZE (1 << 24)
  66. #define EXPMASK_STATUS (EXPMASK_BASE + 0x00)
  67. #define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
  68. #endif