board-eb.h 8.4 KB

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  1. /*
  2. * arch/arm/mach-realview/include/mach/board-eb.h
  3. *
  4. * Copyright (C) 2007 ARM Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  18. * MA 02110-1301, USA.
  19. */
  20. #ifndef __ASM_ARCH_BOARD_EB_H
  21. #define __ASM_ARCH_BOARD_EB_H
  22. #include <mach/platform.h>
  23. /*
  24. * RealView EB + ARM11MPCore peripheral addresses
  25. */
  26. #define REALVIEW_EB_UART0_BASE 0x10009000 /* UART 0 */
  27. #define REALVIEW_EB_UART1_BASE 0x1000A000 /* UART 1 */
  28. #define REALVIEW_EB_UART2_BASE 0x1000B000 /* UART 2 */
  29. #define REALVIEW_EB_UART3_BASE 0x1000C000 /* UART 3 */
  30. #define REALVIEW_EB_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
  31. #define REALVIEW_EB_WATCHDOG_BASE 0x10010000 /* watchdog interface */
  32. #define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
  33. #define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
  34. #define REALVIEW_EB_GPIO0_BASE 0x10013000 /* GPIO port 0 */
  35. #define REALVIEW_EB_RTC_BASE 0x10017000 /* Real Time Clock */
  36. #define REALVIEW_EB_CLCD_BASE 0x10020000 /* CLCD */
  37. #define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
  38. #define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
  39. #define REALVIEW_EB_SMC_BASE 0x10080000 /* Static memory controller */
  40. #define REALVIEW_EB_FLASH_BASE 0x40000000
  41. #define REALVIEW_EB_FLASH_SIZE SZ_64M
  42. #define REALVIEW_EB_ETH_BASE 0x4E000000 /* Ethernet */
  43. #define REALVIEW_EB_USB_BASE 0x4F000000 /* USB */
  44. #ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
  45. #define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
  46. #define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
  47. #define REALVIEW_EB11MP_TWD_BASE 0x10100600
  48. #define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
  49. #define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
  50. #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
  51. #else
  52. #define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
  53. #define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
  54. #define REALVIEW_EB11MP_TWD_BASE 0x1F000600
  55. #define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
  56. #define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
  57. #define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
  58. #endif
  59. #define IRQ_EB_GIC_START 32
  60. /*
  61. * RealView EB interrupt sources
  62. */
  63. #define IRQ_EB_WDOG (IRQ_EB_GIC_START + 0) /* Watchdog timer */
  64. #define IRQ_EB_SOFT (IRQ_EB_GIC_START + 1) /* Software interrupt */
  65. #define IRQ_EB_COMMRx (IRQ_EB_GIC_START + 2) /* Debug Comm Rx interrupt */
  66. #define IRQ_EB_COMMTx (IRQ_EB_GIC_START + 3) /* Debug Comm Tx interrupt */
  67. #define IRQ_EB_TIMER0_1 (IRQ_EB_GIC_START + 4) /* Timer 0 and 1 */
  68. #define IRQ_EB_TIMER2_3 (IRQ_EB_GIC_START + 5) /* Timer 2 and 3 */
  69. #define IRQ_EB_GPIO0 (IRQ_EB_GIC_START + 6) /* GPIO 0 */
  70. #define IRQ_EB_GPIO1 (IRQ_EB_GIC_START + 7) /* GPIO 1 */
  71. #define IRQ_EB_GPIO2 (IRQ_EB_GIC_START + 8) /* GPIO 2 */
  72. /* 9 reserved */
  73. #define IRQ_EB_RTC (IRQ_EB_GIC_START + 10) /* Real Time Clock */
  74. #define IRQ_EB_SSP (IRQ_EB_GIC_START + 11) /* Synchronous Serial Port */
  75. #define IRQ_EB_UART0 (IRQ_EB_GIC_START + 12) /* UART 0 on development chip */
  76. #define IRQ_EB_UART1 (IRQ_EB_GIC_START + 13) /* UART 1 on development chip */
  77. #define IRQ_EB_UART2 (IRQ_EB_GIC_START + 14) /* UART 2 on development chip */
  78. #define IRQ_EB_UART3 (IRQ_EB_GIC_START + 15) /* UART 3 on development chip */
  79. #define IRQ_EB_SCI (IRQ_EB_GIC_START + 16) /* Smart Card Interface */
  80. #define IRQ_EB_MMCI0A (IRQ_EB_GIC_START + 17) /* Multimedia Card 0A */
  81. #define IRQ_EB_MMCI0B (IRQ_EB_GIC_START + 18) /* Multimedia Card 0B */
  82. #define IRQ_EB_AACI (IRQ_EB_GIC_START + 19) /* Audio Codec */
  83. #define IRQ_EB_KMI0 (IRQ_EB_GIC_START + 20) /* Keyboard/Mouse port 0 */
  84. #define IRQ_EB_KMI1 (IRQ_EB_GIC_START + 21) /* Keyboard/Mouse port 1 */
  85. #define IRQ_EB_CHARLCD (IRQ_EB_GIC_START + 22) /* Character LCD */
  86. #define IRQ_EB_CLCD (IRQ_EB_GIC_START + 23) /* CLCD controller */
  87. #define IRQ_EB_DMA (IRQ_EB_GIC_START + 24) /* DMA controller */
  88. #define IRQ_EB_PWRFAIL (IRQ_EB_GIC_START + 25) /* Power failure */
  89. #define IRQ_EB_PISMO (IRQ_EB_GIC_START + 26) /* PISMO interface */
  90. #define IRQ_EB_DoC (IRQ_EB_GIC_START + 27) /* Disk on Chip memory controller */
  91. #define IRQ_EB_ETH (IRQ_EB_GIC_START + 28) /* Ethernet controller */
  92. #define IRQ_EB_USB (IRQ_EB_GIC_START + 29) /* USB controller */
  93. #define IRQ_EB_TSPEN (IRQ_EB_GIC_START + 30) /* Touchscreen pen */
  94. #define IRQ_EB_TSKPAD (IRQ_EB_GIC_START + 31) /* Touchscreen keypad */
  95. /*
  96. * RealView EB + ARM11MPCore interrupt sources (primary GIC on the core tile)
  97. */
  98. #define IRQ_EB11MP_AACI (IRQ_EB_GIC_START + 0)
  99. #define IRQ_EB11MP_TIMER0_1 (IRQ_EB_GIC_START + 1)
  100. #define IRQ_EB11MP_TIMER2_3 (IRQ_EB_GIC_START + 2)
  101. #define IRQ_EB11MP_USB (IRQ_EB_GIC_START + 3)
  102. #define IRQ_EB11MP_UART0 (IRQ_EB_GIC_START + 4)
  103. #define IRQ_EB11MP_UART1 (IRQ_EB_GIC_START + 5)
  104. #define IRQ_EB11MP_RTC (IRQ_EB_GIC_START + 6)
  105. #define IRQ_EB11MP_KMI0 (IRQ_EB_GIC_START + 7)
  106. #define IRQ_EB11MP_KMI1 (IRQ_EB_GIC_START + 8)
  107. #define IRQ_EB11MP_ETH (IRQ_EB_GIC_START + 9)
  108. #define IRQ_EB11MP_EB_IRQ1 (IRQ_EB_GIC_START + 10) /* main GIC */
  109. #define IRQ_EB11MP_EB_IRQ2 (IRQ_EB_GIC_START + 11) /* tile GIC */
  110. #define IRQ_EB11MP_EB_FIQ1 (IRQ_EB_GIC_START + 12) /* main GIC */
  111. #define IRQ_EB11MP_EB_FIQ2 (IRQ_EB_GIC_START + 13) /* tile GIC */
  112. #define IRQ_EB11MP_MMCI0A (IRQ_EB_GIC_START + 14)
  113. #define IRQ_EB11MP_MMCI0B (IRQ_EB_GIC_START + 15)
  114. #define IRQ_EB11MP_PMU_CPU0 (IRQ_EB_GIC_START + 17)
  115. #define IRQ_EB11MP_PMU_CPU1 (IRQ_EB_GIC_START + 18)
  116. #define IRQ_EB11MP_PMU_CPU2 (IRQ_EB_GIC_START + 19)
  117. #define IRQ_EB11MP_PMU_CPU3 (IRQ_EB_GIC_START + 20)
  118. #define IRQ_EB11MP_PMU_SCU0 (IRQ_EB_GIC_START + 21)
  119. #define IRQ_EB11MP_PMU_SCU1 (IRQ_EB_GIC_START + 22)
  120. #define IRQ_EB11MP_PMU_SCU2 (IRQ_EB_GIC_START + 23)
  121. #define IRQ_EB11MP_PMU_SCU3 (IRQ_EB_GIC_START + 24)
  122. #define IRQ_EB11MP_PMU_SCU4 (IRQ_EB_GIC_START + 25)
  123. #define IRQ_EB11MP_PMU_SCU5 (IRQ_EB_GIC_START + 26)
  124. #define IRQ_EB11MP_PMU_SCU6 (IRQ_EB_GIC_START + 27)
  125. #define IRQ_EB11MP_PMU_SCU7 (IRQ_EB_GIC_START + 28)
  126. #define IRQ_EB11MP_L220_EVENT (IRQ_EB_GIC_START + 29)
  127. #define IRQ_EB11MP_L220_SLAVE (IRQ_EB_GIC_START + 30)
  128. #define IRQ_EB11MP_L220_DECODE (IRQ_EB_GIC_START + 31)
  129. #define IRQ_EB11MP_UART2 -1
  130. #define IRQ_EB11MP_UART3 -1
  131. #define IRQ_EB11MP_CLCD -1
  132. #define IRQ_EB11MP_DMA -1
  133. #define IRQ_EB11MP_WDOG -1
  134. #define IRQ_EB11MP_GPIO0 -1
  135. #define IRQ_EB11MP_GPIO1 -1
  136. #define IRQ_EB11MP_GPIO2 -1
  137. #define IRQ_EB11MP_SCI -1
  138. #define IRQ_EB11MP_SSP -1
  139. #define NR_GIC_EB11MP 2
  140. /*
  141. * Only define NR_IRQS if less than NR_IRQS_EB
  142. */
  143. #define NR_IRQS_EB (IRQ_EB_GIC_START + 96)
  144. #if defined(CONFIG_MACH_REALVIEW_EB) \
  145. && (!defined(NR_IRQS) || (NR_IRQS < NR_IRQS_EB))
  146. #undef NR_IRQS
  147. #define NR_IRQS NR_IRQS_EB
  148. #endif
  149. #if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
  150. && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
  151. #undef MAX_GIC_NR
  152. #define MAX_GIC_NR NR_GIC_EB11MP
  153. #endif
  154. /*
  155. * Core tile identification (REALVIEW_SYS_PROCID)
  156. */
  157. #define REALVIEW_EB_PROC_MASK 0xFF000000
  158. #define REALVIEW_EB_PROC_ARM7TDMI 0x00000000
  159. #define REALVIEW_EB_PROC_ARM9 0x02000000
  160. #define REALVIEW_EB_PROC_ARM11 0x04000000
  161. #define REALVIEW_EB_PROC_ARM11MP 0x06000000
  162. #define REALVIEW_EB_PROC_A9MP 0x0C000000
  163. #define check_eb_proc(proc_type) \
  164. ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
  165. == proc_type)
  166. #ifdef CONFIG_REALVIEW_EB_ARM11MP
  167. #define core_tile_eb11mp() check_eb_proc(REALVIEW_EB_PROC_ARM11MP)
  168. #else
  169. #define core_tile_eb11mp() 0
  170. #endif
  171. #ifdef CONFIG_REALVIEW_EB_A9MP
  172. #define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
  173. #else
  174. #define core_tile_a9mp() 0
  175. #endif
  176. #define machine_is_realview_eb_mp() \
  177. (machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
  178. #endif /* __ASM_ARCH_BOARD_EB_H */