viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/major.h>
  31. #include <linux/module.h>
  32. #include <linux/pm.h>
  33. #include <linux/sched.h>
  34. #include <linux/gpio.h>
  35. #include <linux/i2c-gpio.h>
  36. #include <linux/serial_8250.h>
  37. #include <linux/smc91x.h>
  38. #include <linux/pwm_backlight.h>
  39. #include <linux/usb/isp116x.h>
  40. #include <linux/mtd/mtd.h>
  41. #include <linux/mtd/partitions.h>
  42. #include <linux/mtd/physmap.h>
  43. #include <mach/pxa25x.h>
  44. #include <mach/audio.h>
  45. #include <mach/pxafb.h>
  46. #include <mach/i2c.h>
  47. #include <mach/regs-uart.h>
  48. #include <mach/viper.h>
  49. #include <asm/setup.h>
  50. #include <asm/mach-types.h>
  51. #include <asm/irq.h>
  52. #include <asm/sizes.h>
  53. #include <asm/mach/arch.h>
  54. #include <asm/mach/map.h>
  55. #include <asm/mach/irq.h>
  56. #include "generic.h"
  57. #include "devices.h"
  58. static unsigned int icr;
  59. static void viper_icr_set_bit(unsigned int bit)
  60. {
  61. icr |= bit;
  62. VIPER_ICR = icr;
  63. }
  64. static void viper_icr_clear_bit(unsigned int bit)
  65. {
  66. icr &= ~bit;
  67. VIPER_ICR = icr;
  68. }
  69. /* This function is used from the pcmcia module to reset the CF */
  70. void viper_cf_rst(int state)
  71. {
  72. if (state)
  73. viper_icr_set_bit(VIPER_ICR_CF_RST);
  74. else
  75. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  76. }
  77. EXPORT_SYMBOL(viper_cf_rst);
  78. /*
  79. * The CPLD version register was not present on VIPER boards prior to
  80. * v2i1. On v1 boards where the version register is not present we
  81. * will just read back the previous value from the databus.
  82. *
  83. * Therefore we do two reads. The first time we write 0 to the
  84. * (read-only) register before reading and the second time we write
  85. * 0xff first. If the two reads do not match or they read back as 0xff
  86. * or 0x00 then we have version 1 hardware.
  87. */
  88. static u8 viper_hw_version(void)
  89. {
  90. u8 v1, v2;
  91. unsigned long flags;
  92. local_irq_save(flags);
  93. VIPER_VERSION = 0;
  94. v1 = VIPER_VERSION;
  95. VIPER_VERSION = 0xff;
  96. v2 = VIPER_VERSION;
  97. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  98. local_irq_restore(flags);
  99. return v1;
  100. }
  101. /* CPU sysdev */
  102. static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
  103. {
  104. viper_icr_set_bit(VIPER_ICR_R_DIS);
  105. return 0;
  106. }
  107. static int viper_cpu_resume(struct sys_device *sysdev)
  108. {
  109. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  110. return 0;
  111. }
  112. static struct sysdev_driver viper_cpu_sysdev_driver = {
  113. .suspend = viper_cpu_suspend,
  114. .resume = viper_cpu_resume,
  115. };
  116. static unsigned int current_voltage_divisor;
  117. /*
  118. * If force is not true then step from existing to new divisor. If
  119. * force is true then jump straight to the new divisor. Stepping is
  120. * used because if the jump in voltage is too large, the VCC can dip
  121. * too low and the regulator cuts out.
  122. *
  123. * force can be used to initialize the divisor to a know state by
  124. * setting the value for the current clock speed, since we are already
  125. * running at that speed we know the voltage should be pretty close so
  126. * the jump won't be too large
  127. */
  128. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  129. {
  130. int i = 0;
  131. unsigned int divisor = 0;
  132. const char *v;
  133. if (khz < 200000) {
  134. v = "1.0"; divisor = 0xfff;
  135. } else if (khz < 300000) {
  136. v = "1.1"; divisor = 0xde5;
  137. } else {
  138. v = "1.3"; divisor = 0x325;
  139. }
  140. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  141. v, (int)khz / 1000, (int)khz % 1000);
  142. #define STEP 0x100
  143. do {
  144. int step;
  145. if (force)
  146. step = divisor;
  147. else if (current_voltage_divisor < divisor - STEP)
  148. step = current_voltage_divisor + STEP;
  149. else if (current_voltage_divisor > divisor + STEP)
  150. step = current_voltage_divisor - STEP;
  151. else
  152. step = divisor;
  153. force = 0;
  154. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  155. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  156. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  157. udelay(1);
  158. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  159. udelay(1);
  160. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  161. udelay(1);
  162. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  163. }
  164. udelay(1);
  165. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  166. udelay(1);
  167. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  168. current_voltage_divisor = step;
  169. } while (current_voltage_divisor != divisor);
  170. }
  171. /* Interrupt handling */
  172. static unsigned long viper_irq_enabled_mask;
  173. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  174. static const int viper_isa_irq_map[] = {
  175. 0, /* ISA irq #0, invalid */
  176. 0, /* ISA irq #1, invalid */
  177. 0, /* ISA irq #2, invalid */
  178. 1 << 0, /* ISA irq #3 */
  179. 1 << 1, /* ISA irq #4 */
  180. 1 << 2, /* ISA irq #5 */
  181. 1 << 3, /* ISA irq #6 */
  182. 1 << 4, /* ISA irq #7 */
  183. 0, /* ISA irq #8, invalid */
  184. 1 << 8, /* ISA irq #9 */
  185. 1 << 5, /* ISA irq #10 */
  186. 1 << 6, /* ISA irq #11 */
  187. 1 << 7, /* ISA irq #12 */
  188. 0, /* ISA irq #13, invalid */
  189. 1 << 9, /* ISA irq #14 */
  190. 1 << 10, /* ISA irq #15 */
  191. };
  192. static inline int viper_irq_to_bitmask(unsigned int irq)
  193. {
  194. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  195. }
  196. static inline int viper_bit_to_irq(int bit)
  197. {
  198. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  199. }
  200. static void viper_ack_irq(unsigned int irq)
  201. {
  202. int viper_irq = viper_irq_to_bitmask(irq);
  203. if (viper_irq & 0xff)
  204. VIPER_LO_IRQ_STATUS = viper_irq;
  205. else
  206. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  207. }
  208. static void viper_mask_irq(unsigned int irq)
  209. {
  210. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
  211. }
  212. static void viper_unmask_irq(unsigned int irq)
  213. {
  214. viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
  215. }
  216. static inline unsigned long viper_irq_pending(void)
  217. {
  218. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  219. viper_irq_enabled_mask;
  220. }
  221. static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
  222. {
  223. unsigned long pending;
  224. pending = viper_irq_pending();
  225. do {
  226. /* we're in a chained irq handler,
  227. * so ack the interrupt by hand */
  228. GEDR(VIPER_CPLD_GPIO) = GPIO_bit(VIPER_CPLD_GPIO);
  229. if (likely(pending)) {
  230. irq = viper_bit_to_irq(__ffs(pending));
  231. generic_handle_irq(irq);
  232. }
  233. pending = viper_irq_pending();
  234. } while (pending);
  235. }
  236. static struct irq_chip viper_irq_chip = {
  237. .name = "ISA",
  238. .ack = viper_ack_irq,
  239. .mask = viper_mask_irq,
  240. .unmask = viper_unmask_irq
  241. };
  242. static void __init viper_init_irq(void)
  243. {
  244. int level;
  245. int isa_irq;
  246. pxa25x_init_irq();
  247. /* setup ISA IRQs */
  248. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  249. isa_irq = viper_bit_to_irq(level);
  250. set_irq_chip(isa_irq, &viper_irq_chip);
  251. set_irq_handler(isa_irq, handle_edge_irq);
  252. set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
  253. }
  254. set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  255. viper_irq_handler);
  256. set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  257. #ifndef CONFIG_SERIAL_PXA
  258. /*
  259. * 8250 doesn't support IRQ_TYPE being passed as part
  260. * of the plat_serial8250_port structure...
  261. */
  262. set_irq_type(gpio_to_irq(VIPER_UARTA_GPIO), IRQ_TYPE_EDGE_RISING);
  263. set_irq_type(gpio_to_irq(VIPER_UARTB_GPIO), IRQ_TYPE_EDGE_RISING);
  264. #endif
  265. }
  266. /* Flat Panel */
  267. static struct pxafb_mode_info fb_mode_info[] = {
  268. {
  269. .pixclock = 157500,
  270. .xres = 320,
  271. .yres = 240,
  272. .bpp = 16,
  273. .hsync_len = 63,
  274. .left_margin = 7,
  275. .right_margin = 13,
  276. .vsync_len = 20,
  277. .upper_margin = 0,
  278. .lower_margin = 0,
  279. .sync = 0,
  280. },
  281. };
  282. static struct pxafb_mach_info fb_info = {
  283. .modes = fb_mode_info,
  284. .num_modes = 1,
  285. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  286. };
  287. static int viper_backlight_init(struct device *dev)
  288. {
  289. int ret;
  290. /* GPIO9 and 10 control FB backlight. Initialise to off */
  291. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  292. if (ret)
  293. goto err_request_bckl;
  294. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  295. if (ret)
  296. goto err_request_lcd;
  297. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  298. if (ret)
  299. goto err_dir;
  300. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  301. if (ret)
  302. goto err_dir;
  303. return 0;
  304. err_dir:
  305. gpio_free(VIPER_LCD_EN_GPIO);
  306. err_request_lcd:
  307. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  308. err_request_bckl:
  309. dev_err(dev, "Failed to setup LCD GPIOs\n");
  310. return ret;
  311. }
  312. static int viper_backlight_notify(int brightness)
  313. {
  314. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  315. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  316. return brightness;
  317. }
  318. static void viper_backlight_exit(struct device *dev)
  319. {
  320. gpio_free(VIPER_LCD_EN_GPIO);
  321. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  322. }
  323. static struct platform_pwm_backlight_data viper_backlight_data = {
  324. .pwm_id = 0,
  325. .max_brightness = 100,
  326. .dft_brightness = 100,
  327. .pwm_period_ns = 1000000,
  328. .init = viper_backlight_init,
  329. .notify = viper_backlight_notify,
  330. .exit = viper_backlight_exit,
  331. };
  332. static struct platform_device viper_backlight_device = {
  333. .name = "pwm-backlight",
  334. .dev = {
  335. .parent = &pxa25x_device_pwm0.dev,
  336. .platform_data = &viper_backlight_data,
  337. },
  338. };
  339. /* Ethernet */
  340. static struct resource smc91x_resources[] = {
  341. [0] = {
  342. .name = "smc91x-regs",
  343. .start = VIPER_ETH_PHYS + 0x300,
  344. .end = VIPER_ETH_PHYS + 0x30f,
  345. .flags = IORESOURCE_MEM,
  346. },
  347. [1] = {
  348. .start = gpio_to_irq(VIPER_ETH_GPIO),
  349. .end = gpio_to_irq(VIPER_ETH_GPIO),
  350. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  351. },
  352. [2] = {
  353. .name = "smc91x-data32",
  354. .start = VIPER_ETH_DATA_PHYS,
  355. .end = VIPER_ETH_DATA_PHYS + 3,
  356. .flags = IORESOURCE_MEM,
  357. },
  358. };
  359. static struct smc91x_platdata viper_smc91x_info = {
  360. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  361. .leda = RPC_LED_100_10,
  362. .ledb = RPC_LED_TX_RX,
  363. };
  364. static struct platform_device smc91x_device = {
  365. .name = "smc91x",
  366. .id = -1,
  367. .num_resources = ARRAY_SIZE(smc91x_resources),
  368. .resource = smc91x_resources,
  369. .dev = {
  370. .platform_data = &viper_smc91x_info,
  371. },
  372. };
  373. /* i2c */
  374. static struct i2c_gpio_platform_data i2c_bus_data = {
  375. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  376. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  377. .udelay = 10,
  378. .timeout = 100,
  379. };
  380. static struct platform_device i2c_bus_device = {
  381. .name = "i2c-gpio",
  382. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  383. .dev = {
  384. .platform_data = &i2c_bus_data,
  385. }
  386. };
  387. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  388. {
  389. I2C_BOARD_INFO("ds1338", 0x68),
  390. },
  391. };
  392. /*
  393. * Serial configuration:
  394. * You can either have the standard PXA ports driven by the PXA driver,
  395. * or all the ports (PXA + 16850) driven by the 8250 driver.
  396. * Choose your poison.
  397. */
  398. static struct resource viper_serial_resources[] = {
  399. #ifndef CONFIG_SERIAL_PXA
  400. {
  401. .start = 0x40100000,
  402. .end = 0x4010001f,
  403. .flags = IORESOURCE_MEM,
  404. },
  405. {
  406. .start = 0x40200000,
  407. .end = 0x4020001f,
  408. .flags = IORESOURCE_MEM,
  409. },
  410. {
  411. .start = 0x40700000,
  412. .end = 0x4070001f,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = VIPER_UARTA_PHYS,
  417. .end = VIPER_UARTA_PHYS + 0xf,
  418. .flags = IORESOURCE_MEM,
  419. },
  420. {
  421. .start = VIPER_UARTB_PHYS,
  422. .end = VIPER_UARTB_PHYS + 0xf,
  423. .flags = IORESOURCE_MEM,
  424. },
  425. #else
  426. {
  427. 0,
  428. },
  429. #endif
  430. };
  431. static struct plat_serial8250_port serial_platform_data[] = {
  432. #ifndef CONFIG_SERIAL_PXA
  433. /* Internal UARTs */
  434. {
  435. .membase = (void *)&FFUART,
  436. .mapbase = __PREG(FFUART),
  437. .irq = IRQ_FFUART,
  438. .uartclk = 921600 * 16,
  439. .regshift = 2,
  440. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  441. .iotype = UPIO_MEM,
  442. },
  443. {
  444. .membase = (void *)&BTUART,
  445. .mapbase = __PREG(BTUART),
  446. .irq = IRQ_BTUART,
  447. .uartclk = 921600 * 16,
  448. .regshift = 2,
  449. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  450. .iotype = UPIO_MEM,
  451. },
  452. {
  453. .membase = (void *)&STUART,
  454. .mapbase = __PREG(STUART),
  455. .irq = IRQ_STUART,
  456. .uartclk = 921600 * 16,
  457. .regshift = 2,
  458. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  459. .iotype = UPIO_MEM,
  460. },
  461. /* External UARTs */
  462. {
  463. .mapbase = VIPER_UARTA_PHYS,
  464. .irq = gpio_to_irq(VIPER_UARTA_GPIO),
  465. .uartclk = 1843200,
  466. .regshift = 1,
  467. .iotype = UPIO_MEM,
  468. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  469. UPF_SKIP_TEST,
  470. },
  471. {
  472. .mapbase = VIPER_UARTB_PHYS,
  473. .irq = gpio_to_irq(VIPER_UARTB_GPIO),
  474. .uartclk = 1843200,
  475. .regshift = 1,
  476. .iotype = UPIO_MEM,
  477. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  478. UPF_SKIP_TEST,
  479. },
  480. #endif
  481. { },
  482. };
  483. static struct platform_device serial_device = {
  484. .name = "serial8250",
  485. .id = 0,
  486. .dev = {
  487. .platform_data = serial_platform_data,
  488. },
  489. .num_resources = ARRAY_SIZE(viper_serial_resources),
  490. .resource = viper_serial_resources,
  491. };
  492. /* USB */
  493. static void isp116x_delay(struct device *dev, int delay)
  494. {
  495. ndelay(delay);
  496. }
  497. static struct resource isp116x_resources[] = {
  498. [0] = { /* DATA */
  499. .start = VIPER_USB_PHYS + 0,
  500. .end = VIPER_USB_PHYS + 1,
  501. .flags = IORESOURCE_MEM,
  502. },
  503. [1] = { /* ADDR */
  504. .start = VIPER_USB_PHYS + 2,
  505. .end = VIPER_USB_PHYS + 3,
  506. .flags = IORESOURCE_MEM,
  507. },
  508. [2] = {
  509. .start = gpio_to_irq(VIPER_USB_GPIO),
  510. .end = gpio_to_irq(VIPER_USB_GPIO),
  511. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  512. },
  513. };
  514. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  515. static struct isp116x_platform_data isp116x_platform_data = {
  516. /* Enable internal resistors on downstream ports */
  517. .sel15Kres = 1,
  518. /* On-chip overcurrent protection */
  519. .oc_enable = 1,
  520. /* INT output polarity */
  521. .int_act_high = 1,
  522. /* INT edge or level triggered */
  523. .int_edge_triggered = 0,
  524. /* WAKEUP pin connected - NOT SUPPORTED */
  525. /* .remote_wakeup_connected = 0, */
  526. /* Wakeup by devices on usb bus enabled */
  527. .remote_wakeup_enable = 0,
  528. .delay = isp116x_delay,
  529. };
  530. static struct platform_device isp116x_device = {
  531. .name = "isp116x-hcd",
  532. .id = -1,
  533. .num_resources = ARRAY_SIZE(isp116x_resources),
  534. .resource = isp116x_resources,
  535. .dev = {
  536. .platform_data = &isp116x_platform_data,
  537. },
  538. };
  539. /* MTD */
  540. static struct resource mtd_resources[] = {
  541. [0] = { /* RedBoot config + filesystem flash */
  542. .start = VIPER_FLASH_PHYS,
  543. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  544. .flags = IORESOURCE_MEM,
  545. },
  546. [1] = { /* Boot flash */
  547. .start = VIPER_BOOT_PHYS,
  548. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  549. .flags = IORESOURCE_MEM,
  550. },
  551. [2] = { /*
  552. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  553. * (each byte is on a 16bit boundary).
  554. */
  555. .start = _VIPER_SRAM_BASE,
  556. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  557. .flags = IORESOURCE_MEM,
  558. },
  559. };
  560. static struct mtd_partition viper_boot_flash_partition = {
  561. .name = "RedBoot",
  562. .size = SZ_1M,
  563. .offset = 0,
  564. .mask_flags = MTD_WRITEABLE, /* force R/O */
  565. };
  566. static struct physmap_flash_data viper_flash_data[] = {
  567. [0] = {
  568. .width = 2,
  569. .parts = NULL,
  570. .nr_parts = 0,
  571. },
  572. [1] = {
  573. .width = 2,
  574. .parts = &viper_boot_flash_partition,
  575. .nr_parts = 1,
  576. },
  577. };
  578. static struct platform_device viper_mtd_devices[] = {
  579. [0] = {
  580. .name = "physmap-flash",
  581. .id = 0,
  582. .dev = {
  583. .platform_data = &viper_flash_data[0],
  584. },
  585. .resource = &mtd_resources[0],
  586. .num_resources = 1,
  587. },
  588. [1] = {
  589. .name = "physmap-flash",
  590. .id = 1,
  591. .dev = {
  592. .platform_data = &viper_flash_data[1],
  593. },
  594. .resource = &mtd_resources[1],
  595. .num_resources = 1,
  596. },
  597. };
  598. static struct platform_device *viper_devs[] __initdata = {
  599. &smc91x_device,
  600. &i2c_bus_device,
  601. &serial_device,
  602. &isp116x_device,
  603. &viper_mtd_devices[0],
  604. &viper_mtd_devices[1],
  605. &viper_backlight_device,
  606. };
  607. static mfp_cfg_t viper_pin_config[] __initdata = {
  608. /* Chip selects */
  609. GPIO15_nCS_1,
  610. GPIO78_nCS_2,
  611. GPIO79_nCS_3,
  612. GPIO80_nCS_4,
  613. GPIO33_nCS_5,
  614. /* FP Backlight */
  615. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  616. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  617. GPIO16_PWM0_OUT,
  618. /* Ethernet PHY Ready */
  619. GPIO18_RDY,
  620. /* Serial shutdown */
  621. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  622. /* Compact-Flash / PC104 */
  623. GPIO48_nPOE,
  624. GPIO49_nPWE,
  625. GPIO50_nPIOR,
  626. GPIO51_nPIOW,
  627. GPIO52_nPCE_1,
  628. GPIO53_nPCE_2,
  629. GPIO54_nPSKTSEL,
  630. GPIO55_nPREG,
  631. GPIO56_nPWAIT,
  632. GPIO57_nIOIS16,
  633. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  634. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  635. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  636. /* Integrated UPS control */
  637. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  638. /* Vcc regulator control */
  639. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  640. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  641. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  642. /* i2c busses */
  643. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  644. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  645. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  646. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  647. /* PC/104 Interrupt */
  648. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  649. };
  650. static unsigned long viper_tpm;
  651. static int __init viper_tpm_setup(char *str)
  652. {
  653. strict_strtoul(str, 10, &viper_tpm);
  654. return 1;
  655. }
  656. __setup("tpm=", viper_tpm_setup);
  657. static void __init viper_tpm_init(void)
  658. {
  659. struct platform_device *tpm_device;
  660. struct i2c_gpio_platform_data i2c_tpm_data = {
  661. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  662. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  663. .udelay = 10,
  664. .timeout = 100,
  665. };
  666. char *errstr;
  667. /* Allocate TPM i2c bus if requested */
  668. if (!viper_tpm)
  669. return;
  670. tpm_device = platform_device_alloc("i2c-gpio", 2);
  671. if (tpm_device) {
  672. if (!platform_device_add_data(tpm_device,
  673. &i2c_tpm_data,
  674. sizeof(i2c_tpm_data))) {
  675. if (platform_device_add(tpm_device)) {
  676. errstr = "register TPM i2c bus";
  677. goto error_free_tpm;
  678. }
  679. } else {
  680. errstr = "allocate TPM i2c bus data";
  681. goto error_free_tpm;
  682. }
  683. } else {
  684. errstr = "allocate TPM i2c device";
  685. goto error_tpm;
  686. }
  687. return;
  688. error_free_tpm:
  689. kfree(tpm_device);
  690. error_tpm:
  691. pr_err("viper: Couldn't %s, giving up\n", errstr);
  692. }
  693. static void __init viper_init_vcore_gpios(void)
  694. {
  695. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  696. goto err_request_data;
  697. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  698. goto err_request_clk;
  699. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  700. goto err_request_cs;
  701. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  702. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  703. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  704. goto err_dir;
  705. /* c/should assume redboot set the correct level ??? */
  706. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  707. return;
  708. err_dir:
  709. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  710. err_request_cs:
  711. gpio_free(VIPER_PSU_CLK_GPIO);
  712. err_request_clk:
  713. gpio_free(VIPER_PSU_DATA_GPIO);
  714. err_request_data:
  715. pr_err("viper: Failed to setup vcore control GPIOs\n");
  716. }
  717. static void __init viper_init_serial_gpio(void)
  718. {
  719. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  720. goto err_request;
  721. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  722. goto err_dir;
  723. return;
  724. err_dir:
  725. gpio_free(VIPER_UART_SHDN_GPIO);
  726. err_request:
  727. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  728. }
  729. #ifdef CONFIG_CPU_FREQ
  730. static int viper_cpufreq_notifier(struct notifier_block *nb,
  731. unsigned long val, void *data)
  732. {
  733. struct cpufreq_freqs *freq = data;
  734. /* TODO: Adjust timings??? */
  735. switch (val) {
  736. case CPUFREQ_PRECHANGE:
  737. if (freq->old < freq->new) {
  738. /* we are getting faster so raise the voltage
  739. * before we change freq */
  740. viper_set_core_cpu_voltage(freq->new, 0);
  741. }
  742. break;
  743. case CPUFREQ_POSTCHANGE:
  744. if (freq->old > freq->new) {
  745. /* we are slowing down so drop the power
  746. * after we change freq */
  747. viper_set_core_cpu_voltage(freq->new, 0);
  748. }
  749. break;
  750. case CPUFREQ_RESUMECHANGE:
  751. viper_set_core_cpu_voltage(freq->new, 0);
  752. break;
  753. default:
  754. /* ignore */
  755. break;
  756. }
  757. return 0;
  758. }
  759. static struct notifier_block viper_cpufreq_notifier_block = {
  760. .notifier_call = viper_cpufreq_notifier
  761. };
  762. static void __init viper_init_cpufreq(void)
  763. {
  764. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  765. CPUFREQ_TRANSITION_NOTIFIER))
  766. pr_err("viper: Failed to setup cpufreq notifier\n");
  767. }
  768. #else
  769. static inline void viper_init_cpufreq(void) {}
  770. #endif
  771. static void viper_power_off(void)
  772. {
  773. pr_notice("Shutting off UPS\n");
  774. gpio_set_value(VIPER_UPS_GPIO, 1);
  775. /* Spin to death... */
  776. while (1);
  777. }
  778. static void __init viper_init(void)
  779. {
  780. u8 version;
  781. pm_power_off = viper_power_off;
  782. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  783. /* Wake-up serial console */
  784. viper_init_serial_gpio();
  785. set_pxa_fb_info(&fb_info);
  786. /* v1 hardware cannot use the datacs line */
  787. version = viper_hw_version();
  788. if (version == 0)
  789. smc91x_device.num_resources--;
  790. pxa_set_i2c_info(NULL);
  791. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  792. viper_init_vcore_gpios();
  793. viper_init_cpufreq();
  794. sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
  795. if (version) {
  796. pr_info("viper: hardware v%di%d detected. "
  797. "CPLD revision %d.\n",
  798. VIPER_BOARD_VERSION(version),
  799. VIPER_BOARD_ISSUE(version),
  800. VIPER_CPLD_REVISION(version));
  801. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  802. (VIPER_BOARD_ISSUE(version) << 4) |
  803. VIPER_CPLD_REVISION(version);
  804. } else {
  805. pr_info("viper: No version register.\n");
  806. }
  807. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  808. viper_tpm_init();
  809. pxa_set_ac97_info(NULL);
  810. }
  811. static struct map_desc viper_io_desc[] __initdata = {
  812. {
  813. .virtual = VIPER_CPLD_BASE,
  814. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  815. .length = 0x00300000,
  816. .type = MT_DEVICE,
  817. },
  818. {
  819. .virtual = VIPER_PC104IO_BASE,
  820. .pfn = __phys_to_pfn(0x30000000),
  821. .length = 0x00800000,
  822. .type = MT_DEVICE,
  823. },
  824. };
  825. static void __init viper_map_io(void)
  826. {
  827. pxa_map_io();
  828. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  829. PCFR |= PCFR_OPDE;
  830. }
  831. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  832. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  833. .phys_io = 0x40000000,
  834. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  835. .boot_params = 0xa0000100,
  836. .map_io = viper_map_io,
  837. .init_irq = viper_init_irq,
  838. .timer = &pxa_timer,
  839. .init_machine = viper_init,
  840. MACHINE_END