ssp.h 2.4 KB

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  1. /*
  2. * ssp.h
  3. *
  4. * Copyright (C) 2003 Russell King, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This driver supports the following PXA CPU/SSP ports:-
  11. *
  12. * PXA250 SSP
  13. * PXA255 SSP, NSSP
  14. * PXA26x SSP, NSSP, ASSP
  15. * PXA27x SSP1, SSP2, SSP3
  16. * PXA3xx SSP1, SSP2, SSP3, SSP4
  17. */
  18. #ifndef __ASM_ARCH_SSP_H
  19. #define __ASM_ARCH_SSP_H
  20. #include <linux/list.h>
  21. #include <linux/io.h>
  22. enum pxa_ssp_type {
  23. SSP_UNDEFINED = 0,
  24. PXA25x_SSP, /* pxa 210, 250, 255, 26x */
  25. PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
  26. PXA27x_SSP,
  27. };
  28. struct ssp_device {
  29. struct platform_device *pdev;
  30. struct list_head node;
  31. struct clk *clk;
  32. void __iomem *mmio_base;
  33. unsigned long phys_base;
  34. const char *label;
  35. int port_id;
  36. int type;
  37. int use_count;
  38. int irq;
  39. int drcmr_rx;
  40. int drcmr_tx;
  41. };
  42. /*
  43. * SSP initialisation flags
  44. */
  45. #define SSP_NO_IRQ 0x1 /* don't register an irq handler in SSP driver */
  46. struct ssp_state {
  47. u32 cr0;
  48. u32 cr1;
  49. u32 to;
  50. u32 psp;
  51. };
  52. struct ssp_dev {
  53. struct ssp_device *ssp;
  54. u32 port;
  55. u32 mode;
  56. u32 flags;
  57. u32 psp_flags;
  58. u32 speed;
  59. int irq;
  60. };
  61. int ssp_write_word(struct ssp_dev *dev, u32 data);
  62. int ssp_read_word(struct ssp_dev *dev, u32 *data);
  63. int ssp_flush(struct ssp_dev *dev);
  64. void ssp_enable(struct ssp_dev *dev);
  65. void ssp_disable(struct ssp_dev *dev);
  66. void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
  67. void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
  68. int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
  69. int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
  70. void ssp_exit(struct ssp_dev *dev);
  71. /**
  72. * ssp_write_reg - Write to a SSP register
  73. *
  74. * @dev: SSP device to access
  75. * @reg: Register to write to
  76. * @val: Value to be written.
  77. */
  78. static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
  79. {
  80. __raw_writel(val, dev->mmio_base + reg);
  81. }
  82. /**
  83. * ssp_read_reg - Read from a SSP register
  84. *
  85. * @dev: SSP device to access
  86. * @reg: Register to read from
  87. */
  88. static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
  89. {
  90. return __raw_readl(dev->mmio_base + reg);
  91. }
  92. struct ssp_device *ssp_request(int port, const char *label);
  93. void ssp_free(struct ssp_device *);
  94. #endif /* __ASM_ARCH_SSP_H */