mx27ads.c 6.9 KB

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  1. /*
  2. * Copyright (C) 2000 Deep Blue Solutions Ltd
  3. * Copyright (C) 2002 Shane Nay (shane@minirl.com)
  4. * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/platform_device.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/map.h>
  23. #include <linux/mtd/partitions.h>
  24. #include <linux/mtd/physmap.h>
  25. #include <mach/common.h>
  26. #include <mach/hardware.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/mach/arch.h>
  29. #include <asm/mach/time.h>
  30. #include <asm/mach/map.h>
  31. #include <mach/gpio.h>
  32. #include <mach/imx-uart.h>
  33. #include <mach/iomux.h>
  34. #include <mach/board-mx27ads.h>
  35. #include "devices.h"
  36. /* ADS's NOR flash */
  37. static struct physmap_flash_data mx27ads_flash_data = {
  38. .width = 2,
  39. };
  40. static struct resource mx27ads_flash_resource = {
  41. .start = 0xc0000000,
  42. .end = 0xc0000000 + 0x02000000 - 1,
  43. .flags = IORESOURCE_MEM,
  44. };
  45. static struct platform_device mx27ads_nor_mtd_device = {
  46. .name = "physmap-flash",
  47. .id = 0,
  48. .dev = {
  49. .platform_data = &mx27ads_flash_data,
  50. },
  51. .num_resources = 1,
  52. .resource = &mx27ads_flash_resource,
  53. };
  54. static int mxc_uart0_pins[] = {
  55. PE12_PF_UART1_TXD,
  56. PE13_PF_UART1_RXD,
  57. PE14_PF_UART1_CTS,
  58. PE15_PF_UART1_RTS
  59. };
  60. static int uart_mxc_port0_init(struct platform_device *pdev)
  61. {
  62. return mxc_gpio_setup_multiple_pins(mxc_uart0_pins,
  63. ARRAY_SIZE(mxc_uart0_pins), "UART0");
  64. }
  65. static int uart_mxc_port0_exit(struct platform_device *pdev)
  66. {
  67. mxc_gpio_release_multiple_pins(mxc_uart0_pins,
  68. ARRAY_SIZE(mxc_uart0_pins));
  69. return 0;
  70. }
  71. static int mxc_uart1_pins[] = {
  72. PE3_PF_UART2_CTS,
  73. PE4_PF_UART2_RTS,
  74. PE6_PF_UART2_TXD,
  75. PE7_PF_UART2_RXD
  76. };
  77. static int uart_mxc_port1_init(struct platform_device *pdev)
  78. {
  79. return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
  80. ARRAY_SIZE(mxc_uart1_pins), "UART1");
  81. }
  82. static int uart_mxc_port1_exit(struct platform_device *pdev)
  83. {
  84. mxc_gpio_release_multiple_pins(mxc_uart1_pins,
  85. ARRAY_SIZE(mxc_uart1_pins));
  86. return 0;
  87. }
  88. static int mxc_uart2_pins[] = {
  89. PE8_PF_UART3_TXD,
  90. PE9_PF_UART3_RXD,
  91. PE10_PF_UART3_CTS,
  92. PE11_PF_UART3_RTS
  93. };
  94. static int uart_mxc_port2_init(struct platform_device *pdev)
  95. {
  96. return mxc_gpio_setup_multiple_pins(mxc_uart2_pins,
  97. ARRAY_SIZE(mxc_uart2_pins), "UART2");
  98. }
  99. static int uart_mxc_port2_exit(struct platform_device *pdev)
  100. {
  101. mxc_gpio_release_multiple_pins(mxc_uart2_pins,
  102. ARRAY_SIZE(mxc_uart2_pins));
  103. return 0;
  104. }
  105. static int mxc_uart3_pins[] = {
  106. PB26_AF_UART4_RTS,
  107. PB28_AF_UART4_TXD,
  108. PB29_AF_UART4_CTS,
  109. PB31_AF_UART4_RXD
  110. };
  111. static int uart_mxc_port3_init(struct platform_device *pdev)
  112. {
  113. return mxc_gpio_setup_multiple_pins(mxc_uart3_pins,
  114. ARRAY_SIZE(mxc_uart3_pins), "UART3");
  115. }
  116. static int uart_mxc_port3_exit(struct platform_device *pdev)
  117. {
  118. mxc_gpio_release_multiple_pins(mxc_uart3_pins,
  119. ARRAY_SIZE(mxc_uart3_pins));
  120. return 0;
  121. }
  122. static int mxc_uart4_pins[] = {
  123. PB18_AF_UART5_TXD,
  124. PB19_AF_UART5_RXD,
  125. PB20_AF_UART5_CTS,
  126. PB21_AF_UART5_RTS
  127. };
  128. static int uart_mxc_port4_init(struct platform_device *pdev)
  129. {
  130. return mxc_gpio_setup_multiple_pins(mxc_uart4_pins,
  131. ARRAY_SIZE(mxc_uart4_pins), "UART4");
  132. }
  133. static int uart_mxc_port4_exit(struct platform_device *pdev)
  134. {
  135. mxc_gpio_release_multiple_pins(mxc_uart4_pins,
  136. ARRAY_SIZE(mxc_uart4_pins));
  137. return 0;
  138. }
  139. static int mxc_uart5_pins[] = {
  140. PB10_AF_UART6_TXD,
  141. PB12_AF_UART6_CTS,
  142. PB11_AF_UART6_RXD,
  143. PB13_AF_UART6_RTS
  144. };
  145. static int uart_mxc_port5_init(struct platform_device *pdev)
  146. {
  147. return mxc_gpio_setup_multiple_pins(mxc_uart5_pins,
  148. ARRAY_SIZE(mxc_uart5_pins), "UART5");
  149. }
  150. static int uart_mxc_port5_exit(struct platform_device *pdev)
  151. {
  152. mxc_gpio_release_multiple_pins(mxc_uart5_pins,
  153. ARRAY_SIZE(mxc_uart5_pins));
  154. return 0;
  155. }
  156. static struct platform_device *platform_devices[] __initdata = {
  157. &mx27ads_nor_mtd_device,
  158. &mxc_fec_device,
  159. };
  160. static int mxc_fec_pins[] = {
  161. PD0_AIN_FEC_TXD0,
  162. PD1_AIN_FEC_TXD1,
  163. PD2_AIN_FEC_TXD2,
  164. PD3_AIN_FEC_TXD3,
  165. PD4_AOUT_FEC_RX_ER,
  166. PD5_AOUT_FEC_RXD1,
  167. PD6_AOUT_FEC_RXD2,
  168. PD7_AOUT_FEC_RXD3,
  169. PD8_AF_FEC_MDIO,
  170. PD9_AIN_FEC_MDC,
  171. PD10_AOUT_FEC_CRS,
  172. PD11_AOUT_FEC_TX_CLK,
  173. PD12_AOUT_FEC_RXD0,
  174. PD13_AOUT_FEC_RX_DV,
  175. PD14_AOUT_FEC_RX_CLK,
  176. PD15_AOUT_FEC_COL,
  177. PD16_AIN_FEC_TX_ER,
  178. PF23_AIN_FEC_TX_EN
  179. };
  180. static void gpio_fec_active(void)
  181. {
  182. mxc_gpio_setup_multiple_pins(mxc_fec_pins,
  183. ARRAY_SIZE(mxc_fec_pins), "FEC");
  184. }
  185. static struct imxuart_platform_data uart_pdata[] = {
  186. {
  187. .init = uart_mxc_port0_init,
  188. .exit = uart_mxc_port0_exit,
  189. .flags = IMXUART_HAVE_RTSCTS,
  190. }, {
  191. .init = uart_mxc_port1_init,
  192. .exit = uart_mxc_port1_exit,
  193. .flags = IMXUART_HAVE_RTSCTS,
  194. }, {
  195. .init = uart_mxc_port2_init,
  196. .exit = uart_mxc_port2_exit,
  197. .flags = IMXUART_HAVE_RTSCTS,
  198. }, {
  199. .init = uart_mxc_port3_init,
  200. .exit = uart_mxc_port3_exit,
  201. .flags = IMXUART_HAVE_RTSCTS,
  202. }, {
  203. .init = uart_mxc_port4_init,
  204. .exit = uart_mxc_port4_exit,
  205. .flags = IMXUART_HAVE_RTSCTS,
  206. }, {
  207. .init = uart_mxc_port5_init,
  208. .exit = uart_mxc_port5_exit,
  209. .flags = IMXUART_HAVE_RTSCTS,
  210. },
  211. };
  212. static void __init mx27ads_board_init(void)
  213. {
  214. gpio_fec_active();
  215. mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
  216. mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
  217. mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
  218. mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
  219. mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
  220. mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
  221. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  222. }
  223. static void __init mx27ads_timer_init(void)
  224. {
  225. unsigned long fref = 26000000;
  226. if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0)
  227. fref = 27000000;
  228. mx27_clocks_init(fref);
  229. }
  230. static struct sys_timer mx27ads_timer = {
  231. .init = mx27ads_timer_init,
  232. };
  233. static struct map_desc mx27ads_io_desc[] __initdata = {
  234. {
  235. .virtual = PBC_BASE_ADDRESS,
  236. .pfn = __phys_to_pfn(CS4_BASE_ADDR),
  237. .length = SZ_1M,
  238. .type = MT_DEVICE,
  239. },
  240. };
  241. static void __init mx27ads_map_io(void)
  242. {
  243. mxc_map_io();
  244. iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc));
  245. }
  246. MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
  247. /* maintainer: Freescale Semiconductor, Inc. */
  248. .phys_io = AIPI_BASE_ADDR,
  249. .io_pg_offst = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
  250. .boot_params = PHYS_OFFSET + 0x100,
  251. .map_io = mx27ads_map_io,
  252. .init_irq = mxc_init_irq,
  253. .init_machine = mx27ads_board_init,
  254. .timer = &mx27ads_timer,
  255. MACHINE_END